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--- old/src/cpu/sparc/vm/interp_masm_sparc.cpp
+++ new/src/cpu/sparc/vm/interp_masm_sparc.cpp
1 1 /*
2 2 * Copyright 1997-2010 Sun Microsystems, Inc. All Rights Reserved.
3 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 4 *
5 5 * This code is free software; you can redistribute it and/or modify it
6 6 * under the terms of the GNU General Public License version 2 only, as
7 7 * published by the Free Software Foundation.
8 8 *
9 9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 12 * version 2 for more details (a copy is included in the LICENSE file that
13 13 * accompanied this code).
14 14 *
15 15 * You should have received a copy of the GNU General Public License version
16 16 * 2 along with this work; if not, write to the Free Software Foundation,
17 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 18 *
19 19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
20 20 * CA 95054 USA or visit www.sun.com if you need additional information or
21 21 * have any questions.
22 22 *
23 23 */
24 24
25 25 #include "incls/_precompiled.incl"
26 26 #include "incls/_interp_masm_sparc.cpp.incl"
27 27
28 28 #ifndef CC_INTERP
29 29 #ifndef FAST_DISPATCH
30 30 #define FAST_DISPATCH 1
31 31 #endif
32 32 #undef FAST_DISPATCH
33 33
34 34 // Implementation of InterpreterMacroAssembler
35 35
36 36 // This file specializes the assember with interpreter-specific macros
37 37
38 38 const Address InterpreterMacroAssembler::l_tmp(FP, (frame::interpreter_frame_l_scratch_fp_offset * wordSize) + STACK_BIAS);
39 39 const Address InterpreterMacroAssembler::d_tmp(FP, (frame::interpreter_frame_d_scratch_fp_offset * wordSize) + STACK_BIAS);
40 40
41 41 #else // CC_INTERP
42 42 #ifndef STATE
43 43 #define STATE(field_name) Lstate, in_bytes(byte_offset_of(BytecodeInterpreter, field_name))
44 44 #endif // STATE
45 45
46 46 #endif // CC_INTERP
47 47
48 48 void InterpreterMacroAssembler::compute_extra_locals_size_in_bytes(Register args_size, Register locals_size, Register delta) {
49 49 // Note: this algorithm is also used by C1's OSR entry sequence.
50 50 // Any changes should also be applied to CodeEmitter::emit_osr_entry().
51 51 assert_different_registers(args_size, locals_size);
52 52 // max_locals*2 for TAGS. Assumes that args_size has already been adjusted.
53 53 if (TaggedStackInterpreter) sll(locals_size, 1, locals_size);
54 54 subcc(locals_size, args_size, delta);// extra space for non-arguments locals in words
55 55 // Use br/mov combination because it works on both V8 and V9 and is
56 56 // faster.
57 57 Label skip_move;
58 58 br(Assembler::negative, true, Assembler::pt, skip_move);
59 59 delayed()->mov(G0, delta);
60 60 bind(skip_move);
61 61 round_to(delta, WordsPerLong); // make multiple of 2 (SP must be 2-word aligned)
62 62 sll(delta, LogBytesPerWord, delta); // extra space for locals in bytes
63 63 }
64 64
65 65 #ifndef CC_INTERP
66 66
67 67 // Dispatch code executed in the prolog of a bytecode which does not do it's
68 68 // own dispatch. The dispatch address is computed and placed in IdispatchAddress
69 69 void InterpreterMacroAssembler::dispatch_prolog(TosState state, int bcp_incr) {
70 70 assert_not_delayed();
71 71 #ifdef FAST_DISPATCH
72 72 // FAST_DISPATCH and ProfileInterpreter are mutually exclusive since
73 73 // they both use I2.
74 74 assert(!ProfileInterpreter, "FAST_DISPATCH and +ProfileInterpreter are mutually exclusive");
75 75 ldub(Lbcp, bcp_incr, Lbyte_code); // load next bytecode
76 76 add(Lbyte_code, Interpreter::distance_from_dispatch_table(state), Lbyte_code);
77 77 // add offset to correct dispatch table
78 78 sll(Lbyte_code, LogBytesPerWord, Lbyte_code); // multiply by wordSize
79 79 ld_ptr(IdispatchTables, Lbyte_code, IdispatchAddress);// get entry addr
80 80 #else
81 81 ldub( Lbcp, bcp_incr, Lbyte_code); // load next bytecode
82 82 // dispatch table to use
83 83 AddressLiteral tbl(Interpreter::dispatch_table(state));
84 84 sll(Lbyte_code, LogBytesPerWord, Lbyte_code); // multiply by wordSize
85 85 set(tbl, G3_scratch); // compute addr of table
86 86 ld_ptr(G3_scratch, Lbyte_code, IdispatchAddress); // get entry addr
87 87 #endif
88 88 }
89 89
90 90
91 91 // Dispatch code executed in the epilog of a bytecode which does not do it's
92 92 // own dispatch. The dispatch address in IdispatchAddress is used for the
93 93 // dispatch.
94 94 void InterpreterMacroAssembler::dispatch_epilog(TosState state, int bcp_incr) {
95 95 assert_not_delayed();
96 96 verify_FPU(1, state);
97 97 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
98 98 jmp( IdispatchAddress, 0 );
99 99 if (bcp_incr != 0) delayed()->inc(Lbcp, bcp_incr);
100 100 else delayed()->nop();
101 101 }
102 102
103 103
104 104 void InterpreterMacroAssembler::dispatch_next(TosState state, int bcp_incr) {
105 105 // %%%% consider branching to a single shared dispatch stub (for each bcp_incr)
106 106 assert_not_delayed();
107 107 ldub( Lbcp, bcp_incr, Lbyte_code); // load next bytecode
108 108 dispatch_Lbyte_code(state, Interpreter::dispatch_table(state), bcp_incr);
109 109 }
110 110
111 111
112 112 void InterpreterMacroAssembler::dispatch_next_noverify_oop(TosState state, int bcp_incr) {
113 113 // %%%% consider branching to a single shared dispatch stub (for each bcp_incr)
114 114 assert_not_delayed();
115 115 ldub( Lbcp, bcp_incr, Lbyte_code); // load next bytecode
116 116 dispatch_Lbyte_code(state, Interpreter::dispatch_table(state), bcp_incr, false);
117 117 }
118 118
119 119
120 120 void InterpreterMacroAssembler::dispatch_via(TosState state, address* table) {
121 121 // load current bytecode
122 122 assert_not_delayed();
123 123 ldub( Lbcp, 0, Lbyte_code); // load next bytecode
124 124 dispatch_base(state, table);
125 125 }
126 126
127 127
128 128 void InterpreterMacroAssembler::call_VM_leaf_base(
129 129 Register java_thread,
130 130 address entry_point,
131 131 int number_of_arguments
132 132 ) {
133 133 if (!java_thread->is_valid())
134 134 java_thread = L7_thread_cache;
135 135 // super call
136 136 MacroAssembler::call_VM_leaf_base(java_thread, entry_point, number_of_arguments);
137 137 }
138 138
139 139
140 140 void InterpreterMacroAssembler::call_VM_base(
141 141 Register oop_result,
142 142 Register java_thread,
143 143 Register last_java_sp,
144 144 address entry_point,
145 145 int number_of_arguments,
146 146 bool check_exception
147 147 ) {
148 148 if (!java_thread->is_valid())
149 149 java_thread = L7_thread_cache;
150 150 // See class ThreadInVMfromInterpreter, which assumes that the interpreter
151 151 // takes responsibility for setting its own thread-state on call-out.
152 152 // However, ThreadInVMfromInterpreter resets the state to "in_Java".
153 153
154 154 //save_bcp(); // save bcp
155 155 MacroAssembler::call_VM_base(oop_result, java_thread, last_java_sp, entry_point, number_of_arguments, check_exception);
156 156 //restore_bcp(); // restore bcp
157 157 //restore_locals(); // restore locals pointer
158 158 }
159 159
160 160
161 161 void InterpreterMacroAssembler::check_and_handle_popframe(Register scratch_reg) {
162 162 if (JvmtiExport::can_pop_frame()) {
163 163 Label L;
164 164
165 165 // Check the "pending popframe condition" flag in the current thread
166 166 ld(G2_thread, JavaThread::popframe_condition_offset(), scratch_reg);
167 167
168 168 // Initiate popframe handling only if it is not already being processed. If the flag
169 169 // has the popframe_processing bit set, it means that this code is called *during* popframe
170 170 // handling - we don't want to reenter.
171 171 btst(JavaThread::popframe_pending_bit, scratch_reg);
172 172 br(zero, false, pt, L);
173 173 delayed()->nop();
174 174 btst(JavaThread::popframe_processing_bit, scratch_reg);
175 175 br(notZero, false, pt, L);
176 176 delayed()->nop();
177 177
178 178 // Call Interpreter::remove_activation_preserving_args_entry() to get the
179 179 // address of the same-named entrypoint in the generated interpreter code.
180 180 call_VM_leaf(noreg, CAST_FROM_FN_PTR(address, Interpreter::remove_activation_preserving_args_entry));
181 181
182 182 // Jump to Interpreter::_remove_activation_preserving_args_entry
183 183 jmpl(O0, G0, G0);
184 184 delayed()->nop();
185 185 bind(L);
186 186 }
187 187 }
188 188
189 189
190 190 void InterpreterMacroAssembler::load_earlyret_value(TosState state) {
191 191 Register thr_state = G4_scratch;
192 192 ld_ptr(G2_thread, JavaThread::jvmti_thread_state_offset(), thr_state);
193 193 const Address tos_addr(thr_state, JvmtiThreadState::earlyret_tos_offset());
194 194 const Address oop_addr(thr_state, JvmtiThreadState::earlyret_oop_offset());
195 195 const Address val_addr(thr_state, JvmtiThreadState::earlyret_value_offset());
196 196 switch (state) {
197 197 case ltos: ld_long(val_addr, Otos_l); break;
198 198 case atos: ld_ptr(oop_addr, Otos_l);
199 199 st_ptr(G0, oop_addr); break;
200 200 case btos: // fall through
201 201 case ctos: // fall through
202 202 case stos: // fall through
203 203 case itos: ld(val_addr, Otos_l1); break;
204 204 case ftos: ldf(FloatRegisterImpl::S, val_addr, Ftos_f); break;
205 205 case dtos: ldf(FloatRegisterImpl::D, val_addr, Ftos_d); break;
206 206 case vtos: /* nothing to do */ break;
207 207 default : ShouldNotReachHere();
208 208 }
209 209 // Clean up tos value in the jvmti thread state
210 210 or3(G0, ilgl, G3_scratch);
211 211 stw(G3_scratch, tos_addr);
212 212 st_long(G0, val_addr);
213 213 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
214 214 }
215 215
216 216
217 217 void InterpreterMacroAssembler::check_and_handle_earlyret(Register scratch_reg) {
218 218 if (JvmtiExport::can_force_early_return()) {
219 219 Label L;
220 220 Register thr_state = G3_scratch;
221 221 ld_ptr(G2_thread, JavaThread::jvmti_thread_state_offset(), thr_state);
222 222 tst(thr_state);
223 223 br(zero, false, pt, L); // if (thread->jvmti_thread_state() == NULL) exit;
224 224 delayed()->nop();
225 225
226 226 // Initiate earlyret handling only if it is not already being processed.
227 227 // If the flag has the earlyret_processing bit set, it means that this code
228 228 // is called *during* earlyret handling - we don't want to reenter.
229 229 ld(thr_state, JvmtiThreadState::earlyret_state_offset(), G4_scratch);
230 230 cmp(G4_scratch, JvmtiThreadState::earlyret_pending);
231 231 br(Assembler::notEqual, false, pt, L);
232 232 delayed()->nop();
233 233
234 234 // Call Interpreter::remove_activation_early_entry() to get the address of the
235 235 // same-named entrypoint in the generated interpreter code
236 236 ld(thr_state, JvmtiThreadState::earlyret_tos_offset(), Otos_l1);
237 237 call_VM_leaf(noreg, CAST_FROM_FN_PTR(address, Interpreter::remove_activation_early_entry), Otos_l1);
238 238
239 239 // Jump to Interpreter::_remove_activation_early_entry
240 240 jmpl(O0, G0, G0);
241 241 delayed()->nop();
242 242 bind(L);
243 243 }
244 244 }
245 245
246 246
247 247 void InterpreterMacroAssembler::super_call_VM_leaf(Register thread_cache, address entry_point, Register arg_1, Register arg_2) {
248 248 mov(arg_1, O0);
249 249 mov(arg_2, O1);
250 250 MacroAssembler::call_VM_leaf_base(thread_cache, entry_point, 2);
251 251 }
252 252 #endif /* CC_INTERP */
253 253
254 254
255 255 #ifndef CC_INTERP
256 256
257 257 void InterpreterMacroAssembler::dispatch_base(TosState state, address* table) {
258 258 assert_not_delayed();
259 259 dispatch_Lbyte_code(state, table);
260 260 }
261 261
262 262
263 263 void InterpreterMacroAssembler::dispatch_normal(TosState state) {
264 264 dispatch_base(state, Interpreter::normal_table(state));
265 265 }
266 266
267 267
268 268 void InterpreterMacroAssembler::dispatch_only(TosState state) {
269 269 dispatch_base(state, Interpreter::dispatch_table(state));
270 270 }
271 271
272 272
273 273 // common code to dispatch and dispatch_only
274 274 // dispatch value in Lbyte_code and increment Lbcp
275 275
276 276 void InterpreterMacroAssembler::dispatch_Lbyte_code(TosState state, address* table, int bcp_incr, bool verify) {
277 277 verify_FPU(1, state);
278 278 // %%%%% maybe implement +VerifyActivationFrameSize here
279 279 //verify_thread(); //too slow; we will just verify on method entry & exit
280 280 if (verify) interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
281 281 #ifdef FAST_DISPATCH
282 282 if (table == Interpreter::dispatch_table(state)) {
283 283 // use IdispatchTables
284 284 add(Lbyte_code, Interpreter::distance_from_dispatch_table(state), Lbyte_code);
285 285 // add offset to correct dispatch table
286 286 sll(Lbyte_code, LogBytesPerWord, Lbyte_code); // multiply by wordSize
287 287 ld_ptr(IdispatchTables, Lbyte_code, G3_scratch); // get entry addr
288 288 } else {
289 289 #endif
290 290 // dispatch table to use
291 291 AddressLiteral tbl(table);
292 292 sll(Lbyte_code, LogBytesPerWord, Lbyte_code); // multiply by wordSize
293 293 set(tbl, G3_scratch); // compute addr of table
294 294 ld_ptr(G3_scratch, Lbyte_code, G3_scratch); // get entry addr
295 295 #ifdef FAST_DISPATCH
296 296 }
297 297 #endif
298 298 jmp( G3_scratch, 0 );
299 299 if (bcp_incr != 0) delayed()->inc(Lbcp, bcp_incr);
300 300 else delayed()->nop();
301 301 }
302 302
303 303
304 304 // Helpers for expression stack
305 305
306 306 // Longs and doubles are Category 2 computational types in the
307 307 // JVM specification (section 3.11.1) and take 2 expression stack or
308 308 // local slots.
309 309 // Aligning them on 32 bit with tagged stacks is hard because the code generated
310 310 // for the dup* bytecodes depends on what types are already on the stack.
311 311 // If the types are split into the two stack/local slots, that is much easier
312 312 // (and we can use 0 for non-reference tags).
313 313
314 314 // Known good alignment in _LP64 but unknown otherwise
315 315 void InterpreterMacroAssembler::load_unaligned_double(Register r1, int offset, FloatRegister d) {
316 316 assert_not_delayed();
317 317
318 318 #ifdef _LP64
319 319 ldf(FloatRegisterImpl::D, r1, offset, d);
320 320 #else
321 321 ldf(FloatRegisterImpl::S, r1, offset, d);
322 322 ldf(FloatRegisterImpl::S, r1, offset + Interpreter::stackElementSize(), d->successor());
323 323 #endif
324 324 }
325 325
326 326 // Known good alignment in _LP64 but unknown otherwise
327 327 void InterpreterMacroAssembler::store_unaligned_double(FloatRegister d, Register r1, int offset) {
328 328 assert_not_delayed();
329 329
330 330 #ifdef _LP64
331 331 stf(FloatRegisterImpl::D, d, r1, offset);
332 332 // store something more useful here
333 333 debug_only(stx(G0, r1, offset+Interpreter::stackElementSize());)
334 334 #else
335 335 stf(FloatRegisterImpl::S, d, r1, offset);
336 336 stf(FloatRegisterImpl::S, d->successor(), r1, offset + Interpreter::stackElementSize());
337 337 #endif
338 338 }
339 339
340 340
341 341 // Known good alignment in _LP64 but unknown otherwise
342 342 void InterpreterMacroAssembler::load_unaligned_long(Register r1, int offset, Register rd) {
343 343 assert_not_delayed();
344 344 #ifdef _LP64
345 345 ldx(r1, offset, rd);
346 346 #else
347 347 ld(r1, offset, rd);
348 348 ld(r1, offset + Interpreter::stackElementSize(), rd->successor());
349 349 #endif
350 350 }
351 351
352 352 // Known good alignment in _LP64 but unknown otherwise
353 353 void InterpreterMacroAssembler::store_unaligned_long(Register l, Register r1, int offset) {
354 354 assert_not_delayed();
355 355
356 356 #ifdef _LP64
357 357 stx(l, r1, offset);
358 358 // store something more useful here
359 359 debug_only(stx(G0, r1, offset+Interpreter::stackElementSize());)
360 360 #else
361 361 st(l, r1, offset);
362 362 st(l->successor(), r1, offset + Interpreter::stackElementSize());
363 363 #endif
364 364 }
365 365
366 366 #ifdef ASSERT
367 367 void InterpreterMacroAssembler::verify_stack_tag(frame::Tag t,
368 368 Register r,
369 369 Register scratch) {
370 370 if (TaggedStackInterpreter) {
371 371 Label ok, long_ok;
372 372 ld_ptr(Lesp, Interpreter::expr_tag_offset_in_bytes(0), r);
373 373 if (t == frame::TagCategory2) {
374 374 cmp(r, G0);
375 375 brx(Assembler::equal, false, Assembler::pt, long_ok);
376 376 delayed()->ld_ptr(Lesp, Interpreter::expr_tag_offset_in_bytes(1), r);
377 377 stop("stack long/double tag value bad");
378 378 bind(long_ok);
379 379 cmp(r, G0);
380 380 } else if (t == frame::TagValue) {
381 381 cmp(r, G0);
382 382 } else {
383 383 assert_different_registers(r, scratch);
384 384 mov(t, scratch);
385 385 cmp(r, scratch);
386 386 }
387 387 brx(Assembler::equal, false, Assembler::pt, ok);
388 388 delayed()->nop();
389 389 // Also compare if the stack value is zero, then the tag might
390 390 // not have been set coming from deopt.
391 391 ld_ptr(Lesp, Interpreter::expr_offset_in_bytes(0), r);
392 392 cmp(r, G0);
393 393 brx(Assembler::equal, false, Assembler::pt, ok);
394 394 delayed()->nop();
395 395 stop("Stack tag value is bad");
396 396 bind(ok);
397 397 }
398 398 }
399 399 #endif // ASSERT
400 400
401 401 void InterpreterMacroAssembler::pop_i(Register r) {
402 402 assert_not_delayed();
403 403 // Uses destination register r for scratch
404 404 debug_only(verify_stack_tag(frame::TagValue, r));
405 405 ld(Lesp, Interpreter::expr_offset_in_bytes(0), r);
406 406 inc(Lesp, Interpreter::stackElementSize());
407 407 debug_only(verify_esp(Lesp));
408 408 }
409 409
410 410 void InterpreterMacroAssembler::pop_ptr(Register r, Register scratch) {
411 411 assert_not_delayed();
412 412 // Uses destination register r for scratch
413 413 debug_only(verify_stack_tag(frame::TagReference, r, scratch));
414 414 ld_ptr(Lesp, Interpreter::expr_offset_in_bytes(0), r);
415 415 inc(Lesp, Interpreter::stackElementSize());
416 416 debug_only(verify_esp(Lesp));
417 417 }
418 418
419 419 void InterpreterMacroAssembler::pop_l(Register r) {
420 420 assert_not_delayed();
421 421 // Uses destination register r for scratch
422 422 debug_only(verify_stack_tag(frame::TagCategory2, r));
423 423 load_unaligned_long(Lesp, Interpreter::expr_offset_in_bytes(0), r);
424 424 inc(Lesp, 2*Interpreter::stackElementSize());
425 425 debug_only(verify_esp(Lesp));
426 426 }
427 427
428 428
429 429 void InterpreterMacroAssembler::pop_f(FloatRegister f, Register scratch) {
430 430 assert_not_delayed();
431 431 debug_only(verify_stack_tag(frame::TagValue, scratch));
432 432 ldf(FloatRegisterImpl::S, Lesp, Interpreter::expr_offset_in_bytes(0), f);
433 433 inc(Lesp, Interpreter::stackElementSize());
434 434 debug_only(verify_esp(Lesp));
435 435 }
436 436
437 437
438 438 void InterpreterMacroAssembler::pop_d(FloatRegister f, Register scratch) {
439 439 assert_not_delayed();
440 440 debug_only(verify_stack_tag(frame::TagCategory2, scratch));
441 441 load_unaligned_double(Lesp, Interpreter::expr_offset_in_bytes(0), f);
442 442 inc(Lesp, 2*Interpreter::stackElementSize());
443 443 debug_only(verify_esp(Lesp));
444 444 }
445 445
446 446
447 447 // (Note use register first, then decrement so dec can be done during store stall)
448 448 void InterpreterMacroAssembler::tag_stack(Register r) {
449 449 if (TaggedStackInterpreter) {
450 450 st_ptr(r, Lesp, Interpreter::tag_offset_in_bytes());
451 451 }
452 452 }
453 453
454 454 void InterpreterMacroAssembler::tag_stack(frame::Tag t, Register r) {
455 455 if (TaggedStackInterpreter) {
456 456 assert (frame::TagValue == 0, "TagValue must be zero");
457 457 if (t == frame::TagValue) {
458 458 st_ptr(G0, Lesp, Interpreter::tag_offset_in_bytes());
459 459 } else if (t == frame::TagCategory2) {
460 460 st_ptr(G0, Lesp, Interpreter::tag_offset_in_bytes());
461 461 // Tag next slot down too
462 462 st_ptr(G0, Lesp, -Interpreter::stackElementSize() + Interpreter::tag_offset_in_bytes());
463 463 } else {
464 464 assert_different_registers(r, O3);
465 465 mov(t, O3);
466 466 st_ptr(O3, Lesp, Interpreter::tag_offset_in_bytes());
467 467 }
468 468 }
469 469 }
470 470
471 471 void InterpreterMacroAssembler::push_i(Register r) {
472 472 assert_not_delayed();
473 473 debug_only(verify_esp(Lesp));
474 474 tag_stack(frame::TagValue, r);
475 475 st( r, Lesp, Interpreter::value_offset_in_bytes());
476 476 dec( Lesp, Interpreter::stackElementSize());
477 477 }
478 478
479 479 void InterpreterMacroAssembler::push_ptr(Register r) {
480 480 assert_not_delayed();
481 481 tag_stack(frame::TagReference, r);
482 482 st_ptr( r, Lesp, Interpreter::value_offset_in_bytes());
483 483 dec( Lesp, Interpreter::stackElementSize());
484 484 }
485 485
486 486 void InterpreterMacroAssembler::push_ptr(Register r, Register tag) {
487 487 assert_not_delayed();
488 488 tag_stack(tag);
489 489 st_ptr(r, Lesp, Interpreter::value_offset_in_bytes());
490 490 dec( Lesp, Interpreter::stackElementSize());
491 491 }
492 492
493 493 // remember: our convention for longs in SPARC is:
494 494 // O0 (Otos_l1) has high-order part in first word,
495 495 // O1 (Otos_l2) has low-order part in second word
496 496
497 497 void InterpreterMacroAssembler::push_l(Register r) {
498 498 assert_not_delayed();
499 499 debug_only(verify_esp(Lesp));
500 500 tag_stack(frame::TagCategory2, r);
501 501 // Longs are in stored in memory-correct order, even if unaligned.
502 502 // and may be separated by stack tags.
503 503 int offset = -Interpreter::stackElementSize() + Interpreter::value_offset_in_bytes();
504 504 store_unaligned_long(r, Lesp, offset);
505 505 dec(Lesp, 2 * Interpreter::stackElementSize());
506 506 }
507 507
508 508
509 509 void InterpreterMacroAssembler::push_f(FloatRegister f) {
510 510 assert_not_delayed();
511 511 debug_only(verify_esp(Lesp));
512 512 tag_stack(frame::TagValue, Otos_i);
513 513 stf(FloatRegisterImpl::S, f, Lesp, Interpreter::value_offset_in_bytes());
514 514 dec(Lesp, Interpreter::stackElementSize());
515 515 }
516 516
517 517
518 518 void InterpreterMacroAssembler::push_d(FloatRegister d) {
519 519 assert_not_delayed();
520 520 debug_only(verify_esp(Lesp));
521 521 tag_stack(frame::TagCategory2, Otos_i);
522 522 // Longs are in stored in memory-correct order, even if unaligned.
523 523 // and may be separated by stack tags.
524 524 int offset = -Interpreter::stackElementSize() + Interpreter::value_offset_in_bytes();
525 525 store_unaligned_double(d, Lesp, offset);
526 526 dec(Lesp, 2 * Interpreter::stackElementSize());
527 527 }
528 528
529 529
530 530 void InterpreterMacroAssembler::push(TosState state) {
531 531 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
532 532 switch (state) {
533 533 case atos: push_ptr(); break;
534 534 case btos: push_i(); break;
535 535 case ctos:
536 536 case stos: push_i(); break;
537 537 case itos: push_i(); break;
538 538 case ltos: push_l(); break;
539 539 case ftos: push_f(); break;
540 540 case dtos: push_d(); break;
541 541 case vtos: /* nothing to do */ break;
542 542 default : ShouldNotReachHere();
543 543 }
544 544 }
545 545
546 546
547 547 void InterpreterMacroAssembler::pop(TosState state) {
548 548 switch (state) {
549 549 case atos: pop_ptr(); break;
550 550 case btos: pop_i(); break;
551 551 case ctos:
552 552 case stos: pop_i(); break;
553 553 case itos: pop_i(); break;
554 554 case ltos: pop_l(); break;
555 555 case ftos: pop_f(); break;
556 556 case dtos: pop_d(); break;
557 557 case vtos: /* nothing to do */ break;
558 558 default : ShouldNotReachHere();
559 559 }
560 560 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
561 561 }
562 562
563 563
564 564 // Tagged stack helpers for swap and dup
565 565 void InterpreterMacroAssembler::load_ptr_and_tag(int n, Register val,
566 566 Register tag) {
567 567 ld_ptr(Lesp, Interpreter::expr_offset_in_bytes(n), val);
568 568 if (TaggedStackInterpreter) {
569 569 ld_ptr(Lesp, Interpreter::expr_tag_offset_in_bytes(n), tag);
570 570 }
571 571 }
572 572 void InterpreterMacroAssembler::store_ptr_and_tag(int n, Register val,
573 573 Register tag) {
574 574 st_ptr(val, Lesp, Interpreter::expr_offset_in_bytes(n));
575 575 if (TaggedStackInterpreter) {
576 576 st_ptr(tag, Lesp, Interpreter::expr_tag_offset_in_bytes(n));
577 577 }
578 578 }
579 579
580 580
581 581 void InterpreterMacroAssembler::load_receiver(Register param_count,
582 582 Register recv) {
583 583
584 584 sll(param_count, Interpreter::logStackElementSize(), param_count);
585 585 if (TaggedStackInterpreter) {
586 586 add(param_count, Interpreter::value_offset_in_bytes(), param_count); // get obj address
587 587 }
588 588 ld_ptr(Lesp, param_count, recv); // gets receiver Oop
589 589 }
590 590
591 591 void InterpreterMacroAssembler::empty_expression_stack() {
592 592 // Reset Lesp.
593 593 sub( Lmonitors, wordSize, Lesp );
594 594
595 595 // Reset SP by subtracting more space from Lesp.
596 596 Label done;
597 597 verify_oop(Lmethod);
598 598 assert(G4_scratch != Gframe_size, "Only you can prevent register aliasing!");
599 599
600 600 // A native does not need to do this, since its callee does not change SP.
601 601 ld(Lmethod, methodOopDesc::access_flags_offset(), Gframe_size); // Load access flags.
602 602 btst(JVM_ACC_NATIVE, Gframe_size);
603 603 br(Assembler::notZero, false, Assembler::pt, done);
604 604 delayed()->nop();
605 605
606 606 // Compute max expression stack+register save area
607 607 lduh(Lmethod, in_bytes(methodOopDesc::max_stack_offset()), Gframe_size); // Load max stack.
608 608 if (TaggedStackInterpreter) sll ( Gframe_size, 1, Gframe_size); // max_stack * 2 for TAGS
609 609 add( Gframe_size, frame::memory_parameter_word_sp_offset, Gframe_size );
610 610
611 611 //
612 612 // now set up a stack frame with the size computed above
613 613 //
614 614 //round_to( Gframe_size, WordsPerLong ); // -- moved down to the "and" below
615 615 sll( Gframe_size, LogBytesPerWord, Gframe_size );
616 616 sub( Lesp, Gframe_size, Gframe_size );
617 617 and3( Gframe_size, -(2 * wordSize), Gframe_size ); // align SP (downwards) to an 8/16-byte boundary
618 618 debug_only(verify_sp(Gframe_size, G4_scratch));
619 619 #ifdef _LP64
620 620 sub(Gframe_size, STACK_BIAS, Gframe_size );
621 621 #endif
622 622 mov(Gframe_size, SP);
623 623
624 624 bind(done);
625 625 }
626 626
627 627
628 628 #ifdef ASSERT
629 629 void InterpreterMacroAssembler::verify_sp(Register Rsp, Register Rtemp) {
630 630 Label Bad, OK;
631 631
632 632 // Saved SP must be aligned.
633 633 #ifdef _LP64
634 634 btst(2*BytesPerWord-1, Rsp);
635 635 #else
636 636 btst(LongAlignmentMask, Rsp);
637 637 #endif
638 638 br(Assembler::notZero, false, Assembler::pn, Bad);
639 639 delayed()->nop();
640 640
641 641 // Saved SP, plus register window size, must not be above FP.
642 642 add(Rsp, frame::register_save_words * wordSize, Rtemp);
643 643 #ifdef _LP64
644 644 sub(Rtemp, STACK_BIAS, Rtemp); // Bias Rtemp before cmp to FP
645 645 #endif
646 646 cmp(Rtemp, FP);
647 647 brx(Assembler::greaterUnsigned, false, Assembler::pn, Bad);
648 648 delayed()->nop();
649 649
650 650 // Saved SP must not be ridiculously below current SP.
651 651 size_t maxstack = MAX2(JavaThread::stack_size_at_create(), (size_t) 4*K*K);
652 652 set(maxstack, Rtemp);
653 653 sub(SP, Rtemp, Rtemp);
654 654 #ifdef _LP64
655 655 add(Rtemp, STACK_BIAS, Rtemp); // Unbias Rtemp before cmp to Rsp
656 656 #endif
657 657 cmp(Rsp, Rtemp);
658 658 brx(Assembler::lessUnsigned, false, Assembler::pn, Bad);
659 659 delayed()->nop();
660 660
661 661 br(Assembler::always, false, Assembler::pn, OK);
662 662 delayed()->nop();
663 663
664 664 bind(Bad);
665 665 stop("on return to interpreted call, restored SP is corrupted");
666 666
667 667 bind(OK);
668 668 }
669 669
670 670
671 671 void InterpreterMacroAssembler::verify_esp(Register Resp) {
672 672 // about to read or write Resp[0]
673 673 // make sure it is not in the monitors or the register save area
674 674 Label OK1, OK2;
675 675
676 676 cmp(Resp, Lmonitors);
677 677 brx(Assembler::lessUnsigned, true, Assembler::pt, OK1);
678 678 delayed()->sub(Resp, frame::memory_parameter_word_sp_offset * wordSize, Resp);
679 679 stop("too many pops: Lesp points into monitor area");
680 680 bind(OK1);
681 681 #ifdef _LP64
682 682 sub(Resp, STACK_BIAS, Resp);
683 683 #endif
684 684 cmp(Resp, SP);
685 685 brx(Assembler::greaterEqualUnsigned, false, Assembler::pt, OK2);
686 686 delayed()->add(Resp, STACK_BIAS + frame::memory_parameter_word_sp_offset * wordSize, Resp);
687 687 stop("too many pushes: Lesp points into register window");
688 688 bind(OK2);
689 689 }
690 690 #endif // ASSERT
691 691
692 692 // Load compiled (i2c) or interpreter entry when calling from interpreted and
693 693 // do the call. Centralized so that all interpreter calls will do the same actions.
694 694 // If jvmti single stepping is on for a thread we must not call compiled code.
695 695 void InterpreterMacroAssembler::call_from_interpreter(Register target, Register scratch, Register Rret) {
696 696
697 697 // Assume we want to go compiled if available
698 698
699 699 ld_ptr(G5_method, in_bytes(methodOopDesc::from_interpreted_offset()), target);
700 700
701 701 if (JvmtiExport::can_post_interpreter_events()) {
702 702 // JVMTI events, such as single-stepping, are implemented partly by avoiding running
703 703 // compiled code in threads for which the event is enabled. Check here for
704 704 // interp_only_mode if these events CAN be enabled.
705 705 verify_thread();
706 706 Label skip_compiled_code;
707 707
708 708 const Address interp_only(G2_thread, JavaThread::interp_only_mode_offset());
709 709 ld(interp_only, scratch);
710 710 tst(scratch);
711 711 br(Assembler::notZero, true, Assembler::pn, skip_compiled_code);
712 712 delayed()->ld_ptr(G5_method, in_bytes(methodOopDesc::interpreter_entry_offset()), target);
713 713 bind(skip_compiled_code);
714 714 }
715 715
716 716 // the i2c_adapters need methodOop in G5_method (right? %%%)
717 717 // do the call
718 718 #ifdef ASSERT
719 719 {
720 720 Label ok;
721 721 br_notnull(target, false, Assembler::pt, ok);
722 722 delayed()->nop();
723 723 stop("null entry point");
724 724 bind(ok);
725 725 }
726 726 #endif // ASSERT
727 727
728 728 // Adjust Rret first so Llast_SP can be same as Rret
729 729 add(Rret, -frame::pc_return_offset, O7);
730 730 add(Lesp, BytesPerWord, Gargs); // setup parameter pointer
731 731 // Record SP so we can remove any stack space allocated by adapter transition
732 732 jmp(target, 0);
733 733 delayed()->mov(SP, Llast_SP);
734 734 }
735 735
736 736 void InterpreterMacroAssembler::if_cmp(Condition cc, bool ptr_compare) {
737 737 assert_not_delayed();
738 738
739 739 Label not_taken;
740 740 if (ptr_compare) brx(cc, false, Assembler::pn, not_taken);
741 741 else br (cc, false, Assembler::pn, not_taken);
742 742 delayed()->nop();
743 743
744 744 TemplateTable::branch(false,false);
745 745
746 746 bind(not_taken);
747 747
748 748 profile_not_taken_branch(G3_scratch);
749 749 }
750 750
751 751
752 752 void InterpreterMacroAssembler::get_2_byte_integer_at_bcp(
753 753 int bcp_offset,
754 754 Register Rtmp,
755 755 Register Rdst,
756 756 signedOrNot is_signed,
757 757 setCCOrNot should_set_CC ) {
758 758 assert(Rtmp != Rdst, "need separate temp register");
759 759 assert_not_delayed();
760 760 switch (is_signed) {
761 761 default: ShouldNotReachHere();
762 762
763 763 case Signed: ldsb( Lbcp, bcp_offset, Rdst ); break; // high byte
764 764 case Unsigned: ldub( Lbcp, bcp_offset, Rdst ); break; // high byte
765 765 }
766 766 ldub( Lbcp, bcp_offset + 1, Rtmp ); // low byte
767 767 sll( Rdst, BitsPerByte, Rdst);
768 768 switch (should_set_CC ) {
769 769 default: ShouldNotReachHere();
770 770
771 771 case set_CC: orcc( Rdst, Rtmp, Rdst ); break;
772 772 case dont_set_CC: or3( Rdst, Rtmp, Rdst ); break;
773 773 }
774 774 }
775 775
776 776
777 777 void InterpreterMacroAssembler::get_4_byte_integer_at_bcp(
778 778 int bcp_offset,
779 779 Register Rtmp,
780 780 Register Rdst,
781 781 setCCOrNot should_set_CC ) {
782 782 assert(Rtmp != Rdst, "need separate temp register");
783 783 assert_not_delayed();
784 784 add( Lbcp, bcp_offset, Rtmp);
785 785 andcc( Rtmp, 3, G0);
786 786 Label aligned;
787 787 switch (should_set_CC ) {
788 788 default: ShouldNotReachHere();
789 789
790 790 case set_CC: break;
791 791 case dont_set_CC: break;
792 792 }
793 793
794 794 br(Assembler::zero, true, Assembler::pn, aligned);
795 795 #ifdef _LP64
796 796 delayed()->ldsw(Rtmp, 0, Rdst);
797 797 #else
798 798 delayed()->ld(Rtmp, 0, Rdst);
799 799 #endif
800 800
801 801 ldub(Lbcp, bcp_offset + 3, Rdst);
802 802 ldub(Lbcp, bcp_offset + 2, Rtmp); sll(Rtmp, 8, Rtmp); or3(Rtmp, Rdst, Rdst);
803 803 ldub(Lbcp, bcp_offset + 1, Rtmp); sll(Rtmp, 16, Rtmp); or3(Rtmp, Rdst, Rdst);
804 804 #ifdef _LP64
805 805 ldsb(Lbcp, bcp_offset + 0, Rtmp); sll(Rtmp, 24, Rtmp);
806 806 #else
↓ open down ↓ |
806 lines elided |
↑ open up ↑ |
807 807 // Unsigned load is faster than signed on some implementations
808 808 ldub(Lbcp, bcp_offset + 0, Rtmp); sll(Rtmp, 24, Rtmp);
809 809 #endif
810 810 or3(Rtmp, Rdst, Rdst );
811 811
812 812 bind(aligned);
813 813 if (should_set_CC == set_CC) tst(Rdst);
814 814 }
815 815
816 816
817 -void InterpreterMacroAssembler::get_cache_and_index_at_bcp(Register cache, Register tmp, int bcp_offset) {
817 +void InterpreterMacroAssembler::get_cache_index_at_bcp(Register cache, Register tmp,
818 + int bcp_offset, bool giant_index) {
819 + assert(bcp_offset > 0, "bcp is still pointing to start of bytecode");
820 + if (!giant_index) {
821 + get_2_byte_integer_at_bcp(bcp_offset, cache, tmp, Unsigned);
822 + } else {
823 + assert(EnableInvokeDynamic, "giant index used only for EnableInvokeDynamic");
824 + get_4_byte_integer_at_bcp(bcp_offset, cache, tmp);
825 + assert(constantPoolCacheOopDesc::decode_secondary_index(~123) == 123, "else change next line");
826 + xor3(tmp, -1, tmp); // convert to plain index
827 + }
828 +}
829 +
830 +
831 +void InterpreterMacroAssembler::get_cache_and_index_at_bcp(Register cache, Register tmp,
832 + int bcp_offset, bool giant_index) {
818 833 assert(bcp_offset > 0, "bcp is still pointing to start of bytecode");
819 834 assert_different_registers(cache, tmp);
820 835 assert_not_delayed();
821 - get_2_byte_integer_at_bcp(bcp_offset, cache, tmp, Unsigned);
822 - // convert from field index to ConstantPoolCacheEntry index
823 - // and from word index to byte offset
836 + get_cache_index_at_bcp(cache, tmp, bcp_offset, giant_index);
837 + // convert from field index to ConstantPoolCacheEntry index and from
838 + // word index to byte offset
824 839 sll(tmp, exact_log2(in_words(ConstantPoolCacheEntry::size()) * BytesPerWord), tmp);
825 840 add(LcpoolCache, tmp, cache);
826 841 }
827 842
828 843
829 -void InterpreterMacroAssembler::get_cache_entry_pointer_at_bcp(Register cache, Register tmp, int bcp_offset) {
844 +void InterpreterMacroAssembler::get_cache_entry_pointer_at_bcp(Register cache, Register tmp,
845 + int bcp_offset, bool giant_index) {
830 846 assert(bcp_offset > 0, "bcp is still pointing to start of bytecode");
831 847 assert_different_registers(cache, tmp);
832 848 assert_not_delayed();
849 + assert(!giant_index,"NYI");
833 850 get_2_byte_integer_at_bcp(bcp_offset, cache, tmp, Unsigned);
834 851 // convert from field index to ConstantPoolCacheEntry index
835 852 // and from word index to byte offset
836 853 sll(tmp, exact_log2(in_words(ConstantPoolCacheEntry::size()) * BytesPerWord), tmp);
837 854 // skip past the header
838 855 add(tmp, in_bytes(constantPoolCacheOopDesc::base_offset()), tmp);
839 856 // construct pointer to cache entry
840 857 add(LcpoolCache, tmp, cache);
841 858 }
842 859
843 860
844 861 // Generate a subtype check: branch to ok_is_subtype if sub_klass is
845 862 // a subtype of super_klass. Blows registers Rsuper_klass, Rsub_klass, tmp1, tmp2.
846 863 void InterpreterMacroAssembler::gen_subtype_check(Register Rsub_klass,
847 864 Register Rsuper_klass,
848 865 Register Rtmp1,
849 866 Register Rtmp2,
850 867 Register Rtmp3,
851 868 Label &ok_is_subtype ) {
852 869 Label not_subtype;
853 870
854 871 // Profile the not-null value's klass.
855 872 profile_typecheck(Rsub_klass, Rtmp1);
856 873
857 874 check_klass_subtype_fast_path(Rsub_klass, Rsuper_klass,
858 875 Rtmp1, Rtmp2,
859 876 &ok_is_subtype, ¬_subtype, NULL);
860 877
861 878 check_klass_subtype_slow_path(Rsub_klass, Rsuper_klass,
862 879 Rtmp1, Rtmp2, Rtmp3, /*hack:*/ noreg,
863 880 &ok_is_subtype, NULL);
864 881
865 882 bind(not_subtype);
866 883 profile_typecheck_failed(Rtmp1);
867 884 }
868 885
869 886 // Separate these two to allow for delay slot in middle
870 887 // These are used to do a test and full jump to exception-throwing code.
871 888
872 889 // %%%%% Could possibly reoptimize this by testing to see if could use
873 890 // a single conditional branch (i.e. if span is small enough.
874 891 // If you go that route, than get rid of the split and give up
875 892 // on the delay-slot hack.
876 893
877 894 void InterpreterMacroAssembler::throw_if_not_1_icc( Condition ok_condition,
878 895 Label& ok ) {
879 896 assert_not_delayed();
880 897 br(ok_condition, true, pt, ok);
881 898 // DELAY SLOT
882 899 }
883 900
884 901 void InterpreterMacroAssembler::throw_if_not_1_xcc( Condition ok_condition,
885 902 Label& ok ) {
886 903 assert_not_delayed();
887 904 bp( ok_condition, true, Assembler::xcc, pt, ok);
888 905 // DELAY SLOT
889 906 }
890 907
891 908 void InterpreterMacroAssembler::throw_if_not_1_x( Condition ok_condition,
892 909 Label& ok ) {
893 910 assert_not_delayed();
894 911 brx(ok_condition, true, pt, ok);
895 912 // DELAY SLOT
896 913 }
897 914
898 915 void InterpreterMacroAssembler::throw_if_not_2( address throw_entry_point,
899 916 Register Rscratch,
900 917 Label& ok ) {
901 918 assert(throw_entry_point != NULL, "entry point must be generated by now");
902 919 AddressLiteral dest(throw_entry_point);
903 920 jump_to(dest, Rscratch);
904 921 delayed()->nop();
905 922 bind(ok);
906 923 }
907 924
908 925
909 926 // And if you cannot use the delay slot, here is a shorthand:
910 927
911 928 void InterpreterMacroAssembler::throw_if_not_icc( Condition ok_condition,
912 929 address throw_entry_point,
913 930 Register Rscratch ) {
914 931 Label ok;
915 932 if (ok_condition != never) {
916 933 throw_if_not_1_icc( ok_condition, ok);
917 934 delayed()->nop();
918 935 }
919 936 throw_if_not_2( throw_entry_point, Rscratch, ok);
920 937 }
921 938 void InterpreterMacroAssembler::throw_if_not_xcc( Condition ok_condition,
922 939 address throw_entry_point,
923 940 Register Rscratch ) {
924 941 Label ok;
925 942 if (ok_condition != never) {
926 943 throw_if_not_1_xcc( ok_condition, ok);
927 944 delayed()->nop();
928 945 }
929 946 throw_if_not_2( throw_entry_point, Rscratch, ok);
930 947 }
931 948 void InterpreterMacroAssembler::throw_if_not_x( Condition ok_condition,
932 949 address throw_entry_point,
933 950 Register Rscratch ) {
934 951 Label ok;
935 952 if (ok_condition != never) {
936 953 throw_if_not_1_x( ok_condition, ok);
937 954 delayed()->nop();
938 955 }
939 956 throw_if_not_2( throw_entry_point, Rscratch, ok);
940 957 }
941 958
942 959 // Check that index is in range for array, then shift index by index_shift, and put arrayOop + shifted_index into res
943 960 // Note: res is still shy of address by array offset into object.
944 961
945 962 void InterpreterMacroAssembler::index_check_without_pop(Register array, Register index, int index_shift, Register tmp, Register res) {
946 963 assert_not_delayed();
947 964
948 965 verify_oop(array);
949 966 #ifdef _LP64
950 967 // sign extend since tos (index) can be a 32bit value
951 968 sra(index, G0, index);
952 969 #endif // _LP64
953 970
954 971 // check array
955 972 Label ptr_ok;
956 973 tst(array);
957 974 throw_if_not_1_x( notZero, ptr_ok );
958 975 delayed()->ld( array, arrayOopDesc::length_offset_in_bytes(), tmp ); // check index
959 976 throw_if_not_2( Interpreter::_throw_NullPointerException_entry, G3_scratch, ptr_ok);
960 977
961 978 Label index_ok;
962 979 cmp(index, tmp);
963 980 throw_if_not_1_icc( lessUnsigned, index_ok );
964 981 if (index_shift > 0) delayed()->sll(index, index_shift, index);
965 982 else delayed()->add(array, index, res); // addr - const offset in index
966 983 // convention: move aberrant index into G3_scratch for exception message
967 984 mov(index, G3_scratch);
968 985 throw_if_not_2( Interpreter::_throw_ArrayIndexOutOfBoundsException_entry, G4_scratch, index_ok);
969 986
970 987 // add offset if didn't do it in delay slot
971 988 if (index_shift > 0) add(array, index, res); // addr - const offset in index
972 989 }
973 990
974 991
975 992 void InterpreterMacroAssembler::index_check(Register array, Register index, int index_shift, Register tmp, Register res) {
976 993 assert_not_delayed();
977 994
978 995 // pop array
979 996 pop_ptr(array);
980 997
981 998 // check array
982 999 index_check_without_pop(array, index, index_shift, tmp, res);
983 1000 }
984 1001
985 1002
986 1003 void InterpreterMacroAssembler::get_constant_pool(Register Rdst) {
987 1004 ld_ptr(Lmethod, in_bytes(methodOopDesc::constants_offset()), Rdst);
988 1005 }
989 1006
990 1007
991 1008 void InterpreterMacroAssembler::get_constant_pool_cache(Register Rdst) {
992 1009 get_constant_pool(Rdst);
993 1010 ld_ptr(Rdst, constantPoolOopDesc::cache_offset_in_bytes(), Rdst);
994 1011 }
995 1012
996 1013
997 1014 void InterpreterMacroAssembler::get_cpool_and_tags(Register Rcpool, Register Rtags) {
998 1015 get_constant_pool(Rcpool);
999 1016 ld_ptr(Rcpool, constantPoolOopDesc::tags_offset_in_bytes(), Rtags);
1000 1017 }
1001 1018
1002 1019
1003 1020 // unlock if synchronized method
1004 1021 //
1005 1022 // Unlock the receiver if this is a synchronized method.
1006 1023 // Unlock any Java monitors from syncronized blocks.
1007 1024 //
1008 1025 // If there are locked Java monitors
1009 1026 // If throw_monitor_exception
1010 1027 // throws IllegalMonitorStateException
1011 1028 // Else if install_monitor_exception
1012 1029 // installs IllegalMonitorStateException
1013 1030 // Else
1014 1031 // no error processing
1015 1032 void InterpreterMacroAssembler::unlock_if_synchronized_method(TosState state,
1016 1033 bool throw_monitor_exception,
1017 1034 bool install_monitor_exception) {
1018 1035 Label unlocked, unlock, no_unlock;
1019 1036
1020 1037 // get the value of _do_not_unlock_if_synchronized into G1_scratch
1021 1038 const Address do_not_unlock_if_synchronized(G2_thread,
1022 1039 JavaThread::do_not_unlock_if_synchronized_offset());
1023 1040 ldbool(do_not_unlock_if_synchronized, G1_scratch);
1024 1041 stbool(G0, do_not_unlock_if_synchronized); // reset the flag
1025 1042
1026 1043 // check if synchronized method
1027 1044 const Address access_flags(Lmethod, methodOopDesc::access_flags_offset());
1028 1045 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
1029 1046 push(state); // save tos
1030 1047 ld(access_flags, G3_scratch); // Load access flags.
1031 1048 btst(JVM_ACC_SYNCHRONIZED, G3_scratch);
1032 1049 br(zero, false, pt, unlocked);
1033 1050 delayed()->nop();
1034 1051
1035 1052 // Don't unlock anything if the _do_not_unlock_if_synchronized flag
1036 1053 // is set.
1037 1054 tstbool(G1_scratch);
1038 1055 br(Assembler::notZero, false, pn, no_unlock);
1039 1056 delayed()->nop();
1040 1057
1041 1058 // BasicObjectLock will be first in list, since this is a synchronized method. However, need
1042 1059 // to check that the object has not been unlocked by an explicit monitorexit bytecode.
1043 1060
1044 1061 //Intel: if (throw_monitor_exception) ... else ...
1045 1062 // Entry already unlocked, need to throw exception
1046 1063 //...
1047 1064
1048 1065 // pass top-most monitor elem
1049 1066 add( top_most_monitor(), O1 );
1050 1067
1051 1068 ld_ptr(O1, BasicObjectLock::obj_offset_in_bytes(), G3_scratch);
1052 1069 br_notnull(G3_scratch, false, pt, unlock);
1053 1070 delayed()->nop();
1054 1071
1055 1072 if (throw_monitor_exception) {
1056 1073 // Entry already unlocked need to throw an exception
1057 1074 MacroAssembler::call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::throw_illegal_monitor_state_exception));
1058 1075 should_not_reach_here();
1059 1076 } else {
1060 1077 // Monitor already unlocked during a stack unroll.
1061 1078 // If requested, install an illegal_monitor_state_exception.
1062 1079 // Continue with stack unrolling.
1063 1080 if (install_monitor_exception) {
1064 1081 MacroAssembler::call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::new_illegal_monitor_state_exception));
1065 1082 }
1066 1083 ba(false, unlocked);
1067 1084 delayed()->nop();
1068 1085 }
1069 1086
1070 1087 bind(unlock);
1071 1088
1072 1089 unlock_object(O1);
1073 1090
1074 1091 bind(unlocked);
1075 1092
1076 1093 // I0, I1: Might contain return value
1077 1094
1078 1095 // Check that all monitors are unlocked
1079 1096 { Label loop, exception, entry, restart;
1080 1097
1081 1098 Register Rmptr = O0;
1082 1099 Register Rtemp = O1;
1083 1100 Register Rlimit = Lmonitors;
1084 1101 const jint delta = frame::interpreter_frame_monitor_size() * wordSize;
1085 1102 assert( (delta & LongAlignmentMask) == 0,
1086 1103 "sizeof BasicObjectLock must be even number of doublewords");
1087 1104
1088 1105 #ifdef ASSERT
1089 1106 add(top_most_monitor(), Rmptr, delta);
1090 1107 { Label L;
1091 1108 // ensure that Rmptr starts out above (or at) Rlimit
1092 1109 cmp(Rmptr, Rlimit);
1093 1110 brx(Assembler::greaterEqualUnsigned, false, pn, L);
1094 1111 delayed()->nop();
1095 1112 stop("monitor stack has negative size");
1096 1113 bind(L);
1097 1114 }
1098 1115 #endif
1099 1116 bind(restart);
1100 1117 ba(false, entry);
1101 1118 delayed()->
1102 1119 add(top_most_monitor(), Rmptr, delta); // points to current entry, starting with bottom-most entry
1103 1120
1104 1121 // Entry is still locked, need to throw exception
1105 1122 bind(exception);
1106 1123 if (throw_monitor_exception) {
1107 1124 MacroAssembler::call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::throw_illegal_monitor_state_exception));
1108 1125 should_not_reach_here();
1109 1126 } else {
1110 1127 // Stack unrolling. Unlock object and if requested, install illegal_monitor_exception.
1111 1128 // Unlock does not block, so don't have to worry about the frame
1112 1129 unlock_object(Rmptr);
1113 1130 if (install_monitor_exception) {
1114 1131 MacroAssembler::call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::new_illegal_monitor_state_exception));
1115 1132 }
1116 1133 ba(false, restart);
1117 1134 delayed()->nop();
1118 1135 }
1119 1136
1120 1137 bind(loop);
1121 1138 cmp(Rtemp, G0); // check if current entry is used
1122 1139 brx(Assembler::notEqual, false, pn, exception);
1123 1140 delayed()->
1124 1141 dec(Rmptr, delta); // otherwise advance to next entry
1125 1142 #ifdef ASSERT
1126 1143 { Label L;
1127 1144 // ensure that Rmptr has not somehow stepped below Rlimit
1128 1145 cmp(Rmptr, Rlimit);
1129 1146 brx(Assembler::greaterEqualUnsigned, false, pn, L);
1130 1147 delayed()->nop();
1131 1148 stop("ran off the end of the monitor stack");
1132 1149 bind(L);
1133 1150 }
1134 1151 #endif
1135 1152 bind(entry);
1136 1153 cmp(Rmptr, Rlimit); // check if bottom reached
1137 1154 brx(Assembler::notEqual, true, pn, loop); // if not at bottom then check this entry
1138 1155 delayed()->
1139 1156 ld_ptr(Rmptr, BasicObjectLock::obj_offset_in_bytes() - delta, Rtemp);
1140 1157 }
1141 1158
1142 1159 bind(no_unlock);
1143 1160 pop(state);
1144 1161 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
1145 1162 }
1146 1163
1147 1164
1148 1165 // remove activation
1149 1166 //
1150 1167 // Unlock the receiver if this is a synchronized method.
1151 1168 // Unlock any Java monitors from syncronized blocks.
1152 1169 // Remove the activation from the stack.
1153 1170 //
1154 1171 // If there are locked Java monitors
1155 1172 // If throw_monitor_exception
1156 1173 // throws IllegalMonitorStateException
1157 1174 // Else if install_monitor_exception
1158 1175 // installs IllegalMonitorStateException
1159 1176 // Else
1160 1177 // no error processing
1161 1178 void InterpreterMacroAssembler::remove_activation(TosState state,
1162 1179 bool throw_monitor_exception,
1163 1180 bool install_monitor_exception) {
1164 1181
1165 1182 unlock_if_synchronized_method(state, throw_monitor_exception, install_monitor_exception);
1166 1183
1167 1184 // save result (push state before jvmti call and pop it afterwards) and notify jvmti
1168 1185 notify_method_exit(false, state, NotifyJVMTI);
1169 1186
1170 1187 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
1171 1188 verify_oop(Lmethod);
1172 1189 verify_thread();
1173 1190
1174 1191 // return tos
1175 1192 assert(Otos_l1 == Otos_i, "adjust code below");
1176 1193 switch (state) {
1177 1194 #ifdef _LP64
1178 1195 case ltos: mov(Otos_l, Otos_l->after_save()); break; // O0 -> I0
1179 1196 #else
1180 1197 case ltos: mov(Otos_l2, Otos_l2->after_save()); // fall through // O1 -> I1
1181 1198 #endif
1182 1199 case btos: // fall through
1183 1200 case ctos:
1184 1201 case stos: // fall through
1185 1202 case atos: // fall through
1186 1203 case itos: mov(Otos_l1, Otos_l1->after_save()); break; // O0 -> I0
1187 1204 case ftos: // fall through
1188 1205 case dtos: // fall through
1189 1206 case vtos: /* nothing to do */ break;
1190 1207 default : ShouldNotReachHere();
1191 1208 }
1192 1209
1193 1210 #if defined(COMPILER2) && !defined(_LP64)
1194 1211 if (state == ltos) {
1195 1212 // C2 expects long results in G1 we can't tell if we're returning to interpreted
1196 1213 // or compiled so just be safe use G1 and O0/O1
1197 1214
1198 1215 // Shift bits into high (msb) of G1
1199 1216 sllx(Otos_l1->after_save(), 32, G1);
1200 1217 // Zero extend low bits
1201 1218 srl (Otos_l2->after_save(), 0, Otos_l2->after_save());
1202 1219 or3 (Otos_l2->after_save(), G1, G1);
1203 1220 }
1204 1221 #endif /* COMPILER2 */
1205 1222
1206 1223 }
1207 1224 #endif /* CC_INTERP */
1208 1225
1209 1226
1210 1227 // Lock object
1211 1228 //
1212 1229 // Argument - lock_reg points to the BasicObjectLock to be used for locking,
1213 1230 // it must be initialized with the object to lock
1214 1231 void InterpreterMacroAssembler::lock_object(Register lock_reg, Register Object) {
1215 1232 if (UseHeavyMonitors) {
1216 1233 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::monitorenter), lock_reg);
1217 1234 }
1218 1235 else {
1219 1236 Register obj_reg = Object;
1220 1237 Register mark_reg = G4_scratch;
1221 1238 Register temp_reg = G1_scratch;
1222 1239 Address lock_addr(lock_reg, BasicObjectLock::lock_offset_in_bytes());
1223 1240 Address mark_addr(obj_reg, oopDesc::mark_offset_in_bytes());
1224 1241 Label done;
1225 1242
1226 1243 Label slow_case;
1227 1244
1228 1245 assert_different_registers(lock_reg, obj_reg, mark_reg, temp_reg);
1229 1246
1230 1247 // load markOop from object into mark_reg
1231 1248 ld_ptr(mark_addr, mark_reg);
1232 1249
1233 1250 if (UseBiasedLocking) {
1234 1251 biased_locking_enter(obj_reg, mark_reg, temp_reg, done, &slow_case);
1235 1252 }
1236 1253
1237 1254 // get the address of basicLock on stack that will be stored in the object
1238 1255 // we need a temporary register here as we do not want to clobber lock_reg
1239 1256 // (cas clobbers the destination register)
1240 1257 mov(lock_reg, temp_reg);
1241 1258 // set mark reg to be (markOop of object | UNLOCK_VALUE)
1242 1259 or3(mark_reg, markOopDesc::unlocked_value, mark_reg);
1243 1260 // initialize the box (Must happen before we update the object mark!)
1244 1261 st_ptr(mark_reg, lock_addr, BasicLock::displaced_header_offset_in_bytes());
1245 1262 // compare and exchange object_addr, markOop | 1, stack address of basicLock
1246 1263 assert(mark_addr.disp() == 0, "cas must take a zero displacement");
1247 1264 casx_under_lock(mark_addr.base(), mark_reg, temp_reg,
1248 1265 (address)StubRoutines::Sparc::atomic_memory_operation_lock_addr());
1249 1266
1250 1267 // if the compare and exchange succeeded we are done (we saw an unlocked object)
1251 1268 cmp(mark_reg, temp_reg);
1252 1269 brx(Assembler::equal, true, Assembler::pt, done);
1253 1270 delayed()->nop();
1254 1271
1255 1272 // We did not see an unlocked object so try the fast recursive case
1256 1273
1257 1274 // Check if owner is self by comparing the value in the markOop of object
1258 1275 // with the stack pointer
1259 1276 sub(temp_reg, SP, temp_reg);
1260 1277 #ifdef _LP64
1261 1278 sub(temp_reg, STACK_BIAS, temp_reg);
1262 1279 #endif
1263 1280 assert(os::vm_page_size() > 0xfff, "page size too small - change the constant");
1264 1281
1265 1282 // Composite "andcc" test:
1266 1283 // (a) %sp -vs- markword proximity check, and,
1267 1284 // (b) verify mark word LSBs == 0 (Stack-locked).
1268 1285 //
1269 1286 // FFFFF003/FFFFFFFFFFFF003 is (markOopDesc::lock_mask_in_place | -os::vm_page_size())
1270 1287 // Note that the page size used for %sp proximity testing is arbitrary and is
1271 1288 // unrelated to the actual MMU page size. We use a 'logical' page size of
1272 1289 // 4096 bytes. F..FFF003 is designed to fit conveniently in the SIMM13 immediate
1273 1290 // field of the andcc instruction.
1274 1291 andcc (temp_reg, 0xFFFFF003, G0) ;
1275 1292
1276 1293 // if condition is true we are done and hence we can store 0 in the displaced
1277 1294 // header indicating it is a recursive lock and be done
1278 1295 brx(Assembler::zero, true, Assembler::pt, done);
1279 1296 delayed()->st_ptr(G0, lock_addr, BasicLock::displaced_header_offset_in_bytes());
1280 1297
1281 1298 // none of the above fast optimizations worked so we have to get into the
1282 1299 // slow case of monitor enter
1283 1300 bind(slow_case);
1284 1301 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::monitorenter), lock_reg);
1285 1302
1286 1303 bind(done);
1287 1304 }
1288 1305 }
1289 1306
1290 1307 // Unlocks an object. Used in monitorexit bytecode and remove_activation.
1291 1308 //
1292 1309 // Argument - lock_reg points to the BasicObjectLock for lock
1293 1310 // Throw IllegalMonitorException if object is not locked by current thread
1294 1311 void InterpreterMacroAssembler::unlock_object(Register lock_reg) {
1295 1312 if (UseHeavyMonitors) {
1296 1313 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::monitorexit), lock_reg);
1297 1314 } else {
1298 1315 Register obj_reg = G3_scratch;
1299 1316 Register mark_reg = G4_scratch;
1300 1317 Register displaced_header_reg = G1_scratch;
1301 1318 Address lockobj_addr(lock_reg, BasicObjectLock::obj_offset_in_bytes());
1302 1319 Address mark_addr(obj_reg, oopDesc::mark_offset_in_bytes());
1303 1320 Label done;
1304 1321
1305 1322 if (UseBiasedLocking) {
1306 1323 // load the object out of the BasicObjectLock
1307 1324 ld_ptr(lockobj_addr, obj_reg);
1308 1325 biased_locking_exit(mark_addr, mark_reg, done, true);
1309 1326 st_ptr(G0, lockobj_addr); // free entry
1310 1327 }
1311 1328
1312 1329 // Test first if we are in the fast recursive case
1313 1330 Address lock_addr(lock_reg, BasicObjectLock::lock_offset_in_bytes() + BasicLock::displaced_header_offset_in_bytes());
1314 1331 ld_ptr(lock_addr, displaced_header_reg);
1315 1332 br_null(displaced_header_reg, true, Assembler::pn, done);
1316 1333 delayed()->st_ptr(G0, lockobj_addr); // free entry
1317 1334
1318 1335 // See if it is still a light weight lock, if so we just unlock
1319 1336 // the object and we are done
1320 1337
1321 1338 if (!UseBiasedLocking) {
1322 1339 // load the object out of the BasicObjectLock
1323 1340 ld_ptr(lockobj_addr, obj_reg);
1324 1341 }
1325 1342
1326 1343 // we have the displaced header in displaced_header_reg
1327 1344 // we expect to see the stack address of the basicLock in case the
1328 1345 // lock is still a light weight lock (lock_reg)
1329 1346 assert(mark_addr.disp() == 0, "cas must take a zero displacement");
1330 1347 casx_under_lock(mark_addr.base(), lock_reg, displaced_header_reg,
1331 1348 (address)StubRoutines::Sparc::atomic_memory_operation_lock_addr());
1332 1349 cmp(lock_reg, displaced_header_reg);
1333 1350 brx(Assembler::equal, true, Assembler::pn, done);
1334 1351 delayed()->st_ptr(G0, lockobj_addr); // free entry
1335 1352
1336 1353 // The lock has been converted into a heavy lock and hence
1337 1354 // we need to get into the slow case
1338 1355
1339 1356 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::monitorexit), lock_reg);
1340 1357
1341 1358 bind(done);
1342 1359 }
1343 1360 }
1344 1361
1345 1362 #ifndef CC_INTERP
1346 1363
1347 1364 // Get the method data pointer from the methodOop and set the
1348 1365 // specified register to its value.
1349 1366
1350 1367 void InterpreterMacroAssembler::set_method_data_pointer_offset(Register Roff) {
1351 1368 assert(ProfileInterpreter, "must be profiling interpreter");
1352 1369 Label get_continue;
1353 1370
1354 1371 ld_ptr(Lmethod, in_bytes(methodOopDesc::method_data_offset()), ImethodDataPtr);
1355 1372 test_method_data_pointer(get_continue);
1356 1373 add(ImethodDataPtr, in_bytes(methodDataOopDesc::data_offset()), ImethodDataPtr);
1357 1374 if (Roff != noreg)
1358 1375 // Roff contains a method data index ("mdi"). It defaults to zero.
1359 1376 add(ImethodDataPtr, Roff, ImethodDataPtr);
1360 1377 bind(get_continue);
1361 1378 }
1362 1379
1363 1380 // Set the method data pointer for the current bcp.
1364 1381
1365 1382 void InterpreterMacroAssembler::set_method_data_pointer_for_bcp() {
1366 1383 assert(ProfileInterpreter, "must be profiling interpreter");
1367 1384 Label zero_continue;
1368 1385
1369 1386 // Test MDO to avoid the call if it is NULL.
1370 1387 ld_ptr(Lmethod, methodOopDesc::method_data_offset(), ImethodDataPtr);
1371 1388 test_method_data_pointer(zero_continue);
1372 1389 call_VM_leaf(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::bcp_to_di), Lmethod, Lbcp);
1373 1390 set_method_data_pointer_offset(O0);
1374 1391 bind(zero_continue);
1375 1392 }
1376 1393
1377 1394 // Test ImethodDataPtr. If it is null, continue at the specified label
1378 1395
1379 1396 void InterpreterMacroAssembler::test_method_data_pointer(Label& zero_continue) {
1380 1397 assert(ProfileInterpreter, "must be profiling interpreter");
1381 1398 #ifdef _LP64
1382 1399 bpr(Assembler::rc_z, false, Assembler::pn, ImethodDataPtr, zero_continue);
1383 1400 #else
1384 1401 tst(ImethodDataPtr);
1385 1402 br(Assembler::zero, false, Assembler::pn, zero_continue);
1386 1403 #endif
1387 1404 delayed()->nop();
1388 1405 }
1389 1406
1390 1407 void InterpreterMacroAssembler::verify_method_data_pointer() {
1391 1408 assert(ProfileInterpreter, "must be profiling interpreter");
1392 1409 #ifdef ASSERT
1393 1410 Label verify_continue;
1394 1411 test_method_data_pointer(verify_continue);
1395 1412
1396 1413 // If the mdp is valid, it will point to a DataLayout header which is
1397 1414 // consistent with the bcp. The converse is highly probable also.
1398 1415 lduh(ImethodDataPtr, in_bytes(DataLayout::bci_offset()), G3_scratch);
1399 1416 ld_ptr(Lmethod, methodOopDesc::const_offset(), O5);
1400 1417 add(G3_scratch, in_bytes(constMethodOopDesc::codes_offset()), G3_scratch);
1401 1418 add(G3_scratch, O5, G3_scratch);
1402 1419 cmp(Lbcp, G3_scratch);
1403 1420 brx(Assembler::equal, false, Assembler::pt, verify_continue);
1404 1421
1405 1422 Register temp_reg = O5;
1406 1423 delayed()->mov(ImethodDataPtr, temp_reg);
1407 1424 // %%% should use call_VM_leaf here?
1408 1425 //call_VM_leaf(noreg, ..., Lmethod, Lbcp, ImethodDataPtr);
1409 1426 save_frame_and_mov(sizeof(jdouble) / wordSize, Lmethod, O0, Lbcp, O1);
1410 1427 Address d_save(FP, -sizeof(jdouble) + STACK_BIAS);
1411 1428 stf(FloatRegisterImpl::D, Ftos_d, d_save);
1412 1429 mov(temp_reg->after_save(), O2);
1413 1430 save_thread(L7_thread_cache);
1414 1431 call(CAST_FROM_FN_PTR(address, InterpreterRuntime::verify_mdp), relocInfo::none);
1415 1432 delayed()->nop();
1416 1433 restore_thread(L7_thread_cache);
1417 1434 ldf(FloatRegisterImpl::D, d_save, Ftos_d);
1418 1435 restore();
1419 1436 bind(verify_continue);
1420 1437 #endif // ASSERT
1421 1438 }
1422 1439
1423 1440 void InterpreterMacroAssembler::test_invocation_counter_for_mdp(Register invocation_count,
1424 1441 Register cur_bcp,
1425 1442 Register Rtmp,
1426 1443 Label &profile_continue) {
1427 1444 assert(ProfileInterpreter, "must be profiling interpreter");
1428 1445 // Control will flow to "profile_continue" if the counter is less than the
1429 1446 // limit or if we call profile_method()
1430 1447
1431 1448 Label done;
1432 1449
1433 1450 // if no method data exists, and the counter is high enough, make one
1434 1451 #ifdef _LP64
1435 1452 bpr(Assembler::rc_nz, false, Assembler::pn, ImethodDataPtr, done);
1436 1453 #else
1437 1454 tst(ImethodDataPtr);
1438 1455 br(Assembler::notZero, false, Assembler::pn, done);
1439 1456 #endif
1440 1457
1441 1458 // Test to see if we should create a method data oop
1442 1459 AddressLiteral profile_limit((address) &InvocationCounter::InterpreterProfileLimit);
1443 1460 #ifdef _LP64
1444 1461 delayed()->nop();
1445 1462 sethi(profile_limit, Rtmp);
1446 1463 #else
1447 1464 delayed()->sethi(profile_limit, Rtmp);
1448 1465 #endif
1449 1466 ld(Rtmp, profile_limit.low10(), Rtmp);
1450 1467 cmp(invocation_count, Rtmp);
1451 1468 br(Assembler::lessUnsigned, false, Assembler::pn, profile_continue);
1452 1469 delayed()->nop();
1453 1470
1454 1471 // Build it now.
1455 1472 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::profile_method), cur_bcp);
1456 1473 set_method_data_pointer_offset(O0);
1457 1474 ba(false, profile_continue);
1458 1475 delayed()->nop();
1459 1476 bind(done);
1460 1477 }
1461 1478
1462 1479 // Store a value at some constant offset from the method data pointer.
1463 1480
1464 1481 void InterpreterMacroAssembler::set_mdp_data_at(int constant, Register value) {
1465 1482 assert(ProfileInterpreter, "must be profiling interpreter");
1466 1483 st_ptr(value, ImethodDataPtr, constant);
1467 1484 }
1468 1485
1469 1486 void InterpreterMacroAssembler::increment_mdp_data_at(Address counter,
1470 1487 Register bumped_count,
1471 1488 bool decrement) {
1472 1489 assert(ProfileInterpreter, "must be profiling interpreter");
1473 1490
1474 1491 // Load the counter.
1475 1492 ld_ptr(counter, bumped_count);
1476 1493
1477 1494 if (decrement) {
1478 1495 // Decrement the register. Set condition codes.
1479 1496 subcc(bumped_count, DataLayout::counter_increment, bumped_count);
1480 1497
1481 1498 // If the decrement causes the counter to overflow, stay negative
1482 1499 Label L;
1483 1500 brx(Assembler::negative, true, Assembler::pn, L);
1484 1501
1485 1502 // Store the decremented counter, if it is still negative.
1486 1503 delayed()->st_ptr(bumped_count, counter);
1487 1504 bind(L);
1488 1505 } else {
1489 1506 // Increment the register. Set carry flag.
1490 1507 addcc(bumped_count, DataLayout::counter_increment, bumped_count);
1491 1508
1492 1509 // If the increment causes the counter to overflow, pull back by 1.
1493 1510 assert(DataLayout::counter_increment == 1, "subc works");
1494 1511 subc(bumped_count, G0, bumped_count);
1495 1512
1496 1513 // Store the incremented counter.
1497 1514 st_ptr(bumped_count, counter);
1498 1515 }
1499 1516 }
1500 1517
1501 1518 // Increment the value at some constant offset from the method data pointer.
1502 1519
1503 1520 void InterpreterMacroAssembler::increment_mdp_data_at(int constant,
1504 1521 Register bumped_count,
1505 1522 bool decrement) {
1506 1523 // Locate the counter at a fixed offset from the mdp:
1507 1524 Address counter(ImethodDataPtr, constant);
1508 1525 increment_mdp_data_at(counter, bumped_count, decrement);
1509 1526 }
1510 1527
1511 1528 // Increment the value at some non-fixed (reg + constant) offset from
1512 1529 // the method data pointer.
1513 1530
1514 1531 void InterpreterMacroAssembler::increment_mdp_data_at(Register reg,
1515 1532 int constant,
1516 1533 Register bumped_count,
1517 1534 Register scratch2,
1518 1535 bool decrement) {
1519 1536 // Add the constant to reg to get the offset.
1520 1537 add(ImethodDataPtr, reg, scratch2);
1521 1538 Address counter(scratch2, constant);
1522 1539 increment_mdp_data_at(counter, bumped_count, decrement);
1523 1540 }
1524 1541
1525 1542 // Set a flag value at the current method data pointer position.
1526 1543 // Updates a single byte of the header, to avoid races with other header bits.
1527 1544
1528 1545 void InterpreterMacroAssembler::set_mdp_flag_at(int flag_constant,
1529 1546 Register scratch) {
1530 1547 assert(ProfileInterpreter, "must be profiling interpreter");
1531 1548 // Load the data header
1532 1549 ldub(ImethodDataPtr, in_bytes(DataLayout::flags_offset()), scratch);
1533 1550
1534 1551 // Set the flag
1535 1552 or3(scratch, flag_constant, scratch);
1536 1553
1537 1554 // Store the modified header.
1538 1555 stb(scratch, ImethodDataPtr, in_bytes(DataLayout::flags_offset()));
1539 1556 }
1540 1557
1541 1558 // Test the location at some offset from the method data pointer.
1542 1559 // If it is not equal to value, branch to the not_equal_continue Label.
1543 1560 // Set condition codes to match the nullness of the loaded value.
1544 1561
1545 1562 void InterpreterMacroAssembler::test_mdp_data_at(int offset,
1546 1563 Register value,
1547 1564 Label& not_equal_continue,
1548 1565 Register scratch) {
1549 1566 assert(ProfileInterpreter, "must be profiling interpreter");
1550 1567 ld_ptr(ImethodDataPtr, offset, scratch);
1551 1568 cmp(value, scratch);
1552 1569 brx(Assembler::notEqual, false, Assembler::pn, not_equal_continue);
1553 1570 delayed()->tst(scratch);
1554 1571 }
1555 1572
1556 1573 // Update the method data pointer by the displacement located at some fixed
1557 1574 // offset from the method data pointer.
1558 1575
1559 1576 void InterpreterMacroAssembler::update_mdp_by_offset(int offset_of_disp,
1560 1577 Register scratch) {
1561 1578 assert(ProfileInterpreter, "must be profiling interpreter");
1562 1579 ld_ptr(ImethodDataPtr, offset_of_disp, scratch);
1563 1580 add(ImethodDataPtr, scratch, ImethodDataPtr);
1564 1581 }
1565 1582
1566 1583 // Update the method data pointer by the displacement located at the
1567 1584 // offset (reg + offset_of_disp).
1568 1585
1569 1586 void InterpreterMacroAssembler::update_mdp_by_offset(Register reg,
1570 1587 int offset_of_disp,
1571 1588 Register scratch) {
1572 1589 assert(ProfileInterpreter, "must be profiling interpreter");
1573 1590 add(reg, offset_of_disp, scratch);
1574 1591 ld_ptr(ImethodDataPtr, scratch, scratch);
1575 1592 add(ImethodDataPtr, scratch, ImethodDataPtr);
1576 1593 }
1577 1594
1578 1595 // Update the method data pointer by a simple constant displacement.
1579 1596
1580 1597 void InterpreterMacroAssembler::update_mdp_by_constant(int constant) {
1581 1598 assert(ProfileInterpreter, "must be profiling interpreter");
1582 1599 add(ImethodDataPtr, constant, ImethodDataPtr);
1583 1600 }
1584 1601
1585 1602 // Update the method data pointer for a _ret bytecode whose target
1586 1603 // was not among our cached targets.
1587 1604
1588 1605 void InterpreterMacroAssembler::update_mdp_for_ret(TosState state,
1589 1606 Register return_bci) {
1590 1607 assert(ProfileInterpreter, "must be profiling interpreter");
1591 1608 push(state);
1592 1609 st_ptr(return_bci, l_tmp); // protect return_bci, in case it is volatile
1593 1610 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::update_mdp_for_ret), return_bci);
1594 1611 ld_ptr(l_tmp, return_bci);
1595 1612 pop(state);
1596 1613 }
1597 1614
1598 1615 // Count a taken branch in the bytecodes.
1599 1616
1600 1617 void InterpreterMacroAssembler::profile_taken_branch(Register scratch, Register bumped_count) {
1601 1618 if (ProfileInterpreter) {
1602 1619 Label profile_continue;
1603 1620
1604 1621 // If no method data exists, go to profile_continue.
1605 1622 test_method_data_pointer(profile_continue);
1606 1623
1607 1624 // We are taking a branch. Increment the taken count.
1608 1625 increment_mdp_data_at(in_bytes(JumpData::taken_offset()), bumped_count);
1609 1626
1610 1627 // The method data pointer needs to be updated to reflect the new target.
1611 1628 update_mdp_by_offset(in_bytes(JumpData::displacement_offset()), scratch);
1612 1629 bind (profile_continue);
1613 1630 }
1614 1631 }
1615 1632
1616 1633
1617 1634 // Count a not-taken branch in the bytecodes.
1618 1635
1619 1636 void InterpreterMacroAssembler::profile_not_taken_branch(Register scratch) {
1620 1637 if (ProfileInterpreter) {
1621 1638 Label profile_continue;
1622 1639
1623 1640 // If no method data exists, go to profile_continue.
1624 1641 test_method_data_pointer(profile_continue);
1625 1642
1626 1643 // We are taking a branch. Increment the not taken count.
1627 1644 increment_mdp_data_at(in_bytes(BranchData::not_taken_offset()), scratch);
1628 1645
1629 1646 // The method data pointer needs to be updated to correspond to the
1630 1647 // next bytecode.
1631 1648 update_mdp_by_constant(in_bytes(BranchData::branch_data_size()));
1632 1649 bind (profile_continue);
1633 1650 }
1634 1651 }
1635 1652
1636 1653
1637 1654 // Count a non-virtual call in the bytecodes.
1638 1655
1639 1656 void InterpreterMacroAssembler::profile_call(Register scratch) {
1640 1657 if (ProfileInterpreter) {
1641 1658 Label profile_continue;
1642 1659
1643 1660 // If no method data exists, go to profile_continue.
1644 1661 test_method_data_pointer(profile_continue);
1645 1662
1646 1663 // We are making a call. Increment the count.
1647 1664 increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch);
1648 1665
1649 1666 // The method data pointer needs to be updated to reflect the new target.
1650 1667 update_mdp_by_constant(in_bytes(CounterData::counter_data_size()));
1651 1668 bind (profile_continue);
1652 1669 }
1653 1670 }
1654 1671
1655 1672
1656 1673 // Count a final call in the bytecodes.
1657 1674
1658 1675 void InterpreterMacroAssembler::profile_final_call(Register scratch) {
1659 1676 if (ProfileInterpreter) {
1660 1677 Label profile_continue;
1661 1678
1662 1679 // If no method data exists, go to profile_continue.
1663 1680 test_method_data_pointer(profile_continue);
1664 1681
1665 1682 // We are making a call. Increment the count.
1666 1683 increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch);
1667 1684
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1668 1685 // The method data pointer needs to be updated to reflect the new target.
1669 1686 update_mdp_by_constant(in_bytes(VirtualCallData::virtual_call_data_size()));
1670 1687 bind (profile_continue);
1671 1688 }
1672 1689 }
1673 1690
1674 1691
1675 1692 // Count a virtual call in the bytecodes.
1676 1693
1677 1694 void InterpreterMacroAssembler::profile_virtual_call(Register receiver,
1678 - Register scratch) {
1695 + Register scratch,
1696 + bool receiver_can_be_null) {
1679 1697 if (ProfileInterpreter) {
1680 1698 Label profile_continue;
1681 1699
1682 1700 // If no method data exists, go to profile_continue.
1683 1701 test_method_data_pointer(profile_continue);
1684 1702
1703 +
1704 + Label skip_receiver_profile;
1705 + if (receiver_can_be_null) {
1706 + Label not_null;
1707 + tst(receiver);
1708 + brx(Assembler::notZero, false, Assembler::pt, not_null);
1709 + delayed()->nop();
1710 + // We are making a call. Increment the count for null receiver.
1711 + increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch);
1712 + ba(false, skip_receiver_profile);
1713 + delayed()->nop();
1714 + bind(not_null);
1715 + }
1716 +
1685 1717 // Record the receiver type.
1686 1718 record_klass_in_profile(receiver, scratch, true);
1719 + bind(skip_receiver_profile);
1687 1720
1688 1721 // The method data pointer needs to be updated to reflect the new target.
1689 1722 update_mdp_by_constant(in_bytes(VirtualCallData::virtual_call_data_size()));
1690 1723 bind (profile_continue);
1691 1724 }
1692 1725 }
1693 1726
1694 1727 void InterpreterMacroAssembler::record_klass_in_profile_helper(
1695 1728 Register receiver, Register scratch,
1696 1729 int start_row, Label& done, bool is_virtual_call) {
1697 1730 if (TypeProfileWidth == 0) {
1698 1731 if (is_virtual_call) {
1699 1732 increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch);
1700 1733 }
1701 1734 return;
1702 1735 }
1703 1736
1704 1737 int last_row = VirtualCallData::row_limit() - 1;
1705 1738 assert(start_row <= last_row, "must be work left to do");
1706 1739 // Test this row for both the receiver and for null.
1707 1740 // Take any of three different outcomes:
1708 1741 // 1. found receiver => increment count and goto done
1709 1742 // 2. found null => keep looking for case 1, maybe allocate this cell
1710 1743 // 3. found something else => keep looking for cases 1 and 2
1711 1744 // Case 3 is handled by a recursive call.
1712 1745 for (int row = start_row; row <= last_row; row++) {
1713 1746 Label next_test;
1714 1747 bool test_for_null_also = (row == start_row);
1715 1748
1716 1749 // See if the receiver is receiver[n].
1717 1750 int recvr_offset = in_bytes(VirtualCallData::receiver_offset(row));
1718 1751 test_mdp_data_at(recvr_offset, receiver, next_test, scratch);
1719 1752 // delayed()->tst(scratch);
1720 1753
1721 1754 // The receiver is receiver[n]. Increment count[n].
1722 1755 int count_offset = in_bytes(VirtualCallData::receiver_count_offset(row));
1723 1756 increment_mdp_data_at(count_offset, scratch);
1724 1757 ba(false, done);
1725 1758 delayed()->nop();
1726 1759 bind(next_test);
1727 1760
1728 1761 if (test_for_null_also) {
1729 1762 Label found_null;
1730 1763 // Failed the equality check on receiver[n]... Test for null.
1731 1764 if (start_row == last_row) {
1732 1765 // The only thing left to do is handle the null case.
1733 1766 if (is_virtual_call) {
1734 1767 brx(Assembler::zero, false, Assembler::pn, found_null);
1735 1768 delayed()->nop();
1736 1769 // Receiver did not match any saved receiver and there is no empty row for it.
1737 1770 // Increment total counter to indicate polymorphic case.
1738 1771 increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch);
1739 1772 ba(false, done);
1740 1773 delayed()->nop();
1741 1774 bind(found_null);
1742 1775 } else {
1743 1776 brx(Assembler::notZero, false, Assembler::pt, done);
1744 1777 delayed()->nop();
1745 1778 }
1746 1779 break;
1747 1780 }
1748 1781 // Since null is rare, make it be the branch-taken case.
1749 1782 brx(Assembler::zero, false, Assembler::pn, found_null);
1750 1783 delayed()->nop();
1751 1784
1752 1785 // Put all the "Case 3" tests here.
1753 1786 record_klass_in_profile_helper(receiver, scratch, start_row + 1, done, is_virtual_call);
1754 1787
1755 1788 // Found a null. Keep searching for a matching receiver,
1756 1789 // but remember that this is an empty (unused) slot.
1757 1790 bind(found_null);
1758 1791 }
1759 1792 }
1760 1793
1761 1794 // In the fall-through case, we found no matching receiver, but we
1762 1795 // observed the receiver[start_row] is NULL.
1763 1796
1764 1797 // Fill in the receiver field and increment the count.
1765 1798 int recvr_offset = in_bytes(VirtualCallData::receiver_offset(start_row));
1766 1799 set_mdp_data_at(recvr_offset, receiver);
1767 1800 int count_offset = in_bytes(VirtualCallData::receiver_count_offset(start_row));
1768 1801 mov(DataLayout::counter_increment, scratch);
1769 1802 set_mdp_data_at(count_offset, scratch);
1770 1803 if (start_row > 0) {
1771 1804 ba(false, done);
1772 1805 delayed()->nop();
1773 1806 }
1774 1807 }
1775 1808
1776 1809 void InterpreterMacroAssembler::record_klass_in_profile(Register receiver,
1777 1810 Register scratch, bool is_virtual_call) {
1778 1811 assert(ProfileInterpreter, "must be profiling");
1779 1812 Label done;
1780 1813
1781 1814 record_klass_in_profile_helper(receiver, scratch, 0, done, is_virtual_call);
1782 1815
1783 1816 bind (done);
1784 1817 }
1785 1818
1786 1819
1787 1820 // Count a ret in the bytecodes.
1788 1821
1789 1822 void InterpreterMacroAssembler::profile_ret(TosState state,
1790 1823 Register return_bci,
1791 1824 Register scratch) {
1792 1825 if (ProfileInterpreter) {
1793 1826 Label profile_continue;
1794 1827 uint row;
1795 1828
1796 1829 // If no method data exists, go to profile_continue.
1797 1830 test_method_data_pointer(profile_continue);
1798 1831
1799 1832 // Update the total ret count.
1800 1833 increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch);
1801 1834
1802 1835 for (row = 0; row < RetData::row_limit(); row++) {
1803 1836 Label next_test;
1804 1837
1805 1838 // See if return_bci is equal to bci[n]:
1806 1839 test_mdp_data_at(in_bytes(RetData::bci_offset(row)),
1807 1840 return_bci, next_test, scratch);
1808 1841
1809 1842 // return_bci is equal to bci[n]. Increment the count.
1810 1843 increment_mdp_data_at(in_bytes(RetData::bci_count_offset(row)), scratch);
1811 1844
1812 1845 // The method data pointer needs to be updated to reflect the new target.
1813 1846 update_mdp_by_offset(in_bytes(RetData::bci_displacement_offset(row)), scratch);
1814 1847 ba(false, profile_continue);
1815 1848 delayed()->nop();
1816 1849 bind(next_test);
1817 1850 }
1818 1851
1819 1852 update_mdp_for_ret(state, return_bci);
1820 1853
1821 1854 bind (profile_continue);
1822 1855 }
1823 1856 }
1824 1857
1825 1858 // Profile an unexpected null in the bytecodes.
1826 1859 void InterpreterMacroAssembler::profile_null_seen(Register scratch) {
1827 1860 if (ProfileInterpreter) {
1828 1861 Label profile_continue;
1829 1862
1830 1863 // If no method data exists, go to profile_continue.
1831 1864 test_method_data_pointer(profile_continue);
1832 1865
1833 1866 set_mdp_flag_at(BitData::null_seen_byte_constant(), scratch);
1834 1867
1835 1868 // The method data pointer needs to be updated.
1836 1869 int mdp_delta = in_bytes(BitData::bit_data_size());
1837 1870 if (TypeProfileCasts) {
1838 1871 mdp_delta = in_bytes(VirtualCallData::virtual_call_data_size());
1839 1872 }
1840 1873 update_mdp_by_constant(mdp_delta);
1841 1874
1842 1875 bind (profile_continue);
1843 1876 }
1844 1877 }
1845 1878
1846 1879 void InterpreterMacroAssembler::profile_typecheck(Register klass,
1847 1880 Register scratch) {
1848 1881 if (ProfileInterpreter) {
1849 1882 Label profile_continue;
1850 1883
1851 1884 // If no method data exists, go to profile_continue.
1852 1885 test_method_data_pointer(profile_continue);
1853 1886
1854 1887 int mdp_delta = in_bytes(BitData::bit_data_size());
1855 1888 if (TypeProfileCasts) {
1856 1889 mdp_delta = in_bytes(VirtualCallData::virtual_call_data_size());
1857 1890
1858 1891 // Record the object type.
1859 1892 record_klass_in_profile(klass, scratch, false);
1860 1893 }
1861 1894
1862 1895 // The method data pointer needs to be updated.
1863 1896 update_mdp_by_constant(mdp_delta);
1864 1897
1865 1898 bind (profile_continue);
1866 1899 }
1867 1900 }
1868 1901
1869 1902 void InterpreterMacroAssembler::profile_typecheck_failed(Register scratch) {
1870 1903 if (ProfileInterpreter && TypeProfileCasts) {
1871 1904 Label profile_continue;
1872 1905
1873 1906 // If no method data exists, go to profile_continue.
1874 1907 test_method_data_pointer(profile_continue);
1875 1908
1876 1909 int count_offset = in_bytes(CounterData::count_offset());
1877 1910 // Back up the address, since we have already bumped the mdp.
1878 1911 count_offset -= in_bytes(VirtualCallData::virtual_call_data_size());
1879 1912
1880 1913 // *Decrement* the counter. We expect to see zero or small negatives.
1881 1914 increment_mdp_data_at(count_offset, scratch, true);
1882 1915
1883 1916 bind (profile_continue);
1884 1917 }
1885 1918 }
1886 1919
1887 1920 // Count the default case of a switch construct.
1888 1921
1889 1922 void InterpreterMacroAssembler::profile_switch_default(Register scratch) {
1890 1923 if (ProfileInterpreter) {
1891 1924 Label profile_continue;
1892 1925
1893 1926 // If no method data exists, go to profile_continue.
1894 1927 test_method_data_pointer(profile_continue);
1895 1928
1896 1929 // Update the default case count
1897 1930 increment_mdp_data_at(in_bytes(MultiBranchData::default_count_offset()),
1898 1931 scratch);
1899 1932
1900 1933 // The method data pointer needs to be updated.
1901 1934 update_mdp_by_offset(
1902 1935 in_bytes(MultiBranchData::default_displacement_offset()),
1903 1936 scratch);
1904 1937
1905 1938 bind (profile_continue);
1906 1939 }
1907 1940 }
1908 1941
1909 1942 // Count the index'th case of a switch construct.
1910 1943
1911 1944 void InterpreterMacroAssembler::profile_switch_case(Register index,
1912 1945 Register scratch,
1913 1946 Register scratch2,
1914 1947 Register scratch3) {
1915 1948 if (ProfileInterpreter) {
1916 1949 Label profile_continue;
1917 1950
1918 1951 // If no method data exists, go to profile_continue.
1919 1952 test_method_data_pointer(profile_continue);
1920 1953
1921 1954 // Build the base (index * per_case_size_in_bytes()) + case_array_offset_in_bytes()
1922 1955 set(in_bytes(MultiBranchData::per_case_size()), scratch);
1923 1956 smul(index, scratch, scratch);
1924 1957 add(scratch, in_bytes(MultiBranchData::case_array_offset()), scratch);
1925 1958
1926 1959 // Update the case count
1927 1960 increment_mdp_data_at(scratch,
1928 1961 in_bytes(MultiBranchData::relative_count_offset()),
1929 1962 scratch2,
1930 1963 scratch3);
1931 1964
1932 1965 // The method data pointer needs to be updated.
1933 1966 update_mdp_by_offset(scratch,
1934 1967 in_bytes(MultiBranchData::relative_displacement_offset()),
1935 1968 scratch2);
1936 1969
1937 1970 bind (profile_continue);
1938 1971 }
1939 1972 }
1940 1973
1941 1974 // add a InterpMonitorElem to stack (see frame_sparc.hpp)
1942 1975
1943 1976 void InterpreterMacroAssembler::add_monitor_to_stack( bool stack_is_empty,
1944 1977 Register Rtemp,
1945 1978 Register Rtemp2 ) {
1946 1979
1947 1980 Register Rlimit = Lmonitors;
1948 1981 const jint delta = frame::interpreter_frame_monitor_size() * wordSize;
1949 1982 assert( (delta & LongAlignmentMask) == 0,
1950 1983 "sizeof BasicObjectLock must be even number of doublewords");
1951 1984
1952 1985 sub( SP, delta, SP);
1953 1986 sub( Lesp, delta, Lesp);
1954 1987 sub( Lmonitors, delta, Lmonitors);
1955 1988
1956 1989 if (!stack_is_empty) {
1957 1990
1958 1991 // must copy stack contents down
1959 1992
1960 1993 Label start_copying, next;
1961 1994
1962 1995 // untested("monitor stack expansion");
1963 1996 compute_stack_base(Rtemp);
1964 1997 ba( false, start_copying );
1965 1998 delayed()->cmp( Rtemp, Rlimit); // done? duplicated below
1966 1999
1967 2000 // note: must copy from low memory upwards
1968 2001 // On entry to loop,
1969 2002 // Rtemp points to new base of stack, Lesp points to new end of stack (1 past TOS)
1970 2003 // Loop mutates Rtemp
1971 2004
1972 2005 bind( next);
1973 2006
1974 2007 st_ptr(Rtemp2, Rtemp, 0);
1975 2008 inc(Rtemp, wordSize);
1976 2009 cmp(Rtemp, Rlimit); // are we done? (duplicated above)
1977 2010
1978 2011 bind( start_copying );
1979 2012
1980 2013 brx( notEqual, true, pn, next );
1981 2014 delayed()->ld_ptr( Rtemp, delta, Rtemp2 );
1982 2015
1983 2016 // done copying stack
1984 2017 }
1985 2018 }
1986 2019
1987 2020 // Locals
1988 2021 #ifdef ASSERT
1989 2022 void InterpreterMacroAssembler::verify_local_tag(frame::Tag t,
1990 2023 Register base,
1991 2024 Register scratch,
1992 2025 int n) {
1993 2026 if (TaggedStackInterpreter) {
1994 2027 Label ok, long_ok;
1995 2028 // Use dst for scratch
1996 2029 assert_different_registers(base, scratch);
1997 2030 ld_ptr(base, Interpreter::local_tag_offset_in_bytes(n), scratch);
1998 2031 if (t == frame::TagCategory2) {
1999 2032 cmp(scratch, G0);
2000 2033 brx(Assembler::equal, false, Assembler::pt, long_ok);
2001 2034 delayed()->ld_ptr(base, Interpreter::local_tag_offset_in_bytes(n+1), scratch);
2002 2035 stop("local long/double tag value bad");
2003 2036 bind(long_ok);
2004 2037 // compare second half tag
2005 2038 cmp(scratch, G0);
2006 2039 } else if (t == frame::TagValue) {
2007 2040 cmp(scratch, G0);
2008 2041 } else {
2009 2042 assert_different_registers(O3, base, scratch);
2010 2043 mov(t, O3);
2011 2044 cmp(scratch, O3);
2012 2045 }
2013 2046 brx(Assembler::equal, false, Assembler::pt, ok);
2014 2047 delayed()->nop();
2015 2048 // Also compare if the local value is zero, then the tag might
2016 2049 // not have been set coming from deopt.
2017 2050 ld_ptr(base, Interpreter::local_offset_in_bytes(n), scratch);
2018 2051 cmp(scratch, G0);
2019 2052 brx(Assembler::equal, false, Assembler::pt, ok);
2020 2053 delayed()->nop();
2021 2054 stop("Local tag value is bad");
2022 2055 bind(ok);
2023 2056 }
2024 2057 }
2025 2058 #endif // ASSERT
2026 2059
2027 2060 void InterpreterMacroAssembler::access_local_ptr( Register index, Register dst ) {
2028 2061 assert_not_delayed();
2029 2062 sll(index, Interpreter::logStackElementSize(), index);
2030 2063 sub(Llocals, index, index);
2031 2064 debug_only(verify_local_tag(frame::TagReference, index, dst));
2032 2065 ld_ptr(index, Interpreter::value_offset_in_bytes(), dst);
2033 2066 // Note: index must hold the effective address--the iinc template uses it
2034 2067 }
2035 2068
2036 2069 // Just like access_local_ptr but the tag is a returnAddress
2037 2070 void InterpreterMacroAssembler::access_local_returnAddress(Register index,
2038 2071 Register dst ) {
2039 2072 assert_not_delayed();
2040 2073 sll(index, Interpreter::logStackElementSize(), index);
2041 2074 sub(Llocals, index, index);
2042 2075 debug_only(verify_local_tag(frame::TagValue, index, dst));
2043 2076 ld_ptr(index, Interpreter::value_offset_in_bytes(), dst);
2044 2077 }
2045 2078
2046 2079 void InterpreterMacroAssembler::access_local_int( Register index, Register dst ) {
2047 2080 assert_not_delayed();
2048 2081 sll(index, Interpreter::logStackElementSize(), index);
2049 2082 sub(Llocals, index, index);
2050 2083 debug_only(verify_local_tag(frame::TagValue, index, dst));
2051 2084 ld(index, Interpreter::value_offset_in_bytes(), dst);
2052 2085 // Note: index must hold the effective address--the iinc template uses it
2053 2086 }
2054 2087
2055 2088
2056 2089 void InterpreterMacroAssembler::access_local_long( Register index, Register dst ) {
2057 2090 assert_not_delayed();
2058 2091 sll(index, Interpreter::logStackElementSize(), index);
2059 2092 sub(Llocals, index, index);
2060 2093 debug_only(verify_local_tag(frame::TagCategory2, index, dst));
2061 2094 // First half stored at index n+1 (which grows down from Llocals[n])
2062 2095 load_unaligned_long(index, Interpreter::local_offset_in_bytes(1), dst);
2063 2096 }
2064 2097
2065 2098
2066 2099 void InterpreterMacroAssembler::access_local_float( Register index, FloatRegister dst ) {
2067 2100 assert_not_delayed();
2068 2101 sll(index, Interpreter::logStackElementSize(), index);
2069 2102 sub(Llocals, index, index);
2070 2103 debug_only(verify_local_tag(frame::TagValue, index, G1_scratch));
2071 2104 ldf(FloatRegisterImpl::S, index, Interpreter::value_offset_in_bytes(), dst);
2072 2105 }
2073 2106
2074 2107
2075 2108 void InterpreterMacroAssembler::access_local_double( Register index, FloatRegister dst ) {
2076 2109 assert_not_delayed();
2077 2110 sll(index, Interpreter::logStackElementSize(), index);
2078 2111 sub(Llocals, index, index);
2079 2112 debug_only(verify_local_tag(frame::TagCategory2, index, G1_scratch));
2080 2113 load_unaligned_double(index, Interpreter::local_offset_in_bytes(1), dst);
2081 2114 }
2082 2115
2083 2116
2084 2117 #ifdef ASSERT
2085 2118 void InterpreterMacroAssembler::check_for_regarea_stomp(Register Rindex, int offset, Register Rlimit, Register Rscratch, Register Rscratch1) {
2086 2119 Label L;
2087 2120
2088 2121 assert(Rindex != Rscratch, "Registers cannot be same");
2089 2122 assert(Rindex != Rscratch1, "Registers cannot be same");
2090 2123 assert(Rlimit != Rscratch, "Registers cannot be same");
2091 2124 assert(Rlimit != Rscratch1, "Registers cannot be same");
2092 2125 assert(Rscratch1 != Rscratch, "Registers cannot be same");
2093 2126
2094 2127 // untested("reg area corruption");
2095 2128 add(Rindex, offset, Rscratch);
2096 2129 add(Rlimit, 64 + STACK_BIAS, Rscratch1);
2097 2130 cmp(Rscratch, Rscratch1);
2098 2131 brx(Assembler::greaterEqualUnsigned, false, pn, L);
2099 2132 delayed()->nop();
2100 2133 stop("regsave area is being clobbered");
2101 2134 bind(L);
2102 2135 }
2103 2136 #endif // ASSERT
2104 2137
2105 2138 void InterpreterMacroAssembler::tag_local(frame::Tag t,
2106 2139 Register base,
2107 2140 Register src,
2108 2141 int n) {
2109 2142 if (TaggedStackInterpreter) {
2110 2143 // have to store zero because local slots can be reused (rats!)
2111 2144 if (t == frame::TagValue) {
2112 2145 st_ptr(G0, base, Interpreter::local_tag_offset_in_bytes(n));
2113 2146 } else if (t == frame::TagCategory2) {
2114 2147 st_ptr(G0, base, Interpreter::local_tag_offset_in_bytes(n));
2115 2148 st_ptr(G0, base, Interpreter::local_tag_offset_in_bytes(n+1));
2116 2149 } else {
2117 2150 // assert that we don't stomp the value in 'src'
2118 2151 // O3 is arbitrary because it's not used.
2119 2152 assert_different_registers(src, base, O3);
2120 2153 mov( t, O3);
2121 2154 st_ptr(O3, base, Interpreter::local_tag_offset_in_bytes(n));
2122 2155 }
2123 2156 }
2124 2157 }
2125 2158
2126 2159
2127 2160 void InterpreterMacroAssembler::store_local_int( Register index, Register src ) {
2128 2161 assert_not_delayed();
2129 2162 sll(index, Interpreter::logStackElementSize(), index);
2130 2163 sub(Llocals, index, index);
2131 2164 debug_only(check_for_regarea_stomp(index, Interpreter::value_offset_in_bytes(), FP, G1_scratch, G4_scratch);)
2132 2165 tag_local(frame::TagValue, index, src);
2133 2166 st(src, index, Interpreter::value_offset_in_bytes());
2134 2167 }
2135 2168
2136 2169 void InterpreterMacroAssembler::store_local_ptr( Register index, Register src,
2137 2170 Register tag ) {
2138 2171 assert_not_delayed();
2139 2172 sll(index, Interpreter::logStackElementSize(), index);
2140 2173 sub(Llocals, index, index);
2141 2174 #ifdef ASSERT
2142 2175 check_for_regarea_stomp(index, Interpreter::value_offset_in_bytes(), FP, G1_scratch, G4_scratch);
2143 2176 #endif
2144 2177 st_ptr(src, index, Interpreter::value_offset_in_bytes());
2145 2178 // Store tag register directly
2146 2179 if (TaggedStackInterpreter) {
2147 2180 st_ptr(tag, index, Interpreter::tag_offset_in_bytes());
2148 2181 }
2149 2182 }
2150 2183
2151 2184
2152 2185
2153 2186 void InterpreterMacroAssembler::store_local_ptr( int n, Register src,
2154 2187 Register tag ) {
2155 2188 st_ptr(src, Llocals, Interpreter::local_offset_in_bytes(n));
2156 2189 if (TaggedStackInterpreter) {
2157 2190 st_ptr(tag, Llocals, Interpreter::local_tag_offset_in_bytes(n));
2158 2191 }
2159 2192 }
2160 2193
2161 2194 void InterpreterMacroAssembler::store_local_long( Register index, Register src ) {
2162 2195 assert_not_delayed();
2163 2196 sll(index, Interpreter::logStackElementSize(), index);
2164 2197 sub(Llocals, index, index);
2165 2198 #ifdef ASSERT
2166 2199 check_for_regarea_stomp(index, Interpreter::local_offset_in_bytes(1), FP, G1_scratch, G4_scratch);
2167 2200 #endif
2168 2201 tag_local(frame::TagCategory2, index, src);
2169 2202 store_unaligned_long(src, index, Interpreter::local_offset_in_bytes(1)); // which is n+1
2170 2203 }
2171 2204
2172 2205
2173 2206 void InterpreterMacroAssembler::store_local_float( Register index, FloatRegister src ) {
2174 2207 assert_not_delayed();
2175 2208 sll(index, Interpreter::logStackElementSize(), index);
2176 2209 sub(Llocals, index, index);
2177 2210 #ifdef ASSERT
2178 2211 check_for_regarea_stomp(index, Interpreter::value_offset_in_bytes(), FP, G1_scratch, G4_scratch);
2179 2212 #endif
2180 2213 tag_local(frame::TagValue, index, G1_scratch);
2181 2214 stf(FloatRegisterImpl::S, src, index, Interpreter::value_offset_in_bytes());
2182 2215 }
2183 2216
2184 2217
2185 2218 void InterpreterMacroAssembler::store_local_double( Register index, FloatRegister src ) {
2186 2219 assert_not_delayed();
2187 2220 sll(index, Interpreter::logStackElementSize(), index);
2188 2221 sub(Llocals, index, index);
2189 2222 #ifdef ASSERT
2190 2223 check_for_regarea_stomp(index, Interpreter::local_offset_in_bytes(1), FP, G1_scratch, G4_scratch);
2191 2224 #endif
2192 2225 tag_local(frame::TagCategory2, index, G1_scratch);
2193 2226 store_unaligned_double(src, index, Interpreter::local_offset_in_bytes(1));
2194 2227 }
2195 2228
2196 2229
2197 2230 int InterpreterMacroAssembler::top_most_monitor_byte_offset() {
2198 2231 const jint delta = frame::interpreter_frame_monitor_size() * wordSize;
2199 2232 int rounded_vm_local_words = ::round_to(frame::interpreter_frame_vm_local_words, WordsPerLong);
2200 2233 return ((-rounded_vm_local_words * wordSize) - delta ) + STACK_BIAS;
2201 2234 }
2202 2235
2203 2236
2204 2237 Address InterpreterMacroAssembler::top_most_monitor() {
2205 2238 return Address(FP, top_most_monitor_byte_offset());
2206 2239 }
2207 2240
2208 2241
2209 2242 void InterpreterMacroAssembler::compute_stack_base( Register Rdest ) {
2210 2243 add( Lesp, wordSize, Rdest );
2211 2244 }
2212 2245
2213 2246 #endif /* CC_INTERP */
2214 2247
2215 2248 void InterpreterMacroAssembler::increment_invocation_counter( Register Rtmp, Register Rtmp2 ) {
2216 2249 assert(UseCompiler, "incrementing must be useful");
2217 2250 #ifdef CC_INTERP
2218 2251 Address inv_counter(G5_method, methodOopDesc::invocation_counter_offset() +
2219 2252 InvocationCounter::counter_offset());
2220 2253 Address be_counter (G5_method, methodOopDesc::backedge_counter_offset() +
2221 2254 InvocationCounter::counter_offset());
2222 2255 #else
2223 2256 Address inv_counter(Lmethod, methodOopDesc::invocation_counter_offset() +
2224 2257 InvocationCounter::counter_offset());
2225 2258 Address be_counter (Lmethod, methodOopDesc::backedge_counter_offset() +
2226 2259 InvocationCounter::counter_offset());
2227 2260 #endif /* CC_INTERP */
2228 2261 int delta = InvocationCounter::count_increment;
2229 2262
2230 2263 // Load each counter in a register
2231 2264 ld( inv_counter, Rtmp );
2232 2265 ld( be_counter, Rtmp2 );
2233 2266
2234 2267 assert( is_simm13( delta ), " delta too large.");
2235 2268
2236 2269 // Add the delta to the invocation counter and store the result
2237 2270 add( Rtmp, delta, Rtmp );
2238 2271
2239 2272 // Mask the backedge counter
2240 2273 and3( Rtmp2, InvocationCounter::count_mask_value, Rtmp2 );
2241 2274
2242 2275 // Store value
2243 2276 st( Rtmp, inv_counter);
2244 2277
2245 2278 // Add invocation counter + backedge counter
2246 2279 add( Rtmp, Rtmp2, Rtmp);
2247 2280
2248 2281 // Note that this macro must leave the backedge_count + invocation_count in Rtmp!
2249 2282 }
2250 2283
2251 2284 void InterpreterMacroAssembler::increment_backedge_counter( Register Rtmp, Register Rtmp2 ) {
2252 2285 assert(UseCompiler, "incrementing must be useful");
2253 2286 #ifdef CC_INTERP
2254 2287 Address be_counter (G5_method, methodOopDesc::backedge_counter_offset() +
2255 2288 InvocationCounter::counter_offset());
2256 2289 Address inv_counter(G5_method, methodOopDesc::invocation_counter_offset() +
2257 2290 InvocationCounter::counter_offset());
2258 2291 #else
2259 2292 Address be_counter (Lmethod, methodOopDesc::backedge_counter_offset() +
2260 2293 InvocationCounter::counter_offset());
2261 2294 Address inv_counter(Lmethod, methodOopDesc::invocation_counter_offset() +
2262 2295 InvocationCounter::counter_offset());
2263 2296 #endif /* CC_INTERP */
2264 2297 int delta = InvocationCounter::count_increment;
2265 2298 // Load each counter in a register
2266 2299 ld( be_counter, Rtmp );
2267 2300 ld( inv_counter, Rtmp2 );
2268 2301
2269 2302 // Add the delta to the backedge counter
2270 2303 add( Rtmp, delta, Rtmp );
2271 2304
2272 2305 // Mask the invocation counter, add to backedge counter
2273 2306 and3( Rtmp2, InvocationCounter::count_mask_value, Rtmp2 );
2274 2307
2275 2308 // and store the result to memory
2276 2309 st( Rtmp, be_counter );
2277 2310
2278 2311 // Add backedge + invocation counter
2279 2312 add( Rtmp, Rtmp2, Rtmp );
2280 2313
2281 2314 // Note that this macro must leave backedge_count + invocation_count in Rtmp!
2282 2315 }
2283 2316
2284 2317 #ifndef CC_INTERP
2285 2318 void InterpreterMacroAssembler::test_backedge_count_for_osr( Register backedge_count,
2286 2319 Register branch_bcp,
2287 2320 Register Rtmp ) {
2288 2321 Label did_not_overflow;
2289 2322 Label overflow_with_error;
2290 2323 assert_different_registers(backedge_count, Rtmp, branch_bcp);
2291 2324 assert(UseOnStackReplacement,"Must UseOnStackReplacement to test_backedge_count_for_osr");
2292 2325
2293 2326 AddressLiteral limit(&InvocationCounter::InterpreterBackwardBranchLimit);
2294 2327 load_contents(limit, Rtmp);
2295 2328 cmp(backedge_count, Rtmp);
2296 2329 br(Assembler::lessUnsigned, false, Assembler::pt, did_not_overflow);
2297 2330 delayed()->nop();
2298 2331
2299 2332 // When ProfileInterpreter is on, the backedge_count comes from the
2300 2333 // methodDataOop, which value does not get reset on the call to
2301 2334 // frequency_counter_overflow(). To avoid excessive calls to the overflow
2302 2335 // routine while the method is being compiled, add a second test to make sure
2303 2336 // the overflow function is called only once every overflow_frequency.
2304 2337 if (ProfileInterpreter) {
2305 2338 const int overflow_frequency = 1024;
2306 2339 andcc(backedge_count, overflow_frequency-1, Rtmp);
2307 2340 brx(Assembler::notZero, false, Assembler::pt, did_not_overflow);
2308 2341 delayed()->nop();
2309 2342 }
2310 2343
2311 2344 // overflow in loop, pass branch bytecode
2312 2345 set(6,Rtmp);
2313 2346 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::frequency_counter_overflow), branch_bcp, Rtmp);
2314 2347
2315 2348 // Was an OSR adapter generated?
2316 2349 // O0 = osr nmethod
2317 2350 tst(O0);
2318 2351 brx(Assembler::zero, false, Assembler::pn, overflow_with_error);
2319 2352 delayed()->nop();
2320 2353
2321 2354 // Has the nmethod been invalidated already?
2322 2355 ld(O0, nmethod::entry_bci_offset(), O2);
2323 2356 cmp(O2, InvalidOSREntryBci);
2324 2357 br(Assembler::equal, false, Assembler::pn, overflow_with_error);
2325 2358 delayed()->nop();
2326 2359
2327 2360 // migrate the interpreter frame off of the stack
2328 2361
2329 2362 mov(G2_thread, L7);
2330 2363 // save nmethod
2331 2364 mov(O0, L6);
2332 2365 set_last_Java_frame(SP, noreg);
2333 2366 call_VM_leaf(noreg, CAST_FROM_FN_PTR(address, SharedRuntime::OSR_migration_begin), L7);
2334 2367 reset_last_Java_frame();
2335 2368 mov(L7, G2_thread);
2336 2369
2337 2370 // move OSR nmethod to I1
2338 2371 mov(L6, I1);
2339 2372
2340 2373 // OSR buffer to I0
2341 2374 mov(O0, I0);
2342 2375
2343 2376 // remove the interpreter frame
2344 2377 restore(I5_savedSP, 0, SP);
2345 2378
2346 2379 // Jump to the osr code.
2347 2380 ld_ptr(O1, nmethod::osr_entry_point_offset(), O2);
2348 2381 jmp(O2, G0);
2349 2382 delayed()->nop();
2350 2383
2351 2384 bind(overflow_with_error);
2352 2385
2353 2386 bind(did_not_overflow);
2354 2387 }
2355 2388
2356 2389
2357 2390
2358 2391 void InterpreterMacroAssembler::interp_verify_oop(Register reg, TosState state, const char * file, int line) {
2359 2392 if (state == atos) { MacroAssembler::_verify_oop(reg, "broken oop ", file, line); }
2360 2393 }
2361 2394
2362 2395
2363 2396 // local helper function for the verify_oop_or_return_address macro
2364 2397 static bool verify_return_address(methodOopDesc* m, int bci) {
2365 2398 #ifndef PRODUCT
2366 2399 address pc = (address)(m->constMethod())
2367 2400 + in_bytes(constMethodOopDesc::codes_offset()) + bci;
2368 2401 // assume it is a valid return address if it is inside m and is preceded by a jsr
2369 2402 if (!m->contains(pc)) return false;
2370 2403 address jsr_pc;
2371 2404 jsr_pc = pc - Bytecodes::length_for(Bytecodes::_jsr);
2372 2405 if (*jsr_pc == Bytecodes::_jsr && jsr_pc >= m->code_base()) return true;
2373 2406 jsr_pc = pc - Bytecodes::length_for(Bytecodes::_jsr_w);
2374 2407 if (*jsr_pc == Bytecodes::_jsr_w && jsr_pc >= m->code_base()) return true;
2375 2408 #endif // PRODUCT
2376 2409 return false;
2377 2410 }
2378 2411
2379 2412
2380 2413 void InterpreterMacroAssembler::verify_oop_or_return_address(Register reg, Register Rtmp) {
2381 2414 if (!VerifyOops) return;
2382 2415 // the VM documentation for the astore[_wide] bytecode allows
2383 2416 // the TOS to be not only an oop but also a return address
2384 2417 Label test;
2385 2418 Label skip;
2386 2419 // See if it is an address (in the current method):
2387 2420
2388 2421 mov(reg, Rtmp);
2389 2422 const int log2_bytecode_size_limit = 16;
2390 2423 srl(Rtmp, log2_bytecode_size_limit, Rtmp);
2391 2424 br_notnull( Rtmp, false, pt, test );
2392 2425 delayed()->nop();
2393 2426
2394 2427 // %%% should use call_VM_leaf here?
2395 2428 save_frame_and_mov(0, Lmethod, O0, reg, O1);
2396 2429 save_thread(L7_thread_cache);
2397 2430 call(CAST_FROM_FN_PTR(address,verify_return_address), relocInfo::none);
2398 2431 delayed()->nop();
2399 2432 restore_thread(L7_thread_cache);
2400 2433 br_notnull( O0, false, pt, skip );
2401 2434 delayed()->restore();
2402 2435
2403 2436 // Perform a more elaborate out-of-line call
2404 2437 // Not an address; verify it:
2405 2438 bind(test);
2406 2439 verify_oop(reg);
2407 2440 bind(skip);
2408 2441 }
2409 2442
2410 2443
2411 2444 void InterpreterMacroAssembler::verify_FPU(int stack_depth, TosState state) {
2412 2445 if (state == ftos || state == dtos) MacroAssembler::verify_FPU(stack_depth);
2413 2446 }
2414 2447 #endif /* CC_INTERP */
2415 2448
2416 2449 // Inline assembly for:
2417 2450 //
2418 2451 // if (thread is in interp_only_mode) {
2419 2452 // InterpreterRuntime::post_method_entry();
2420 2453 // }
2421 2454 // if (DTraceMethodProbes) {
2422 2455 // SharedRuntime::dtrace_method_entry(method, receiver);
2423 2456 // }
2424 2457 // if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) {
2425 2458 // SharedRuntime::rc_trace_method_entry(method, receiver);
2426 2459 // }
2427 2460
2428 2461 void InterpreterMacroAssembler::notify_method_entry() {
2429 2462
2430 2463 // C++ interpreter only uses this for native methods.
2431 2464
2432 2465 // Whenever JVMTI puts a thread in interp_only_mode, method
2433 2466 // entry/exit events are sent for that thread to track stack
2434 2467 // depth. If it is possible to enter interp_only_mode we add
2435 2468 // the code to check if the event should be sent.
2436 2469 if (JvmtiExport::can_post_interpreter_events()) {
2437 2470 Label L;
2438 2471 Register temp_reg = O5;
2439 2472 const Address interp_only(G2_thread, JavaThread::interp_only_mode_offset());
2440 2473 ld(interp_only, temp_reg);
2441 2474 tst(temp_reg);
2442 2475 br(zero, false, pt, L);
2443 2476 delayed()->nop();
2444 2477 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::post_method_entry));
2445 2478 bind(L);
2446 2479 }
2447 2480
2448 2481 {
2449 2482 Register temp_reg = O5;
2450 2483 SkipIfEqual skip_if(this, temp_reg, &DTraceMethodProbes, zero);
2451 2484 call_VM_leaf(noreg,
2452 2485 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
2453 2486 G2_thread, Lmethod);
2454 2487 }
2455 2488
2456 2489 // RedefineClasses() tracing support for obsolete method entry
2457 2490 if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) {
2458 2491 call_VM_leaf(noreg,
2459 2492 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry),
2460 2493 G2_thread, Lmethod);
2461 2494 }
2462 2495 }
2463 2496
2464 2497
2465 2498 // Inline assembly for:
2466 2499 //
2467 2500 // if (thread is in interp_only_mode) {
2468 2501 // // save result
2469 2502 // InterpreterRuntime::post_method_exit();
2470 2503 // // restore result
2471 2504 // }
2472 2505 // if (DTraceMethodProbes) {
2473 2506 // SharedRuntime::dtrace_method_exit(thread, method);
2474 2507 // }
2475 2508 //
2476 2509 // Native methods have their result stored in d_tmp and l_tmp
2477 2510 // Java methods have their result stored in the expression stack
2478 2511
2479 2512 void InterpreterMacroAssembler::notify_method_exit(bool is_native_method,
2480 2513 TosState state,
2481 2514 NotifyMethodExitMode mode) {
2482 2515 // C++ interpreter only uses this for native methods.
2483 2516
2484 2517 // Whenever JVMTI puts a thread in interp_only_mode, method
2485 2518 // entry/exit events are sent for that thread to track stack
2486 2519 // depth. If it is possible to enter interp_only_mode we add
2487 2520 // the code to check if the event should be sent.
2488 2521 if (mode == NotifyJVMTI && JvmtiExport::can_post_interpreter_events()) {
2489 2522 Label L;
2490 2523 Register temp_reg = O5;
2491 2524 const Address interp_only(G2_thread, JavaThread::interp_only_mode_offset());
2492 2525 ld(interp_only, temp_reg);
2493 2526 tst(temp_reg);
2494 2527 br(zero, false, pt, L);
2495 2528 delayed()->nop();
2496 2529
2497 2530 // Note: frame::interpreter_frame_result has a dependency on how the
2498 2531 // method result is saved across the call to post_method_exit. For
2499 2532 // native methods it assumes the result registers are saved to
2500 2533 // l_scratch and d_scratch. If this changes then the interpreter_frame_result
2501 2534 // implementation will need to be updated too.
2502 2535
2503 2536 save_return_value(state, is_native_method);
2504 2537 call_VM(noreg,
2505 2538 CAST_FROM_FN_PTR(address, InterpreterRuntime::post_method_exit));
2506 2539 restore_return_value(state, is_native_method);
2507 2540 bind(L);
2508 2541 }
2509 2542
2510 2543 {
2511 2544 Register temp_reg = O5;
2512 2545 // Dtrace notification
2513 2546 SkipIfEqual skip_if(this, temp_reg, &DTraceMethodProbes, zero);
2514 2547 save_return_value(state, is_native_method);
2515 2548 call_VM_leaf(
2516 2549 noreg,
2517 2550 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
2518 2551 G2_thread, Lmethod);
2519 2552 restore_return_value(state, is_native_method);
2520 2553 }
2521 2554 }
2522 2555
2523 2556 void InterpreterMacroAssembler::save_return_value(TosState state, bool is_native_call) {
2524 2557 #ifdef CC_INTERP
2525 2558 // result potentially in O0/O1: save it across calls
2526 2559 stf(FloatRegisterImpl::D, F0, STATE(_native_fresult));
2527 2560 #ifdef _LP64
2528 2561 stx(O0, STATE(_native_lresult));
2529 2562 #else
2530 2563 std(O0, STATE(_native_lresult));
2531 2564 #endif
2532 2565 #else // CC_INTERP
2533 2566 if (is_native_call) {
2534 2567 stf(FloatRegisterImpl::D, F0, d_tmp);
2535 2568 #ifdef _LP64
2536 2569 stx(O0, l_tmp);
2537 2570 #else
2538 2571 std(O0, l_tmp);
2539 2572 #endif
2540 2573 } else {
2541 2574 push(state);
2542 2575 }
2543 2576 #endif // CC_INTERP
2544 2577 }
2545 2578
2546 2579 void InterpreterMacroAssembler::restore_return_value( TosState state, bool is_native_call) {
2547 2580 #ifdef CC_INTERP
2548 2581 ldf(FloatRegisterImpl::D, STATE(_native_fresult), F0);
2549 2582 #ifdef _LP64
2550 2583 ldx(STATE(_native_lresult), O0);
2551 2584 #else
2552 2585 ldd(STATE(_native_lresult), O0);
2553 2586 #endif
2554 2587 #else // CC_INTERP
2555 2588 if (is_native_call) {
2556 2589 ldf(FloatRegisterImpl::D, d_tmp, F0);
2557 2590 #ifdef _LP64
2558 2591 ldx(l_tmp, O0);
2559 2592 #else
2560 2593 ldd(l_tmp, O0);
2561 2594 #endif
2562 2595 } else {
2563 2596 pop(state);
2564 2597 }
2565 2598 #endif // CC_INTERP
2566 2599 }
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