1 /*
2 * Copyright 1997-2009 Sun Microsystems, Inc. All Rights Reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
20 * CA 95054 USA or visit www.sun.com if you need additional information or
21 * have any questions.
22 *
23 */
24
25 // Portions of code courtesy of Clifford Click
26
27 #include "incls/_precompiled.incl"
28 #include "incls/_mulnode.cpp.incl"
29
30
31 //=============================================================================
32 //------------------------------hash-------------------------------------------
33 // Hash function over MulNodes. Needs to be commutative; i.e., I swap
34 // (commute) inputs to MulNodes willy-nilly so the hash function must return
35 // the same value in the presence of edge swapping.
36 uint MulNode::hash() const {
37 return (uintptr_t)in(1) + (uintptr_t)in(2) + Opcode();
38 }
39
40 //------------------------------Identity---------------------------------------
41 // Multiplying a one preserves the other argument
42 Node *MulNode::Identity( PhaseTransform *phase ) {
43 register const Type *one = mul_id(); // The multiplicative identity
44 if( phase->type( in(1) )->higher_equal( one ) ) return in(2);
45 if( phase->type( in(2) )->higher_equal( one ) ) return in(1);
46
47 return this;
48 }
49
50 //------------------------------Ideal------------------------------------------
51 // We also canonicalize the Node, moving constants to the right input,
52 // and flatten expressions (so that 1+x+2 becomes x+3).
53 Node *MulNode::Ideal(PhaseGVN *phase, bool can_reshape) {
54 const Type *t1 = phase->type( in(1) );
55 const Type *t2 = phase->type( in(2) );
56 Node *progress = NULL; // Progress flag
57 // We are OK if right is a constant, or right is a load and
58 // left is a non-constant.
59 if( !(t2->singleton() ||
60 (in(2)->is_Load() && !(t1->singleton() || in(1)->is_Load())) ) ) {
61 if( t1->singleton() || // Left input is a constant?
62 // Otherwise, sort inputs (commutativity) to help value numbering.
63 (in(1)->_idx > in(2)->_idx) ) {
64 swap_edges(1, 2);
65 const Type *t = t1;
66 t1 = t2;
67 t2 = t;
68 progress = this; // Made progress
69 }
70 }
71
72 // If the right input is a constant, and the left input is a product of a
73 // constant, flatten the expression tree.
74 uint op = Opcode();
75 if( t2->singleton() && // Right input is a constant?
76 op != Op_MulF && // Float & double cannot reassociate
77 op != Op_MulD ) {
78 if( t2 == Type::TOP ) return NULL;
79 Node *mul1 = in(1);
80 #ifdef ASSERT
81 // Check for dead loop
82 int op1 = mul1->Opcode();
83 if( phase->eqv( mul1, this ) || phase->eqv( in(2), this ) ||
84 ( op1 == mul_opcode() || op1 == add_opcode() ) &&
85 ( phase->eqv( mul1->in(1), this ) || phase->eqv( mul1->in(2), this ) ||
86 phase->eqv( mul1->in(1), mul1 ) || phase->eqv( mul1->in(2), mul1 ) ) )
87 assert(false, "dead loop in MulNode::Ideal");
88 #endif
89
90 if( mul1->Opcode() == mul_opcode() ) { // Left input is a multiply?
91 // Mul of a constant?
92 const Type *t12 = phase->type( mul1->in(2) );
93 if( t12->singleton() && t12 != Type::TOP) { // Left input is an add of a constant?
94 // Compute new constant; check for overflow
95 const Type *tcon01 = mul1->as_Mul()->mul_ring(t2,t12);
96 if( tcon01->singleton() ) {
97 // The Mul of the flattened expression
98 set_req(1, mul1->in(1));
99 set_req(2, phase->makecon( tcon01 ));
100 t2 = tcon01;
101 progress = this; // Made progress
102 }
103 }
104 }
105 // If the right input is a constant, and the left input is an add of a
106 // constant, flatten the tree: (X+con1)*con0 ==> X*con0 + con1*con0
107 const Node *add1 = in(1);
108 if( add1->Opcode() == add_opcode() ) { // Left input is an add?
109 // Add of a constant?
110 const Type *t12 = phase->type( add1->in(2) );
111 if( t12->singleton() && t12 != Type::TOP ) { // Left input is an add of a constant?
112 assert( add1->in(1) != add1, "dead loop in MulNode::Ideal" );
113 // Compute new constant; check for overflow
114 const Type *tcon01 = mul_ring(t2,t12);
115 if( tcon01->singleton() ) {
116
117 // Convert (X+con1)*con0 into X*con0
118 Node *mul = clone(); // mul = ()*con0
119 mul->set_req(1,add1->in(1)); // mul = X*con0
120 mul = phase->transform(mul);
121
122 Node *add2 = add1->clone();
123 add2->set_req(1, mul); // X*con0 + con0*con1
124 add2->set_req(2, phase->makecon(tcon01) );
125 progress = add2;
126 }
127 }
128 } // End of is left input an add
129 } // End of is right input a Mul
130
131 return progress;
132 }
133
134 //------------------------------Value-----------------------------------------
135 const Type *MulNode::Value( PhaseTransform *phase ) const {
136 const Type *t1 = phase->type( in(1) );
137 const Type *t2 = phase->type( in(2) );
138 // Either input is TOP ==> the result is TOP
139 if( t1 == Type::TOP ) return Type::TOP;
140 if( t2 == Type::TOP ) return Type::TOP;
141
142 // Either input is ZERO ==> the result is ZERO.
143 // Not valid for floats or doubles since +0.0 * -0.0 --> +0.0
144 int op = Opcode();
145 if( op == Op_MulI || op == Op_AndI || op == Op_MulL || op == Op_AndL ) {
146 const Type *zero = add_id(); // The multiplicative zero
147 if( t1->higher_equal( zero ) ) return zero;
148 if( t2->higher_equal( zero ) ) return zero;
149 }
150
151 // Either input is BOTTOM ==> the result is the local BOTTOM
152 if( t1 == Type::BOTTOM || t2 == Type::BOTTOM )
153 return bottom_type();
154
155 #if defined(IA32)
156 // Can't trust native compilers to properly fold strict double
157 // multiplication with round-to-zero on this platform.
158 if (op == Op_MulD && phase->C->method()->is_strict()) {
159 return TypeD::DOUBLE;
160 }
161 #endif
162
163 return mul_ring(t1,t2); // Local flavor of type multiplication
164 }
165
166
167 //=============================================================================
168 //------------------------------Ideal------------------------------------------
169 // Check for power-of-2 multiply, then try the regular MulNode::Ideal
170 Node *MulINode::Ideal(PhaseGVN *phase, bool can_reshape) {
171 // Swap constant to right
172 jint con;
173 if ((con = in(1)->find_int_con(0)) != 0) {
174 swap_edges(1, 2);
175 // Finish rest of method to use info in 'con'
176 } else if ((con = in(2)->find_int_con(0)) == 0) {
177 return MulNode::Ideal(phase, can_reshape);
178 }
179
180 // Now we have a constant Node on the right and the constant in con
181 if( con == 0 ) return NULL; // By zero is handled by Value call
182 if( con == 1 ) return NULL; // By one is handled by Identity call
183
184 // Check for negative constant; if so negate the final result
185 bool sign_flip = false;
186 if( con < 0 ) {
187 con = -con;
188 sign_flip = true;
189 }
190
191 // Get low bit; check for being the only bit
192 Node *res = NULL;
193 jint bit1 = con & -con; // Extract low bit
194 if( bit1 == con ) { // Found a power of 2?
195 res = new (phase->C, 3) LShiftINode( in(1), phase->intcon(log2_intptr(bit1)) );
196 } else {
197
198 // Check for constant with 2 bits set
199 jint bit2 = con-bit1;
200 bit2 = bit2 & -bit2; // Extract 2nd bit
201 if( bit2 + bit1 == con ) { // Found all bits in con?
202 Node *n1 = phase->transform( new (phase->C, 3) LShiftINode( in(1), phase->intcon(log2_intptr(bit1)) ) );
203 Node *n2 = phase->transform( new (phase->C, 3) LShiftINode( in(1), phase->intcon(log2_intptr(bit2)) ) );
204 res = new (phase->C, 3) AddINode( n2, n1 );
205
206 } else if (is_power_of_2(con+1)) {
207 // Sleezy: power-of-2 -1. Next time be generic.
208 jint temp = (jint) (con + 1);
209 Node *n1 = phase->transform( new (phase->C, 3) LShiftINode( in(1), phase->intcon(log2_intptr(temp)) ) );
210 res = new (phase->C, 3) SubINode( n1, in(1) );
211 } else {
212 return MulNode::Ideal(phase, can_reshape);
213 }
214 }
215
216 if( sign_flip ) { // Need to negate result?
217 res = phase->transform(res);// Transform, before making the zero con
218 res = new (phase->C, 3) SubINode(phase->intcon(0),res);
219 }
220
221 return res; // Return final result
222 }
223
224 //------------------------------mul_ring---------------------------------------
225 // Compute the product type of two integer ranges into this node.
226 const Type *MulINode::mul_ring(const Type *t0, const Type *t1) const {
227 const TypeInt *r0 = t0->is_int(); // Handy access
228 const TypeInt *r1 = t1->is_int();
229
230 // Fetch endpoints of all ranges
231 int32 lo0 = r0->_lo;
232 double a = (double)lo0;
233 int32 hi0 = r0->_hi;
234 double b = (double)hi0;
235 int32 lo1 = r1->_lo;
236 double c = (double)lo1;
237 int32 hi1 = r1->_hi;
238 double d = (double)hi1;
239
240 // Compute all endpoints & check for overflow
241 int32 A = lo0*lo1;
242 if( (double)A != a*c ) return TypeInt::INT; // Overflow?
243 int32 B = lo0*hi1;
244 if( (double)B != a*d ) return TypeInt::INT; // Overflow?
245 int32 C = hi0*lo1;
246 if( (double)C != b*c ) return TypeInt::INT; // Overflow?
247 int32 D = hi0*hi1;
248 if( (double)D != b*d ) return TypeInt::INT; // Overflow?
249
250 if( A < B ) { lo0 = A; hi0 = B; } // Sort range endpoints
251 else { lo0 = B; hi0 = A; }
252 if( C < D ) {
253 if( C < lo0 ) lo0 = C;
254 if( D > hi0 ) hi0 = D;
255 } else {
256 if( D < lo0 ) lo0 = D;
257 if( C > hi0 ) hi0 = C;
258 }
259 return TypeInt::make(lo0, hi0, MAX2(r0->_widen,r1->_widen));
260 }
261
262
263 //=============================================================================
264 //------------------------------Ideal------------------------------------------
265 // Check for power-of-2 multiply, then try the regular MulNode::Ideal
266 Node *MulLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
267 // Swap constant to right
268 jlong con;
269 if ((con = in(1)->find_long_con(0)) != 0) {
270 swap_edges(1, 2);
271 // Finish rest of method to use info in 'con'
272 } else if ((con = in(2)->find_long_con(0)) == 0) {
273 return MulNode::Ideal(phase, can_reshape);
274 }
275
276 // Now we have a constant Node on the right and the constant in con
277 if( con == CONST64(0) ) return NULL; // By zero is handled by Value call
278 if( con == CONST64(1) ) return NULL; // By one is handled by Identity call
279
280 // Check for negative constant; if so negate the final result
281 bool sign_flip = false;
282 if( con < 0 ) {
283 con = -con;
284 sign_flip = true;
285 }
286
287 // Get low bit; check for being the only bit
288 Node *res = NULL;
289 jlong bit1 = con & -con; // Extract low bit
290 if( bit1 == con ) { // Found a power of 2?
291 res = new (phase->C, 3) LShiftLNode( in(1), phase->intcon(log2_long(bit1)) );
292 } else {
293
294 // Check for constant with 2 bits set
295 jlong bit2 = con-bit1;
296 bit2 = bit2 & -bit2; // Extract 2nd bit
297 if( bit2 + bit1 == con ) { // Found all bits in con?
298 Node *n1 = phase->transform( new (phase->C, 3) LShiftLNode( in(1), phase->intcon(log2_long(bit1)) ) );
299 Node *n2 = phase->transform( new (phase->C, 3) LShiftLNode( in(1), phase->intcon(log2_long(bit2)) ) );
300 res = new (phase->C, 3) AddLNode( n2, n1 );
301
302 } else if (is_power_of_2_long(con+1)) {
303 // Sleezy: power-of-2 -1. Next time be generic.
304 jlong temp = (jlong) (con + 1);
305 Node *n1 = phase->transform( new (phase->C, 3) LShiftLNode( in(1), phase->intcon(log2_long(temp)) ) );
306 res = new (phase->C, 3) SubLNode( n1, in(1) );
307 } else {
308 return MulNode::Ideal(phase, can_reshape);
309 }
310 }
311
312 if( sign_flip ) { // Need to negate result?
313 res = phase->transform(res);// Transform, before making the zero con
314 res = new (phase->C, 3) SubLNode(phase->longcon(0),res);
315 }
316
317 return res; // Return final result
318 }
319
320 //------------------------------mul_ring---------------------------------------
321 // Compute the product type of two integer ranges into this node.
322 const Type *MulLNode::mul_ring(const Type *t0, const Type *t1) const {
323 const TypeLong *r0 = t0->is_long(); // Handy access
324 const TypeLong *r1 = t1->is_long();
325
326 // Fetch endpoints of all ranges
327 jlong lo0 = r0->_lo;
328 double a = (double)lo0;
329 jlong hi0 = r0->_hi;
330 double b = (double)hi0;
331 jlong lo1 = r1->_lo;
332 double c = (double)lo1;
333 jlong hi1 = r1->_hi;
334 double d = (double)hi1;
335
336 // Compute all endpoints & check for overflow
337 jlong A = lo0*lo1;
338 if( (double)A != a*c ) return TypeLong::LONG; // Overflow?
339 jlong B = lo0*hi1;
340 if( (double)B != a*d ) return TypeLong::LONG; // Overflow?
341 jlong C = hi0*lo1;
342 if( (double)C != b*c ) return TypeLong::LONG; // Overflow?
343 jlong D = hi0*hi1;
344 if( (double)D != b*d ) return TypeLong::LONG; // Overflow?
345
346 if( A < B ) { lo0 = A; hi0 = B; } // Sort range endpoints
347 else { lo0 = B; hi0 = A; }
348 if( C < D ) {
349 if( C < lo0 ) lo0 = C;
350 if( D > hi0 ) hi0 = D;
351 } else {
352 if( D < lo0 ) lo0 = D;
353 if( C > hi0 ) hi0 = C;
354 }
355 return TypeLong::make(lo0, hi0, MAX2(r0->_widen,r1->_widen));
356 }
357
358 //=============================================================================
359 //------------------------------mul_ring---------------------------------------
360 // Compute the product type of two double ranges into this node.
361 const Type *MulFNode::mul_ring(const Type *t0, const Type *t1) const {
362 if( t0 == Type::FLOAT || t1 == Type::FLOAT ) return Type::FLOAT;
363 return TypeF::make( t0->getf() * t1->getf() );
364 }
365
366 //=============================================================================
367 //------------------------------mul_ring---------------------------------------
368 // Compute the product type of two double ranges into this node.
369 const Type *MulDNode::mul_ring(const Type *t0, const Type *t1) const {
370 if( t0 == Type::DOUBLE || t1 == Type::DOUBLE ) return Type::DOUBLE;
371 // We must be multiplying 2 double constants.
372 return TypeD::make( t0->getd() * t1->getd() );
373 }
374
375 //=============================================================================
376 //------------------------------Value------------------------------------------
377 const Type *MulHiLNode::Value( PhaseTransform *phase ) const {
378 // Either input is TOP ==> the result is TOP
379 const Type *t1 = phase->type( in(1) );
380 const Type *t2 = phase->type( in(2) );
381 if( t1 == Type::TOP ) return Type::TOP;
382 if( t2 == Type::TOP ) return Type::TOP;
383
384 // Either input is BOTTOM ==> the result is the local BOTTOM
385 const Type *bot = bottom_type();
386 if( (t1 == bot) || (t2 == bot) ||
387 (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
388 return bot;
389
390 // It is not worth trying to constant fold this stuff!
391 return TypeLong::LONG;
392 }
393
394 //=============================================================================
395 //------------------------------mul_ring---------------------------------------
396 // Supplied function returns the product of the inputs IN THE CURRENT RING.
397 // For the logical operations the ring's MUL is really a logical AND function.
398 // This also type-checks the inputs for sanity. Guaranteed never to
399 // be passed a TOP or BOTTOM type, these are filtered out by pre-check.
400 const Type *AndINode::mul_ring( const Type *t0, const Type *t1 ) const {
401 const TypeInt *r0 = t0->is_int(); // Handy access
402 const TypeInt *r1 = t1->is_int();
403 int widen = MAX2(r0->_widen,r1->_widen);
404
405 // If either input is a constant, might be able to trim cases
406 if( !r0->is_con() && !r1->is_con() )
407 return TypeInt::INT; // No constants to be had
408
409 // Both constants? Return bits
410 if( r0->is_con() && r1->is_con() )
411 return TypeInt::make( r0->get_con() & r1->get_con() );
412
413 if( r0->is_con() && r0->get_con() > 0 )
414 return TypeInt::make(0, r0->get_con(), widen);
415
416 if( r1->is_con() && r1->get_con() > 0 )
417 return TypeInt::make(0, r1->get_con(), widen);
418
419 if( r0 == TypeInt::BOOL || r1 == TypeInt::BOOL ) {
420 return TypeInt::BOOL;
421 }
422
423 return TypeInt::INT; // No constants to be had
424 }
425
426 //------------------------------Identity---------------------------------------
427 // Masking off the high bits of an unsigned load is not required
428 Node *AndINode::Identity( PhaseTransform *phase ) {
429
430 // x & x => x
431 if (phase->eqv(in(1), in(2))) return in(1);
432
433 Node* in1 = in(1);
434 uint op = in1->Opcode();
435 const TypeInt* t2 = phase->type(in(2))->isa_int();
436 if (t2 && t2->is_con()) {
437 int con = t2->get_con();
438 // Masking off high bits which are always zero is useless.
439 const TypeInt* t1 = phase->type( in(1) )->isa_int();
440 if (t1 != NULL && t1->_lo >= 0) {
441 jint t1_support = right_n_bits(1 + log2_intptr(t1->_hi));
442 if ((t1_support & con) == t1_support)
443 return in1;
444 }
445 // Masking off the high bits of a unsigned-shift-right is not
446 // needed either.
447 if (op == Op_URShiftI) {
448 const TypeInt* t12 = phase->type(in1->in(2))->isa_int();
449 if (t12 && t12->is_con()) { // Shift is by a constant
450 int shift = t12->get_con();
451 shift &= BitsPerJavaInteger - 1; // semantics of Java shifts
452 int mask = max_juint >> shift;
453 if ((mask & con) == mask) // If AND is useless, skip it
454 return in1;
455 }
456 }
457 }
458 return MulNode::Identity(phase);
459 }
460
461 //------------------------------Ideal------------------------------------------
462 Node *AndINode::Ideal(PhaseGVN *phase, bool can_reshape) {
463 // Special case constant AND mask
464 const TypeInt *t2 = phase->type( in(2) )->isa_int();
465 if( !t2 || !t2->is_con() ) return MulNode::Ideal(phase, can_reshape);
466 const int mask = t2->get_con();
467 Node *load = in(1);
468 uint lop = load->Opcode();
469
470 // Masking bits off of a Character? Hi bits are already zero.
471 if( lop == Op_LoadUS &&
472 (mask & 0xFFFF0000) ) // Can we make a smaller mask?
473 return new (phase->C, 3) AndINode(load,phase->intcon(mask&0xFFFF));
474
475 // Masking bits off of a Short? Loading a Character does some masking
476 if (lop == Op_LoadS && (mask & 0xFFFF0000) == 0 ) {
477 Node *ldus = new (phase->C, 3) LoadUSNode(load->in(MemNode::Control),
478 load->in(MemNode::Memory),
479 load->in(MemNode::Address),
480 load->adr_type());
481 ldus = phase->transform(ldus);
482 return new (phase->C, 3) AndINode(ldus, phase->intcon(mask & 0xFFFF));
483 }
484
485 // Masking sign bits off of a Byte? Do an unsigned byte load plus
486 // an and.
487 if (lop == Op_LoadB && (mask & 0xFFFFFF00) == 0) {
488 Node* ldub = new (phase->C, 3) LoadUBNode(load->in(MemNode::Control),
489 load->in(MemNode::Memory),
490 load->in(MemNode::Address),
491 load->adr_type());
492 ldub = phase->transform(ldub);
493 return new (phase->C, 3) AndINode(ldub, phase->intcon(mask));
494 }
495
496 // Masking off sign bits? Dont make them!
497 if( lop == Op_RShiftI ) {
498 const TypeInt *t12 = phase->type(load->in(2))->isa_int();
499 if( t12 && t12->is_con() ) { // Shift is by a constant
500 int shift = t12->get_con();
501 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
502 const int sign_bits_mask = ~right_n_bits(BitsPerJavaInteger - shift);
503 // If the AND'ing of the 2 masks has no bits, then only original shifted
504 // bits survive. NO sign-extension bits survive the maskings.
505 if( (sign_bits_mask & mask) == 0 ) {
506 // Use zero-fill shift instead
507 Node *zshift = phase->transform(new (phase->C, 3) URShiftINode(load->in(1),load->in(2)));
508 return new (phase->C, 3) AndINode( zshift, in(2) );
509 }
510 }
511 }
512
513 // Check for 'negate/and-1', a pattern emitted when someone asks for
514 // 'mod 2'. Negate leaves the low order bit unchanged (think: complement
515 // plus 1) and the mask is of the low order bit. Skip the negate.
516 if( lop == Op_SubI && mask == 1 && load->in(1) &&
517 phase->type(load->in(1)) == TypeInt::ZERO )
518 return new (phase->C, 3) AndINode( load->in(2), in(2) );
519
520 return MulNode::Ideal(phase, can_reshape);
521 }
522
523 //=============================================================================
524 //------------------------------mul_ring---------------------------------------
525 // Supplied function returns the product of the inputs IN THE CURRENT RING.
526 // For the logical operations the ring's MUL is really a logical AND function.
527 // This also type-checks the inputs for sanity. Guaranteed never to
528 // be passed a TOP or BOTTOM type, these are filtered out by pre-check.
529 const Type *AndLNode::mul_ring( const Type *t0, const Type *t1 ) const {
530 const TypeLong *r0 = t0->is_long(); // Handy access
531 const TypeLong *r1 = t1->is_long();
532 int widen = MAX2(r0->_widen,r1->_widen);
533
534 // If either input is a constant, might be able to trim cases
535 if( !r0->is_con() && !r1->is_con() )
536 return TypeLong::LONG; // No constants to be had
537
538 // Both constants? Return bits
539 if( r0->is_con() && r1->is_con() )
540 return TypeLong::make( r0->get_con() & r1->get_con() );
541
542 if( r0->is_con() && r0->get_con() > 0 )
543 return TypeLong::make(CONST64(0), r0->get_con(), widen);
544
545 if( r1->is_con() && r1->get_con() > 0 )
546 return TypeLong::make(CONST64(0), r1->get_con(), widen);
547
548 return TypeLong::LONG; // No constants to be had
549 }
550
551 //------------------------------Identity---------------------------------------
552 // Masking off the high bits of an unsigned load is not required
553 Node *AndLNode::Identity( PhaseTransform *phase ) {
554
555 // x & x => x
556 if (phase->eqv(in(1), in(2))) return in(1);
557
558 Node *usr = in(1);
559 const TypeLong *t2 = phase->type( in(2) )->isa_long();
560 if( t2 && t2->is_con() ) {
561 jlong con = t2->get_con();
562 // Masking off high bits which are always zero is useless.
563 const TypeLong* t1 = phase->type( in(1) )->isa_long();
564 if (t1 != NULL && t1->_lo >= 0) {
565 jlong t1_support = ((jlong)1 << (1 + log2_long(t1->_hi))) - 1;
566 if ((t1_support & con) == t1_support)
567 return usr;
568 }
569 uint lop = usr->Opcode();
570 // Masking off the high bits of a unsigned-shift-right is not
571 // needed either.
572 if( lop == Op_URShiftL ) {
573 const TypeInt *t12 = phase->type( usr->in(2) )->isa_int();
574 if( t12 && t12->is_con() ) { // Shift is by a constant
575 int shift = t12->get_con();
576 shift &= BitsPerJavaLong - 1; // semantics of Java shifts
577 jlong mask = max_julong >> shift;
578 if( (mask&con) == mask ) // If AND is useless, skip it
579 return usr;
580 }
581 }
582 }
583 return MulNode::Identity(phase);
584 }
585
586 //------------------------------Ideal------------------------------------------
587 Node *AndLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
588 // Special case constant AND mask
589 const TypeLong *t2 = phase->type( in(2) )->isa_long();
590 if( !t2 || !t2->is_con() ) return MulNode::Ideal(phase, can_reshape);
591 const jlong mask = t2->get_con();
592
593 Node* in1 = in(1);
594 uint op = in1->Opcode();
595
596 // Masking sign bits off of an integer? Do an unsigned integer to
597 // long load.
598 // NOTE: This check must be *before* we try to convert the AndLNode
599 // to an AndINode and commute it with ConvI2LNode because
600 // 0xFFFFFFFFL masks the whole integer and we get a sign extension,
601 // which is wrong.
602 if (op == Op_ConvI2L && in1->in(1)->Opcode() == Op_LoadI && mask == CONST64(0x00000000FFFFFFFF)) {
603 Node* load = in1->in(1);
604 return new (phase->C, 3) LoadUI2LNode(load->in(MemNode::Control),
605 load->in(MemNode::Memory),
606 load->in(MemNode::Address),
607 load->adr_type());
608 }
609
610 // Are we masking a long that was converted from an int with a mask
611 // that fits in 32-bits? Commute them and use an AndINode. Don't
612 // convert masks which would cause a sign extension of the integer
613 // value. This check includes UI2L masks (0x00000000FFFFFFFF) which
614 // would be optimized away later in Identity.
615 if (op == Op_ConvI2L && (mask & CONST64(0xFFFFFFFF80000000)) == 0) {
616 Node* andi = new (phase->C, 3) AndINode(in1->in(1), phase->intcon(mask));
617 andi = phase->transform(andi);
618 return new (phase->C, 2) ConvI2LNode(andi);
619 }
620
621 // Masking off sign bits? Dont make them!
622 if (op == Op_RShiftL) {
623 const TypeInt* t12 = phase->type(in1->in(2))->isa_int();
624 if( t12 && t12->is_con() ) { // Shift is by a constant
625 int shift = t12->get_con();
626 shift &= BitsPerJavaLong - 1; // semantics of Java shifts
627 const jlong sign_bits_mask = ~(((jlong)CONST64(1) << (jlong)(BitsPerJavaLong - shift)) -1);
628 // If the AND'ing of the 2 masks has no bits, then only original shifted
629 // bits survive. NO sign-extension bits survive the maskings.
630 if( (sign_bits_mask & mask) == 0 ) {
631 // Use zero-fill shift instead
632 Node *zshift = phase->transform(new (phase->C, 3) URShiftLNode(in1->in(1), in1->in(2)));
633 return new (phase->C, 3) AndLNode(zshift, in(2));
634 }
635 }
636 }
637
638 return MulNode::Ideal(phase, can_reshape);
639 }
640
641 //=============================================================================
642 //------------------------------Identity---------------------------------------
643 Node *LShiftINode::Identity( PhaseTransform *phase ) {
644 const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
645 return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerInt - 1 ) ) == 0 ) ? in(1) : this;
646 }
647
648 //------------------------------Ideal------------------------------------------
649 // If the right input is a constant, and the left input is an add of a
650 // constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0
651 Node *LShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
652 const Type *t = phase->type( in(2) );
653 if( t == Type::TOP ) return NULL; // Right input is dead
654 const TypeInt *t2 = t->isa_int();
655 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
656 const int con = t2->get_con() & ( BitsPerInt - 1 ); // masked shift count
657
658 if ( con == 0 ) return NULL; // let Identity() handle 0 shift count
659
660 // Left input is an add of a constant?
661 Node *add1 = in(1);
662 int add1_op = add1->Opcode();
663 if( add1_op == Op_AddI ) { // Left input is an add?
664 assert( add1 != add1->in(1), "dead loop in LShiftINode::Ideal" );
665 const TypeInt *t12 = phase->type(add1->in(2))->isa_int();
666 if( t12 && t12->is_con() ){ // Left input is an add of a con?
667 // Transform is legal, but check for profit. Avoid breaking 'i2s'
668 // and 'i2b' patterns which typically fold into 'StoreC/StoreB'.
669 if( con < 16 ) {
670 // Compute X << con0
671 Node *lsh = phase->transform( new (phase->C, 3) LShiftINode( add1->in(1), in(2) ) );
672 // Compute X<<con0 + (con1<<con0)
673 return new (phase->C, 3) AddINode( lsh, phase->intcon(t12->get_con() << con));
674 }
675 }
676 }
677
678 // Check for "(x>>c0)<<c0" which just masks off low bits
679 if( (add1_op == Op_RShiftI || add1_op == Op_URShiftI ) &&
680 add1->in(2) == in(2) )
681 // Convert to "(x & -(1<<c0))"
682 return new (phase->C, 3) AndINode(add1->in(1),phase->intcon( -(1<<con)));
683
684 // Check for "((x>>c0) & Y)<<c0" which just masks off more low bits
685 if( add1_op == Op_AndI ) {
686 Node *add2 = add1->in(1);
687 int add2_op = add2->Opcode();
688 if( (add2_op == Op_RShiftI || add2_op == Op_URShiftI ) &&
689 add2->in(2) == in(2) ) {
690 // Convert to "(x & (Y<<c0))"
691 Node *y_sh = phase->transform( new (phase->C, 3) LShiftINode( add1->in(2), in(2) ) );
692 return new (phase->C, 3) AndINode( add2->in(1), y_sh );
693 }
694 }
695
696 // Check for ((x & ((1<<(32-c0))-1)) << c0) which ANDs off high bits
697 // before shifting them away.
698 const jint bits_mask = right_n_bits(BitsPerJavaInteger-con);
699 if( add1_op == Op_AndI &&
700 phase->type(add1->in(2)) == TypeInt::make( bits_mask ) )
701 return new (phase->C, 3) LShiftINode( add1->in(1), in(2) );
702
703 return NULL;
704 }
705
706 //------------------------------Value------------------------------------------
707 // A LShiftINode shifts its input2 left by input1 amount.
708 const Type *LShiftINode::Value( PhaseTransform *phase ) const {
709 const Type *t1 = phase->type( in(1) );
710 const Type *t2 = phase->type( in(2) );
711 // Either input is TOP ==> the result is TOP
712 if( t1 == Type::TOP ) return Type::TOP;
713 if( t2 == Type::TOP ) return Type::TOP;
714
715 // Left input is ZERO ==> the result is ZERO.
716 if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
717 // Shift by zero does nothing
718 if( t2 == TypeInt::ZERO ) return t1;
719
720 // Either input is BOTTOM ==> the result is BOTTOM
721 if( (t1 == TypeInt::INT) || (t2 == TypeInt::INT) ||
722 (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
723 return TypeInt::INT;
724
725 const TypeInt *r1 = t1->is_int(); // Handy access
726 const TypeInt *r2 = t2->is_int(); // Handy access
727
728 if (!r2->is_con())
729 return TypeInt::INT;
730
731 uint shift = r2->get_con();
732 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
733 // Shift by a multiple of 32 does nothing:
734 if (shift == 0) return t1;
735
736 // If the shift is a constant, shift the bounds of the type,
737 // unless this could lead to an overflow.
738 if (!r1->is_con()) {
739 jint lo = r1->_lo, hi = r1->_hi;
740 if (((lo << shift) >> shift) == lo &&
741 ((hi << shift) >> shift) == hi) {
742 // No overflow. The range shifts up cleanly.
743 return TypeInt::make((jint)lo << (jint)shift,
744 (jint)hi << (jint)shift,
745 MAX2(r1->_widen,r2->_widen));
746 }
747 return TypeInt::INT;
748 }
749
750 return TypeInt::make( (jint)r1->get_con() << (jint)shift );
751 }
752
753 //=============================================================================
754 //------------------------------Identity---------------------------------------
755 Node *LShiftLNode::Identity( PhaseTransform *phase ) {
756 const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
757 return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this;
758 }
759
760 //------------------------------Ideal------------------------------------------
761 // If the right input is a constant, and the left input is an add of a
762 // constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0
763 Node *LShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
764 const Type *t = phase->type( in(2) );
765 if( t == Type::TOP ) return NULL; // Right input is dead
766 const TypeInt *t2 = t->isa_int();
767 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
768 const int con = t2->get_con() & ( BitsPerLong - 1 ); // masked shift count
769
770 if ( con == 0 ) return NULL; // let Identity() handle 0 shift count
771
772 // Left input is an add of a constant?
773 Node *add1 = in(1);
774 int add1_op = add1->Opcode();
775 if( add1_op == Op_AddL ) { // Left input is an add?
776 // Avoid dead data cycles from dead loops
777 assert( add1 != add1->in(1), "dead loop in LShiftLNode::Ideal" );
778 const TypeLong *t12 = phase->type(add1->in(2))->isa_long();
779 if( t12 && t12->is_con() ){ // Left input is an add of a con?
780 // Compute X << con0
781 Node *lsh = phase->transform( new (phase->C, 3) LShiftLNode( add1->in(1), in(2) ) );
782 // Compute X<<con0 + (con1<<con0)
783 return new (phase->C, 3) AddLNode( lsh, phase->longcon(t12->get_con() << con));
784 }
785 }
786
787 // Check for "(x>>c0)<<c0" which just masks off low bits
788 if( (add1_op == Op_RShiftL || add1_op == Op_URShiftL ) &&
789 add1->in(2) == in(2) )
790 // Convert to "(x & -(1<<c0))"
791 return new (phase->C, 3) AndLNode(add1->in(1),phase->longcon( -(CONST64(1)<<con)));
792
793 // Check for "((x>>c0) & Y)<<c0" which just masks off more low bits
794 if( add1_op == Op_AndL ) {
795 Node *add2 = add1->in(1);
796 int add2_op = add2->Opcode();
797 if( (add2_op == Op_RShiftL || add2_op == Op_URShiftL ) &&
798 add2->in(2) == in(2) ) {
799 // Convert to "(x & (Y<<c0))"
800 Node *y_sh = phase->transform( new (phase->C, 3) LShiftLNode( add1->in(2), in(2) ) );
801 return new (phase->C, 3) AndLNode( add2->in(1), y_sh );
802 }
803 }
804
805 // Check for ((x & ((CONST64(1)<<(64-c0))-1)) << c0) which ANDs off high bits
806 // before shifting them away.
807 const jlong bits_mask = ((jlong)CONST64(1) << (jlong)(BitsPerJavaLong - con)) - CONST64(1);
808 if( add1_op == Op_AndL &&
809 phase->type(add1->in(2)) == TypeLong::make( bits_mask ) )
810 return new (phase->C, 3) LShiftLNode( add1->in(1), in(2) );
811
812 return NULL;
813 }
814
815 //------------------------------Value------------------------------------------
816 // A LShiftLNode shifts its input2 left by input1 amount.
817 const Type *LShiftLNode::Value( PhaseTransform *phase ) const {
818 const Type *t1 = phase->type( in(1) );
819 const Type *t2 = phase->type( in(2) );
820 // Either input is TOP ==> the result is TOP
821 if( t1 == Type::TOP ) return Type::TOP;
822 if( t2 == Type::TOP ) return Type::TOP;
823
824 // Left input is ZERO ==> the result is ZERO.
825 if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
826 // Shift by zero does nothing
827 if( t2 == TypeInt::ZERO ) return t1;
828
829 // Either input is BOTTOM ==> the result is BOTTOM
830 if( (t1 == TypeLong::LONG) || (t2 == TypeInt::INT) ||
831 (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
832 return TypeLong::LONG;
833
834 const TypeLong *r1 = t1->is_long(); // Handy access
835 const TypeInt *r2 = t2->is_int(); // Handy access
836
837 if (!r2->is_con())
838 return TypeLong::LONG;
839
840 uint shift = r2->get_con();
841 shift &= BitsPerJavaLong - 1; // semantics of Java shifts
842 // Shift by a multiple of 64 does nothing:
843 if (shift == 0) return t1;
844
845 // If the shift is a constant, shift the bounds of the type,
846 // unless this could lead to an overflow.
847 if (!r1->is_con()) {
848 jlong lo = r1->_lo, hi = r1->_hi;
849 if (((lo << shift) >> shift) == lo &&
850 ((hi << shift) >> shift) == hi) {
851 // No overflow. The range shifts up cleanly.
852 return TypeLong::make((jlong)lo << (jint)shift,
853 (jlong)hi << (jint)shift,
854 MAX2(r1->_widen,r2->_widen));
855 }
856 return TypeLong::LONG;
857 }
858
859 return TypeLong::make( (jlong)r1->get_con() << (jint)shift );
860 }
861
862 //=============================================================================
863 //------------------------------Identity---------------------------------------
864 Node *RShiftINode::Identity( PhaseTransform *phase ) {
865 const TypeInt *t2 = phase->type(in(2))->isa_int();
866 if( !t2 ) return this;
867 if ( t2->is_con() && ( t2->get_con() & ( BitsPerInt - 1 ) ) == 0 )
868 return in(1);
869
870 // Check for useless sign-masking
871 if( in(1)->Opcode() == Op_LShiftI &&
872 in(1)->req() == 3 &&
873 in(1)->in(2) == in(2) &&
874 t2->is_con() ) {
875 uint shift = t2->get_con();
876 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
877 // Compute masks for which this shifting doesn't change
878 int lo = (-1 << (BitsPerJavaInteger - shift-1)); // FFFF8000
879 int hi = ~lo; // 00007FFF
880 const TypeInt *t11 = phase->type(in(1)->in(1))->isa_int();
881 if( !t11 ) return this;
882 // Does actual value fit inside of mask?
883 if( lo <= t11->_lo && t11->_hi <= hi )
884 return in(1)->in(1); // Then shifting is a nop
885 }
886
887 return this;
888 }
889
890 //------------------------------Ideal------------------------------------------
891 Node *RShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
892 // Inputs may be TOP if they are dead.
893 const TypeInt *t1 = phase->type( in(1) )->isa_int();
894 if( !t1 ) return NULL; // Left input is an integer
895 const TypeInt *t2 = phase->type( in(2) )->isa_int();
896 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
897 const TypeInt *t3; // type of in(1).in(2)
898 int shift = t2->get_con();
899 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
900
901 if ( shift == 0 ) return NULL; // let Identity() handle 0 shift count
902
903 // Check for (x & 0xFF000000) >> 24, whose mask can be made smaller.
904 // Such expressions arise normally from shift chains like (byte)(x >> 24).
905 const Node *mask = in(1);
906 if( mask->Opcode() == Op_AndI &&
907 (t3 = phase->type(mask->in(2))->isa_int()) &&
908 t3->is_con() ) {
909 Node *x = mask->in(1);
910 jint maskbits = t3->get_con();
911 // Convert to "(x >> shift) & (mask >> shift)"
912 Node *shr_nomask = phase->transform( new (phase->C, 3) RShiftINode(mask->in(1), in(2)) );
913 return new (phase->C, 3) AndINode(shr_nomask, phase->intcon( maskbits >> shift));
914 }
915
916 // Check for "(short[i] <<16)>>16" which simply sign-extends
917 const Node *shl = in(1);
918 if( shl->Opcode() != Op_LShiftI ) return NULL;
919
920 if( shift == 16 &&
921 (t3 = phase->type(shl->in(2))->isa_int()) &&
922 t3->is_con(16) ) {
923 Node *ld = shl->in(1);
924 if( ld->Opcode() == Op_LoadS ) {
925 // Sign extension is just useless here. Return a RShiftI of zero instead
926 // returning 'ld' directly. We cannot return an old Node directly as
927 // that is the job of 'Identity' calls and Identity calls only work on
928 // direct inputs ('ld' is an extra Node removed from 'this'). The
929 // combined optimization requires Identity only return direct inputs.
930 set_req(1, ld);
931 set_req(2, phase->intcon(0));
932 return this;
933 }
934 else if( ld->Opcode() == Op_LoadUS )
935 // Replace zero-extension-load with sign-extension-load
936 return new (phase->C, 3) LoadSNode( ld->in(MemNode::Control),
937 ld->in(MemNode::Memory),
938 ld->in(MemNode::Address),
939 ld->adr_type());
940 }
941
942 // Check for "(byte[i] <<24)>>24" which simply sign-extends
943 if( shift == 24 &&
944 (t3 = phase->type(shl->in(2))->isa_int()) &&
945 t3->is_con(24) ) {
946 Node *ld = shl->in(1);
947 if( ld->Opcode() == Op_LoadB ) {
948 // Sign extension is just useless here
949 set_req(1, ld);
950 set_req(2, phase->intcon(0));
951 return this;
952 }
953 }
954
955 return NULL;
956 }
957
958 //------------------------------Value------------------------------------------
959 // A RShiftINode shifts its input2 right by input1 amount.
960 const Type *RShiftINode::Value( PhaseTransform *phase ) const {
961 const Type *t1 = phase->type( in(1) );
962 const Type *t2 = phase->type( in(2) );
963 // Either input is TOP ==> the result is TOP
964 if( t1 == Type::TOP ) return Type::TOP;
965 if( t2 == Type::TOP ) return Type::TOP;
966
967 // Left input is ZERO ==> the result is ZERO.
968 if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
969 // Shift by zero does nothing
970 if( t2 == TypeInt::ZERO ) return t1;
971
972 // Either input is BOTTOM ==> the result is BOTTOM
973 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
974 return TypeInt::INT;
975
976 if (t2 == TypeInt::INT)
977 return TypeInt::INT;
978
979 const TypeInt *r1 = t1->is_int(); // Handy access
980 const TypeInt *r2 = t2->is_int(); // Handy access
981
982 // If the shift is a constant, just shift the bounds of the type.
983 // For example, if the shift is 31, we just propagate sign bits.
984 if (r2->is_con()) {
985 uint shift = r2->get_con();
986 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
987 // Shift by a multiple of 32 does nothing:
988 if (shift == 0) return t1;
989 // Calculate reasonably aggressive bounds for the result.
990 // This is necessary if we are to correctly type things
991 // like (x<<24>>24) == ((byte)x).
992 jint lo = (jint)r1->_lo >> (jint)shift;
993 jint hi = (jint)r1->_hi >> (jint)shift;
994 assert(lo <= hi, "must have valid bounds");
995 const TypeInt* ti = TypeInt::make(lo, hi, MAX2(r1->_widen,r2->_widen));
996 #ifdef ASSERT
997 // Make sure we get the sign-capture idiom correct.
998 if (shift == BitsPerJavaInteger-1) {
999 if (r1->_lo >= 0) assert(ti == TypeInt::ZERO, ">>31 of + is 0");
1000 if (r1->_hi < 0) assert(ti == TypeInt::MINUS_1, ">>31 of - is -1");
1001 }
1002 #endif
1003 return ti;
1004 }
1005
1006 if( !r1->is_con() || !r2->is_con() )
1007 return TypeInt::INT;
1008
1009 // Signed shift right
1010 return TypeInt::make( r1->get_con() >> (r2->get_con()&31) );
1011 }
1012
1013 //=============================================================================
1014 //------------------------------Identity---------------------------------------
1015 Node *RShiftLNode::Identity( PhaseTransform *phase ) {
1016 const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
1017 return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this;
1018 }
1019
1020 //------------------------------Value------------------------------------------
1021 // A RShiftLNode shifts its input2 right by input1 amount.
1022 const Type *RShiftLNode::Value( PhaseTransform *phase ) const {
1023 const Type *t1 = phase->type( in(1) );
1024 const Type *t2 = phase->type( in(2) );
1025 // Either input is TOP ==> the result is TOP
1026 if( t1 == Type::TOP ) return Type::TOP;
1027 if( t2 == Type::TOP ) return Type::TOP;
1028
1029 // Left input is ZERO ==> the result is ZERO.
1030 if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
1031 // Shift by zero does nothing
1032 if( t2 == TypeInt::ZERO ) return t1;
1033
1034 // Either input is BOTTOM ==> the result is BOTTOM
1035 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1036 return TypeLong::LONG;
1037
1038 if (t2 == TypeInt::INT)
1039 return TypeLong::LONG;
1040
1041 const TypeLong *r1 = t1->is_long(); // Handy access
1042 const TypeInt *r2 = t2->is_int (); // Handy access
1043
1044 // If the shift is a constant, just shift the bounds of the type.
1045 // For example, if the shift is 63, we just propagate sign bits.
1046 if (r2->is_con()) {
1047 uint shift = r2->get_con();
1048 shift &= (2*BitsPerJavaInteger)-1; // semantics of Java shifts
1049 // Shift by a multiple of 64 does nothing:
1050 if (shift == 0) return t1;
1051 // Calculate reasonably aggressive bounds for the result.
1052 // This is necessary if we are to correctly type things
1053 // like (x<<24>>24) == ((byte)x).
1054 jlong lo = (jlong)r1->_lo >> (jlong)shift;
1055 jlong hi = (jlong)r1->_hi >> (jlong)shift;
1056 assert(lo <= hi, "must have valid bounds");
1057 const TypeLong* tl = TypeLong::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1058 #ifdef ASSERT
1059 // Make sure we get the sign-capture idiom correct.
1060 if (shift == (2*BitsPerJavaInteger)-1) {
1061 if (r1->_lo >= 0) assert(tl == TypeLong::ZERO, ">>63 of + is 0");
1062 if (r1->_hi < 0) assert(tl == TypeLong::MINUS_1, ">>63 of - is -1");
1063 }
1064 #endif
1065 return tl;
1066 }
1067
1068 return TypeLong::LONG; // Give up
1069 }
1070
1071 //=============================================================================
1072 //------------------------------Identity---------------------------------------
1073 Node *URShiftINode::Identity( PhaseTransform *phase ) {
1074 const TypeInt *ti = phase->type( in(2) )->isa_int();
1075 if ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerInt - 1 ) ) == 0 ) return in(1);
1076
1077 // Check for "((x << LogBytesPerWord) + (wordSize-1)) >> LogBytesPerWord" which is just "x".
1078 // Happens during new-array length computation.
1079 // Safe if 'x' is in the range [0..(max_int>>LogBytesPerWord)]
1080 Node *add = in(1);
1081 if( add->Opcode() == Op_AddI ) {
1082 const TypeInt *t2 = phase->type(add->in(2))->isa_int();
1083 if( t2 && t2->is_con(wordSize - 1) &&
1084 add->in(1)->Opcode() == Op_LShiftI ) {
1085 // Check that shift_counts are LogBytesPerWord
1086 Node *lshift_count = add->in(1)->in(2);
1087 const TypeInt *t_lshift_count = phase->type(lshift_count)->isa_int();
1088 if( t_lshift_count && t_lshift_count->is_con(LogBytesPerWord) &&
1089 t_lshift_count == phase->type(in(2)) ) {
1090 Node *x = add->in(1)->in(1);
1091 const TypeInt *t_x = phase->type(x)->isa_int();
1092 if( t_x != NULL && 0 <= t_x->_lo && t_x->_hi <= (max_jint>>LogBytesPerWord) ) {
1093 return x;
1094 }
1095 }
1096 }
1097 }
1098
1099 return (phase->type(in(2))->higher_equal(TypeInt::ZERO)) ? in(1) : this;
1100 }
1101
1102 //------------------------------Ideal------------------------------------------
1103 Node *URShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
1104 const TypeInt *t2 = phase->type( in(2) )->isa_int();
1105 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
1106 const int con = t2->get_con() & 31; // Shift count is always masked
1107 if ( con == 0 ) return NULL; // let Identity() handle a 0 shift count
1108 // We'll be wanting the right-shift amount as a mask of that many bits
1109 const int mask = right_n_bits(BitsPerJavaInteger - con);
1110
1111 int in1_op = in(1)->Opcode();
1112
1113 // Check for ((x>>>a)>>>b) and replace with (x>>>(a+b)) when a+b < 32
1114 if( in1_op == Op_URShiftI ) {
1115 const TypeInt *t12 = phase->type( in(1)->in(2) )->isa_int();
1116 if( t12 && t12->is_con() ) { // Right input is a constant
1117 assert( in(1) != in(1)->in(1), "dead loop in URShiftINode::Ideal" );
1118 const int con2 = t12->get_con() & 31; // Shift count is always masked
1119 const int con3 = con+con2;
1120 if( con3 < 32 ) // Only merge shifts if total is < 32
1121 return new (phase->C, 3) URShiftINode( in(1)->in(1), phase->intcon(con3) );
1122 }
1123 }
1124
1125 // Check for ((x << z) + Y) >>> z. Replace with x + con>>>z
1126 // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z".
1127 // If Q is "X << z" the rounding is useless. Look for patterns like
1128 // ((X<<Z) + Y) >>> Z and replace with (X + Y>>>Z) & Z-mask.
1129 Node *add = in(1);
1130 if( in1_op == Op_AddI ) {
1131 Node *lshl = add->in(1);
1132 if( lshl->Opcode() == Op_LShiftI &&
1133 phase->type(lshl->in(2)) == t2 ) {
1134 Node *y_z = phase->transform( new (phase->C, 3) URShiftINode(add->in(2),in(2)) );
1135 Node *sum = phase->transform( new (phase->C, 3) AddINode( lshl->in(1), y_z ) );
1136 return new (phase->C, 3) AndINode( sum, phase->intcon(mask) );
1137 }
1138 }
1139
1140 // Check for (x & mask) >>> z. Replace with (x >>> z) & (mask >>> z)
1141 // This shortens the mask. Also, if we are extracting a high byte and
1142 // storing it to a buffer, the mask will be removed completely.
1143 Node *andi = in(1);
1144 if( in1_op == Op_AndI ) {
1145 const TypeInt *t3 = phase->type( andi->in(2) )->isa_int();
1146 if( t3 && t3->is_con() ) { // Right input is a constant
1147 jint mask2 = t3->get_con();
1148 mask2 >>= con; // *signed* shift downward (high-order zeroes do not help)
1149 Node *newshr = phase->transform( new (phase->C, 3) URShiftINode(andi->in(1), in(2)) );
1150 return new (phase->C, 3) AndINode(newshr, phase->intcon(mask2));
1151 // The negative values are easier to materialize than positive ones.
1152 // A typical case from address arithmetic is ((x & ~15) >> 4).
1153 // It's better to change that to ((x >> 4) & ~0) versus
1154 // ((x >> 4) & 0x0FFFFFFF). The difference is greatest in LP64.
1155 }
1156 }
1157
1158 // Check for "(X << z ) >>> z" which simply zero-extends
1159 Node *shl = in(1);
1160 if( in1_op == Op_LShiftI &&
1161 phase->type(shl->in(2)) == t2 )
1162 return new (phase->C, 3) AndINode( shl->in(1), phase->intcon(mask) );
1163
1164 return NULL;
1165 }
1166
1167 //------------------------------Value------------------------------------------
1168 // A URShiftINode shifts its input2 right by input1 amount.
1169 const Type *URShiftINode::Value( PhaseTransform *phase ) const {
1170 // (This is a near clone of RShiftINode::Value.)
1171 const Type *t1 = phase->type( in(1) );
1172 const Type *t2 = phase->type( in(2) );
1173 // Either input is TOP ==> the result is TOP
1174 if( t1 == Type::TOP ) return Type::TOP;
1175 if( t2 == Type::TOP ) return Type::TOP;
1176
1177 // Left input is ZERO ==> the result is ZERO.
1178 if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
1179 // Shift by zero does nothing
1180 if( t2 == TypeInt::ZERO ) return t1;
1181
1182 // Either input is BOTTOM ==> the result is BOTTOM
1183 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1184 return TypeInt::INT;
1185
1186 if (t2 == TypeInt::INT)
1187 return TypeInt::INT;
1188
1189 const TypeInt *r1 = t1->is_int(); // Handy access
1190 const TypeInt *r2 = t2->is_int(); // Handy access
1191
1192 if (r2->is_con()) {
1193 uint shift = r2->get_con();
1194 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
1195 // Shift by a multiple of 32 does nothing:
1196 if (shift == 0) return t1;
1197 // Calculate reasonably aggressive bounds for the result.
1198 jint lo = (juint)r1->_lo >> (juint)shift;
1199 jint hi = (juint)r1->_hi >> (juint)shift;
1200 if (r1->_hi >= 0 && r1->_lo < 0) {
1201 // If the type has both negative and positive values,
1202 // there are two separate sub-domains to worry about:
1203 // The positive half and the negative half.
1204 jint neg_lo = lo;
1205 jint neg_hi = (juint)-1 >> (juint)shift;
1206 jint pos_lo = (juint) 0 >> (juint)shift;
1207 jint pos_hi = hi;
1208 lo = MIN2(neg_lo, pos_lo); // == 0
1209 hi = MAX2(neg_hi, pos_hi); // == -1 >>> shift;
1210 }
1211 assert(lo <= hi, "must have valid bounds");
1212 const TypeInt* ti = TypeInt::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1213 #ifdef ASSERT
1214 // Make sure we get the sign-capture idiom correct.
1215 if (shift == BitsPerJavaInteger-1) {
1216 if (r1->_lo >= 0) assert(ti == TypeInt::ZERO, ">>>31 of + is 0");
1217 if (r1->_hi < 0) assert(ti == TypeInt::ONE, ">>>31 of - is +1");
1218 }
1219 #endif
1220 return ti;
1221 }
1222
1223 //
1224 // Do not support shifted oops in info for GC
1225 //
1226 // else if( t1->base() == Type::InstPtr ) {
1227 //
1228 // const TypeInstPtr *o = t1->is_instptr();
1229 // if( t1->singleton() )
1230 // return TypeInt::make( ((uint32)o->const_oop() + o->_offset) >> shift );
1231 // }
1232 // else if( t1->base() == Type::KlassPtr ) {
1233 // const TypeKlassPtr *o = t1->is_klassptr();
1234 // if( t1->singleton() )
1235 // return TypeInt::make( ((uint32)o->const_oop() + o->_offset) >> shift );
1236 // }
1237
1238 return TypeInt::INT;
1239 }
1240
1241 //=============================================================================
1242 //------------------------------Identity---------------------------------------
1243 Node *URShiftLNode::Identity( PhaseTransform *phase ) {
1244 const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
1245 return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this;
1246 }
1247
1248 //------------------------------Ideal------------------------------------------
1249 Node *URShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
1250 const TypeInt *t2 = phase->type( in(2) )->isa_int();
1251 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
1252 const int con = t2->get_con() & ( BitsPerLong - 1 ); // Shift count is always masked
1253 if ( con == 0 ) return NULL; // let Identity() handle a 0 shift count
1254 // note: mask computation below does not work for 0 shift count
1255 // We'll be wanting the right-shift amount as a mask of that many bits
1256 const jlong mask = (((jlong)CONST64(1) << (jlong)(BitsPerJavaLong - con)) -1);
1257
1258 // Check for ((x << z) + Y) >>> z. Replace with x + con>>>z
1259 // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z".
1260 // If Q is "X << z" the rounding is useless. Look for patterns like
1261 // ((X<<Z) + Y) >>> Z and replace with (X + Y>>>Z) & Z-mask.
1262 Node *add = in(1);
1263 if( add->Opcode() == Op_AddL ) {
1264 Node *lshl = add->in(1);
1265 if( lshl->Opcode() == Op_LShiftL &&
1266 phase->type(lshl->in(2)) == t2 ) {
1267 Node *y_z = phase->transform( new (phase->C, 3) URShiftLNode(add->in(2),in(2)) );
1268 Node *sum = phase->transform( new (phase->C, 3) AddLNode( lshl->in(1), y_z ) );
1269 return new (phase->C, 3) AndLNode( sum, phase->longcon(mask) );
1270 }
1271 }
1272
1273 // Check for (x & mask) >>> z. Replace with (x >>> z) & (mask >>> z)
1274 // This shortens the mask. Also, if we are extracting a high byte and
1275 // storing it to a buffer, the mask will be removed completely.
1276 Node *andi = in(1);
1277 if( andi->Opcode() == Op_AndL ) {
1278 const TypeLong *t3 = phase->type( andi->in(2) )->isa_long();
1279 if( t3 && t3->is_con() ) { // Right input is a constant
1280 jlong mask2 = t3->get_con();
1281 mask2 >>= con; // *signed* shift downward (high-order zeroes do not help)
1282 Node *newshr = phase->transform( new (phase->C, 3) URShiftLNode(andi->in(1), in(2)) );
1283 return new (phase->C, 3) AndLNode(newshr, phase->longcon(mask2));
1284 }
1285 }
1286
1287 // Check for "(X << z ) >>> z" which simply zero-extends
1288 Node *shl = in(1);
1289 if( shl->Opcode() == Op_LShiftL &&
1290 phase->type(shl->in(2)) == t2 )
1291 return new (phase->C, 3) AndLNode( shl->in(1), phase->longcon(mask) );
1292
1293 return NULL;
1294 }
1295
1296 //------------------------------Value------------------------------------------
1297 // A URShiftINode shifts its input2 right by input1 amount.
1298 const Type *URShiftLNode::Value( PhaseTransform *phase ) const {
1299 // (This is a near clone of RShiftLNode::Value.)
1300 const Type *t1 = phase->type( in(1) );
1301 const Type *t2 = phase->type( in(2) );
1302 // Either input is TOP ==> the result is TOP
1303 if( t1 == Type::TOP ) return Type::TOP;
1304 if( t2 == Type::TOP ) return Type::TOP;
1305
1306 // Left input is ZERO ==> the result is ZERO.
1307 if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
1308 // Shift by zero does nothing
1309 if( t2 == TypeInt::ZERO ) return t1;
1310
1311 // Either input is BOTTOM ==> the result is BOTTOM
1312 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1313 return TypeLong::LONG;
1314
1315 if (t2 == TypeInt::INT)
1316 return TypeLong::LONG;
1317
1318 const TypeLong *r1 = t1->is_long(); // Handy access
1319 const TypeInt *r2 = t2->is_int (); // Handy access
1320
1321 if (r2->is_con()) {
1322 uint shift = r2->get_con();
1323 shift &= BitsPerJavaLong - 1; // semantics of Java shifts
1324 // Shift by a multiple of 64 does nothing:
1325 if (shift == 0) return t1;
1326 // Calculate reasonably aggressive bounds for the result.
1327 jlong lo = (julong)r1->_lo >> (juint)shift;
1328 jlong hi = (julong)r1->_hi >> (juint)shift;
1329 if (r1->_hi >= 0 && r1->_lo < 0) {
1330 // If the type has both negative and positive values,
1331 // there are two separate sub-domains to worry about:
1332 // The positive half and the negative half.
1333 jlong neg_lo = lo;
1334 jlong neg_hi = (julong)-1 >> (juint)shift;
1335 jlong pos_lo = (julong) 0 >> (juint)shift;
1336 jlong pos_hi = hi;
1337 //lo = MIN2(neg_lo, pos_lo); // == 0
1338 lo = neg_lo < pos_lo ? neg_lo : pos_lo;
1339 //hi = MAX2(neg_hi, pos_hi); // == -1 >>> shift;
1340 hi = neg_hi > pos_hi ? neg_hi : pos_hi;
1341 }
1342 assert(lo <= hi, "must have valid bounds");
1343 const TypeLong* tl = TypeLong::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1344 #ifdef ASSERT
1345 // Make sure we get the sign-capture idiom correct.
1346 if (shift == BitsPerJavaLong - 1) {
1347 if (r1->_lo >= 0) assert(tl == TypeLong::ZERO, ">>>63 of + is 0");
1348 if (r1->_hi < 0) assert(tl == TypeLong::ONE, ">>>63 of - is +1");
1349 }
1350 #endif
1351 return tl;
1352 }
1353
1354 return TypeLong::LONG; // Give up
1355 }