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rev 1024 : imported patch indy-cleanup-6893081.patch
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--- old/src/share/vm/opto/output.cpp
+++ new/src/share/vm/opto/output.cpp
1 1 /*
2 2 * Copyright 1998-2009 Sun Microsystems, Inc. All Rights Reserved.
3 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 4 *
5 5 * This code is free software; you can redistribute it and/or modify it
6 6 * under the terms of the GNU General Public License version 2 only, as
7 7 * published by the Free Software Foundation.
8 8 *
9 9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 12 * version 2 for more details (a copy is included in the LICENSE file that
13 13 * accompanied this code).
14 14 *
15 15 * You should have received a copy of the GNU General Public License version
16 16 * 2 along with this work; if not, write to the Free Software Foundation,
17 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 18 *
19 19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
20 20 * CA 95054 USA or visit www.sun.com if you need additional information or
21 21 * have any questions.
22 22 *
23 23 */
24 24
25 25 #include "incls/_precompiled.incl"
26 26 #include "incls/_output.cpp.incl"
27 27
28 28 extern uint size_java_to_interp();
29 29 extern uint reloc_java_to_interp();
30 30 extern uint size_exception_handler();
31 31 extern uint size_deopt_handler();
32 32
33 33 #ifndef PRODUCT
34 34 #define DEBUG_ARG(x) , x
35 35 #else
36 36 #define DEBUG_ARG(x)
37 37 #endif
38 38
39 39 extern int emit_exception_handler(CodeBuffer &cbuf);
40 40 extern int emit_deopt_handler(CodeBuffer &cbuf);
41 41
42 42 //------------------------------Output-----------------------------------------
43 43 // Convert Nodes to instruction bits and pass off to the VM
44 44 void Compile::Output() {
45 45 // RootNode goes
46 46 assert( _cfg->_broot->_nodes.size() == 0, "" );
47 47
48 48 // Initialize the space for the BufferBlob used to find and verify
49 49 // instruction size in MachNode::emit_size()
50 50 init_scratch_buffer_blob();
51 51 if (failing()) return; // Out of memory
52 52
53 53 // The number of new nodes (mostly MachNop) is proportional to
54 54 // the number of java calls and inner loops which are aligned.
55 55 if ( C->check_node_count((NodeLimitFudgeFactor + C->java_calls()*3 +
56 56 C->inner_loops()*(OptoLoopAlignment-1)),
57 57 "out of nodes before code generation" ) ) {
58 58 return;
59 59 }
60 60 // Make sure I can find the Start Node
61 61 Block_Array& bbs = _cfg->_bbs;
62 62 Block *entry = _cfg->_blocks[1];
63 63 Block *broot = _cfg->_broot;
64 64
65 65 const StartNode *start = entry->_nodes[0]->as_Start();
66 66
67 67 // Replace StartNode with prolog
68 68 MachPrologNode *prolog = new (this) MachPrologNode();
69 69 entry->_nodes.map( 0, prolog );
70 70 bbs.map( prolog->_idx, entry );
71 71 bbs.map( start->_idx, NULL ); // start is no longer in any block
72 72
73 73 // Virtual methods need an unverified entry point
74 74
75 75 if( is_osr_compilation() ) {
76 76 if( PoisonOSREntry ) {
77 77 // TODO: Should use a ShouldNotReachHereNode...
78 78 _cfg->insert( broot, 0, new (this) MachBreakpointNode() );
79 79 }
80 80 } else {
81 81 if( _method && !_method->flags().is_static() ) {
82 82 // Insert unvalidated entry point
83 83 _cfg->insert( broot, 0, new (this) MachUEPNode() );
84 84 }
85 85
86 86 }
87 87
88 88
89 89 // Break before main entry point
90 90 if( (_method && _method->break_at_execute())
91 91 #ifndef PRODUCT
92 92 ||(OptoBreakpoint && is_method_compilation())
93 93 ||(OptoBreakpointOSR && is_osr_compilation())
94 94 ||(OptoBreakpointC2R && !_method)
95 95 #endif
96 96 ) {
97 97 // checking for _method means that OptoBreakpoint does not apply to
98 98 // runtime stubs or frame converters
99 99 _cfg->insert( entry, 1, new (this) MachBreakpointNode() );
100 100 }
101 101
102 102 // Insert epilogs before every return
103 103 for( uint i=0; i<_cfg->_num_blocks; i++ ) {
104 104 Block *b = _cfg->_blocks[i];
105 105 if( !b->is_connector() && b->non_connector_successor(0) == _cfg->_broot ) { // Found a program exit point?
106 106 Node *m = b->end();
107 107 if( m->is_Mach() && m->as_Mach()->ideal_Opcode() != Op_Halt ) {
108 108 MachEpilogNode *epilog = new (this) MachEpilogNode(m->as_Mach()->ideal_Opcode() == Op_Return);
109 109 b->add_inst( epilog );
110 110 bbs.map(epilog->_idx, b);
111 111 //_regalloc->set_bad(epilog->_idx); // Already initialized this way.
112 112 }
113 113 }
114 114 }
115 115
116 116 # ifdef ENABLE_ZAP_DEAD_LOCALS
117 117 if ( ZapDeadCompiledLocals ) Insert_zap_nodes();
118 118 # endif
119 119
120 120 ScheduleAndBundle();
121 121
122 122 #ifndef PRODUCT
123 123 if (trace_opto_output()) {
124 124 tty->print("\n---- After ScheduleAndBundle ----\n");
125 125 for (uint i = 0; i < _cfg->_num_blocks; i++) {
126 126 tty->print("\nBB#%03d:\n", i);
127 127 Block *bb = _cfg->_blocks[i];
128 128 for (uint j = 0; j < bb->_nodes.size(); j++) {
129 129 Node *n = bb->_nodes[j];
130 130 OptoReg::Name reg = _regalloc->get_reg_first(n);
131 131 tty->print(" %-6s ", reg >= 0 && reg < REG_COUNT ? Matcher::regName[reg] : "");
132 132 n->dump();
133 133 }
134 134 }
135 135 }
136 136 #endif
137 137
138 138 if (failing()) return;
139 139
140 140 BuildOopMaps();
141 141
142 142 if (failing()) return;
143 143
144 144 Fill_buffer();
145 145 }
146 146
147 147 bool Compile::need_stack_bang(int frame_size_in_bytes) const {
148 148 // Determine if we need to generate a stack overflow check.
149 149 // Do it if the method is not a stub function and
150 150 // has java calls or has frame size > vm_page_size/8.
151 151 return (stub_function() == NULL &&
152 152 (has_java_calls() || frame_size_in_bytes > os::vm_page_size()>>3));
153 153 }
154 154
155 155 bool Compile::need_register_stack_bang() const {
156 156 // Determine if we need to generate a register stack overflow check.
157 157 // This is only used on architectures which have split register
158 158 // and memory stacks (ie. IA64).
159 159 // Bang if the method is not a stub function and has java calls
160 160 return (stub_function() == NULL && has_java_calls());
161 161 }
162 162
163 163 # ifdef ENABLE_ZAP_DEAD_LOCALS
164 164
165 165
166 166 // In order to catch compiler oop-map bugs, we have implemented
167 167 // a debugging mode called ZapDeadCompilerLocals.
168 168 // This mode causes the compiler to insert a call to a runtime routine,
169 169 // "zap_dead_locals", right before each place in compiled code
170 170 // that could potentially be a gc-point (i.e., a safepoint or oop map point).
171 171 // The runtime routine checks that locations mapped as oops are really
172 172 // oops, that locations mapped as values do not look like oops,
173 173 // and that locations mapped as dead are not used later
174 174 // (by zapping them to an invalid address).
175 175
176 176 int Compile::_CompiledZap_count = 0;
177 177
178 178 void Compile::Insert_zap_nodes() {
179 179 bool skip = false;
180 180
181 181
182 182 // Dink with static counts because code code without the extra
183 183 // runtime calls is MUCH faster for debugging purposes
184 184
185 185 if ( CompileZapFirst == 0 ) ; // nothing special
186 186 else if ( CompileZapFirst > CompiledZap_count() ) skip = true;
187 187 else if ( CompileZapFirst == CompiledZap_count() )
188 188 warning("starting zap compilation after skipping");
189 189
190 190 if ( CompileZapLast == -1 ) ; // nothing special
191 191 else if ( CompileZapLast < CompiledZap_count() ) skip = true;
192 192 else if ( CompileZapLast == CompiledZap_count() )
193 193 warning("about to compile last zap");
194 194
195 195 ++_CompiledZap_count; // counts skipped zaps, too
196 196
197 197 if ( skip ) return;
198 198
199 199
200 200 if ( _method == NULL )
201 201 return; // no safepoints/oopmaps emitted for calls in stubs,so we don't care
202 202
203 203 // Insert call to zap runtime stub before every node with an oop map
204 204 for( uint i=0; i<_cfg->_num_blocks; i++ ) {
205 205 Block *b = _cfg->_blocks[i];
206 206 for ( uint j = 0; j < b->_nodes.size(); ++j ) {
207 207 Node *n = b->_nodes[j];
208 208
209 209 // Determining if we should insert a zap-a-lot node in output.
210 210 // We do that for all nodes that has oopmap info, except for calls
211 211 // to allocation. Calls to allocation passes in the old top-of-eden pointer
212 212 // and expect the C code to reset it. Hence, there can be no safepoints between
213 213 // the inlined-allocation and the call to new_Java, etc.
214 214 // We also cannot zap monitor calls, as they must hold the microlock
215 215 // during the call to Zap, which also wants to grab the microlock.
216 216 bool insert = n->is_MachSafePoint() && (n->as_MachSafePoint()->oop_map() != NULL);
217 217 if ( insert ) { // it is MachSafePoint
218 218 if ( !n->is_MachCall() ) {
219 219 insert = false;
220 220 } else if ( n->is_MachCall() ) {
221 221 MachCallNode* call = n->as_MachCall();
222 222 if (call->entry_point() == OptoRuntime::new_instance_Java() ||
223 223 call->entry_point() == OptoRuntime::new_array_Java() ||
224 224 call->entry_point() == OptoRuntime::multianewarray2_Java() ||
225 225 call->entry_point() == OptoRuntime::multianewarray3_Java() ||
226 226 call->entry_point() == OptoRuntime::multianewarray4_Java() ||
227 227 call->entry_point() == OptoRuntime::multianewarray5_Java() ||
228 228 call->entry_point() == OptoRuntime::slow_arraycopy_Java() ||
229 229 call->entry_point() == OptoRuntime::complete_monitor_locking_Java()
230 230 ) {
231 231 insert = false;
232 232 }
233 233 }
234 234 if (insert) {
235 235 Node *zap = call_zap_node(n->as_MachSafePoint(), i);
236 236 b->_nodes.insert( j, zap );
237 237 _cfg->_bbs.map( zap->_idx, b );
238 238 ++j;
239 239 }
240 240 }
241 241 }
242 242 }
243 243 }
244 244
245 245
246 246 Node* Compile::call_zap_node(MachSafePointNode* node_to_check, int block_no) {
247 247 const TypeFunc *tf = OptoRuntime::zap_dead_locals_Type();
248 248 CallStaticJavaNode* ideal_node =
249 249 new (this, tf->domain()->cnt()) CallStaticJavaNode( tf,
250 250 OptoRuntime::zap_dead_locals_stub(_method->flags().is_native()),
251 251 "call zap dead locals stub", 0, TypePtr::BOTTOM);
252 252 // We need to copy the OopMap from the site we're zapping at.
253 253 // We have to make a copy, because the zap site might not be
254 254 // a call site, and zap_dead is a call site.
255 255 OopMap* clone = node_to_check->oop_map()->deep_copy();
256 256
257 257 // Add the cloned OopMap to the zap node
258 258 ideal_node->set_oop_map(clone);
259 259 return _matcher->match_sfpt(ideal_node);
260 260 }
261 261
262 262 //------------------------------is_node_getting_a_safepoint--------------------
263 263 bool Compile::is_node_getting_a_safepoint( Node* n) {
264 264 // This code duplicates the logic prior to the call of add_safepoint
265 265 // below in this file.
266 266 if( n->is_MachSafePoint() ) return true;
267 267 return false;
268 268 }
269 269
270 270 # endif // ENABLE_ZAP_DEAD_LOCALS
271 271
272 272 //------------------------------compute_loop_first_inst_sizes------------------
273 273 // Compute the size of first NumberOfLoopInstrToAlign instructions at the top
274 274 // of a loop. When aligning a loop we need to provide enough instructions
275 275 // in cpu's fetch buffer to feed decoders. The loop alignment could be
276 276 // avoided if we have enough instructions in fetch buffer at the head of a loop.
277 277 // By default, the size is set to 999999 by Block's constructor so that
278 278 // a loop will be aligned if the size is not reset here.
279 279 //
280 280 // Note: Mach instructions could contain several HW instructions
281 281 // so the size is estimated only.
282 282 //
283 283 void Compile::compute_loop_first_inst_sizes() {
284 284 // The next condition is used to gate the loop alignment optimization.
285 285 // Don't aligned a loop if there are enough instructions at the head of a loop
286 286 // or alignment padding is larger then MaxLoopPad. By default, MaxLoopPad
287 287 // is equal to OptoLoopAlignment-1 except on new Intel cpus, where it is
288 288 // equal to 11 bytes which is the largest address NOP instruction.
289 289 if( MaxLoopPad < OptoLoopAlignment-1 ) {
290 290 uint last_block = _cfg->_num_blocks-1;
291 291 for( uint i=1; i <= last_block; i++ ) {
292 292 Block *b = _cfg->_blocks[i];
293 293 // Check the first loop's block which requires an alignment.
294 294 if( b->loop_alignment() > (uint)relocInfo::addr_unit() ) {
295 295 uint sum_size = 0;
296 296 uint inst_cnt = NumberOfLoopInstrToAlign;
297 297 inst_cnt = b->compute_first_inst_size(sum_size, inst_cnt, _regalloc);
298 298
299 299 // Check subsequent fallthrough blocks if the loop's first
300 300 // block(s) does not have enough instructions.
301 301 Block *nb = b;
302 302 while( inst_cnt > 0 &&
303 303 i < last_block &&
304 304 !_cfg->_blocks[i+1]->has_loop_alignment() &&
305 305 !nb->has_successor(b) ) {
306 306 i++;
307 307 nb = _cfg->_blocks[i];
308 308 inst_cnt = nb->compute_first_inst_size(sum_size, inst_cnt, _regalloc);
309 309 } // while( inst_cnt > 0 && i < last_block )
310 310
311 311 b->set_first_inst_size(sum_size);
312 312 } // f( b->head()->is_Loop() )
313 313 } // for( i <= last_block )
314 314 } // if( MaxLoopPad < OptoLoopAlignment-1 )
315 315 }
316 316
317 317 //----------------------Shorten_branches---------------------------------------
318 318 // The architecture description provides short branch variants for some long
319 319 // branch instructions. Replace eligible long branches with short branches.
320 320 void Compile::Shorten_branches(Label *labels, int& code_size, int& reloc_size, int& stub_size, int& const_size) {
321 321
322 322 // fill in the nop array for bundling computations
323 323 MachNode *_nop_list[Bundle::_nop_count];
324 324 Bundle::initialize_nops(_nop_list, this);
325 325
326 326 // ------------------
327 327 // Compute size of each block, method size, and relocation information size
328 328 uint *jmp_end = NEW_RESOURCE_ARRAY(uint,_cfg->_num_blocks);
329 329 uint *blk_starts = NEW_RESOURCE_ARRAY(uint,_cfg->_num_blocks+1);
330 330 DEBUG_ONLY( uint *jmp_target = NEW_RESOURCE_ARRAY(uint,_cfg->_num_blocks); )
331 331 DEBUG_ONLY( uint *jmp_rule = NEW_RESOURCE_ARRAY(uint,_cfg->_num_blocks); )
332 332 blk_starts[0] = 0;
333 333
334 334 // Initialize the sizes to 0
335 335 code_size = 0; // Size in bytes of generated code
336 336 stub_size = 0; // Size in bytes of all stub entries
337 337 // Size in bytes of all relocation entries, including those in local stubs.
338 338 // Start with 2-bytes of reloc info for the unvalidated entry point
339 339 reloc_size = 1; // Number of relocation entries
340 340 const_size = 0; // size of fp constants in words
341 341
342 342 // Make three passes. The first computes pessimistic blk_starts,
343 343 // relative jmp_end, reloc_size and const_size information.
344 344 // The second performs short branch substitution using the pessimistic
345 345 // sizing. The third inserts nops where needed.
346 346
347 347 Node *nj; // tmp
348 348
349 349 // Step one, perform a pessimistic sizing pass.
350 350 uint i;
351 351 uint min_offset_from_last_call = 1; // init to a positive value
352 352 uint nop_size = (new (this) MachNopNode())->size(_regalloc);
353 353 for( i=0; i<_cfg->_num_blocks; i++ ) { // For all blocks
354 354 Block *b = _cfg->_blocks[i];
355 355
356 356 // Sum all instruction sizes to compute block size
357 357 uint last_inst = b->_nodes.size();
358 358 uint blk_size = 0;
359 359 for( uint j = 0; j<last_inst; j++ ) {
360 360 nj = b->_nodes[j];
361 361 uint inst_size = nj->size(_regalloc);
362 362 blk_size += inst_size;
363 363 // Handle machine instruction nodes
364 364 if( nj->is_Mach() ) {
365 365 MachNode *mach = nj->as_Mach();
366 366 blk_size += (mach->alignment_required() - 1) * relocInfo::addr_unit(); // assume worst case padding
367 367 reloc_size += mach->reloc();
368 368 const_size += mach->const_size();
369 369 if( mach->is_MachCall() ) {
370 370 MachCallNode *mcall = mach->as_MachCall();
371 371 // This destination address is NOT PC-relative
372 372
373 373 mcall->method_set((intptr_t)mcall->entry_point());
374 374
375 375 if( mcall->is_MachCallJava() && mcall->as_MachCallJava()->_method ) {
376 376 stub_size += size_java_to_interp();
377 377 reloc_size += reloc_java_to_interp();
378 378 }
379 379 } else if (mach->is_MachSafePoint()) {
380 380 // If call/safepoint are adjacent, account for possible
381 381 // nop to disambiguate the two safepoints.
382 382 if (min_offset_from_last_call == 0) {
383 383 blk_size += nop_size;
384 384 }
385 385 }
386 386 }
387 387 min_offset_from_last_call += inst_size;
388 388 // Remember end of call offset
389 389 if (nj->is_MachCall() && nj->as_MachCall()->is_safepoint_node()) {
390 390 min_offset_from_last_call = 0;
391 391 }
392 392 }
393 393
394 394 // During short branch replacement, we store the relative (to blk_starts)
395 395 // end of jump in jmp_end, rather than the absolute end of jump. This
396 396 // is so that we do not need to recompute sizes of all nodes when we compute
397 397 // correct blk_starts in our next sizing pass.
398 398 jmp_end[i] = blk_size;
399 399 DEBUG_ONLY( jmp_target[i] = 0; )
400 400
401 401 // When the next block starts a loop, we may insert pad NOP
402 402 // instructions. Since we cannot know our future alignment,
403 403 // assume the worst.
404 404 if( i<_cfg->_num_blocks-1 ) {
405 405 Block *nb = _cfg->_blocks[i+1];
406 406 int max_loop_pad = nb->code_alignment()-relocInfo::addr_unit();
407 407 if( max_loop_pad > 0 ) {
408 408 assert(is_power_of_2(max_loop_pad+relocInfo::addr_unit()), "");
409 409 blk_size += max_loop_pad;
410 410 }
411 411 }
412 412
413 413 // Save block size; update total method size
414 414 blk_starts[i+1] = blk_starts[i]+blk_size;
415 415 }
416 416
417 417 // Step two, replace eligible long jumps.
418 418
419 419 // Note: this will only get the long branches within short branch
420 420 // range. Another pass might detect more branches that became
421 421 // candidates because the shortening in the first pass exposed
422 422 // more opportunities. Unfortunately, this would require
423 423 // recomputing the starting and ending positions for the blocks
424 424 for( i=0; i<_cfg->_num_blocks; i++ ) {
425 425 Block *b = _cfg->_blocks[i];
426 426
427 427 int j;
428 428 // Find the branch; ignore trailing NOPs.
429 429 for( j = b->_nodes.size()-1; j>=0; j-- ) {
430 430 nj = b->_nodes[j];
431 431 if( !nj->is_Mach() || nj->as_Mach()->ideal_Opcode() != Op_Con )
432 432 break;
433 433 }
434 434
435 435 if (j >= 0) {
436 436 if( nj->is_Mach() && nj->as_Mach()->may_be_short_branch() ) {
437 437 MachNode *mach = nj->as_Mach();
438 438 // This requires the TRUE branch target be in succs[0]
439 439 uint bnum = b->non_connector_successor(0)->_pre_order;
440 440 uintptr_t target = blk_starts[bnum];
441 441 if( mach->is_pc_relative() ) {
442 442 int offset = target-(blk_starts[i] + jmp_end[i]);
443 443 if (_matcher->is_short_branch_offset(mach->rule(), offset)) {
444 444 // We've got a winner. Replace this branch.
445 445 MachNode* replacement = mach->short_branch_version(this);
446 446 b->_nodes.map(j, replacement);
447 447 mach->subsume_by(replacement);
448 448
449 449 // Update the jmp_end size to save time in our
450 450 // next pass.
451 451 jmp_end[i] -= (mach->size(_regalloc) - replacement->size(_regalloc));
452 452 DEBUG_ONLY( jmp_target[i] = bnum; );
453 453 DEBUG_ONLY( jmp_rule[i] = mach->rule(); );
454 454 }
455 455 } else {
456 456 #ifndef PRODUCT
457 457 mach->dump(3);
458 458 #endif
459 459 Unimplemented();
460 460 }
461 461 }
462 462 }
463 463 }
464 464
465 465 // Compute the size of first NumberOfLoopInstrToAlign instructions at head
466 466 // of a loop. It is used to determine the padding for loop alignment.
467 467 compute_loop_first_inst_sizes();
468 468
469 469 // Step 3, compute the offsets of all the labels
470 470 uint last_call_adr = max_uint;
471 471 for( i=0; i<_cfg->_num_blocks; i++ ) { // For all blocks
472 472 // copy the offset of the beginning to the corresponding label
473 473 assert(labels[i].is_unused(), "cannot patch at this point");
474 474 labels[i].bind_loc(blk_starts[i], CodeBuffer::SECT_INSTS);
475 475
476 476 // insert padding for any instructions that need it
477 477 Block *b = _cfg->_blocks[i];
478 478 uint last_inst = b->_nodes.size();
479 479 uint adr = blk_starts[i];
480 480 for( uint j = 0; j<last_inst; j++ ) {
481 481 nj = b->_nodes[j];
482 482 if( nj->is_Mach() ) {
483 483 int padding = nj->as_Mach()->compute_padding(adr);
484 484 // If call/safepoint are adjacent insert a nop (5010568)
485 485 if (padding == 0 && nj->is_MachSafePoint() && !nj->is_MachCall() &&
486 486 adr == last_call_adr ) {
487 487 padding = nop_size;
488 488 }
489 489 if(padding > 0) {
490 490 assert((padding % nop_size) == 0, "padding is not a multiple of NOP size");
491 491 int nops_cnt = padding / nop_size;
492 492 MachNode *nop = new (this) MachNopNode(nops_cnt);
493 493 b->_nodes.insert(j++, nop);
494 494 _cfg->_bbs.map( nop->_idx, b );
495 495 adr += padding;
496 496 last_inst++;
497 497 }
498 498 }
499 499 adr += nj->size(_regalloc);
500 500
501 501 // Remember end of call offset
502 502 if (nj->is_MachCall() && nj->as_MachCall()->is_safepoint_node()) {
503 503 last_call_adr = adr;
504 504 }
505 505 }
506 506
507 507 if ( i != _cfg->_num_blocks-1) {
508 508 // Get the size of the block
509 509 uint blk_size = adr - blk_starts[i];
510 510
511 511 // When the next block is the top of a loop, we may insert pad NOP
512 512 // instructions.
513 513 Block *nb = _cfg->_blocks[i+1];
514 514 int current_offset = blk_starts[i] + blk_size;
515 515 current_offset += nb->alignment_padding(current_offset);
516 516 // Save block size; update total method size
517 517 blk_starts[i+1] = current_offset;
518 518 }
519 519 }
520 520
521 521 #ifdef ASSERT
522 522 for( i=0; i<_cfg->_num_blocks; i++ ) { // For all blocks
523 523 if( jmp_target[i] != 0 ) {
524 524 int offset = blk_starts[jmp_target[i]]-(blk_starts[i] + jmp_end[i]);
525 525 if (!_matcher->is_short_branch_offset(jmp_rule[i], offset)) {
526 526 tty->print_cr("target (%d) - jmp_end(%d) = offset (%d), jmp_block B%d, target_block B%d", blk_starts[jmp_target[i]], blk_starts[i] + jmp_end[i], offset, i, jmp_target[i]);
527 527 }
528 528 assert(_matcher->is_short_branch_offset(jmp_rule[i], offset), "Displacement too large for short jmp");
529 529 }
530 530 }
531 531 #endif
532 532
533 533 // ------------------
534 534 // Compute size for code buffer
535 535 code_size = blk_starts[i-1] + jmp_end[i-1];
536 536
537 537 // Relocation records
538 538 reloc_size += 1; // Relo entry for exception handler
539 539
540 540 // Adjust reloc_size to number of record of relocation info
541 541 // Min is 2 bytes, max is probably 6 or 8, with a tax up to 25% for
542 542 // a relocation index.
543 543 // The CodeBuffer will expand the locs array if this estimate is too low.
544 544 reloc_size *= 10 / sizeof(relocInfo);
545 545
546 546 // Adjust const_size to number of bytes
547 547 const_size *= 2*jintSize; // both float and double take two words per entry
548 548
549 549 }
550 550
551 551 //------------------------------FillLocArray-----------------------------------
552 552 // Create a bit of debug info and append it to the array. The mapping is from
553 553 // Java local or expression stack to constant, register or stack-slot. For
554 554 // doubles, insert 2 mappings and return 1 (to tell the caller that the next
555 555 // entry has been taken care of and caller should skip it).
556 556 static LocationValue *new_loc_value( PhaseRegAlloc *ra, OptoReg::Name regnum, Location::Type l_type ) {
557 557 // This should never have accepted Bad before
558 558 assert(OptoReg::is_valid(regnum), "location must be valid");
559 559 return (OptoReg::is_reg(regnum))
560 560 ? new LocationValue(Location::new_reg_loc(l_type, OptoReg::as_VMReg(regnum)) )
561 561 : new LocationValue(Location::new_stk_loc(l_type, ra->reg2offset(regnum)));
562 562 }
563 563
564 564
565 565 ObjectValue*
566 566 Compile::sv_for_node_id(GrowableArray<ScopeValue*> *objs, int id) {
567 567 for (int i = 0; i < objs->length(); i++) {
568 568 assert(objs->at(i)->is_object(), "corrupt object cache");
569 569 ObjectValue* sv = (ObjectValue*) objs->at(i);
570 570 if (sv->id() == id) {
571 571 return sv;
572 572 }
573 573 }
574 574 // Otherwise..
575 575 return NULL;
576 576 }
577 577
578 578 void Compile::set_sv_for_object_node(GrowableArray<ScopeValue*> *objs,
579 579 ObjectValue* sv ) {
580 580 assert(sv_for_node_id(objs, sv->id()) == NULL, "Precondition");
581 581 objs->append(sv);
582 582 }
583 583
584 584
585 585 void Compile::FillLocArray( int idx, MachSafePointNode* sfpt, Node *local,
586 586 GrowableArray<ScopeValue*> *array,
587 587 GrowableArray<ScopeValue*> *objs ) {
588 588 assert( local, "use _top instead of null" );
589 589 if (array->length() != idx) {
590 590 assert(array->length() == idx + 1, "Unexpected array count");
591 591 // Old functionality:
592 592 // return
593 593 // New functionality:
594 594 // Assert if the local is not top. In product mode let the new node
595 595 // override the old entry.
596 596 assert(local == top(), "LocArray collision");
597 597 if (local == top()) {
598 598 return;
599 599 }
600 600 array->pop();
601 601 }
602 602 const Type *t = local->bottom_type();
603 603
604 604 // Is it a safepoint scalar object node?
605 605 if (local->is_SafePointScalarObject()) {
606 606 SafePointScalarObjectNode* spobj = local->as_SafePointScalarObject();
607 607
608 608 ObjectValue* sv = Compile::sv_for_node_id(objs, spobj->_idx);
609 609 if (sv == NULL) {
610 610 ciKlass* cik = t->is_oopptr()->klass();
611 611 assert(cik->is_instance_klass() ||
612 612 cik->is_array_klass(), "Not supported allocation.");
613 613 sv = new ObjectValue(spobj->_idx,
614 614 new ConstantOopWriteValue(cik->constant_encoding()));
615 615 Compile::set_sv_for_object_node(objs, sv);
616 616
617 617 uint first_ind = spobj->first_index();
618 618 for (uint i = 0; i < spobj->n_fields(); i++) {
619 619 Node* fld_node = sfpt->in(first_ind+i);
620 620 (void)FillLocArray(sv->field_values()->length(), sfpt, fld_node, sv->field_values(), objs);
621 621 }
622 622 }
623 623 array->append(sv);
624 624 return;
625 625 }
626 626
627 627 // Grab the register number for the local
628 628 OptoReg::Name regnum = _regalloc->get_reg_first(local);
629 629 if( OptoReg::is_valid(regnum) ) {// Got a register/stack?
630 630 // Record the double as two float registers.
631 631 // The register mask for such a value always specifies two adjacent
632 632 // float registers, with the lower register number even.
633 633 // Normally, the allocation of high and low words to these registers
634 634 // is irrelevant, because nearly all operations on register pairs
635 635 // (e.g., StoreD) treat them as a single unit.
636 636 // Here, we assume in addition that the words in these two registers
637 637 // stored "naturally" (by operations like StoreD and double stores
638 638 // within the interpreter) such that the lower-numbered register
639 639 // is written to the lower memory address. This may seem like
640 640 // a machine dependency, but it is not--it is a requirement on
641 641 // the author of the <arch>.ad file to ensure that, for every
642 642 // even/odd double-register pair to which a double may be allocated,
643 643 // the word in the even single-register is stored to the first
644 644 // memory word. (Note that register numbers are completely
645 645 // arbitrary, and are not tied to any machine-level encodings.)
646 646 #ifdef _LP64
647 647 if( t->base() == Type::DoubleBot || t->base() == Type::DoubleCon ) {
648 648 array->append(new ConstantIntValue(0));
649 649 array->append(new_loc_value( _regalloc, regnum, Location::dbl ));
650 650 } else if ( t->base() == Type::Long ) {
651 651 array->append(new ConstantIntValue(0));
652 652 array->append(new_loc_value( _regalloc, regnum, Location::lng ));
653 653 } else if ( t->base() == Type::RawPtr ) {
654 654 // jsr/ret return address which must be restored into a the full
655 655 // width 64-bit stack slot.
656 656 array->append(new_loc_value( _regalloc, regnum, Location::lng ));
657 657 }
658 658 #else //_LP64
659 659 #ifdef SPARC
660 660 if (t->base() == Type::Long && OptoReg::is_reg(regnum)) {
661 661 // For SPARC we have to swap high and low words for
662 662 // long values stored in a single-register (g0-g7).
663 663 array->append(new_loc_value( _regalloc, regnum , Location::normal ));
664 664 array->append(new_loc_value( _regalloc, OptoReg::add(regnum,1), Location::normal ));
665 665 } else
666 666 #endif //SPARC
667 667 if( t->base() == Type::DoubleBot || t->base() == Type::DoubleCon || t->base() == Type::Long ) {
668 668 // Repack the double/long as two jints.
669 669 // The convention the interpreter uses is that the second local
670 670 // holds the first raw word of the native double representation.
671 671 // This is actually reasonable, since locals and stack arrays
672 672 // grow downwards in all implementations.
673 673 // (If, on some machine, the interpreter's Java locals or stack
674 674 // were to grow upwards, the embedded doubles would be word-swapped.)
675 675 array->append(new_loc_value( _regalloc, OptoReg::add(regnum,1), Location::normal ));
676 676 array->append(new_loc_value( _regalloc, regnum , Location::normal ));
677 677 }
678 678 #endif //_LP64
679 679 else if( (t->base() == Type::FloatBot || t->base() == Type::FloatCon) &&
680 680 OptoReg::is_reg(regnum) ) {
681 681 array->append(new_loc_value( _regalloc, regnum, Matcher::float_in_double
682 682 ? Location::float_in_dbl : Location::normal ));
683 683 } else if( t->base() == Type::Int && OptoReg::is_reg(regnum) ) {
684 684 array->append(new_loc_value( _regalloc, regnum, Matcher::int_in_long
685 685 ? Location::int_in_long : Location::normal ));
686 686 } else if( t->base() == Type::NarrowOop ) {
687 687 array->append(new_loc_value( _regalloc, regnum, Location::narrowoop ));
688 688 } else {
689 689 array->append(new_loc_value( _regalloc, regnum, _regalloc->is_oop(local) ? Location::oop : Location::normal ));
690 690 }
691 691 return;
692 692 }
693 693
694 694 // No register. It must be constant data.
695 695 switch (t->base()) {
696 696 case Type::Half: // Second half of a double
697 697 ShouldNotReachHere(); // Caller should skip 2nd halves
698 698 break;
699 699 case Type::AnyPtr:
700 700 array->append(new ConstantOopWriteValue(NULL));
701 701 break;
702 702 case Type::AryPtr:
703 703 case Type::InstPtr:
704 704 case Type::KlassPtr: // fall through
705 705 array->append(new ConstantOopWriteValue(t->isa_oopptr()->const_oop()->constant_encoding()));
706 706 break;
707 707 case Type::NarrowOop:
708 708 if (t == TypeNarrowOop::NULL_PTR) {
709 709 array->append(new ConstantOopWriteValue(NULL));
710 710 } else {
711 711 array->append(new ConstantOopWriteValue(t->make_ptr()->isa_oopptr()->const_oop()->constant_encoding()));
712 712 }
713 713 break;
714 714 case Type::Int:
715 715 array->append(new ConstantIntValue(t->is_int()->get_con()));
716 716 break;
717 717 case Type::RawPtr:
718 718 // A return address (T_ADDRESS).
719 719 assert((intptr_t)t->is_ptr()->get_con() < (intptr_t)0x10000, "must be a valid BCI");
720 720 #ifdef _LP64
721 721 // Must be restored to the full-width 64-bit stack slot.
722 722 array->append(new ConstantLongValue(t->is_ptr()->get_con()));
723 723 #else
724 724 array->append(new ConstantIntValue(t->is_ptr()->get_con()));
725 725 #endif
726 726 break;
727 727 case Type::FloatCon: {
728 728 float f = t->is_float_constant()->getf();
729 729 array->append(new ConstantIntValue(jint_cast(f)));
730 730 break;
731 731 }
732 732 case Type::DoubleCon: {
733 733 jdouble d = t->is_double_constant()->getd();
734 734 #ifdef _LP64
735 735 array->append(new ConstantIntValue(0));
736 736 array->append(new ConstantDoubleValue(d));
737 737 #else
738 738 // Repack the double as two jints.
739 739 // The convention the interpreter uses is that the second local
740 740 // holds the first raw word of the native double representation.
741 741 // This is actually reasonable, since locals and stack arrays
742 742 // grow downwards in all implementations.
743 743 // (If, on some machine, the interpreter's Java locals or stack
744 744 // were to grow upwards, the embedded doubles would be word-swapped.)
745 745 jint *dp = (jint*)&d;
746 746 array->append(new ConstantIntValue(dp[1]));
747 747 array->append(new ConstantIntValue(dp[0]));
748 748 #endif
749 749 break;
750 750 }
751 751 case Type::Long: {
752 752 jlong d = t->is_long()->get_con();
753 753 #ifdef _LP64
754 754 array->append(new ConstantIntValue(0));
755 755 array->append(new ConstantLongValue(d));
756 756 #else
757 757 // Repack the long as two jints.
758 758 // The convention the interpreter uses is that the second local
759 759 // holds the first raw word of the native double representation.
760 760 // This is actually reasonable, since locals and stack arrays
761 761 // grow downwards in all implementations.
762 762 // (If, on some machine, the interpreter's Java locals or stack
763 763 // were to grow upwards, the embedded doubles would be word-swapped.)
764 764 jint *dp = (jint*)&d;
765 765 array->append(new ConstantIntValue(dp[1]));
766 766 array->append(new ConstantIntValue(dp[0]));
767 767 #endif
768 768 break;
769 769 }
770 770 case Type::Top: // Add an illegal value here
771 771 array->append(new LocationValue(Location()));
772 772 break;
773 773 default:
774 774 ShouldNotReachHere();
775 775 break;
776 776 }
777 777 }
778 778
779 779 // Determine if this node starts a bundle
780 780 bool Compile::starts_bundle(const Node *n) const {
781 781 return (_node_bundling_limit > n->_idx &&
782 782 _node_bundling_base[n->_idx].starts_bundle());
783 783 }
784 784
785 785 //--------------------------Process_OopMap_Node--------------------------------
786 786 void Compile::Process_OopMap_Node(MachNode *mach, int current_offset) {
787 787
788 788 // Handle special safepoint nodes for synchronization
789 789 MachSafePointNode *sfn = mach->as_MachSafePoint();
790 790 MachCallNode *mcall;
791 791
792 792 #ifdef ENABLE_ZAP_DEAD_LOCALS
793 793 assert( is_node_getting_a_safepoint(mach), "logic does not match; false negative");
794 794 #endif
795 795
796 796 int safepoint_pc_offset = current_offset;
797 797
798 798 // Add the safepoint in the DebugInfoRecorder
799 799 if( !mach->is_MachCall() ) {
800 800 mcall = NULL;
801 801 debug_info()->add_safepoint(safepoint_pc_offset, sfn->_oop_map);
802 802 } else {
803 803 mcall = mach->as_MachCall();
804 804 safepoint_pc_offset += mcall->ret_addr_offset();
805 805 debug_info()->add_safepoint(safepoint_pc_offset, mcall->_oop_map);
806 806 }
807 807
808 808 // Loop over the JVMState list to add scope information
809 809 // Do not skip safepoints with a NULL method, they need monitor info
810 810 JVMState* youngest_jvms = sfn->jvms();
811 811 int max_depth = youngest_jvms->depth();
812 812
813 813 // Allocate the object pool for scalar-replaced objects -- the map from
814 814 // small-integer keys (which can be recorded in the local and ostack
815 815 // arrays) to descriptions of the object state.
816 816 GrowableArray<ScopeValue*> *objs = new GrowableArray<ScopeValue*>();
817 817
818 818 // Visit scopes from oldest to youngest.
819 819 for (int depth = 1; depth <= max_depth; depth++) {
820 820 JVMState* jvms = youngest_jvms->of_depth(depth);
821 821 int idx;
822 822 ciMethod* method = jvms->has_method() ? jvms->method() : NULL;
823 823 // Safepoints that do not have method() set only provide oop-map and monitor info
824 824 // to support GC; these do not support deoptimization.
825 825 int num_locs = (method == NULL) ? 0 : jvms->loc_size();
826 826 int num_exps = (method == NULL) ? 0 : jvms->stk_size();
827 827 int num_mon = jvms->nof_monitors();
828 828 assert(method == NULL || jvms->bci() < 0 || num_locs == method->max_locals(),
829 829 "JVMS local count must match that of the method");
830 830
831 831 // Add Local and Expression Stack Information
832 832
833 833 // Insert locals into the locarray
834 834 GrowableArray<ScopeValue*> *locarray = new GrowableArray<ScopeValue*>(num_locs);
835 835 for( idx = 0; idx < num_locs; idx++ ) {
836 836 FillLocArray( idx, sfn, sfn->local(jvms, idx), locarray, objs );
837 837 }
838 838
839 839 // Insert expression stack entries into the exparray
840 840 GrowableArray<ScopeValue*> *exparray = new GrowableArray<ScopeValue*>(num_exps);
841 841 for( idx = 0; idx < num_exps; idx++ ) {
842 842 FillLocArray( idx, sfn, sfn->stack(jvms, idx), exparray, objs );
843 843 }
844 844
845 845 // Add in mappings of the monitors
846 846 assert( !method ||
847 847 !method->is_synchronized() ||
848 848 method->is_native() ||
849 849 num_mon > 0 ||
850 850 !GenerateSynchronizationCode,
851 851 "monitors must always exist for synchronized methods");
852 852
853 853 // Build the growable array of ScopeValues for exp stack
854 854 GrowableArray<MonitorValue*> *monarray = new GrowableArray<MonitorValue*>(num_mon);
855 855
856 856 // Loop over monitors and insert into array
857 857 for(idx = 0; idx < num_mon; idx++) {
858 858 // Grab the node that defines this monitor
859 859 Node* box_node = sfn->monitor_box(jvms, idx);
860 860 Node* obj_node = sfn->monitor_obj(jvms, idx);
861 861
862 862 // Create ScopeValue for object
863 863 ScopeValue *scval = NULL;
864 864
865 865 if( obj_node->is_SafePointScalarObject() ) {
866 866 SafePointScalarObjectNode* spobj = obj_node->as_SafePointScalarObject();
867 867 scval = Compile::sv_for_node_id(objs, spobj->_idx);
868 868 if (scval == NULL) {
869 869 const Type *t = obj_node->bottom_type();
870 870 ciKlass* cik = t->is_oopptr()->klass();
871 871 assert(cik->is_instance_klass() ||
872 872 cik->is_array_klass(), "Not supported allocation.");
873 873 ObjectValue* sv = new ObjectValue(spobj->_idx,
874 874 new ConstantOopWriteValue(cik->constant_encoding()));
875 875 Compile::set_sv_for_object_node(objs, sv);
876 876
877 877 uint first_ind = spobj->first_index();
878 878 for (uint i = 0; i < spobj->n_fields(); i++) {
879 879 Node* fld_node = sfn->in(first_ind+i);
880 880 (void)FillLocArray(sv->field_values()->length(), sfn, fld_node, sv->field_values(), objs);
881 881 }
882 882 scval = sv;
883 883 }
884 884 } else if( !obj_node->is_Con() ) {
885 885 OptoReg::Name obj_reg = _regalloc->get_reg_first(obj_node);
886 886 if( obj_node->bottom_type()->base() == Type::NarrowOop ) {
887 887 scval = new_loc_value( _regalloc, obj_reg, Location::narrowoop );
888 888 } else {
889 889 scval = new_loc_value( _regalloc, obj_reg, Location::oop );
890 890 }
891 891 } else {
892 892 const TypePtr *tp = obj_node->bottom_type()->make_ptr();
893 893 scval = new ConstantOopWriteValue(tp->is_instptr()->const_oop()->constant_encoding());
894 894 }
895 895
896 896 OptoReg::Name box_reg = BoxLockNode::stack_slot(box_node);
897 897 Location basic_lock = Location::new_stk_loc(Location::normal,_regalloc->reg2offset(box_reg));
898 898 while( !box_node->is_BoxLock() ) box_node = box_node->in(1);
899 899 monarray->append(new MonitorValue(scval, basic_lock, box_node->as_BoxLock()->is_eliminated()));
900 900 }
901 901
902 902 // We dump the object pool first, since deoptimization reads it in first.
903 903 debug_info()->dump_object_pool(objs);
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904 904
905 905 // Build first class objects to pass to scope
906 906 DebugToken *locvals = debug_info()->create_scope_values(locarray);
907 907 DebugToken *expvals = debug_info()->create_scope_values(exparray);
908 908 DebugToken *monvals = debug_info()->create_monitor_values(monarray);
909 909
910 910 // Make method available for all Safepoints
911 911 ciMethod* scope_method = method ? method : _method;
912 912 // Describe the scope here
913 913 assert(jvms->bci() >= InvocationEntryBci && jvms->bci() <= 0x10000, "must be a valid or entry BCI");
914 - assert(!jvms->should_reexecute() || depth==max_depth, "reexecute allowed only for the youngest");
914 + assert(!jvms->should_reexecute() || depth == max_depth, "reexecute allowed only for the youngest");
915 915 // Now we can describe the scope.
916 - debug_info()->describe_scope(safepoint_pc_offset,scope_method,jvms->bci(),jvms->should_reexecute(),locvals,expvals,monvals);
916 + bool is_method_handle_invoke = false;
917 + debug_info()->describe_scope(safepoint_pc_offset, scope_method, jvms->bci(), jvms->should_reexecute(), is_method_handle_invoke, locvals, expvals, monvals);
917 918 } // End jvms loop
918 919
919 920 // Mark the end of the scope set.
920 921 debug_info()->end_safepoint(safepoint_pc_offset);
921 922 }
922 923
923 924
924 925
925 926 // A simplified version of Process_OopMap_Node, to handle non-safepoints.
926 927 class NonSafepointEmitter {
927 928 Compile* C;
928 929 JVMState* _pending_jvms;
929 930 int _pending_offset;
930 931
931 932 void emit_non_safepoint();
932 933
933 934 public:
934 935 NonSafepointEmitter(Compile* compile) {
935 936 this->C = compile;
936 937 _pending_jvms = NULL;
937 938 _pending_offset = 0;
938 939 }
939 940
940 941 void observe_instruction(Node* n, int pc_offset) {
941 942 if (!C->debug_info()->recording_non_safepoints()) return;
942 943
943 944 Node_Notes* nn = C->node_notes_at(n->_idx);
944 945 if (nn == NULL || nn->jvms() == NULL) return;
945 946 if (_pending_jvms != NULL &&
946 947 _pending_jvms->same_calls_as(nn->jvms())) {
947 948 // Repeated JVMS? Stretch it up here.
948 949 _pending_offset = pc_offset;
949 950 } else {
950 951 if (_pending_jvms != NULL &&
951 952 _pending_offset < pc_offset) {
952 953 emit_non_safepoint();
953 954 }
954 955 _pending_jvms = NULL;
955 956 if (pc_offset > C->debug_info()->last_pc_offset()) {
956 957 // This is the only way _pending_jvms can become non-NULL:
957 958 _pending_jvms = nn->jvms();
958 959 _pending_offset = pc_offset;
959 960 }
960 961 }
961 962 }
962 963
963 964 // Stay out of the way of real safepoints:
964 965 void observe_safepoint(JVMState* jvms, int pc_offset) {
965 966 if (_pending_jvms != NULL &&
966 967 !_pending_jvms->same_calls_as(jvms) &&
967 968 _pending_offset < pc_offset) {
968 969 emit_non_safepoint();
969 970 }
970 971 _pending_jvms = NULL;
971 972 }
972 973
973 974 void flush_at_end() {
974 975 if (_pending_jvms != NULL) {
975 976 emit_non_safepoint();
976 977 }
977 978 _pending_jvms = NULL;
978 979 }
979 980 };
980 981
981 982 void NonSafepointEmitter::emit_non_safepoint() {
982 983 JVMState* youngest_jvms = _pending_jvms;
983 984 int pc_offset = _pending_offset;
984 985
985 986 // Clear it now:
986 987 _pending_jvms = NULL;
987 988
988 989 DebugInformationRecorder* debug_info = C->debug_info();
989 990 assert(debug_info->recording_non_safepoints(), "sanity");
990 991
991 992 debug_info->add_non_safepoint(pc_offset);
992 993 int max_depth = youngest_jvms->depth();
993 994
994 995 // Visit scopes from oldest to youngest.
995 996 for (int depth = 1; depth <= max_depth; depth++) {
996 997 JVMState* jvms = youngest_jvms->of_depth(depth);
997 998 ciMethod* method = jvms->has_method() ? jvms->method() : NULL;
998 999 assert(!jvms->should_reexecute() || depth==max_depth, "reexecute allowed only for the youngest");
999 1000 debug_info->describe_scope(pc_offset, method, jvms->bci(), jvms->should_reexecute());
1000 1001 }
1001 1002
1002 1003 // Mark the end of the scope set.
1003 1004 debug_info->end_non_safepoint(pc_offset);
1004 1005 }
1005 1006
1006 1007
1007 1008
1008 1009 // helper for Fill_buffer bailout logic
1009 1010 static void turn_off_compiler(Compile* C) {
1010 1011 if (CodeCache::unallocated_capacity() >= CodeCacheMinimumFreeSpace*10) {
1011 1012 // Do not turn off compilation if a single giant method has
1012 1013 // blown the code cache size.
1013 1014 C->record_failure("excessive request to CodeCache");
1014 1015 } else {
1015 1016 // Let CompilerBroker disable further compilations.
1016 1017 C->record_failure("CodeCache is full");
1017 1018 }
1018 1019 }
1019 1020
1020 1021
1021 1022 //------------------------------Fill_buffer------------------------------------
1022 1023 void Compile::Fill_buffer() {
1023 1024
1024 1025 // Set the initially allocated size
1025 1026 int code_req = initial_code_capacity;
1026 1027 int locs_req = initial_locs_capacity;
1027 1028 int stub_req = TraceJumps ? initial_stub_capacity * 10 : initial_stub_capacity;
1028 1029 int const_req = initial_const_capacity;
1029 1030 bool labels_not_set = true;
1030 1031
1031 1032 int pad_req = NativeCall::instruction_size;
1032 1033 // The extra spacing after the code is necessary on some platforms.
1033 1034 // Sometimes we need to patch in a jump after the last instruction,
1034 1035 // if the nmethod has been deoptimized. (See 4932387, 4894843.)
1035 1036
1036 1037 uint i;
1037 1038 // Compute the byte offset where we can store the deopt pc.
1038 1039 if (fixed_slots() != 0) {
1039 1040 _orig_pc_slot_offset_in_bytes = _regalloc->reg2offset(OptoReg::stack2reg(_orig_pc_slot));
1040 1041 }
1041 1042
1042 1043 // Compute prolog code size
1043 1044 _method_size = 0;
1044 1045 _frame_slots = OptoReg::reg2stack(_matcher->_old_SP)+_regalloc->_framesize;
1045 1046 #ifdef IA64
1046 1047 if (save_argument_registers()) {
1047 1048 // 4815101: this is a stub with implicit and unknown precision fp args.
1048 1049 // The usual spill mechanism can only generate stfd's in this case, which
1049 1050 // doesn't work if the fp reg to spill contains a single-precision denorm.
1050 1051 // Instead, we hack around the normal spill mechanism using stfspill's and
1051 1052 // ldffill's in the MachProlog and MachEpilog emit methods. We allocate
1052 1053 // space here for the fp arg regs (f8-f15) we're going to thusly spill.
1053 1054 //
1054 1055 // If we ever implement 16-byte 'registers' == stack slots, we can
1055 1056 // get rid of this hack and have SpillCopy generate stfspill/ldffill
1056 1057 // instead of stfd/stfs/ldfd/ldfs.
1057 1058 _frame_slots += 8*(16/BytesPerInt);
1058 1059 }
1059 1060 #endif
1060 1061 assert( _frame_slots >= 0 && _frame_slots < 1000000, "sanity check" );
1061 1062
1062 1063 // Create an array of unused labels, one for each basic block
1063 1064 Label *blk_labels = NEW_RESOURCE_ARRAY(Label, _cfg->_num_blocks+1);
1064 1065
1065 1066 for( i=0; i <= _cfg->_num_blocks; i++ ) {
1066 1067 blk_labels[i].init();
1067 1068 }
1068 1069
1069 1070 // If this machine supports different size branch offsets, then pre-compute
1070 1071 // the length of the blocks
1071 1072 if( _matcher->is_short_branch_offset(-1, 0) ) {
1072 1073 Shorten_branches(blk_labels, code_req, locs_req, stub_req, const_req);
1073 1074 labels_not_set = false;
1074 1075 }
1075 1076
1076 1077 // nmethod and CodeBuffer count stubs & constants as part of method's code.
1077 1078 int exception_handler_req = size_exception_handler();
1078 1079 int deopt_handler_req = size_deopt_handler();
1079 1080 exception_handler_req += MAX_stubs_size; // add marginal slop for handler
1080 1081 deopt_handler_req += MAX_stubs_size; // add marginal slop for handler
1081 1082 stub_req += MAX_stubs_size; // ensure per-stub margin
1082 1083 code_req += MAX_inst_size; // ensure per-instruction margin
1083 1084 if (StressCodeBuffers)
1084 1085 code_req = const_req = stub_req = exception_handler_req = deopt_handler_req = 0x10; // force expansion
1085 1086 int total_req = code_req + pad_req + stub_req + exception_handler_req + deopt_handler_req + const_req;
1086 1087 CodeBuffer* cb = code_buffer();
1087 1088 cb->initialize(total_req, locs_req);
1088 1089
1089 1090 // Have we run out of code space?
1090 1091 if (cb->blob() == NULL) {
1091 1092 turn_off_compiler(this);
1092 1093 return;
1093 1094 }
1094 1095 // Configure the code buffer.
1095 1096 cb->initialize_consts_size(const_req);
1096 1097 cb->initialize_stubs_size(stub_req);
1097 1098 cb->initialize_oop_recorder(env()->oop_recorder());
1098 1099
1099 1100 // fill in the nop array for bundling computations
1100 1101 MachNode *_nop_list[Bundle::_nop_count];
1101 1102 Bundle::initialize_nops(_nop_list, this);
1102 1103
1103 1104 // Create oopmap set.
1104 1105 _oop_map_set = new OopMapSet();
1105 1106
1106 1107 // !!!!! This preserves old handling of oopmaps for now
1107 1108 debug_info()->set_oopmaps(_oop_map_set);
1108 1109
1109 1110 // Count and start of implicit null check instructions
1110 1111 uint inct_cnt = 0;
1111 1112 uint *inct_starts = NEW_RESOURCE_ARRAY(uint, _cfg->_num_blocks+1);
1112 1113
1113 1114 // Count and start of calls
1114 1115 uint *call_returns = NEW_RESOURCE_ARRAY(uint, _cfg->_num_blocks+1);
1115 1116
1116 1117 uint return_offset = 0;
1117 1118 int nop_size = (new (this) MachNopNode())->size(_regalloc);
1118 1119
1119 1120 int previous_offset = 0;
1120 1121 int current_offset = 0;
1121 1122 int last_call_offset = -1;
1122 1123
1123 1124 // Create an array of unused labels, one for each basic block, if printing is enabled
1124 1125 #ifndef PRODUCT
1125 1126 int *node_offsets = NULL;
1126 1127 uint node_offset_limit = unique();
1127 1128
1128 1129
1129 1130 if ( print_assembly() )
1130 1131 node_offsets = NEW_RESOURCE_ARRAY(int, node_offset_limit);
1131 1132 #endif
1132 1133
1133 1134 NonSafepointEmitter non_safepoints(this); // emit non-safepoints lazily
1134 1135
1135 1136 // ------------------
1136 1137 // Now fill in the code buffer
1137 1138 Node *delay_slot = NULL;
1138 1139
1139 1140 for( i=0; i < _cfg->_num_blocks; i++ ) {
1140 1141 Block *b = _cfg->_blocks[i];
1141 1142
1142 1143 Node *head = b->head();
1143 1144
1144 1145 // If this block needs to start aligned (i.e, can be reached other
1145 1146 // than by falling-thru from the previous block), then force the
1146 1147 // start of a new bundle.
1147 1148 if( Pipeline::requires_bundling() && starts_bundle(head) )
1148 1149 cb->flush_bundle(true);
1149 1150
1150 1151 // Define the label at the beginning of the basic block
1151 1152 if( labels_not_set )
1152 1153 MacroAssembler(cb).bind( blk_labels[b->_pre_order] );
1153 1154
1154 1155 else
1155 1156 assert( blk_labels[b->_pre_order].loc_pos() == cb->code_size(),
1156 1157 "label position does not match code offset" );
1157 1158
1158 1159 uint last_inst = b->_nodes.size();
1159 1160
1160 1161 // Emit block normally, except for last instruction.
1161 1162 // Emit means "dump code bits into code buffer".
1162 1163 for( uint j = 0; j<last_inst; j++ ) {
1163 1164
1164 1165 // Get the node
1165 1166 Node* n = b->_nodes[j];
1166 1167
1167 1168 // See if delay slots are supported
1168 1169 if (valid_bundle_info(n) &&
1169 1170 node_bundling(n)->used_in_unconditional_delay()) {
1170 1171 assert(delay_slot == NULL, "no use of delay slot node");
1171 1172 assert(n->size(_regalloc) == Pipeline::instr_unit_size(), "delay slot instruction wrong size");
1172 1173
1173 1174 delay_slot = n;
1174 1175 continue;
1175 1176 }
1176 1177
1177 1178 // If this starts a new instruction group, then flush the current one
1178 1179 // (but allow split bundles)
1179 1180 if( Pipeline::requires_bundling() && starts_bundle(n) )
1180 1181 cb->flush_bundle(false);
1181 1182
1182 1183 // The following logic is duplicated in the code ifdeffed for
1183 1184 // ENABLE_ZAP_DEAD_LOCALS which appears above in this file. It
1184 1185 // should be factored out. Or maybe dispersed to the nodes?
1185 1186
1186 1187 // Special handling for SafePoint/Call Nodes
1187 1188 bool is_mcall = false;
1188 1189 if( n->is_Mach() ) {
1189 1190 MachNode *mach = n->as_Mach();
1190 1191 is_mcall = n->is_MachCall();
1191 1192 bool is_sfn = n->is_MachSafePoint();
1192 1193
1193 1194 // If this requires all previous instructions be flushed, then do so
1194 1195 if( is_sfn || is_mcall || mach->alignment_required() != 1) {
1195 1196 cb->flush_bundle(true);
1196 1197 current_offset = cb->code_size();
1197 1198 }
1198 1199
1199 1200 // align the instruction if necessary
1200 1201 int padding = mach->compute_padding(current_offset);
1201 1202 // Make sure safepoint node for polling is distinct from a call's
1202 1203 // return by adding a nop if needed.
1203 1204 if (is_sfn && !is_mcall && padding == 0 && current_offset == last_call_offset ) {
1204 1205 padding = nop_size;
1205 1206 }
1206 1207 assert( labels_not_set || padding == 0, "instruction should already be aligned")
1207 1208
1208 1209 if(padding > 0) {
1209 1210 assert((padding % nop_size) == 0, "padding is not a multiple of NOP size");
1210 1211 int nops_cnt = padding / nop_size;
1211 1212 MachNode *nop = new (this) MachNopNode(nops_cnt);
1212 1213 b->_nodes.insert(j++, nop);
1213 1214 last_inst++;
1214 1215 _cfg->_bbs.map( nop->_idx, b );
1215 1216 nop->emit(*cb, _regalloc);
1216 1217 cb->flush_bundle(true);
1217 1218 current_offset = cb->code_size();
1218 1219 }
1219 1220
1220 1221 // Remember the start of the last call in a basic block
1221 1222 if (is_mcall) {
1222 1223 MachCallNode *mcall = mach->as_MachCall();
1223 1224
1224 1225 // This destination address is NOT PC-relative
1225 1226 mcall->method_set((intptr_t)mcall->entry_point());
1226 1227
1227 1228 // Save the return address
1228 1229 call_returns[b->_pre_order] = current_offset + mcall->ret_addr_offset();
1229 1230
1230 1231 if (!mcall->is_safepoint_node()) {
1231 1232 is_mcall = false;
1232 1233 is_sfn = false;
1233 1234 }
1234 1235 }
1235 1236
1236 1237 // sfn will be valid whenever mcall is valid now because of inheritance
1237 1238 if( is_sfn || is_mcall ) {
1238 1239
1239 1240 // Handle special safepoint nodes for synchronization
1240 1241 if( !is_mcall ) {
1241 1242 MachSafePointNode *sfn = mach->as_MachSafePoint();
1242 1243 // !!!!! Stubs only need an oopmap right now, so bail out
1243 1244 if( sfn->jvms()->method() == NULL) {
1244 1245 // Write the oopmap directly to the code blob??!!
1245 1246 # ifdef ENABLE_ZAP_DEAD_LOCALS
1246 1247 assert( !is_node_getting_a_safepoint(sfn), "logic does not match; false positive");
1247 1248 # endif
1248 1249 continue;
1249 1250 }
1250 1251 } // End synchronization
1251 1252
1252 1253 non_safepoints.observe_safepoint(mach->as_MachSafePoint()->jvms(),
1253 1254 current_offset);
1254 1255 Process_OopMap_Node(mach, current_offset);
1255 1256 } // End if safepoint
1256 1257
1257 1258 // If this is a null check, then add the start of the previous instruction to the list
1258 1259 else if( mach->is_MachNullCheck() ) {
1259 1260 inct_starts[inct_cnt++] = previous_offset;
1260 1261 }
1261 1262
1262 1263 // If this is a branch, then fill in the label with the target BB's label
1263 1264 else if ( mach->is_Branch() ) {
1264 1265
1265 1266 if ( mach->ideal_Opcode() == Op_Jump ) {
1266 1267 for (uint h = 0; h < b->_num_succs; h++ ) {
1267 1268 Block* succs_block = b->_succs[h];
1268 1269 for (uint j = 1; j < succs_block->num_preds(); j++) {
1269 1270 Node* jpn = succs_block->pred(j);
1270 1271 if ( jpn->is_JumpProj() && jpn->in(0) == mach ) {
1271 1272 uint block_num = succs_block->non_connector()->_pre_order;
1272 1273 Label *blkLabel = &blk_labels[block_num];
1273 1274 mach->add_case_label(jpn->as_JumpProj()->proj_no(), blkLabel);
1274 1275 }
1275 1276 }
1276 1277 }
1277 1278 } else {
1278 1279 // For Branchs
1279 1280 // This requires the TRUE branch target be in succs[0]
1280 1281 uint block_num = b->non_connector_successor(0)->_pre_order;
1281 1282 mach->label_set( blk_labels[block_num], block_num );
1282 1283 }
1283 1284 }
1284 1285
1285 1286 #ifdef ASSERT
1286 1287 // Check that oop-store precedes the card-mark
1287 1288 else if( mach->ideal_Opcode() == Op_StoreCM ) {
1288 1289 uint storeCM_idx = j;
1289 1290 Node *oop_store = mach->in(mach->_cnt); // First precedence edge
1290 1291 assert( oop_store != NULL, "storeCM expects a precedence edge");
1291 1292 uint i4;
1292 1293 for( i4 = 0; i4 < last_inst; ++i4 ) {
1293 1294 if( b->_nodes[i4] == oop_store ) break;
1294 1295 }
1295 1296 // Note: This test can provide a false failure if other precedence
1296 1297 // edges have been added to the storeCMNode.
1297 1298 assert( i4 == last_inst || i4 < storeCM_idx, "CM card-mark executes before oop-store");
1298 1299 }
1299 1300 #endif
1300 1301
1301 1302 else if( !n->is_Proj() ) {
1302 1303 // Remember the beginning of the previous instruction, in case
1303 1304 // it's followed by a flag-kill and a null-check. Happens on
1304 1305 // Intel all the time, with add-to-memory kind of opcodes.
1305 1306 previous_offset = current_offset;
1306 1307 }
1307 1308 }
1308 1309
1309 1310 // Verify that there is sufficient space remaining
1310 1311 cb->insts()->maybe_expand_to_ensure_remaining(MAX_inst_size);
1311 1312 if (cb->blob() == NULL) {
1312 1313 turn_off_compiler(this);
1313 1314 return;
1314 1315 }
1315 1316
1316 1317 // Save the offset for the listing
1317 1318 #ifndef PRODUCT
1318 1319 if( node_offsets && n->_idx < node_offset_limit )
1319 1320 node_offsets[n->_idx] = cb->code_size();
1320 1321 #endif
1321 1322
1322 1323 // "Normal" instruction case
1323 1324 n->emit(*cb, _regalloc);
1324 1325 current_offset = cb->code_size();
1325 1326 non_safepoints.observe_instruction(n, current_offset);
1326 1327
1327 1328 // mcall is last "call" that can be a safepoint
1328 1329 // record it so we can see if a poll will directly follow it
1329 1330 // in which case we'll need a pad to make the PcDesc sites unique
1330 1331 // see 5010568. This can be slightly inaccurate but conservative
1331 1332 // in the case that return address is not actually at current_offset.
1332 1333 // This is a small price to pay.
1333 1334
1334 1335 if (is_mcall) {
1335 1336 last_call_offset = current_offset;
1336 1337 }
1337 1338
1338 1339 // See if this instruction has a delay slot
1339 1340 if ( valid_bundle_info(n) && node_bundling(n)->use_unconditional_delay()) {
1340 1341 assert(delay_slot != NULL, "expecting delay slot node");
1341 1342
1342 1343 // Back up 1 instruction
1343 1344 cb->set_code_end(
1344 1345 cb->code_end()-Pipeline::instr_unit_size());
1345 1346
1346 1347 // Save the offset for the listing
1347 1348 #ifndef PRODUCT
1348 1349 if( node_offsets && delay_slot->_idx < node_offset_limit )
1349 1350 node_offsets[delay_slot->_idx] = cb->code_size();
1350 1351 #endif
1351 1352
1352 1353 // Support a SafePoint in the delay slot
1353 1354 if( delay_slot->is_MachSafePoint() ) {
1354 1355 MachNode *mach = delay_slot->as_Mach();
1355 1356 // !!!!! Stubs only need an oopmap right now, so bail out
1356 1357 if( !mach->is_MachCall() && mach->as_MachSafePoint()->jvms()->method() == NULL ) {
1357 1358 // Write the oopmap directly to the code blob??!!
1358 1359 # ifdef ENABLE_ZAP_DEAD_LOCALS
1359 1360 assert( !is_node_getting_a_safepoint(mach), "logic does not match; false positive");
1360 1361 # endif
1361 1362 delay_slot = NULL;
1362 1363 continue;
1363 1364 }
1364 1365
1365 1366 int adjusted_offset = current_offset - Pipeline::instr_unit_size();
1366 1367 non_safepoints.observe_safepoint(mach->as_MachSafePoint()->jvms(),
1367 1368 adjusted_offset);
1368 1369 // Generate an OopMap entry
1369 1370 Process_OopMap_Node(mach, adjusted_offset);
1370 1371 }
1371 1372
1372 1373 // Insert the delay slot instruction
1373 1374 delay_slot->emit(*cb, _regalloc);
1374 1375
1375 1376 // Don't reuse it
1376 1377 delay_slot = NULL;
1377 1378 }
1378 1379
1379 1380 } // End for all instructions in block
1380 1381
1381 1382 // If the next block is the top of a loop, pad this block out to align
1382 1383 // the loop top a little. Helps prevent pipe stalls at loop back branches.
1383 1384 if( i<_cfg->_num_blocks-1 ) {
1384 1385 Block *nb = _cfg->_blocks[i+1];
1385 1386 uint padding = nb->alignment_padding(current_offset);
1386 1387 if( padding > 0 ) {
1387 1388 MachNode *nop = new (this) MachNopNode(padding / nop_size);
1388 1389 b->_nodes.insert( b->_nodes.size(), nop );
1389 1390 _cfg->_bbs.map( nop->_idx, b );
1390 1391 nop->emit(*cb, _regalloc);
1391 1392 current_offset = cb->code_size();
1392 1393 }
1393 1394 }
1394 1395
1395 1396 } // End of for all blocks
1396 1397
1397 1398 non_safepoints.flush_at_end();
1398 1399
1399 1400 // Offset too large?
1400 1401 if (failing()) return;
1401 1402
1402 1403 // Define a pseudo-label at the end of the code
1403 1404 MacroAssembler(cb).bind( blk_labels[_cfg->_num_blocks] );
1404 1405
1405 1406 // Compute the size of the first block
1406 1407 _first_block_size = blk_labels[1].loc_pos() - blk_labels[0].loc_pos();
1407 1408
1408 1409 assert(cb->code_size() < 500000, "method is unreasonably large");
1409 1410
1410 1411 // ------------------
1411 1412
1412 1413 #ifndef PRODUCT
1413 1414 // Information on the size of the method, without the extraneous code
1414 1415 Scheduling::increment_method_size(cb->code_size());
1415 1416 #endif
1416 1417
1417 1418 // ------------------
1418 1419 // Fill in exception table entries.
1419 1420 FillExceptionTables(inct_cnt, call_returns, inct_starts, blk_labels);
1420 1421
1421 1422 // Only java methods have exception handlers and deopt handlers
1422 1423 if (_method) {
1423 1424 // Emit the exception handler code.
1424 1425 _code_offsets.set_value(CodeOffsets::Exceptions, emit_exception_handler(*cb));
1425 1426 // Emit the deopt handler code.
1426 1427 _code_offsets.set_value(CodeOffsets::Deopt, emit_deopt_handler(*cb));
1427 1428 }
1428 1429
1429 1430 // One last check for failed CodeBuffer::expand:
1430 1431 if (cb->blob() == NULL) {
1431 1432 turn_off_compiler(this);
1432 1433 return;
1433 1434 }
1434 1435
1435 1436 #ifndef PRODUCT
1436 1437 // Dump the assembly code, including basic-block numbers
1437 1438 if (print_assembly()) {
1438 1439 ttyLocker ttyl; // keep the following output all in one block
1439 1440 if (!VMThread::should_terminate()) { // test this under the tty lock
1440 1441 // This output goes directly to the tty, not the compiler log.
1441 1442 // To enable tools to match it up with the compilation activity,
1442 1443 // be sure to tag this tty output with the compile ID.
1443 1444 if (xtty != NULL) {
1444 1445 xtty->head("opto_assembly compile_id='%d'%s", compile_id(),
1445 1446 is_osr_compilation() ? " compile_kind='osr'" :
1446 1447 "");
1447 1448 }
1448 1449 if (method() != NULL) {
1449 1450 method()->print_oop();
1450 1451 print_codes();
1451 1452 }
1452 1453 dump_asm(node_offsets, node_offset_limit);
1453 1454 if (xtty != NULL) {
1454 1455 xtty->tail("opto_assembly");
1455 1456 }
1456 1457 }
1457 1458 }
1458 1459 #endif
1459 1460
1460 1461 }
1461 1462
1462 1463 void Compile::FillExceptionTables(uint cnt, uint *call_returns, uint *inct_starts, Label *blk_labels) {
1463 1464 _inc_table.set_size(cnt);
1464 1465
1465 1466 uint inct_cnt = 0;
1466 1467 for( uint i=0; i<_cfg->_num_blocks; i++ ) {
1467 1468 Block *b = _cfg->_blocks[i];
1468 1469 Node *n = NULL;
1469 1470 int j;
1470 1471
1471 1472 // Find the branch; ignore trailing NOPs.
1472 1473 for( j = b->_nodes.size()-1; j>=0; j-- ) {
1473 1474 n = b->_nodes[j];
1474 1475 if( !n->is_Mach() || n->as_Mach()->ideal_Opcode() != Op_Con )
1475 1476 break;
1476 1477 }
1477 1478
1478 1479 // If we didn't find anything, continue
1479 1480 if( j < 0 ) continue;
1480 1481
1481 1482 // Compute ExceptionHandlerTable subtable entry and add it
1482 1483 // (skip empty blocks)
1483 1484 if( n->is_Catch() ) {
1484 1485
1485 1486 // Get the offset of the return from the call
1486 1487 uint call_return = call_returns[b->_pre_order];
1487 1488 #ifdef ASSERT
1488 1489 assert( call_return > 0, "no call seen for this basic block" );
1489 1490 while( b->_nodes[--j]->Opcode() == Op_MachProj ) ;
1490 1491 assert( b->_nodes[j]->is_Call(), "CatchProj must follow call" );
1491 1492 #endif
1492 1493 // last instruction is a CatchNode, find it's CatchProjNodes
1493 1494 int nof_succs = b->_num_succs;
1494 1495 // allocate space
1495 1496 GrowableArray<intptr_t> handler_bcis(nof_succs);
1496 1497 GrowableArray<intptr_t> handler_pcos(nof_succs);
1497 1498 // iterate through all successors
1498 1499 for (int j = 0; j < nof_succs; j++) {
1499 1500 Block* s = b->_succs[j];
1500 1501 bool found_p = false;
1501 1502 for( uint k = 1; k < s->num_preds(); k++ ) {
1502 1503 Node *pk = s->pred(k);
1503 1504 if( pk->is_CatchProj() && pk->in(0) == n ) {
1504 1505 const CatchProjNode* p = pk->as_CatchProj();
1505 1506 found_p = true;
1506 1507 // add the corresponding handler bci & pco information
1507 1508 if( p->_con != CatchProjNode::fall_through_index ) {
1508 1509 // p leads to an exception handler (and is not fall through)
1509 1510 assert(s == _cfg->_blocks[s->_pre_order],"bad numbering");
1510 1511 // no duplicates, please
1511 1512 if( !handler_bcis.contains(p->handler_bci()) ) {
1512 1513 uint block_num = s->non_connector()->_pre_order;
1513 1514 handler_bcis.append(p->handler_bci());
1514 1515 handler_pcos.append(blk_labels[block_num].loc_pos());
1515 1516 }
1516 1517 }
1517 1518 }
1518 1519 }
1519 1520 assert(found_p, "no matching predecessor found");
1520 1521 // Note: Due to empty block removal, one block may have
1521 1522 // several CatchProj inputs, from the same Catch.
1522 1523 }
1523 1524
1524 1525 // Set the offset of the return from the call
1525 1526 _handler_table.add_subtable(call_return, &handler_bcis, NULL, &handler_pcos);
1526 1527 continue;
1527 1528 }
1528 1529
1529 1530 // Handle implicit null exception table updates
1530 1531 if( n->is_MachNullCheck() ) {
1531 1532 uint block_num = b->non_connector_successor(0)->_pre_order;
1532 1533 _inc_table.append( inct_starts[inct_cnt++], blk_labels[block_num].loc_pos() );
1533 1534 continue;
1534 1535 }
1535 1536 } // End of for all blocks fill in exception table entries
1536 1537 }
1537 1538
1538 1539 // Static Variables
1539 1540 #ifndef PRODUCT
1540 1541 uint Scheduling::_total_nop_size = 0;
1541 1542 uint Scheduling::_total_method_size = 0;
1542 1543 uint Scheduling::_total_branches = 0;
1543 1544 uint Scheduling::_total_unconditional_delays = 0;
1544 1545 uint Scheduling::_total_instructions_per_bundle[Pipeline::_max_instrs_per_cycle+1];
1545 1546 #endif
1546 1547
1547 1548 // Initializer for class Scheduling
1548 1549
1549 1550 Scheduling::Scheduling(Arena *arena, Compile &compile)
1550 1551 : _arena(arena),
1551 1552 _cfg(compile.cfg()),
1552 1553 _bbs(compile.cfg()->_bbs),
1553 1554 _regalloc(compile.regalloc()),
1554 1555 _reg_node(arena),
1555 1556 _bundle_instr_count(0),
1556 1557 _bundle_cycle_number(0),
1557 1558 _scheduled(arena),
1558 1559 _available(arena),
1559 1560 _next_node(NULL),
1560 1561 _bundle_use(0, 0, resource_count, &_bundle_use_elements[0]),
1561 1562 _pinch_free_list(arena)
1562 1563 #ifndef PRODUCT
1563 1564 , _branches(0)
1564 1565 , _unconditional_delays(0)
1565 1566 #endif
1566 1567 {
1567 1568 // Create a MachNopNode
1568 1569 _nop = new (&compile) MachNopNode();
1569 1570
1570 1571 // Now that the nops are in the array, save the count
1571 1572 // (but allow entries for the nops)
1572 1573 _node_bundling_limit = compile.unique();
1573 1574 uint node_max = _regalloc->node_regs_max_index();
1574 1575
1575 1576 compile.set_node_bundling_limit(_node_bundling_limit);
1576 1577
1577 1578 // This one is persistent within the Compile class
1578 1579 _node_bundling_base = NEW_ARENA_ARRAY(compile.comp_arena(), Bundle, node_max);
1579 1580
1580 1581 // Allocate space for fixed-size arrays
1581 1582 _node_latency = NEW_ARENA_ARRAY(arena, unsigned short, node_max);
1582 1583 _uses = NEW_ARENA_ARRAY(arena, short, node_max);
1583 1584 _current_latency = NEW_ARENA_ARRAY(arena, unsigned short, node_max);
1584 1585
1585 1586 // Clear the arrays
1586 1587 memset(_node_bundling_base, 0, node_max * sizeof(Bundle));
1587 1588 memset(_node_latency, 0, node_max * sizeof(unsigned short));
1588 1589 memset(_uses, 0, node_max * sizeof(short));
1589 1590 memset(_current_latency, 0, node_max * sizeof(unsigned short));
1590 1591
1591 1592 // Clear the bundling information
1592 1593 memcpy(_bundle_use_elements,
1593 1594 Pipeline_Use::elaborated_elements,
1594 1595 sizeof(Pipeline_Use::elaborated_elements));
1595 1596
1596 1597 // Get the last node
1597 1598 Block *bb = _cfg->_blocks[_cfg->_blocks.size()-1];
1598 1599
1599 1600 _next_node = bb->_nodes[bb->_nodes.size()-1];
1600 1601 }
1601 1602
1602 1603 #ifndef PRODUCT
1603 1604 // Scheduling destructor
1604 1605 Scheduling::~Scheduling() {
1605 1606 _total_branches += _branches;
1606 1607 _total_unconditional_delays += _unconditional_delays;
1607 1608 }
1608 1609 #endif
1609 1610
1610 1611 // Step ahead "i" cycles
1611 1612 void Scheduling::step(uint i) {
1612 1613
1613 1614 Bundle *bundle = node_bundling(_next_node);
1614 1615 bundle->set_starts_bundle();
1615 1616
1616 1617 // Update the bundle record, but leave the flags information alone
1617 1618 if (_bundle_instr_count > 0) {
1618 1619 bundle->set_instr_count(_bundle_instr_count);
1619 1620 bundle->set_resources_used(_bundle_use.resourcesUsed());
1620 1621 }
1621 1622
1622 1623 // Update the state information
1623 1624 _bundle_instr_count = 0;
1624 1625 _bundle_cycle_number += i;
1625 1626 _bundle_use.step(i);
1626 1627 }
1627 1628
1628 1629 void Scheduling::step_and_clear() {
1629 1630 Bundle *bundle = node_bundling(_next_node);
1630 1631 bundle->set_starts_bundle();
1631 1632
1632 1633 // Update the bundle record
1633 1634 if (_bundle_instr_count > 0) {
1634 1635 bundle->set_instr_count(_bundle_instr_count);
1635 1636 bundle->set_resources_used(_bundle_use.resourcesUsed());
1636 1637
1637 1638 _bundle_cycle_number += 1;
1638 1639 }
1639 1640
1640 1641 // Clear the bundling information
1641 1642 _bundle_instr_count = 0;
1642 1643 _bundle_use.reset();
1643 1644
1644 1645 memcpy(_bundle_use_elements,
1645 1646 Pipeline_Use::elaborated_elements,
1646 1647 sizeof(Pipeline_Use::elaborated_elements));
1647 1648 }
1648 1649
1649 1650 //------------------------------ScheduleAndBundle------------------------------
1650 1651 // Perform instruction scheduling and bundling over the sequence of
1651 1652 // instructions in backwards order.
1652 1653 void Compile::ScheduleAndBundle() {
1653 1654
1654 1655 // Don't optimize this if it isn't a method
1655 1656 if (!_method)
1656 1657 return;
1657 1658
1658 1659 // Don't optimize this if scheduling is disabled
1659 1660 if (!do_scheduling())
1660 1661 return;
1661 1662
1662 1663 NOT_PRODUCT( TracePhase t2("isched", &_t_instrSched, TimeCompiler); )
1663 1664
1664 1665 // Create a data structure for all the scheduling information
1665 1666 Scheduling scheduling(Thread::current()->resource_area(), *this);
1666 1667
1667 1668 // Walk backwards over each basic block, computing the needed alignment
1668 1669 // Walk over all the basic blocks
1669 1670 scheduling.DoScheduling();
1670 1671 }
1671 1672
1672 1673 //------------------------------ComputeLocalLatenciesForward-------------------
1673 1674 // Compute the latency of all the instructions. This is fairly simple,
1674 1675 // because we already have a legal ordering. Walk over the instructions
1675 1676 // from first to last, and compute the latency of the instruction based
1676 1677 // on the latency of the preceding instruction(s).
1677 1678 void Scheduling::ComputeLocalLatenciesForward(const Block *bb) {
1678 1679 #ifndef PRODUCT
1679 1680 if (_cfg->C->trace_opto_output())
1680 1681 tty->print("# -> ComputeLocalLatenciesForward\n");
1681 1682 #endif
1682 1683
1683 1684 // Walk over all the schedulable instructions
1684 1685 for( uint j=_bb_start; j < _bb_end; j++ ) {
1685 1686
1686 1687 // This is a kludge, forcing all latency calculations to start at 1.
1687 1688 // Used to allow latency 0 to force an instruction to the beginning
1688 1689 // of the bb
1689 1690 uint latency = 1;
1690 1691 Node *use = bb->_nodes[j];
1691 1692 uint nlen = use->len();
1692 1693
1693 1694 // Walk over all the inputs
1694 1695 for ( uint k=0; k < nlen; k++ ) {
1695 1696 Node *def = use->in(k);
1696 1697 if (!def)
1697 1698 continue;
1698 1699
1699 1700 uint l = _node_latency[def->_idx] + use->latency(k);
1700 1701 if (latency < l)
1701 1702 latency = l;
1702 1703 }
1703 1704
1704 1705 _node_latency[use->_idx] = latency;
1705 1706
1706 1707 #ifndef PRODUCT
1707 1708 if (_cfg->C->trace_opto_output()) {
1708 1709 tty->print("# latency %4d: ", latency);
1709 1710 use->dump();
1710 1711 }
1711 1712 #endif
1712 1713 }
1713 1714
1714 1715 #ifndef PRODUCT
1715 1716 if (_cfg->C->trace_opto_output())
1716 1717 tty->print("# <- ComputeLocalLatenciesForward\n");
1717 1718 #endif
1718 1719
1719 1720 } // end ComputeLocalLatenciesForward
1720 1721
1721 1722 // See if this node fits into the present instruction bundle
1722 1723 bool Scheduling::NodeFitsInBundle(Node *n) {
1723 1724 uint n_idx = n->_idx;
1724 1725
1725 1726 // If this is the unconditional delay instruction, then it fits
1726 1727 if (n == _unconditional_delay_slot) {
1727 1728 #ifndef PRODUCT
1728 1729 if (_cfg->C->trace_opto_output())
1729 1730 tty->print("# NodeFitsInBundle [%4d]: TRUE; is in unconditional delay slot\n", n->_idx);
1730 1731 #endif
1731 1732 return (true);
1732 1733 }
1733 1734
1734 1735 // If the node cannot be scheduled this cycle, skip it
1735 1736 if (_current_latency[n_idx] > _bundle_cycle_number) {
1736 1737 #ifndef PRODUCT
1737 1738 if (_cfg->C->trace_opto_output())
1738 1739 tty->print("# NodeFitsInBundle [%4d]: FALSE; latency %4d > %d\n",
1739 1740 n->_idx, _current_latency[n_idx], _bundle_cycle_number);
1740 1741 #endif
1741 1742 return (false);
1742 1743 }
1743 1744
1744 1745 const Pipeline *node_pipeline = n->pipeline();
1745 1746
1746 1747 uint instruction_count = node_pipeline->instructionCount();
1747 1748 if (node_pipeline->mayHaveNoCode() && n->size(_regalloc) == 0)
1748 1749 instruction_count = 0;
1749 1750 else if (node_pipeline->hasBranchDelay() && !_unconditional_delay_slot)
1750 1751 instruction_count++;
1751 1752
1752 1753 if (_bundle_instr_count + instruction_count > Pipeline::_max_instrs_per_cycle) {
1753 1754 #ifndef PRODUCT
1754 1755 if (_cfg->C->trace_opto_output())
1755 1756 tty->print("# NodeFitsInBundle [%4d]: FALSE; too many instructions: %d > %d\n",
1756 1757 n->_idx, _bundle_instr_count + instruction_count, Pipeline::_max_instrs_per_cycle);
1757 1758 #endif
1758 1759 return (false);
1759 1760 }
1760 1761
1761 1762 // Don't allow non-machine nodes to be handled this way
1762 1763 if (!n->is_Mach() && instruction_count == 0)
1763 1764 return (false);
1764 1765
1765 1766 // See if there is any overlap
1766 1767 uint delay = _bundle_use.full_latency(0, node_pipeline->resourceUse());
1767 1768
1768 1769 if (delay > 0) {
1769 1770 #ifndef PRODUCT
1770 1771 if (_cfg->C->trace_opto_output())
1771 1772 tty->print("# NodeFitsInBundle [%4d]: FALSE; functional units overlap\n", n_idx);
1772 1773 #endif
1773 1774 return false;
1774 1775 }
1775 1776
1776 1777 #ifndef PRODUCT
1777 1778 if (_cfg->C->trace_opto_output())
1778 1779 tty->print("# NodeFitsInBundle [%4d]: TRUE\n", n_idx);
1779 1780 #endif
1780 1781
1781 1782 return true;
1782 1783 }
1783 1784
1784 1785 Node * Scheduling::ChooseNodeToBundle() {
1785 1786 uint siz = _available.size();
1786 1787
1787 1788 if (siz == 0) {
1788 1789
1789 1790 #ifndef PRODUCT
1790 1791 if (_cfg->C->trace_opto_output())
1791 1792 tty->print("# ChooseNodeToBundle: NULL\n");
1792 1793 #endif
1793 1794 return (NULL);
1794 1795 }
1795 1796
1796 1797 // Fast path, if only 1 instruction in the bundle
1797 1798 if (siz == 1) {
1798 1799 #ifndef PRODUCT
1799 1800 if (_cfg->C->trace_opto_output()) {
1800 1801 tty->print("# ChooseNodeToBundle (only 1): ");
1801 1802 _available[0]->dump();
1802 1803 }
1803 1804 #endif
1804 1805 return (_available[0]);
1805 1806 }
1806 1807
1807 1808 // Don't bother, if the bundle is already full
1808 1809 if (_bundle_instr_count < Pipeline::_max_instrs_per_cycle) {
1809 1810 for ( uint i = 0; i < siz; i++ ) {
1810 1811 Node *n = _available[i];
1811 1812
1812 1813 // Skip projections, we'll handle them another way
1813 1814 if (n->is_Proj())
1814 1815 continue;
1815 1816
1816 1817 // This presupposed that instructions are inserted into the
1817 1818 // available list in a legality order; i.e. instructions that
1818 1819 // must be inserted first are at the head of the list
1819 1820 if (NodeFitsInBundle(n)) {
1820 1821 #ifndef PRODUCT
1821 1822 if (_cfg->C->trace_opto_output()) {
1822 1823 tty->print("# ChooseNodeToBundle: ");
1823 1824 n->dump();
1824 1825 }
1825 1826 #endif
1826 1827 return (n);
1827 1828 }
1828 1829 }
1829 1830 }
1830 1831
1831 1832 // Nothing fits in this bundle, choose the highest priority
1832 1833 #ifndef PRODUCT
1833 1834 if (_cfg->C->trace_opto_output()) {
1834 1835 tty->print("# ChooseNodeToBundle: ");
1835 1836 _available[0]->dump();
1836 1837 }
1837 1838 #endif
1838 1839
1839 1840 return _available[0];
1840 1841 }
1841 1842
1842 1843 //------------------------------AddNodeToAvailableList-------------------------
1843 1844 void Scheduling::AddNodeToAvailableList(Node *n) {
1844 1845 assert( !n->is_Proj(), "projections never directly made available" );
1845 1846 #ifndef PRODUCT
1846 1847 if (_cfg->C->trace_opto_output()) {
1847 1848 tty->print("# AddNodeToAvailableList: ");
1848 1849 n->dump();
1849 1850 }
1850 1851 #endif
1851 1852
1852 1853 int latency = _current_latency[n->_idx];
1853 1854
1854 1855 // Insert in latency order (insertion sort)
1855 1856 uint i;
1856 1857 for ( i=0; i < _available.size(); i++ )
1857 1858 if (_current_latency[_available[i]->_idx] > latency)
1858 1859 break;
1859 1860
1860 1861 // Special Check for compares following branches
1861 1862 if( n->is_Mach() && _scheduled.size() > 0 ) {
1862 1863 int op = n->as_Mach()->ideal_Opcode();
1863 1864 Node *last = _scheduled[0];
1864 1865 if( last->is_MachIf() && last->in(1) == n &&
1865 1866 ( op == Op_CmpI ||
1866 1867 op == Op_CmpU ||
1867 1868 op == Op_CmpP ||
1868 1869 op == Op_CmpF ||
1869 1870 op == Op_CmpD ||
1870 1871 op == Op_CmpL ) ) {
1871 1872
1872 1873 // Recalculate position, moving to front of same latency
1873 1874 for ( i=0 ; i < _available.size(); i++ )
1874 1875 if (_current_latency[_available[i]->_idx] >= latency)
1875 1876 break;
1876 1877 }
1877 1878 }
1878 1879
1879 1880 // Insert the node in the available list
1880 1881 _available.insert(i, n);
1881 1882
1882 1883 #ifndef PRODUCT
1883 1884 if (_cfg->C->trace_opto_output())
1884 1885 dump_available();
1885 1886 #endif
1886 1887 }
1887 1888
1888 1889 //------------------------------DecrementUseCounts-----------------------------
1889 1890 void Scheduling::DecrementUseCounts(Node *n, const Block *bb) {
1890 1891 for ( uint i=0; i < n->len(); i++ ) {
1891 1892 Node *def = n->in(i);
1892 1893 if (!def) continue;
1893 1894 if( def->is_Proj() ) // If this is a machine projection, then
1894 1895 def = def->in(0); // propagate usage thru to the base instruction
1895 1896
1896 1897 if( _bbs[def->_idx] != bb ) // Ignore if not block-local
1897 1898 continue;
1898 1899
1899 1900 // Compute the latency
1900 1901 uint l = _bundle_cycle_number + n->latency(i);
1901 1902 if (_current_latency[def->_idx] < l)
1902 1903 _current_latency[def->_idx] = l;
1903 1904
1904 1905 // If this does not have uses then schedule it
1905 1906 if ((--_uses[def->_idx]) == 0)
1906 1907 AddNodeToAvailableList(def);
1907 1908 }
1908 1909 }
1909 1910
1910 1911 //------------------------------AddNodeToBundle--------------------------------
1911 1912 void Scheduling::AddNodeToBundle(Node *n, const Block *bb) {
1912 1913 #ifndef PRODUCT
1913 1914 if (_cfg->C->trace_opto_output()) {
1914 1915 tty->print("# AddNodeToBundle: ");
1915 1916 n->dump();
1916 1917 }
1917 1918 #endif
1918 1919
1919 1920 // Remove this from the available list
1920 1921 uint i;
1921 1922 for (i = 0; i < _available.size(); i++)
1922 1923 if (_available[i] == n)
1923 1924 break;
1924 1925 assert(i < _available.size(), "entry in _available list not found");
1925 1926 _available.remove(i);
1926 1927
1927 1928 // See if this fits in the current bundle
1928 1929 const Pipeline *node_pipeline = n->pipeline();
1929 1930 const Pipeline_Use& node_usage = node_pipeline->resourceUse();
1930 1931
1931 1932 // Check for instructions to be placed in the delay slot. We
1932 1933 // do this before we actually schedule the current instruction,
1933 1934 // because the delay slot follows the current instruction.
1934 1935 if (Pipeline::_branch_has_delay_slot &&
1935 1936 node_pipeline->hasBranchDelay() &&
1936 1937 !_unconditional_delay_slot) {
1937 1938
1938 1939 uint siz = _available.size();
1939 1940
1940 1941 // Conditional branches can support an instruction that
1941 1942 // is unconditionally executed and not dependent by the
1942 1943 // branch, OR a conditionally executed instruction if
1943 1944 // the branch is taken. In practice, this means that
1944 1945 // the first instruction at the branch target is
1945 1946 // copied to the delay slot, and the branch goes to
1946 1947 // the instruction after that at the branch target
1947 1948 if ( n->is_Mach() && n->is_Branch() ) {
1948 1949
1949 1950 assert( !n->is_MachNullCheck(), "should not look for delay slot for Null Check" );
1950 1951 assert( !n->is_Catch(), "should not look for delay slot for Catch" );
1951 1952
1952 1953 #ifndef PRODUCT
1953 1954 _branches++;
1954 1955 #endif
1955 1956
1956 1957 // At least 1 instruction is on the available list
1957 1958 // that is not dependent on the branch
1958 1959 for (uint i = 0; i < siz; i++) {
1959 1960 Node *d = _available[i];
1960 1961 const Pipeline *avail_pipeline = d->pipeline();
1961 1962
1962 1963 // Don't allow safepoints in the branch shadow, that will
1963 1964 // cause a number of difficulties
1964 1965 if ( avail_pipeline->instructionCount() == 1 &&
1965 1966 !avail_pipeline->hasMultipleBundles() &&
1966 1967 !avail_pipeline->hasBranchDelay() &&
1967 1968 Pipeline::instr_has_unit_size() &&
1968 1969 d->size(_regalloc) == Pipeline::instr_unit_size() &&
1969 1970 NodeFitsInBundle(d) &&
1970 1971 !node_bundling(d)->used_in_delay()) {
1971 1972
1972 1973 if (d->is_Mach() && !d->is_MachSafePoint()) {
1973 1974 // A node that fits in the delay slot was found, so we need to
1974 1975 // set the appropriate bits in the bundle pipeline information so
1975 1976 // that it correctly indicates resource usage. Later, when we
1976 1977 // attempt to add this instruction to the bundle, we will skip
1977 1978 // setting the resource usage.
1978 1979 _unconditional_delay_slot = d;
1979 1980 node_bundling(n)->set_use_unconditional_delay();
1980 1981 node_bundling(d)->set_used_in_unconditional_delay();
1981 1982 _bundle_use.add_usage(avail_pipeline->resourceUse());
1982 1983 _current_latency[d->_idx] = _bundle_cycle_number;
1983 1984 _next_node = d;
1984 1985 ++_bundle_instr_count;
1985 1986 #ifndef PRODUCT
1986 1987 _unconditional_delays++;
1987 1988 #endif
1988 1989 break;
1989 1990 }
1990 1991 }
1991 1992 }
1992 1993 }
1993 1994
1994 1995 // No delay slot, add a nop to the usage
1995 1996 if (!_unconditional_delay_slot) {
1996 1997 // See if adding an instruction in the delay slot will overflow
1997 1998 // the bundle.
1998 1999 if (!NodeFitsInBundle(_nop)) {
1999 2000 #ifndef PRODUCT
2000 2001 if (_cfg->C->trace_opto_output())
2001 2002 tty->print("# *** STEP(1 instruction for delay slot) ***\n");
2002 2003 #endif
2003 2004 step(1);
2004 2005 }
2005 2006
2006 2007 _bundle_use.add_usage(_nop->pipeline()->resourceUse());
2007 2008 _next_node = _nop;
2008 2009 ++_bundle_instr_count;
2009 2010 }
2010 2011
2011 2012 // See if the instruction in the delay slot requires a
2012 2013 // step of the bundles
2013 2014 if (!NodeFitsInBundle(n)) {
2014 2015 #ifndef PRODUCT
2015 2016 if (_cfg->C->trace_opto_output())
2016 2017 tty->print("# *** STEP(branch won't fit) ***\n");
2017 2018 #endif
2018 2019 // Update the state information
2019 2020 _bundle_instr_count = 0;
2020 2021 _bundle_cycle_number += 1;
2021 2022 _bundle_use.step(1);
2022 2023 }
2023 2024 }
2024 2025
2025 2026 // Get the number of instructions
2026 2027 uint instruction_count = node_pipeline->instructionCount();
2027 2028 if (node_pipeline->mayHaveNoCode() && n->size(_regalloc) == 0)
2028 2029 instruction_count = 0;
2029 2030
2030 2031 // Compute the latency information
2031 2032 uint delay = 0;
2032 2033
2033 2034 if (instruction_count > 0 || !node_pipeline->mayHaveNoCode()) {
2034 2035 int relative_latency = _current_latency[n->_idx] - _bundle_cycle_number;
2035 2036 if (relative_latency < 0)
2036 2037 relative_latency = 0;
2037 2038
2038 2039 delay = _bundle_use.full_latency(relative_latency, node_usage);
2039 2040
2040 2041 // Does not fit in this bundle, start a new one
2041 2042 if (delay > 0) {
2042 2043 step(delay);
2043 2044
2044 2045 #ifndef PRODUCT
2045 2046 if (_cfg->C->trace_opto_output())
2046 2047 tty->print("# *** STEP(%d) ***\n", delay);
2047 2048 #endif
2048 2049 }
2049 2050 }
2050 2051
2051 2052 // If this was placed in the delay slot, ignore it
2052 2053 if (n != _unconditional_delay_slot) {
2053 2054
2054 2055 if (delay == 0) {
2055 2056 if (node_pipeline->hasMultipleBundles()) {
2056 2057 #ifndef PRODUCT
2057 2058 if (_cfg->C->trace_opto_output())
2058 2059 tty->print("# *** STEP(multiple instructions) ***\n");
2059 2060 #endif
2060 2061 step(1);
2061 2062 }
2062 2063
2063 2064 else if (instruction_count + _bundle_instr_count > Pipeline::_max_instrs_per_cycle) {
2064 2065 #ifndef PRODUCT
2065 2066 if (_cfg->C->trace_opto_output())
2066 2067 tty->print("# *** STEP(%d >= %d instructions) ***\n",
2067 2068 instruction_count + _bundle_instr_count,
2068 2069 Pipeline::_max_instrs_per_cycle);
2069 2070 #endif
2070 2071 step(1);
2071 2072 }
2072 2073 }
2073 2074
2074 2075 if (node_pipeline->hasBranchDelay() && !_unconditional_delay_slot)
2075 2076 _bundle_instr_count++;
2076 2077
2077 2078 // Set the node's latency
2078 2079 _current_latency[n->_idx] = _bundle_cycle_number;
2079 2080
2080 2081 // Now merge the functional unit information
2081 2082 if (instruction_count > 0 || !node_pipeline->mayHaveNoCode())
2082 2083 _bundle_use.add_usage(node_usage);
2083 2084
2084 2085 // Increment the number of instructions in this bundle
2085 2086 _bundle_instr_count += instruction_count;
2086 2087
2087 2088 // Remember this node for later
2088 2089 if (n->is_Mach())
2089 2090 _next_node = n;
2090 2091 }
2091 2092
2092 2093 // It's possible to have a BoxLock in the graph and in the _bbs mapping but
2093 2094 // not in the bb->_nodes array. This happens for debug-info-only BoxLocks.
2094 2095 // 'Schedule' them (basically ignore in the schedule) but do not insert them
2095 2096 // into the block. All other scheduled nodes get put in the schedule here.
2096 2097 int op = n->Opcode();
2097 2098 if( (op == Op_Node && n->req() == 0) || // anti-dependence node OR
2098 2099 (op != Op_Node && // Not an unused antidepedence node and
2099 2100 // not an unallocated boxlock
2100 2101 (OptoReg::is_valid(_regalloc->get_reg_first(n)) || op != Op_BoxLock)) ) {
2101 2102
2102 2103 // Push any trailing projections
2103 2104 if( bb->_nodes[bb->_nodes.size()-1] != n ) {
2104 2105 for (DUIterator_Fast imax, i = n->fast_outs(imax); i < imax; i++) {
2105 2106 Node *foi = n->fast_out(i);
2106 2107 if( foi->is_Proj() )
2107 2108 _scheduled.push(foi);
2108 2109 }
2109 2110 }
2110 2111
2111 2112 // Put the instruction in the schedule list
2112 2113 _scheduled.push(n);
2113 2114 }
2114 2115
2115 2116 #ifndef PRODUCT
2116 2117 if (_cfg->C->trace_opto_output())
2117 2118 dump_available();
2118 2119 #endif
2119 2120
2120 2121 // Walk all the definitions, decrementing use counts, and
2121 2122 // if a definition has a 0 use count, place it in the available list.
2122 2123 DecrementUseCounts(n,bb);
2123 2124 }
2124 2125
2125 2126 //------------------------------ComputeUseCount--------------------------------
2126 2127 // This method sets the use count within a basic block. We will ignore all
2127 2128 // uses outside the current basic block. As we are doing a backwards walk,
2128 2129 // any node we reach that has a use count of 0 may be scheduled. This also
2129 2130 // avoids the problem of cyclic references from phi nodes, as long as phi
2130 2131 // nodes are at the front of the basic block. This method also initializes
2131 2132 // the available list to the set of instructions that have no uses within this
2132 2133 // basic block.
2133 2134 void Scheduling::ComputeUseCount(const Block *bb) {
2134 2135 #ifndef PRODUCT
2135 2136 if (_cfg->C->trace_opto_output())
2136 2137 tty->print("# -> ComputeUseCount\n");
2137 2138 #endif
2138 2139
2139 2140 // Clear the list of available and scheduled instructions, just in case
2140 2141 _available.clear();
2141 2142 _scheduled.clear();
2142 2143
2143 2144 // No delay slot specified
2144 2145 _unconditional_delay_slot = NULL;
2145 2146
2146 2147 #ifdef ASSERT
2147 2148 for( uint i=0; i < bb->_nodes.size(); i++ )
2148 2149 assert( _uses[bb->_nodes[i]->_idx] == 0, "_use array not clean" );
2149 2150 #endif
2150 2151
2151 2152 // Force the _uses count to never go to zero for unscheduable pieces
2152 2153 // of the block
2153 2154 for( uint k = 0; k < _bb_start; k++ )
2154 2155 _uses[bb->_nodes[k]->_idx] = 1;
2155 2156 for( uint l = _bb_end; l < bb->_nodes.size(); l++ )
2156 2157 _uses[bb->_nodes[l]->_idx] = 1;
2157 2158
2158 2159 // Iterate backwards over the instructions in the block. Don't count the
2159 2160 // branch projections at end or the block header instructions.
2160 2161 for( uint j = _bb_end-1; j >= _bb_start; j-- ) {
2161 2162 Node *n = bb->_nodes[j];
2162 2163 if( n->is_Proj() ) continue; // Projections handled another way
2163 2164
2164 2165 // Account for all uses
2165 2166 for ( uint k = 0; k < n->len(); k++ ) {
2166 2167 Node *inp = n->in(k);
2167 2168 if (!inp) continue;
2168 2169 assert(inp != n, "no cycles allowed" );
2169 2170 if( _bbs[inp->_idx] == bb ) { // Block-local use?
2170 2171 if( inp->is_Proj() ) // Skip through Proj's
2171 2172 inp = inp->in(0);
2172 2173 ++_uses[inp->_idx]; // Count 1 block-local use
2173 2174 }
2174 2175 }
2175 2176
2176 2177 // If this instruction has a 0 use count, then it is available
2177 2178 if (!_uses[n->_idx]) {
2178 2179 _current_latency[n->_idx] = _bundle_cycle_number;
2179 2180 AddNodeToAvailableList(n);
2180 2181 }
2181 2182
2182 2183 #ifndef PRODUCT
2183 2184 if (_cfg->C->trace_opto_output()) {
2184 2185 tty->print("# uses: %3d: ", _uses[n->_idx]);
2185 2186 n->dump();
2186 2187 }
2187 2188 #endif
2188 2189 }
2189 2190
2190 2191 #ifndef PRODUCT
2191 2192 if (_cfg->C->trace_opto_output())
2192 2193 tty->print("# <- ComputeUseCount\n");
2193 2194 #endif
2194 2195 }
2195 2196
2196 2197 // This routine performs scheduling on each basic block in reverse order,
2197 2198 // using instruction latencies and taking into account function unit
2198 2199 // availability.
2199 2200 void Scheduling::DoScheduling() {
2200 2201 #ifndef PRODUCT
2201 2202 if (_cfg->C->trace_opto_output())
2202 2203 tty->print("# -> DoScheduling\n");
2203 2204 #endif
2204 2205
2205 2206 Block *succ_bb = NULL;
2206 2207 Block *bb;
2207 2208
2208 2209 // Walk over all the basic blocks in reverse order
2209 2210 for( int i=_cfg->_num_blocks-1; i >= 0; succ_bb = bb, i-- ) {
2210 2211 bb = _cfg->_blocks[i];
2211 2212
2212 2213 #ifndef PRODUCT
2213 2214 if (_cfg->C->trace_opto_output()) {
2214 2215 tty->print("# Schedule BB#%03d (initial)\n", i);
2215 2216 for (uint j = 0; j < bb->_nodes.size(); j++)
2216 2217 bb->_nodes[j]->dump();
2217 2218 }
2218 2219 #endif
2219 2220
2220 2221 // On the head node, skip processing
2221 2222 if( bb == _cfg->_broot )
2222 2223 continue;
2223 2224
2224 2225 // Skip empty, connector blocks
2225 2226 if (bb->is_connector())
2226 2227 continue;
2227 2228
2228 2229 // If the following block is not the sole successor of
2229 2230 // this one, then reset the pipeline information
2230 2231 if (bb->_num_succs != 1 || bb->non_connector_successor(0) != succ_bb) {
2231 2232 #ifndef PRODUCT
2232 2233 if (_cfg->C->trace_opto_output()) {
2233 2234 tty->print("*** bundle start of next BB, node %d, for %d instructions\n",
2234 2235 _next_node->_idx, _bundle_instr_count);
2235 2236 }
2236 2237 #endif
2237 2238 step_and_clear();
2238 2239 }
2239 2240
2240 2241 // Leave untouched the starting instruction, any Phis, a CreateEx node
2241 2242 // or Top. bb->_nodes[_bb_start] is the first schedulable instruction.
2242 2243 _bb_end = bb->_nodes.size()-1;
2243 2244 for( _bb_start=1; _bb_start <= _bb_end; _bb_start++ ) {
2244 2245 Node *n = bb->_nodes[_bb_start];
2245 2246 // Things not matched, like Phinodes and ProjNodes don't get scheduled.
2246 2247 // Also, MachIdealNodes do not get scheduled
2247 2248 if( !n->is_Mach() ) continue; // Skip non-machine nodes
2248 2249 MachNode *mach = n->as_Mach();
2249 2250 int iop = mach->ideal_Opcode();
2250 2251 if( iop == Op_CreateEx ) continue; // CreateEx is pinned
2251 2252 if( iop == Op_Con ) continue; // Do not schedule Top
2252 2253 if( iop == Op_Node && // Do not schedule PhiNodes, ProjNodes
2253 2254 mach->pipeline() == MachNode::pipeline_class() &&
2254 2255 !n->is_SpillCopy() ) // Breakpoints, Prolog, etc
2255 2256 continue;
2256 2257 break; // Funny loop structure to be sure...
2257 2258 }
2258 2259 // Compute last "interesting" instruction in block - last instruction we
2259 2260 // might schedule. _bb_end points just after last schedulable inst. We
2260 2261 // normally schedule conditional branches (despite them being forced last
2261 2262 // in the block), because they have delay slots we can fill. Calls all
2262 2263 // have their delay slots filled in the template expansions, so we don't
2263 2264 // bother scheduling them.
2264 2265 Node *last = bb->_nodes[_bb_end];
2265 2266 if( last->is_Catch() ||
2266 2267 // Exclude unreachable path case when Halt node is in a separate block.
2267 2268 (_bb_end > 1 && last->is_Mach() && last->as_Mach()->ideal_Opcode() == Op_Halt) ) {
2268 2269 // There must be a prior call. Skip it.
2269 2270 while( !bb->_nodes[--_bb_end]->is_Call() ) {
2270 2271 assert( bb->_nodes[_bb_end]->is_Proj(), "skipping projections after expected call" );
2271 2272 }
2272 2273 } else if( last->is_MachNullCheck() ) {
2273 2274 // Backup so the last null-checked memory instruction is
2274 2275 // outside the schedulable range. Skip over the nullcheck,
2275 2276 // projection, and the memory nodes.
2276 2277 Node *mem = last->in(1);
2277 2278 do {
2278 2279 _bb_end--;
2279 2280 } while (mem != bb->_nodes[_bb_end]);
2280 2281 } else {
2281 2282 // Set _bb_end to point after last schedulable inst.
2282 2283 _bb_end++;
2283 2284 }
2284 2285
2285 2286 assert( _bb_start <= _bb_end, "inverted block ends" );
2286 2287
2287 2288 // Compute the register antidependencies for the basic block
2288 2289 ComputeRegisterAntidependencies(bb);
2289 2290 if (_cfg->C->failing()) return; // too many D-U pinch points
2290 2291
2291 2292 // Compute intra-bb latencies for the nodes
2292 2293 ComputeLocalLatenciesForward(bb);
2293 2294
2294 2295 // Compute the usage within the block, and set the list of all nodes
2295 2296 // in the block that have no uses within the block.
2296 2297 ComputeUseCount(bb);
2297 2298
2298 2299 // Schedule the remaining instructions in the block
2299 2300 while ( _available.size() > 0 ) {
2300 2301 Node *n = ChooseNodeToBundle();
2301 2302 AddNodeToBundle(n,bb);
2302 2303 }
2303 2304
2304 2305 assert( _scheduled.size() == _bb_end - _bb_start, "wrong number of instructions" );
2305 2306 #ifdef ASSERT
2306 2307 for( uint l = _bb_start; l < _bb_end; l++ ) {
2307 2308 Node *n = bb->_nodes[l];
2308 2309 uint m;
2309 2310 for( m = 0; m < _bb_end-_bb_start; m++ )
2310 2311 if( _scheduled[m] == n )
2311 2312 break;
2312 2313 assert( m < _bb_end-_bb_start, "instruction missing in schedule" );
2313 2314 }
2314 2315 #endif
2315 2316
2316 2317 // Now copy the instructions (in reverse order) back to the block
2317 2318 for ( uint k = _bb_start; k < _bb_end; k++ )
2318 2319 bb->_nodes.map(k, _scheduled[_bb_end-k-1]);
2319 2320
2320 2321 #ifndef PRODUCT
2321 2322 if (_cfg->C->trace_opto_output()) {
2322 2323 tty->print("# Schedule BB#%03d (final)\n", i);
2323 2324 uint current = 0;
2324 2325 for (uint j = 0; j < bb->_nodes.size(); j++) {
2325 2326 Node *n = bb->_nodes[j];
2326 2327 if( valid_bundle_info(n) ) {
2327 2328 Bundle *bundle = node_bundling(n);
2328 2329 if (bundle->instr_count() > 0 || bundle->flags() > 0) {
2329 2330 tty->print("*** Bundle: ");
2330 2331 bundle->dump();
2331 2332 }
2332 2333 n->dump();
2333 2334 }
2334 2335 }
2335 2336 }
2336 2337 #endif
2337 2338 #ifdef ASSERT
2338 2339 verify_good_schedule(bb,"after block local scheduling");
2339 2340 #endif
2340 2341 }
2341 2342
2342 2343 #ifndef PRODUCT
2343 2344 if (_cfg->C->trace_opto_output())
2344 2345 tty->print("# <- DoScheduling\n");
2345 2346 #endif
2346 2347
2347 2348 // Record final node-bundling array location
2348 2349 _regalloc->C->set_node_bundling_base(_node_bundling_base);
2349 2350
2350 2351 } // end DoScheduling
2351 2352
2352 2353 //------------------------------verify_good_schedule---------------------------
2353 2354 // Verify that no live-range used in the block is killed in the block by a
2354 2355 // wrong DEF. This doesn't verify live-ranges that span blocks.
2355 2356
2356 2357 // Check for edge existence. Used to avoid adding redundant precedence edges.
2357 2358 static bool edge_from_to( Node *from, Node *to ) {
2358 2359 for( uint i=0; i<from->len(); i++ )
2359 2360 if( from->in(i) == to )
2360 2361 return true;
2361 2362 return false;
2362 2363 }
2363 2364
2364 2365 #ifdef ASSERT
2365 2366 //------------------------------verify_do_def----------------------------------
2366 2367 void Scheduling::verify_do_def( Node *n, OptoReg::Name def, const char *msg ) {
2367 2368 // Check for bad kills
2368 2369 if( OptoReg::is_valid(def) ) { // Ignore stores & control flow
2369 2370 Node *prior_use = _reg_node[def];
2370 2371 if( prior_use && !edge_from_to(prior_use,n) ) {
2371 2372 tty->print("%s = ",OptoReg::as_VMReg(def)->name());
2372 2373 n->dump();
2373 2374 tty->print_cr("...");
2374 2375 prior_use->dump();
2375 2376 assert_msg(edge_from_to(prior_use,n),msg);
2376 2377 }
2377 2378 _reg_node.map(def,NULL); // Kill live USEs
2378 2379 }
2379 2380 }
2380 2381
2381 2382 //------------------------------verify_good_schedule---------------------------
2382 2383 void Scheduling::verify_good_schedule( Block *b, const char *msg ) {
2383 2384
2384 2385 // Zap to something reasonable for the verify code
2385 2386 _reg_node.clear();
2386 2387
2387 2388 // Walk over the block backwards. Check to make sure each DEF doesn't
2388 2389 // kill a live value (other than the one it's supposed to). Add each
2389 2390 // USE to the live set.
2390 2391 for( uint i = b->_nodes.size()-1; i >= _bb_start; i-- ) {
2391 2392 Node *n = b->_nodes[i];
2392 2393 int n_op = n->Opcode();
2393 2394 if( n_op == Op_MachProj && n->ideal_reg() == MachProjNode::fat_proj ) {
2394 2395 // Fat-proj kills a slew of registers
2395 2396 RegMask rm = n->out_RegMask();// Make local copy
2396 2397 while( rm.is_NotEmpty() ) {
2397 2398 OptoReg::Name kill = rm.find_first_elem();
2398 2399 rm.Remove(kill);
2399 2400 verify_do_def( n, kill, msg );
2400 2401 }
2401 2402 } else if( n_op != Op_Node ) { // Avoid brand new antidependence nodes
2402 2403 // Get DEF'd registers the normal way
2403 2404 verify_do_def( n, _regalloc->get_reg_first(n), msg );
2404 2405 verify_do_def( n, _regalloc->get_reg_second(n), msg );
2405 2406 }
2406 2407
2407 2408 // Now make all USEs live
2408 2409 for( uint i=1; i<n->req(); i++ ) {
2409 2410 Node *def = n->in(i);
2410 2411 assert(def != 0, "input edge required");
2411 2412 OptoReg::Name reg_lo = _regalloc->get_reg_first(def);
2412 2413 OptoReg::Name reg_hi = _regalloc->get_reg_second(def);
2413 2414 if( OptoReg::is_valid(reg_lo) ) {
2414 2415 assert_msg(!_reg_node[reg_lo] || edge_from_to(_reg_node[reg_lo],def), msg );
2415 2416 _reg_node.map(reg_lo,n);
2416 2417 }
2417 2418 if( OptoReg::is_valid(reg_hi) ) {
2418 2419 assert_msg(!_reg_node[reg_hi] || edge_from_to(_reg_node[reg_hi],def), msg );
2419 2420 _reg_node.map(reg_hi,n);
2420 2421 }
2421 2422 }
2422 2423
2423 2424 }
2424 2425
2425 2426 // Zap to something reasonable for the Antidependence code
2426 2427 _reg_node.clear();
2427 2428 }
2428 2429 #endif
2429 2430
2430 2431 // Conditionally add precedence edges. Avoid putting edges on Projs.
2431 2432 static void add_prec_edge_from_to( Node *from, Node *to ) {
2432 2433 if( from->is_Proj() ) { // Put precedence edge on Proj's input
2433 2434 assert( from->req() == 1 && (from->len() == 1 || from->in(1)==0), "no precedence edges on projections" );
2434 2435 from = from->in(0);
2435 2436 }
2436 2437 if( from != to && // No cycles (for things like LD L0,[L0+4] )
2437 2438 !edge_from_to( from, to ) ) // Avoid duplicate edge
2438 2439 from->add_prec(to);
2439 2440 }
2440 2441
2441 2442 //------------------------------anti_do_def------------------------------------
2442 2443 void Scheduling::anti_do_def( Block *b, Node *def, OptoReg::Name def_reg, int is_def ) {
2443 2444 if( !OptoReg::is_valid(def_reg) ) // Ignore stores & control flow
2444 2445 return;
2445 2446
2446 2447 Node *pinch = _reg_node[def_reg]; // Get pinch point
2447 2448 if( !pinch || _bbs[pinch->_idx] != b || // No pinch-point yet?
2448 2449 is_def ) { // Check for a true def (not a kill)
2449 2450 _reg_node.map(def_reg,def); // Record def/kill as the optimistic pinch-point
2450 2451 return;
2451 2452 }
2452 2453
2453 2454 Node *kill = def; // Rename 'def' to more descriptive 'kill'
2454 2455 debug_only( def = (Node*)0xdeadbeef; )
2455 2456
2456 2457 // After some number of kills there _may_ be a later def
2457 2458 Node *later_def = NULL;
2458 2459
2459 2460 // Finding a kill requires a real pinch-point.
2460 2461 // Check for not already having a pinch-point.
2461 2462 // Pinch points are Op_Node's.
2462 2463 if( pinch->Opcode() != Op_Node ) { // Or later-def/kill as pinch-point?
2463 2464 later_def = pinch; // Must be def/kill as optimistic pinch-point
2464 2465 if ( _pinch_free_list.size() > 0) {
2465 2466 pinch = _pinch_free_list.pop();
2466 2467 } else {
2467 2468 pinch = new (_cfg->C, 1) Node(1); // Pinch point to-be
2468 2469 }
2469 2470 if (pinch->_idx >= _regalloc->node_regs_max_index()) {
2470 2471 _cfg->C->record_method_not_compilable("too many D-U pinch points");
2471 2472 return;
2472 2473 }
2473 2474 _bbs.map(pinch->_idx,b); // Pretend it's valid in this block (lazy init)
2474 2475 _reg_node.map(def_reg,pinch); // Record pinch-point
2475 2476 //_regalloc->set_bad(pinch->_idx); // Already initialized this way.
2476 2477 if( later_def->outcnt() == 0 || later_def->ideal_reg() == MachProjNode::fat_proj ) { // Distinguish def from kill
2477 2478 pinch->init_req(0, _cfg->C->top()); // set not NULL for the next call
2478 2479 add_prec_edge_from_to(later_def,pinch); // Add edge from kill to pinch
2479 2480 later_def = NULL; // and no later def
2480 2481 }
2481 2482 pinch->set_req(0,later_def); // Hook later def so we can find it
2482 2483 } else { // Else have valid pinch point
2483 2484 if( pinch->in(0) ) // If there is a later-def
2484 2485 later_def = pinch->in(0); // Get it
2485 2486 }
2486 2487
2487 2488 // Add output-dependence edge from later def to kill
2488 2489 if( later_def ) // If there is some original def
2489 2490 add_prec_edge_from_to(later_def,kill); // Add edge from def to kill
2490 2491
2491 2492 // See if current kill is also a use, and so is forced to be the pinch-point.
2492 2493 if( pinch->Opcode() == Op_Node ) {
2493 2494 Node *uses = kill->is_Proj() ? kill->in(0) : kill;
2494 2495 for( uint i=1; i<uses->req(); i++ ) {
2495 2496 if( _regalloc->get_reg_first(uses->in(i)) == def_reg ||
2496 2497 _regalloc->get_reg_second(uses->in(i)) == def_reg ) {
2497 2498 // Yes, found a use/kill pinch-point
2498 2499 pinch->set_req(0,NULL); //
2499 2500 pinch->replace_by(kill); // Move anti-dep edges up
2500 2501 pinch = kill;
2501 2502 _reg_node.map(def_reg,pinch);
2502 2503 return;
2503 2504 }
2504 2505 }
2505 2506 }
2506 2507
2507 2508 // Add edge from kill to pinch-point
2508 2509 add_prec_edge_from_to(kill,pinch);
2509 2510 }
2510 2511
2511 2512 //------------------------------anti_do_use------------------------------------
2512 2513 void Scheduling::anti_do_use( Block *b, Node *use, OptoReg::Name use_reg ) {
2513 2514 if( !OptoReg::is_valid(use_reg) ) // Ignore stores & control flow
2514 2515 return;
2515 2516 Node *pinch = _reg_node[use_reg]; // Get pinch point
2516 2517 // Check for no later def_reg/kill in block
2517 2518 if( pinch && _bbs[pinch->_idx] == b &&
2518 2519 // Use has to be block-local as well
2519 2520 _bbs[use->_idx] == b ) {
2520 2521 if( pinch->Opcode() == Op_Node && // Real pinch-point (not optimistic?)
2521 2522 pinch->req() == 1 ) { // pinch not yet in block?
2522 2523 pinch->del_req(0); // yank pointer to later-def, also set flag
2523 2524 // Insert the pinch-point in the block just after the last use
2524 2525 b->_nodes.insert(b->find_node(use)+1,pinch);
2525 2526 _bb_end++; // Increase size scheduled region in block
2526 2527 }
2527 2528
2528 2529 add_prec_edge_from_to(pinch,use);
2529 2530 }
2530 2531 }
2531 2532
2532 2533 //------------------------------ComputeRegisterAntidependences-----------------
2533 2534 // We insert antidependences between the reads and following write of
2534 2535 // allocated registers to prevent illegal code motion. Hopefully, the
2535 2536 // number of added references should be fairly small, especially as we
2536 2537 // are only adding references within the current basic block.
2537 2538 void Scheduling::ComputeRegisterAntidependencies(Block *b) {
2538 2539
2539 2540 #ifdef ASSERT
2540 2541 verify_good_schedule(b,"before block local scheduling");
2541 2542 #endif
2542 2543
2543 2544 // A valid schedule, for each register independently, is an endless cycle
2544 2545 // of: a def, then some uses (connected to the def by true dependencies),
2545 2546 // then some kills (defs with no uses), finally the cycle repeats with a new
2546 2547 // def. The uses are allowed to float relative to each other, as are the
2547 2548 // kills. No use is allowed to slide past a kill (or def). This requires
2548 2549 // antidependencies between all uses of a single def and all kills that
2549 2550 // follow, up to the next def. More edges are redundant, because later defs
2550 2551 // & kills are already serialized with true or antidependencies. To keep
2551 2552 // the edge count down, we add a 'pinch point' node if there's more than
2552 2553 // one use or more than one kill/def.
2553 2554
2554 2555 // We add dependencies in one bottom-up pass.
2555 2556
2556 2557 // For each instruction we handle it's DEFs/KILLs, then it's USEs.
2557 2558
2558 2559 // For each DEF/KILL, we check to see if there's a prior DEF/KILL for this
2559 2560 // register. If not, we record the DEF/KILL in _reg_node, the
2560 2561 // register-to-def mapping. If there is a prior DEF/KILL, we insert a
2561 2562 // "pinch point", a new Node that's in the graph but not in the block.
2562 2563 // We put edges from the prior and current DEF/KILLs to the pinch point.
2563 2564 // We put the pinch point in _reg_node. If there's already a pinch point
2564 2565 // we merely add an edge from the current DEF/KILL to the pinch point.
2565 2566
2566 2567 // After doing the DEF/KILLs, we handle USEs. For each used register, we
2567 2568 // put an edge from the pinch point to the USE.
2568 2569
2569 2570 // To be expedient, the _reg_node array is pre-allocated for the whole
2570 2571 // compilation. _reg_node is lazily initialized; it either contains a NULL,
2571 2572 // or a valid def/kill/pinch-point, or a leftover node from some prior
2572 2573 // block. Leftover node from some prior block is treated like a NULL (no
2573 2574 // prior def, so no anti-dependence needed). Valid def is distinguished by
2574 2575 // it being in the current block.
2575 2576 bool fat_proj_seen = false;
2576 2577 uint last_safept = _bb_end-1;
2577 2578 Node* end_node = (_bb_end-1 >= _bb_start) ? b->_nodes[last_safept] : NULL;
2578 2579 Node* last_safept_node = end_node;
2579 2580 for( uint i = _bb_end-1; i >= _bb_start; i-- ) {
2580 2581 Node *n = b->_nodes[i];
2581 2582 int is_def = n->outcnt(); // def if some uses prior to adding precedence edges
2582 2583 if( n->Opcode() == Op_MachProj && n->ideal_reg() == MachProjNode::fat_proj ) {
2583 2584 // Fat-proj kills a slew of registers
2584 2585 // This can add edges to 'n' and obscure whether or not it was a def,
2585 2586 // hence the is_def flag.
2586 2587 fat_proj_seen = true;
2587 2588 RegMask rm = n->out_RegMask();// Make local copy
2588 2589 while( rm.is_NotEmpty() ) {
2589 2590 OptoReg::Name kill = rm.find_first_elem();
2590 2591 rm.Remove(kill);
2591 2592 anti_do_def( b, n, kill, is_def );
2592 2593 }
2593 2594 } else {
2594 2595 // Get DEF'd registers the normal way
2595 2596 anti_do_def( b, n, _regalloc->get_reg_first(n), is_def );
2596 2597 anti_do_def( b, n, _regalloc->get_reg_second(n), is_def );
2597 2598 }
2598 2599
2599 2600 // Check each register used by this instruction for a following DEF/KILL
2600 2601 // that must occur afterward and requires an anti-dependence edge.
2601 2602 for( uint j=0; j<n->req(); j++ ) {
2602 2603 Node *def = n->in(j);
2603 2604 if( def ) {
2604 2605 assert( def->Opcode() != Op_MachProj || def->ideal_reg() != MachProjNode::fat_proj, "" );
2605 2606 anti_do_use( b, n, _regalloc->get_reg_first(def) );
2606 2607 anti_do_use( b, n, _regalloc->get_reg_second(def) );
2607 2608 }
2608 2609 }
2609 2610 // Do not allow defs of new derived values to float above GC
2610 2611 // points unless the base is definitely available at the GC point.
2611 2612
2612 2613 Node *m = b->_nodes[i];
2613 2614
2614 2615 // Add precedence edge from following safepoint to use of derived pointer
2615 2616 if( last_safept_node != end_node &&
2616 2617 m != last_safept_node) {
2617 2618 for (uint k = 1; k < m->req(); k++) {
2618 2619 const Type *t = m->in(k)->bottom_type();
2619 2620 if( t->isa_oop_ptr() &&
2620 2621 t->is_ptr()->offset() != 0 ) {
2621 2622 last_safept_node->add_prec( m );
2622 2623 break;
2623 2624 }
2624 2625 }
2625 2626 }
2626 2627
2627 2628 if( n->jvms() ) { // Precedence edge from derived to safept
2628 2629 // Check if last_safept_node was moved by pinch-point insertion in anti_do_use()
2629 2630 if( b->_nodes[last_safept] != last_safept_node ) {
2630 2631 last_safept = b->find_node(last_safept_node);
2631 2632 }
2632 2633 for( uint j=last_safept; j > i; j-- ) {
2633 2634 Node *mach = b->_nodes[j];
2634 2635 if( mach->is_Mach() && mach->as_Mach()->ideal_Opcode() == Op_AddP )
2635 2636 mach->add_prec( n );
2636 2637 }
2637 2638 last_safept = i;
2638 2639 last_safept_node = m;
2639 2640 }
2640 2641 }
2641 2642
2642 2643 if (fat_proj_seen) {
2643 2644 // Garbage collect pinch nodes that were not consumed.
2644 2645 // They are usually created by a fat kill MachProj for a call.
2645 2646 garbage_collect_pinch_nodes();
2646 2647 }
2647 2648 }
2648 2649
2649 2650 //------------------------------garbage_collect_pinch_nodes-------------------------------
2650 2651
2651 2652 // Garbage collect pinch nodes for reuse by other blocks.
2652 2653 //
2653 2654 // The block scheduler's insertion of anti-dependence
2654 2655 // edges creates many pinch nodes when the block contains
2655 2656 // 2 or more Calls. A pinch node is used to prevent a
2656 2657 // combinatorial explosion of edges. If a set of kills for a
2657 2658 // register is anti-dependent on a set of uses (or defs), rather
2658 2659 // than adding an edge in the graph between each pair of kill
2659 2660 // and use (or def), a pinch is inserted between them:
2660 2661 //
2661 2662 // use1 use2 use3
2662 2663 // \ | /
2663 2664 // \ | /
2664 2665 // pinch
2665 2666 // / | \
2666 2667 // / | \
2667 2668 // kill1 kill2 kill3
2668 2669 //
2669 2670 // One pinch node is created per register killed when
2670 2671 // the second call is encountered during a backwards pass
2671 2672 // over the block. Most of these pinch nodes are never
2672 2673 // wired into the graph because the register is never
2673 2674 // used or def'ed in the block.
2674 2675 //
2675 2676 void Scheduling::garbage_collect_pinch_nodes() {
2676 2677 #ifndef PRODUCT
2677 2678 if (_cfg->C->trace_opto_output()) tty->print("Reclaimed pinch nodes:");
2678 2679 #endif
2679 2680 int trace_cnt = 0;
2680 2681 for (uint k = 0; k < _reg_node.Size(); k++) {
2681 2682 Node* pinch = _reg_node[k];
2682 2683 if (pinch != NULL && pinch->Opcode() == Op_Node &&
2683 2684 // no predecence input edges
2684 2685 (pinch->req() == pinch->len() || pinch->in(pinch->req()) == NULL) ) {
2685 2686 cleanup_pinch(pinch);
2686 2687 _pinch_free_list.push(pinch);
2687 2688 _reg_node.map(k, NULL);
2688 2689 #ifndef PRODUCT
2689 2690 if (_cfg->C->trace_opto_output()) {
2690 2691 trace_cnt++;
2691 2692 if (trace_cnt > 40) {
2692 2693 tty->print("\n");
2693 2694 trace_cnt = 0;
2694 2695 }
2695 2696 tty->print(" %d", pinch->_idx);
2696 2697 }
2697 2698 #endif
2698 2699 }
2699 2700 }
2700 2701 #ifndef PRODUCT
2701 2702 if (_cfg->C->trace_opto_output()) tty->print("\n");
2702 2703 #endif
2703 2704 }
2704 2705
2705 2706 // Clean up a pinch node for reuse.
2706 2707 void Scheduling::cleanup_pinch( Node *pinch ) {
2707 2708 assert (pinch && pinch->Opcode() == Op_Node && pinch->req() == 1, "just checking");
2708 2709
2709 2710 for (DUIterator_Last imin, i = pinch->last_outs(imin); i >= imin; ) {
2710 2711 Node* use = pinch->last_out(i);
2711 2712 uint uses_found = 0;
2712 2713 for (uint j = use->req(); j < use->len(); j++) {
2713 2714 if (use->in(j) == pinch) {
2714 2715 use->rm_prec(j);
2715 2716 uses_found++;
2716 2717 }
2717 2718 }
2718 2719 assert(uses_found > 0, "must be a precedence edge");
2719 2720 i -= uses_found; // we deleted 1 or more copies of this edge
2720 2721 }
2721 2722 // May have a later_def entry
2722 2723 pinch->set_req(0, NULL);
2723 2724 }
2724 2725
2725 2726 //------------------------------print_statistics-------------------------------
2726 2727 #ifndef PRODUCT
2727 2728
2728 2729 void Scheduling::dump_available() const {
2729 2730 tty->print("#Availist ");
2730 2731 for (uint i = 0; i < _available.size(); i++)
2731 2732 tty->print(" N%d/l%d", _available[i]->_idx,_current_latency[_available[i]->_idx]);
2732 2733 tty->cr();
2733 2734 }
2734 2735
2735 2736 // Print Scheduling Statistics
2736 2737 void Scheduling::print_statistics() {
2737 2738 // Print the size added by nops for bundling
2738 2739 tty->print("Nops added %d bytes to total of %d bytes",
2739 2740 _total_nop_size, _total_method_size);
2740 2741 if (_total_method_size > 0)
2741 2742 tty->print(", for %.2f%%",
2742 2743 ((double)_total_nop_size) / ((double) _total_method_size) * 100.0);
2743 2744 tty->print("\n");
2744 2745
2745 2746 // Print the number of branch shadows filled
2746 2747 if (Pipeline::_branch_has_delay_slot) {
2747 2748 tty->print("Of %d branches, %d had unconditional delay slots filled",
2748 2749 _total_branches, _total_unconditional_delays);
2749 2750 if (_total_branches > 0)
2750 2751 tty->print(", for %.2f%%",
2751 2752 ((double)_total_unconditional_delays) / ((double)_total_branches) * 100.0);
2752 2753 tty->print("\n");
2753 2754 }
2754 2755
2755 2756 uint total_instructions = 0, total_bundles = 0;
2756 2757
2757 2758 for (uint i = 1; i <= Pipeline::_max_instrs_per_cycle; i++) {
2758 2759 uint bundle_count = _total_instructions_per_bundle[i];
2759 2760 total_instructions += bundle_count * i;
2760 2761 total_bundles += bundle_count;
2761 2762 }
2762 2763
2763 2764 if (total_bundles > 0)
2764 2765 tty->print("Average ILP (excluding nops) is %.2f\n",
2765 2766 ((double)total_instructions) / ((double)total_bundles));
2766 2767 }
2767 2768 #endif
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