rev 1081 : imported patch indy-cleanup-6893081.patch

   1 /*
   2  * Copyright 2003-2009 Sun Microsystems, Inc.  All Rights Reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
  20  * CA 95054 USA or visit www.sun.com if you need additional information or
  21  * have any questions.
  22  *
  23  */
  24 
  25 #include "incls/_precompiled.incl"
  26 #include "incls/_sharedRuntime_x86_64.cpp.incl"
  27 
  28 DeoptimizationBlob *SharedRuntime::_deopt_blob;
  29 #ifdef COMPILER2
  30 UncommonTrapBlob   *SharedRuntime::_uncommon_trap_blob;
  31 ExceptionBlob      *OptoRuntime::_exception_blob;
  32 #endif // COMPILER2
  33 
  34 SafepointBlob      *SharedRuntime::_polling_page_safepoint_handler_blob;
  35 SafepointBlob      *SharedRuntime::_polling_page_return_handler_blob;
  36 RuntimeStub*       SharedRuntime::_wrong_method_blob;
  37 RuntimeStub*       SharedRuntime::_ic_miss_blob;
  38 RuntimeStub*       SharedRuntime::_resolve_opt_virtual_call_blob;
  39 RuntimeStub*       SharedRuntime::_resolve_virtual_call_blob;
  40 RuntimeStub*       SharedRuntime::_resolve_static_call_blob;
  41 
  42 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size;
  43 
  44 #define __ masm->
  45 
  46 class SimpleRuntimeFrame {
  47 
  48   public:
  49 
  50   // Most of the runtime stubs have this simple frame layout.
  51   // This class exists to make the layout shared in one place.
  52   // Offsets are for compiler stack slots, which are jints.
  53   enum layout {
  54     // The frame sender code expects that rbp will be in the "natural" place and
  55     // will override any oopMap setting for it. We must therefore force the layout
  56     // so that it agrees with the frame sender code.
  57     rbp_off = frame::arg_reg_save_area_bytes/BytesPerInt,
  58     rbp_off2,
  59     return_off, return_off2,
  60     framesize
  61   };
  62 };
  63 
  64 class RegisterSaver {
  65   // Capture info about frame layout.  Layout offsets are in jint
  66   // units because compiler frame slots are jints.
  67 #define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off
  68   enum layout {
  69     fpu_state_off = frame::arg_reg_save_area_bytes/BytesPerInt, // fxsave save area
  70     xmm_off       = fpu_state_off + 160/BytesPerInt,            // offset in fxsave save area
  71     DEF_XMM_OFFS(0),
  72     DEF_XMM_OFFS(1),
  73     DEF_XMM_OFFS(2),
  74     DEF_XMM_OFFS(3),
  75     DEF_XMM_OFFS(4),
  76     DEF_XMM_OFFS(5),
  77     DEF_XMM_OFFS(6),
  78     DEF_XMM_OFFS(7),
  79     DEF_XMM_OFFS(8),
  80     DEF_XMM_OFFS(9),
  81     DEF_XMM_OFFS(10),
  82     DEF_XMM_OFFS(11),
  83     DEF_XMM_OFFS(12),
  84     DEF_XMM_OFFS(13),
  85     DEF_XMM_OFFS(14),
  86     DEF_XMM_OFFS(15),
  87     fpu_state_end = fpu_state_off + ((FPUStateSizeInWords-1)*wordSize / BytesPerInt),
  88     fpu_stateH_end,
  89     r15_off, r15H_off,
  90     r14_off, r14H_off,
  91     r13_off, r13H_off,
  92     r12_off, r12H_off,
  93     r11_off, r11H_off,
  94     r10_off, r10H_off,
  95     r9_off,  r9H_off,
  96     r8_off,  r8H_off,
  97     rdi_off, rdiH_off,
  98     rsi_off, rsiH_off,
  99     ignore_off, ignoreH_off,  // extra copy of rbp
 100     rsp_off, rspH_off,
 101     rbx_off, rbxH_off,
 102     rdx_off, rdxH_off,
 103     rcx_off, rcxH_off,
 104     rax_off, raxH_off,
 105     // 16-byte stack alignment fill word: see MacroAssembler::push/pop_IU_state
 106     align_off, alignH_off,
 107     flags_off, flagsH_off,
 108     // The frame sender code expects that rbp will be in the "natural" place and
 109     // will override any oopMap setting for it. We must therefore force the layout
 110     // so that it agrees with the frame sender code.
 111     rbp_off, rbpH_off,        // copy of rbp we will restore
 112     return_off, returnH_off,  // slot for return address
 113     reg_save_size             // size in compiler stack slots
 114   };
 115 
 116  public:
 117   static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words);
 118   static void restore_live_registers(MacroAssembler* masm);
 119 
 120   // Offsets into the register save area
 121   // Used by deoptimization when it is managing result register
 122   // values on its own
 123 
 124   static int rax_offset_in_bytes(void)    { return BytesPerInt * rax_off; }
 125   static int rdx_offset_in_bytes(void)    { return BytesPerInt * rdx_off; }
 126   static int rbx_offset_in_bytes(void)    { return BytesPerInt * rbx_off; }
 127   static int xmm0_offset_in_bytes(void)   { return BytesPerInt * xmm0_off; }
 128   static int return_offset_in_bytes(void) { return BytesPerInt * return_off; }
 129 
 130   // During deoptimization only the result registers need to be restored,
 131   // all the other values have already been extracted.
 132   static void restore_result_registers(MacroAssembler* masm);
 133 };
 134 
 135 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words) {
 136 
 137   // Always make the frame size 16-byte aligned
 138   int frame_size_in_bytes = round_to(additional_frame_words*wordSize +
 139                                      reg_save_size*BytesPerInt, 16);
 140   // OopMap frame size is in compiler stack slots (jint's) not bytes or words
 141   int frame_size_in_slots = frame_size_in_bytes / BytesPerInt;
 142   // The caller will allocate additional_frame_words
 143   int additional_frame_slots = additional_frame_words*wordSize / BytesPerInt;
 144   // CodeBlob frame size is in words.
 145   int frame_size_in_words = frame_size_in_bytes / wordSize;
 146   *total_frame_words = frame_size_in_words;
 147 
 148   // Save registers, fpu state, and flags.
 149   // We assume caller has already pushed the return address onto the
 150   // stack, so rsp is 8-byte aligned here.
 151   // We push rpb twice in this sequence because we want the real rbp
 152   // to be under the return like a normal enter.
 153 
 154   __ enter();          // rsp becomes 16-byte aligned here
 155   __ push_CPU_state(); // Push a multiple of 16 bytes
 156   if (frame::arg_reg_save_area_bytes != 0) {
 157     // Allocate argument register save area
 158     __ subptr(rsp, frame::arg_reg_save_area_bytes);
 159   }
 160 
 161   // Set an oopmap for the call site.  This oopmap will map all
 162   // oop-registers and debug-info registers as callee-saved.  This
 163   // will allow deoptimization at this safepoint to find all possible
 164   // debug-info recordings, as well as let GC find all oops.
 165 
 166   OopMapSet *oop_maps = new OopMapSet();
 167   OopMap* map = new OopMap(frame_size_in_slots, 0);
 168   map->set_callee_saved(VMRegImpl::stack2reg( rax_off  + additional_frame_slots), rax->as_VMReg());
 169   map->set_callee_saved(VMRegImpl::stack2reg( rcx_off  + additional_frame_slots), rcx->as_VMReg());
 170   map->set_callee_saved(VMRegImpl::stack2reg( rdx_off  + additional_frame_slots), rdx->as_VMReg());
 171   map->set_callee_saved(VMRegImpl::stack2reg( rbx_off  + additional_frame_slots), rbx->as_VMReg());
 172   // rbp location is known implicitly by the frame sender code, needs no oopmap
 173   // and the location where rbp was saved by is ignored
 174   map->set_callee_saved(VMRegImpl::stack2reg( rsi_off  + additional_frame_slots), rsi->as_VMReg());
 175   map->set_callee_saved(VMRegImpl::stack2reg( rdi_off  + additional_frame_slots), rdi->as_VMReg());
 176   map->set_callee_saved(VMRegImpl::stack2reg( r8_off   + additional_frame_slots), r8->as_VMReg());
 177   map->set_callee_saved(VMRegImpl::stack2reg( r9_off   + additional_frame_slots), r9->as_VMReg());
 178   map->set_callee_saved(VMRegImpl::stack2reg( r10_off  + additional_frame_slots), r10->as_VMReg());
 179   map->set_callee_saved(VMRegImpl::stack2reg( r11_off  + additional_frame_slots), r11->as_VMReg());
 180   map->set_callee_saved(VMRegImpl::stack2reg( r12_off  + additional_frame_slots), r12->as_VMReg());
 181   map->set_callee_saved(VMRegImpl::stack2reg( r13_off  + additional_frame_slots), r13->as_VMReg());
 182   map->set_callee_saved(VMRegImpl::stack2reg( r14_off  + additional_frame_slots), r14->as_VMReg());
 183   map->set_callee_saved(VMRegImpl::stack2reg( r15_off  + additional_frame_slots), r15->as_VMReg());
 184   map->set_callee_saved(VMRegImpl::stack2reg(xmm0_off  + additional_frame_slots), xmm0->as_VMReg());
 185   map->set_callee_saved(VMRegImpl::stack2reg(xmm1_off  + additional_frame_slots), xmm1->as_VMReg());
 186   map->set_callee_saved(VMRegImpl::stack2reg(xmm2_off  + additional_frame_slots), xmm2->as_VMReg());
 187   map->set_callee_saved(VMRegImpl::stack2reg(xmm3_off  + additional_frame_slots), xmm3->as_VMReg());
 188   map->set_callee_saved(VMRegImpl::stack2reg(xmm4_off  + additional_frame_slots), xmm4->as_VMReg());
 189   map->set_callee_saved(VMRegImpl::stack2reg(xmm5_off  + additional_frame_slots), xmm5->as_VMReg());
 190   map->set_callee_saved(VMRegImpl::stack2reg(xmm6_off  + additional_frame_slots), xmm6->as_VMReg());
 191   map->set_callee_saved(VMRegImpl::stack2reg(xmm7_off  + additional_frame_slots), xmm7->as_VMReg());
 192   map->set_callee_saved(VMRegImpl::stack2reg(xmm8_off  + additional_frame_slots), xmm8->as_VMReg());
 193   map->set_callee_saved(VMRegImpl::stack2reg(xmm9_off  + additional_frame_slots), xmm9->as_VMReg());
 194   map->set_callee_saved(VMRegImpl::stack2reg(xmm10_off + additional_frame_slots), xmm10->as_VMReg());
 195   map->set_callee_saved(VMRegImpl::stack2reg(xmm11_off + additional_frame_slots), xmm11->as_VMReg());
 196   map->set_callee_saved(VMRegImpl::stack2reg(xmm12_off + additional_frame_slots), xmm12->as_VMReg());
 197   map->set_callee_saved(VMRegImpl::stack2reg(xmm13_off + additional_frame_slots), xmm13->as_VMReg());
 198   map->set_callee_saved(VMRegImpl::stack2reg(xmm14_off + additional_frame_slots), xmm14->as_VMReg());
 199   map->set_callee_saved(VMRegImpl::stack2reg(xmm15_off + additional_frame_slots), xmm15->as_VMReg());
 200 
 201   // %%% These should all be a waste but we'll keep things as they were for now
 202   if (true) {
 203     map->set_callee_saved(VMRegImpl::stack2reg( raxH_off  + additional_frame_slots),
 204                           rax->as_VMReg()->next());
 205     map->set_callee_saved(VMRegImpl::stack2reg( rcxH_off  + additional_frame_slots),
 206                           rcx->as_VMReg()->next());
 207     map->set_callee_saved(VMRegImpl::stack2reg( rdxH_off  + additional_frame_slots),
 208                           rdx->as_VMReg()->next());
 209     map->set_callee_saved(VMRegImpl::stack2reg( rbxH_off  + additional_frame_slots),
 210                           rbx->as_VMReg()->next());
 211     // rbp location is known implicitly by the frame sender code, needs no oopmap
 212     map->set_callee_saved(VMRegImpl::stack2reg( rsiH_off  + additional_frame_slots),
 213                           rsi->as_VMReg()->next());
 214     map->set_callee_saved(VMRegImpl::stack2reg( rdiH_off  + additional_frame_slots),
 215                           rdi->as_VMReg()->next());
 216     map->set_callee_saved(VMRegImpl::stack2reg( r8H_off   + additional_frame_slots),
 217                           r8->as_VMReg()->next());
 218     map->set_callee_saved(VMRegImpl::stack2reg( r9H_off   + additional_frame_slots),
 219                           r9->as_VMReg()->next());
 220     map->set_callee_saved(VMRegImpl::stack2reg( r10H_off  + additional_frame_slots),
 221                           r10->as_VMReg()->next());
 222     map->set_callee_saved(VMRegImpl::stack2reg( r11H_off  + additional_frame_slots),
 223                           r11->as_VMReg()->next());
 224     map->set_callee_saved(VMRegImpl::stack2reg( r12H_off  + additional_frame_slots),
 225                           r12->as_VMReg()->next());
 226     map->set_callee_saved(VMRegImpl::stack2reg( r13H_off  + additional_frame_slots),
 227                           r13->as_VMReg()->next());
 228     map->set_callee_saved(VMRegImpl::stack2reg( r14H_off  + additional_frame_slots),
 229                           r14->as_VMReg()->next());
 230     map->set_callee_saved(VMRegImpl::stack2reg( r15H_off  + additional_frame_slots),
 231                           r15->as_VMReg()->next());
 232     map->set_callee_saved(VMRegImpl::stack2reg(xmm0H_off  + additional_frame_slots),
 233                           xmm0->as_VMReg()->next());
 234     map->set_callee_saved(VMRegImpl::stack2reg(xmm1H_off  + additional_frame_slots),
 235                           xmm1->as_VMReg()->next());
 236     map->set_callee_saved(VMRegImpl::stack2reg(xmm2H_off  + additional_frame_slots),
 237                           xmm2->as_VMReg()->next());
 238     map->set_callee_saved(VMRegImpl::stack2reg(xmm3H_off  + additional_frame_slots),
 239                           xmm3->as_VMReg()->next());
 240     map->set_callee_saved(VMRegImpl::stack2reg(xmm4H_off  + additional_frame_slots),
 241                           xmm4->as_VMReg()->next());
 242     map->set_callee_saved(VMRegImpl::stack2reg(xmm5H_off  + additional_frame_slots),
 243                           xmm5->as_VMReg()->next());
 244     map->set_callee_saved(VMRegImpl::stack2reg(xmm6H_off  + additional_frame_slots),
 245                           xmm6->as_VMReg()->next());
 246     map->set_callee_saved(VMRegImpl::stack2reg(xmm7H_off  + additional_frame_slots),
 247                           xmm7->as_VMReg()->next());
 248     map->set_callee_saved(VMRegImpl::stack2reg(xmm8H_off  + additional_frame_slots),
 249                           xmm8->as_VMReg()->next());
 250     map->set_callee_saved(VMRegImpl::stack2reg(xmm9H_off  + additional_frame_slots),
 251                           xmm9->as_VMReg()->next());
 252     map->set_callee_saved(VMRegImpl::stack2reg(xmm10H_off + additional_frame_slots),
 253                           xmm10->as_VMReg()->next());
 254     map->set_callee_saved(VMRegImpl::stack2reg(xmm11H_off + additional_frame_slots),
 255                           xmm11->as_VMReg()->next());
 256     map->set_callee_saved(VMRegImpl::stack2reg(xmm12H_off + additional_frame_slots),
 257                           xmm12->as_VMReg()->next());
 258     map->set_callee_saved(VMRegImpl::stack2reg(xmm13H_off + additional_frame_slots),
 259                           xmm13->as_VMReg()->next());
 260     map->set_callee_saved(VMRegImpl::stack2reg(xmm14H_off + additional_frame_slots),
 261                           xmm14->as_VMReg()->next());
 262     map->set_callee_saved(VMRegImpl::stack2reg(xmm15H_off + additional_frame_slots),
 263                           xmm15->as_VMReg()->next());
 264   }
 265 
 266   return map;
 267 }
 268 
 269 void RegisterSaver::restore_live_registers(MacroAssembler* masm) {
 270   if (frame::arg_reg_save_area_bytes != 0) {
 271     // Pop arg register save area
 272     __ addptr(rsp, frame::arg_reg_save_area_bytes);
 273   }
 274   // Recover CPU state
 275   __ pop_CPU_state();
 276   // Get the rbp described implicitly by the calling convention (no oopMap)
 277   __ pop(rbp);
 278 }
 279 
 280 void RegisterSaver::restore_result_registers(MacroAssembler* masm) {
 281 
 282   // Just restore result register. Only used by deoptimization. By
 283   // now any callee save register that needs to be restored to a c2
 284   // caller of the deoptee has been extracted into the vframeArray
 285   // and will be stuffed into the c2i adapter we create for later
 286   // restoration so only result registers need to be restored here.
 287 
 288   // Restore fp result register
 289   __ movdbl(xmm0, Address(rsp, xmm0_offset_in_bytes()));
 290   // Restore integer result register
 291   __ movptr(rax, Address(rsp, rax_offset_in_bytes()));
 292   __ movptr(rdx, Address(rsp, rdx_offset_in_bytes()));
 293 
 294   // Pop all of the register save are off the stack except the return address
 295   __ addptr(rsp, return_offset_in_bytes());
 296 }
 297 
 298 // The java_calling_convention describes stack locations as ideal slots on
 299 // a frame with no abi restrictions. Since we must observe abi restrictions
 300 // (like the placement of the register window) the slots must be biased by
 301 // the following value.
 302 static int reg2offset_in(VMReg r) {
 303   // Account for saved rbp and return address
 304   // This should really be in_preserve_stack_slots
 305   return (r->reg2stack() + 4) * VMRegImpl::stack_slot_size;
 306 }
 307 
 308 static int reg2offset_out(VMReg r) {
 309   return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
 310 }
 311 
 312 // ---------------------------------------------------------------------------
 313 // Read the array of BasicTypes from a signature, and compute where the
 314 // arguments should go.  Values in the VMRegPair regs array refer to 4-byte
 315 // quantities.  Values less than VMRegImpl::stack0 are registers, those above
 316 // refer to 4-byte stack slots.  All stack slots are based off of the stack pointer
 317 // as framesizes are fixed.
 318 // VMRegImpl::stack0 refers to the first slot 0(sp).
 319 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher.  Register
 320 // up to RegisterImpl::number_of_registers) are the 64-bit
 321 // integer registers.
 322 
 323 // Note: the INPUTS in sig_bt are in units of Java argument words, which are
 324 // either 32-bit or 64-bit depending on the build.  The OUTPUTS are in 32-bit
 325 // units regardless of build. Of course for i486 there is no 64 bit build
 326 
 327 // The Java calling convention is a "shifted" version of the C ABI.
 328 // By skipping the first C ABI register we can call non-static jni methods
 329 // with small numbers of arguments without having to shuffle the arguments
 330 // at all. Since we control the java ABI we ought to at least get some
 331 // advantage out of it.
 332 
 333 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
 334                                            VMRegPair *regs,
 335                                            int total_args_passed,
 336                                            int is_outgoing) {
 337 
 338   // Create the mapping between argument positions and
 339   // registers.
 340   static const Register INT_ArgReg[Argument::n_int_register_parameters_j] = {
 341     j_rarg0, j_rarg1, j_rarg2, j_rarg3, j_rarg4, j_rarg5
 342   };
 343   static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_j] = {
 344     j_farg0, j_farg1, j_farg2, j_farg3,
 345     j_farg4, j_farg5, j_farg6, j_farg7
 346   };
 347 
 348 
 349   uint int_args = 0;
 350   uint fp_args = 0;
 351   uint stk_args = 0; // inc by 2 each time
 352 
 353   for (int i = 0; i < total_args_passed; i++) {
 354     switch (sig_bt[i]) {
 355     case T_BOOLEAN:
 356     case T_CHAR:
 357     case T_BYTE:
 358     case T_SHORT:
 359     case T_INT:
 360       if (int_args < Argument::n_int_register_parameters_j) {
 361         regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
 362       } else {
 363         regs[i].set1(VMRegImpl::stack2reg(stk_args));
 364         stk_args += 2;
 365       }
 366       break;
 367     case T_VOID:
 368       // halves of T_LONG or T_DOUBLE
 369       assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
 370       regs[i].set_bad();
 371       break;
 372     case T_LONG:
 373       assert(sig_bt[i + 1] == T_VOID, "expecting half");
 374       // fall through
 375     case T_OBJECT:
 376     case T_ARRAY:
 377     case T_ADDRESS:
 378       if (int_args < Argument::n_int_register_parameters_j) {
 379         regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
 380       } else {
 381         regs[i].set2(VMRegImpl::stack2reg(stk_args));
 382         stk_args += 2;
 383       }
 384       break;
 385     case T_FLOAT:
 386       if (fp_args < Argument::n_float_register_parameters_j) {
 387         regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg());
 388       } else {
 389         regs[i].set1(VMRegImpl::stack2reg(stk_args));
 390         stk_args += 2;
 391       }
 392       break;
 393     case T_DOUBLE:
 394       assert(sig_bt[i + 1] == T_VOID, "expecting half");
 395       if (fp_args < Argument::n_float_register_parameters_j) {
 396         regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg());
 397       } else {
 398         regs[i].set2(VMRegImpl::stack2reg(stk_args));
 399         stk_args += 2;
 400       }
 401       break;
 402     default:
 403       ShouldNotReachHere();
 404       break;
 405     }
 406   }
 407 
 408   return round_to(stk_args, 2);
 409 }
 410 
 411 // Patch the callers callsite with entry to compiled code if it exists.
 412 static void patch_callers_callsite(MacroAssembler *masm) {
 413   Label L;
 414   __ verify_oop(rbx);
 415   __ cmpptr(Address(rbx, in_bytes(methodOopDesc::code_offset())), (int32_t)NULL_WORD);
 416   __ jcc(Assembler::equal, L);
 417 
 418   // Save the current stack pointer
 419   __ mov(r13, rsp);
 420   // Schedule the branch target address early.
 421   // Call into the VM to patch the caller, then jump to compiled callee
 422   // rax isn't live so capture return address while we easily can
 423   __ movptr(rax, Address(rsp, 0));
 424 
 425   // align stack so push_CPU_state doesn't fault
 426   __ andptr(rsp, -(StackAlignmentInBytes));
 427   __ push_CPU_state();
 428 
 429 
 430   __ verify_oop(rbx);
 431   // VM needs caller's callsite
 432   // VM needs target method
 433   // This needs to be a long call since we will relocate this adapter to
 434   // the codeBuffer and it may not reach
 435 
 436   // Allocate argument register save area
 437   if (frame::arg_reg_save_area_bytes != 0) {
 438     __ subptr(rsp, frame::arg_reg_save_area_bytes);
 439   }
 440   __ mov(c_rarg0, rbx);
 441   __ mov(c_rarg1, rax);
 442   __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)));
 443 
 444   // De-allocate argument register save area
 445   if (frame::arg_reg_save_area_bytes != 0) {
 446     __ addptr(rsp, frame::arg_reg_save_area_bytes);
 447   }
 448 
 449   __ pop_CPU_state();
 450   // restore sp
 451   __ mov(rsp, r13);
 452   __ bind(L);
 453 }
 454 
 455 // Helper function to put tags in interpreter stack.
 456 static void  tag_stack(MacroAssembler *masm, const BasicType sig, int st_off) {
 457   if (TaggedStackInterpreter) {
 458     int tag_offset = st_off + Interpreter::expr_tag_offset_in_bytes(0);
 459     if (sig == T_OBJECT || sig == T_ARRAY) {
 460       __ movptr(Address(rsp, tag_offset), (int32_t) frame::TagReference);
 461     } else if (sig == T_LONG || sig == T_DOUBLE) {
 462       int next_tag_offset = st_off + Interpreter::expr_tag_offset_in_bytes(1);
 463       __ movptr(Address(rsp, next_tag_offset), (int32_t) frame::TagValue);
 464       __ movptr(Address(rsp, tag_offset), (int32_t) frame::TagValue);
 465     } else {
 466       __ movptr(Address(rsp, tag_offset), (int32_t) frame::TagValue);
 467     }
 468   }
 469 }
 470 
 471 
 472 static void gen_c2i_adapter(MacroAssembler *masm,
 473                             int total_args_passed,
 474                             int comp_args_on_stack,
 475                             const BasicType *sig_bt,
 476                             const VMRegPair *regs,
 477                             Label& skip_fixup) {
 478   // Before we get into the guts of the C2I adapter, see if we should be here
 479   // at all.  We've come from compiled code and are attempting to jump to the
 480   // interpreter, which means the caller made a static call to get here
 481   // (vcalls always get a compiled target if there is one).  Check for a
 482   // compiled target.  If there is one, we need to patch the caller's call.
 483   patch_callers_callsite(masm);
 484 
 485   __ bind(skip_fixup);
 486 
 487   // Since all args are passed on the stack, total_args_passed *
 488   // Interpreter::stackElementSize is the space we need. Plus 1 because
 489   // we also account for the return address location since
 490   // we store it first rather than hold it in rax across all the shuffling
 491 
 492   int extraspace = (total_args_passed * Interpreter::stackElementSize()) + wordSize;
 493 
 494   // stack is aligned, keep it that way
 495   extraspace = round_to(extraspace, 2*wordSize);
 496 
 497   // Get return address
 498   __ pop(rax);
 499 
 500   // set senderSP value
 501   __ mov(r13, rsp);
 502 
 503   __ subptr(rsp, extraspace);
 504 
 505   // Store the return address in the expected location
 506   __ movptr(Address(rsp, 0), rax);
 507 
 508   // Now write the args into the outgoing interpreter space
 509   for (int i = 0; i < total_args_passed; i++) {
 510     if (sig_bt[i] == T_VOID) {
 511       assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
 512       continue;
 513     }
 514 
 515     // offset to start parameters
 516     int st_off   = (total_args_passed - i) * Interpreter::stackElementSize() +
 517                    Interpreter::value_offset_in_bytes();
 518     int next_off = st_off - Interpreter::stackElementSize();
 519 
 520     // Say 4 args:
 521     // i   st_off
 522     // 0   32 T_LONG
 523     // 1   24 T_VOID
 524     // 2   16 T_OBJECT
 525     // 3    8 T_BOOL
 526     // -    0 return address
 527     //
 528     // However to make thing extra confusing. Because we can fit a long/double in
 529     // a single slot on a 64 bt vm and it would be silly to break them up, the interpreter
 530     // leaves one slot empty and only stores to a single slot. In this case the
 531     // slot that is occupied is the T_VOID slot. See I said it was confusing.
 532 
 533     VMReg r_1 = regs[i].first();
 534     VMReg r_2 = regs[i].second();
 535     if (!r_1->is_valid()) {
 536       assert(!r_2->is_valid(), "");
 537       continue;
 538     }
 539     if (r_1->is_stack()) {
 540       // memory to memory use rax
 541       int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace;
 542       if (!r_2->is_valid()) {
 543         // sign extend??
 544         __ movl(rax, Address(rsp, ld_off));
 545         __ movptr(Address(rsp, st_off), rax);
 546         tag_stack(masm, sig_bt[i], st_off);
 547 
 548       } else {
 549 
 550         __ movq(rax, Address(rsp, ld_off));
 551 
 552         // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
 553         // T_DOUBLE and T_LONG use two slots in the interpreter
 554         if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
 555           // ld_off == LSW, ld_off+wordSize == MSW
 556           // st_off == MSW, next_off == LSW
 557           __ movq(Address(rsp, next_off), rax);
 558 #ifdef ASSERT
 559           // Overwrite the unused slot with known junk
 560           __ mov64(rax, CONST64(0xdeadffffdeadaaaa));
 561           __ movptr(Address(rsp, st_off), rax);
 562 #endif /* ASSERT */
 563           tag_stack(masm, sig_bt[i], next_off);
 564         } else {
 565           __ movq(Address(rsp, st_off), rax);
 566           tag_stack(masm, sig_bt[i], st_off);
 567         }
 568       }
 569     } else if (r_1->is_Register()) {
 570       Register r = r_1->as_Register();
 571       if (!r_2->is_valid()) {
 572         // must be only an int (or less ) so move only 32bits to slot
 573         // why not sign extend??
 574         __ movl(Address(rsp, st_off), r);
 575         tag_stack(masm, sig_bt[i], st_off);
 576       } else {
 577         // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
 578         // T_DOUBLE and T_LONG use two slots in the interpreter
 579         if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
 580           // long/double in gpr
 581 #ifdef ASSERT
 582           // Overwrite the unused slot with known junk
 583           __ mov64(rax, CONST64(0xdeadffffdeadaaab));
 584           __ movptr(Address(rsp, st_off), rax);
 585 #endif /* ASSERT */
 586           __ movq(Address(rsp, next_off), r);
 587           tag_stack(masm, sig_bt[i], next_off);
 588         } else {
 589           __ movptr(Address(rsp, st_off), r);
 590           tag_stack(masm, sig_bt[i], st_off);
 591         }
 592       }
 593     } else {
 594       assert(r_1->is_XMMRegister(), "");
 595       if (!r_2->is_valid()) {
 596         // only a float use just part of the slot
 597         __ movflt(Address(rsp, st_off), r_1->as_XMMRegister());
 598         tag_stack(masm, sig_bt[i], st_off);
 599       } else {
 600 #ifdef ASSERT
 601         // Overwrite the unused slot with known junk
 602         __ mov64(rax, CONST64(0xdeadffffdeadaaac));
 603         __ movptr(Address(rsp, st_off), rax);
 604 #endif /* ASSERT */
 605         __ movdbl(Address(rsp, next_off), r_1->as_XMMRegister());
 606         tag_stack(masm, sig_bt[i], next_off);
 607       }
 608     }
 609   }
 610 
 611   // Schedule the branch target address early.
 612   __ movptr(rcx, Address(rbx, in_bytes(methodOopDesc::interpreter_entry_offset())));
 613   __ jmp(rcx);
 614 }
 615 
 616 static void gen_i2c_adapter(MacroAssembler *masm,
 617                             int total_args_passed,
 618                             int comp_args_on_stack,
 619                             const BasicType *sig_bt,
 620                             const VMRegPair *regs) {
 621 
 622   //
 623   // We will only enter here from an interpreted frame and never from after
 624   // passing thru a c2i. Azul allowed this but we do not. If we lose the
 625   // race and use a c2i we will remain interpreted for the race loser(s).
 626   // This removes all sorts of headaches on the x86 side and also eliminates
 627   // the possibility of having c2i -> i2c -> c2i -> ... endless transitions.
 628 
 629 
 630   // Note: r13 contains the senderSP on entry. We must preserve it since
 631   // we may do a i2c -> c2i transition if we lose a race where compiled
 632   // code goes non-entrant while we get args ready.
 633   // In addition we use r13 to locate all the interpreter args as
 634   // we must align the stack to 16 bytes on an i2c entry else we
 635   // lose alignment we expect in all compiled code and register
 636   // save code can segv when fxsave instructions find improperly
 637   // aligned stack pointer.
 638 
 639   __ movptr(rax, Address(rsp, 0));
 640 
 641   // Must preserve original SP for loading incoming arguments because
 642   // we need to align the outgoing SP for compiled code.
 643   __ movptr(r11, rsp);
 644 
 645   // Cut-out for having no stack args.  Since up to 2 int/oop args are passed
 646   // in registers, we will occasionally have no stack args.
 647   int comp_words_on_stack = 0;
 648   if (comp_args_on_stack) {
 649     // Sig words on the stack are greater-than VMRegImpl::stack0.  Those in
 650     // registers are below.  By subtracting stack0, we either get a negative
 651     // number (all values in registers) or the maximum stack slot accessed.
 652 
 653     // Convert 4-byte c2 stack slots to words.
 654     comp_words_on_stack = round_to(comp_args_on_stack*VMRegImpl::stack_slot_size, wordSize)>>LogBytesPerWord;
 655     // Round up to miminum stack alignment, in wordSize
 656     comp_words_on_stack = round_to(comp_words_on_stack, 2);
 657     __ subptr(rsp, comp_words_on_stack * wordSize);
 658   }
 659 
 660 
 661   // Ensure compiled code always sees stack at proper alignment
 662   __ andptr(rsp, -16);
 663 
 664   // push the return address and misalign the stack that youngest frame always sees
 665   // as far as the placement of the call instruction
 666   __ push(rax);
 667 
 668   // Put saved SP in another register
 669   const Register saved_sp = rax;
 670   __ movptr(saved_sp, r11);
 671 
 672   // Will jump to the compiled code just as if compiled code was doing it.
 673   // Pre-load the register-jump target early, to schedule it better.
 674   __ movptr(r11, Address(rbx, in_bytes(methodOopDesc::from_compiled_offset())));
 675 
 676   // Now generate the shuffle code.  Pick up all register args and move the
 677   // rest through the floating point stack top.
 678   for (int i = 0; i < total_args_passed; i++) {
 679     if (sig_bt[i] == T_VOID) {
 680       // Longs and doubles are passed in native word order, but misaligned
 681       // in the 32-bit build.
 682       assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
 683       continue;
 684     }
 685 
 686     // Pick up 0, 1 or 2 words from SP+offset.
 687 
 688     assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(),
 689             "scrambled load targets?");
 690     // Load in argument order going down.
 691     int ld_off = (total_args_passed - i)*Interpreter::stackElementSize() + Interpreter::value_offset_in_bytes();




 692     // Point to interpreter value (vs. tag)
 693     int next_off = ld_off - Interpreter::stackElementSize();
 694     //
 695     //
 696     //
 697     VMReg r_1 = regs[i].first();
 698     VMReg r_2 = regs[i].second();
 699     if (!r_1->is_valid()) {
 700       assert(!r_2->is_valid(), "");
 701       continue;
 702     }
 703     if (r_1->is_stack()) {
 704       // Convert stack slot to an SP offset (+ wordSize to account for return address )
 705       int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize;
 706 
 707       // We can use r13 as a temp here because compiled code doesn't need r13 as an input
 708       // and if we end up going thru a c2i because of a miss a reasonable value of r13
 709       // will be generated.
 710       if (!r_2->is_valid()) {
 711         // sign extend???
 712         __ movl(r13, Address(saved_sp, ld_off));
 713         __ movptr(Address(rsp, st_off), r13);
 714       } else {
 715         //
 716         // We are using two optoregs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
 717         // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
 718         // So we must adjust where to pick up the data to match the interpreter.
 719         //
 720         // Interpreter local[n] == MSW, local[n+1] == LSW however locals
 721         // are accessed as negative so LSW is at LOW address
 722 
 723         // ld_off is MSW so get LSW
 724         const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
 725                            next_off : ld_off;
 726         __ movq(r13, Address(saved_sp, offset));
 727         // st_off is LSW (i.e. reg.first())
 728         __ movq(Address(rsp, st_off), r13);
 729       }
 730     } else if (r_1->is_Register()) {  // Register argument
 731       Register r = r_1->as_Register();
 732       assert(r != rax, "must be different");
 733       if (r_2->is_valid()) {
 734         //
 735         // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
 736         // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
 737         // So we must adjust where to pick up the data to match the interpreter.
 738 
 739         const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
 740                            next_off : ld_off;
 741 
 742         // this can be a misaligned move
 743         __ movq(r, Address(saved_sp, offset));
 744       } else {
 745         // sign extend and use a full word?
 746         __ movl(r, Address(saved_sp, ld_off));
 747       }
 748     } else {
 749       if (!r_2->is_valid()) {
 750         __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off));
 751       } else {
 752         __ movdbl(r_1->as_XMMRegister(), Address(saved_sp, next_off));
 753       }
 754     }
 755   }
 756 
 757   // 6243940 We might end up in handle_wrong_method if
 758   // the callee is deoptimized as we race thru here. If that
 759   // happens we don't want to take a safepoint because the
 760   // caller frame will look interpreted and arguments are now
 761   // "compiled" so it is much better to make this transition
 762   // invisible to the stack walking code. Unfortunately if
 763   // we try and find the callee by normal means a safepoint
 764   // is possible. So we stash the desired callee in the thread
 765   // and the vm will find there should this case occur.
 766 
 767   __ movptr(Address(r15_thread, JavaThread::callee_target_offset()), rbx);
 768 
 769   // put methodOop where a c2i would expect should we end up there
 770   // only needed becaus eof c2 resolve stubs return methodOop as a result in
 771   // rax
 772   __ mov(rax, rbx);
 773   __ jmp(r11);
 774 }
 775 
 776 // ---------------------------------------------------------------
 777 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
 778                                                             int total_args_passed,
 779                                                             int comp_args_on_stack,
 780                                                             const BasicType *sig_bt,
 781                                                             const VMRegPair *regs) {
 782   address i2c_entry = __ pc();
 783 
 784   gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs);
 785 
 786   // -------------------------------------------------------------------------
 787   // Generate a C2I adapter.  On entry we know rbx holds the methodOop during calls
 788   // to the interpreter.  The args start out packed in the compiled layout.  They
 789   // need to be unpacked into the interpreter layout.  This will almost always
 790   // require some stack space.  We grow the current (compiled) stack, then repack
 791   // the args.  We  finally end in a jump to the generic interpreter entry point.
 792   // On exit from the interpreter, the interpreter will restore our SP (lest the
 793   // compiled code, which relys solely on SP and not RBP, get sick).
 794 
 795   address c2i_unverified_entry = __ pc();
 796   Label skip_fixup;
 797   Label ok;
 798 
 799   Register holder = rax;
 800   Register receiver = j_rarg0;
 801   Register temp = rbx;
 802 
 803   {
 804     __ verify_oop(holder);
 805     __ load_klass(temp, receiver);
 806     __ verify_oop(temp);
 807 
 808     __ cmpptr(temp, Address(holder, compiledICHolderOopDesc::holder_klass_offset()));
 809     __ movptr(rbx, Address(holder, compiledICHolderOopDesc::holder_method_offset()));
 810     __ jcc(Assembler::equal, ok);
 811     __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
 812 
 813     __ bind(ok);
 814     // Method might have been compiled since the call site was patched to
 815     // interpreted if that is the case treat it as a miss so we can get
 816     // the call site corrected.
 817     __ cmpptr(Address(rbx, in_bytes(methodOopDesc::code_offset())), (int32_t)NULL_WORD);
 818     __ jcc(Assembler::equal, skip_fixup);
 819     __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
 820   }
 821 
 822   address c2i_entry = __ pc();
 823 
 824   gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup);
 825 
 826   __ flush();
 827   return new AdapterHandlerEntry(i2c_entry, c2i_entry, c2i_unverified_entry);
 828 }
 829 
 830 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
 831                                          VMRegPair *regs,
 832                                          int total_args_passed) {
 833 // We return the amount of VMRegImpl stack slots we need to reserve for all
 834 // the arguments NOT counting out_preserve_stack_slots.
 835 
 836 // NOTE: These arrays will have to change when c1 is ported
 837 #ifdef _WIN64
 838     static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = {
 839       c_rarg0, c_rarg1, c_rarg2, c_rarg3
 840     };
 841     static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = {
 842       c_farg0, c_farg1, c_farg2, c_farg3
 843     };
 844 #else
 845     static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = {
 846       c_rarg0, c_rarg1, c_rarg2, c_rarg3, c_rarg4, c_rarg5
 847     };
 848     static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = {
 849       c_farg0, c_farg1, c_farg2, c_farg3,
 850       c_farg4, c_farg5, c_farg6, c_farg7
 851     };
 852 #endif // _WIN64
 853 
 854 
 855     uint int_args = 0;
 856     uint fp_args = 0;
 857     uint stk_args = 0; // inc by 2 each time
 858 
 859     for (int i = 0; i < total_args_passed; i++) {
 860       switch (sig_bt[i]) {
 861       case T_BOOLEAN:
 862       case T_CHAR:
 863       case T_BYTE:
 864       case T_SHORT:
 865       case T_INT:
 866         if (int_args < Argument::n_int_register_parameters_c) {
 867           regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
 868 #ifdef _WIN64
 869           fp_args++;
 870           // Allocate slots for callee to stuff register args the stack.
 871           stk_args += 2;
 872 #endif
 873         } else {
 874           regs[i].set1(VMRegImpl::stack2reg(stk_args));
 875           stk_args += 2;
 876         }
 877         break;
 878       case T_LONG:
 879         assert(sig_bt[i + 1] == T_VOID, "expecting half");
 880         // fall through
 881       case T_OBJECT:
 882       case T_ARRAY:
 883       case T_ADDRESS:
 884         if (int_args < Argument::n_int_register_parameters_c) {
 885           regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
 886 #ifdef _WIN64
 887           fp_args++;
 888           stk_args += 2;
 889 #endif
 890         } else {
 891           regs[i].set2(VMRegImpl::stack2reg(stk_args));
 892           stk_args += 2;
 893         }
 894         break;
 895       case T_FLOAT:
 896         if (fp_args < Argument::n_float_register_parameters_c) {
 897           regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg());
 898 #ifdef _WIN64
 899           int_args++;
 900           // Allocate slots for callee to stuff register args the stack.
 901           stk_args += 2;
 902 #endif
 903         } else {
 904           regs[i].set1(VMRegImpl::stack2reg(stk_args));
 905           stk_args += 2;
 906         }
 907         break;
 908       case T_DOUBLE:
 909         assert(sig_bt[i + 1] == T_VOID, "expecting half");
 910         if (fp_args < Argument::n_float_register_parameters_c) {
 911           regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg());
 912 #ifdef _WIN64
 913           int_args++;
 914           // Allocate slots for callee to stuff register args the stack.
 915           stk_args += 2;
 916 #endif
 917         } else {
 918           regs[i].set2(VMRegImpl::stack2reg(stk_args));
 919           stk_args += 2;
 920         }
 921         break;
 922       case T_VOID: // Halves of longs and doubles
 923         assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
 924         regs[i].set_bad();
 925         break;
 926       default:
 927         ShouldNotReachHere();
 928         break;
 929       }
 930     }
 931 #ifdef _WIN64
 932   // windows abi requires that we always allocate enough stack space
 933   // for 4 64bit registers to be stored down.
 934   if (stk_args < 8) {
 935     stk_args = 8;
 936   }
 937 #endif // _WIN64
 938 
 939   return stk_args;
 940 }
 941 
 942 // On 64 bit we will store integer like items to the stack as
 943 // 64 bits items (sparc abi) even though java would only store
 944 // 32bits for a parameter. On 32bit it will simply be 32 bits
 945 // So this routine will do 32->32 on 32bit and 32->64 on 64bit
 946 static void move32_64(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
 947   if (src.first()->is_stack()) {
 948     if (dst.first()->is_stack()) {
 949       // stack to stack
 950       __ movslq(rax, Address(rbp, reg2offset_in(src.first())));
 951       __ movq(Address(rsp, reg2offset_out(dst.first())), rax);
 952     } else {
 953       // stack to reg
 954       __ movslq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first())));
 955     }
 956   } else if (dst.first()->is_stack()) {
 957     // reg to stack
 958     // Do we really have to sign extend???
 959     // __ movslq(src.first()->as_Register(), src.first()->as_Register());
 960     __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
 961   } else {
 962     // Do we really have to sign extend???
 963     // __ movslq(dst.first()->as_Register(), src.first()->as_Register());
 964     if (dst.first() != src.first()) {
 965       __ movq(dst.first()->as_Register(), src.first()->as_Register());
 966     }
 967   }
 968 }
 969 
 970 
 971 // An oop arg. Must pass a handle not the oop itself
 972 static void object_move(MacroAssembler* masm,
 973                         OopMap* map,
 974                         int oop_handle_offset,
 975                         int framesize_in_slots,
 976                         VMRegPair src,
 977                         VMRegPair dst,
 978                         bool is_receiver,
 979                         int* receiver_offset) {
 980 
 981   // must pass a handle. First figure out the location we use as a handle
 982 
 983   Register rHandle = dst.first()->is_stack() ? rax : dst.first()->as_Register();
 984 
 985   // See if oop is NULL if it is we need no handle
 986 
 987   if (src.first()->is_stack()) {
 988 
 989     // Oop is already on the stack as an argument
 990     int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
 991     map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots));
 992     if (is_receiver) {
 993       *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size;
 994     }
 995 
 996     __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD);
 997     __ lea(rHandle, Address(rbp, reg2offset_in(src.first())));
 998     // conditionally move a NULL
 999     __ cmovptr(Assembler::equal, rHandle, Address(rbp, reg2offset_in(src.first())));
1000   } else {
1001 
1002     // Oop is in an a register we must store it to the space we reserve
1003     // on the stack for oop_handles and pass a handle if oop is non-NULL
1004 
1005     const Register rOop = src.first()->as_Register();
1006     int oop_slot;
1007     if (rOop == j_rarg0)
1008       oop_slot = 0;
1009     else if (rOop == j_rarg1)
1010       oop_slot = 1;
1011     else if (rOop == j_rarg2)
1012       oop_slot = 2;
1013     else if (rOop == j_rarg3)
1014       oop_slot = 3;
1015     else if (rOop == j_rarg4)
1016       oop_slot = 4;
1017     else {
1018       assert(rOop == j_rarg5, "wrong register");
1019       oop_slot = 5;
1020     }
1021 
1022     oop_slot = oop_slot * VMRegImpl::slots_per_word + oop_handle_offset;
1023     int offset = oop_slot*VMRegImpl::stack_slot_size;
1024 
1025     map->set_oop(VMRegImpl::stack2reg(oop_slot));
1026     // Store oop in handle area, may be NULL
1027     __ movptr(Address(rsp, offset), rOop);
1028     if (is_receiver) {
1029       *receiver_offset = offset;
1030     }
1031 
1032     __ cmpptr(rOop, (int32_t)NULL_WORD);
1033     __ lea(rHandle, Address(rsp, offset));
1034     // conditionally move a NULL from the handle area where it was just stored
1035     __ cmovptr(Assembler::equal, rHandle, Address(rsp, offset));
1036   }
1037 
1038   // If arg is on the stack then place it otherwise it is already in correct reg.
1039   if (dst.first()->is_stack()) {
1040     __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
1041   }
1042 }
1043 
1044 // A float arg may have to do float reg int reg conversion
1045 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1046   assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move");
1047 
1048   // The calling conventions assures us that each VMregpair is either
1049   // all really one physical register or adjacent stack slots.
1050   // This greatly simplifies the cases here compared to sparc.
1051 
1052   if (src.first()->is_stack()) {
1053     if (dst.first()->is_stack()) {
1054       __ movl(rax, Address(rbp, reg2offset_in(src.first())));
1055       __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1056     } else {
1057       // stack to reg
1058       assert(dst.first()->is_XMMRegister(), "only expect xmm registers as parameters");
1059       __ movflt(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_in(src.first())));
1060     }
1061   } else if (dst.first()->is_stack()) {
1062     // reg to stack
1063     assert(src.first()->is_XMMRegister(), "only expect xmm registers as parameters");
1064     __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1065   } else {
1066     // reg to reg
1067     // In theory these overlap but the ordering is such that this is likely a nop
1068     if ( src.first() != dst.first()) {
1069       __ movdbl(dst.first()->as_XMMRegister(),  src.first()->as_XMMRegister());
1070     }
1071   }
1072 }
1073 
1074 // A long move
1075 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1076 
1077   // The calling conventions assures us that each VMregpair is either
1078   // all really one physical register or adjacent stack slots.
1079   // This greatly simplifies the cases here compared to sparc.
1080 
1081   if (src.is_single_phys_reg() ) {
1082     if (dst.is_single_phys_reg()) {
1083       if (dst.first() != src.first()) {
1084         __ mov(dst.first()->as_Register(), src.first()->as_Register());
1085       }
1086     } else {
1087       assert(dst.is_single_reg(), "not a stack pair");
1088       __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
1089     }
1090   } else if (dst.is_single_phys_reg()) {
1091     assert(src.is_single_reg(),  "not a stack pair");
1092     __ movq(dst.first()->as_Register(), Address(rbp, reg2offset_out(src.first())));
1093   } else {
1094     assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs");
1095     __ movq(rax, Address(rbp, reg2offset_in(src.first())));
1096     __ movq(Address(rsp, reg2offset_out(dst.first())), rax);
1097   }
1098 }
1099 
1100 // A double move
1101 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1102 
1103   // The calling conventions assures us that each VMregpair is either
1104   // all really one physical register or adjacent stack slots.
1105   // This greatly simplifies the cases here compared to sparc.
1106 
1107   if (src.is_single_phys_reg() ) {
1108     if (dst.is_single_phys_reg()) {
1109       // In theory these overlap but the ordering is such that this is likely a nop
1110       if ( src.first() != dst.first()) {
1111         __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister());
1112       }
1113     } else {
1114       assert(dst.is_single_reg(), "not a stack pair");
1115       __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1116     }
1117   } else if (dst.is_single_phys_reg()) {
1118     assert(src.is_single_reg(),  "not a stack pair");
1119     __ movdbl(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_out(src.first())));
1120   } else {
1121     assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs");
1122     __ movq(rax, Address(rbp, reg2offset_in(src.first())));
1123     __ movq(Address(rsp, reg2offset_out(dst.first())), rax);
1124   }
1125 }
1126 
1127 
1128 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1129   // We always ignore the frame_slots arg and just use the space just below frame pointer
1130   // which by this time is free to use
1131   switch (ret_type) {
1132   case T_FLOAT:
1133     __ movflt(Address(rbp, -wordSize), xmm0);
1134     break;
1135   case T_DOUBLE:
1136     __ movdbl(Address(rbp, -wordSize), xmm0);
1137     break;
1138   case T_VOID:  break;
1139   default: {
1140     __ movptr(Address(rbp, -wordSize), rax);
1141     }
1142   }
1143 }
1144 
1145 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1146   // We always ignore the frame_slots arg and just use the space just below frame pointer
1147   // which by this time is free to use
1148   switch (ret_type) {
1149   case T_FLOAT:
1150     __ movflt(xmm0, Address(rbp, -wordSize));
1151     break;
1152   case T_DOUBLE:
1153     __ movdbl(xmm0, Address(rbp, -wordSize));
1154     break;
1155   case T_VOID:  break;
1156   default: {
1157     __ movptr(rax, Address(rbp, -wordSize));
1158     }
1159   }
1160 }
1161 
1162 static void save_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) {
1163     for ( int i = first_arg ; i < arg_count ; i++ ) {
1164       if (args[i].first()->is_Register()) {
1165         __ push(args[i].first()->as_Register());
1166       } else if (args[i].first()->is_XMMRegister()) {
1167         __ subptr(rsp, 2*wordSize);
1168         __ movdbl(Address(rsp, 0), args[i].first()->as_XMMRegister());
1169       }
1170     }
1171 }
1172 
1173 static void restore_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) {
1174     for ( int i = arg_count - 1 ; i >= first_arg ; i-- ) {
1175       if (args[i].first()->is_Register()) {
1176         __ pop(args[i].first()->as_Register());
1177       } else if (args[i].first()->is_XMMRegister()) {
1178         __ movdbl(args[i].first()->as_XMMRegister(), Address(rsp, 0));
1179         __ addptr(rsp, 2*wordSize);
1180       }
1181     }
1182 }
1183 
1184 // ---------------------------------------------------------------------------
1185 // Generate a native wrapper for a given method.  The method takes arguments
1186 // in the Java compiled code convention, marshals them to the native
1187 // convention (handlizes oops, etc), transitions to native, makes the call,
1188 // returns to java state (possibly blocking), unhandlizes any result and
1189 // returns.
1190 nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm,
1191                                                 methodHandle method,
1192                                                 int total_in_args,
1193                                                 int comp_args_on_stack,
1194                                                 BasicType *in_sig_bt,
1195                                                 VMRegPair *in_regs,
1196                                                 BasicType ret_type) {
1197   // Native nmethod wrappers never take possesion of the oop arguments.
1198   // So the caller will gc the arguments. The only thing we need an
1199   // oopMap for is if the call is static
1200   //
1201   // An OopMap for lock (and class if static)
1202   OopMapSet *oop_maps = new OopMapSet();
1203   intptr_t start = (intptr_t)__ pc();
1204 
1205   // We have received a description of where all the java arg are located
1206   // on entry to the wrapper. We need to convert these args to where
1207   // the jni function will expect them. To figure out where they go
1208   // we convert the java signature to a C signature by inserting
1209   // the hidden arguments as arg[0] and possibly arg[1] (static method)
1210 
1211   int total_c_args = total_in_args + 1;
1212   if (method->is_static()) {
1213     total_c_args++;
1214   }
1215 
1216   BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
1217   VMRegPair* out_regs   = NEW_RESOURCE_ARRAY(VMRegPair,   total_c_args);
1218 
1219   int argc = 0;
1220   out_sig_bt[argc++] = T_ADDRESS;
1221   if (method->is_static()) {
1222     out_sig_bt[argc++] = T_OBJECT;
1223   }
1224 
1225   for (int i = 0; i < total_in_args ; i++ ) {
1226     out_sig_bt[argc++] = in_sig_bt[i];
1227   }
1228 
1229   // Now figure out where the args must be stored and how much stack space
1230   // they require.
1231   //
1232   int out_arg_slots;
1233   out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args);
1234 
1235   // Compute framesize for the wrapper.  We need to handlize all oops in
1236   // incoming registers
1237 
1238   // Calculate the total number of stack slots we will need.
1239 
1240   // First count the abi requirement plus all of the outgoing args
1241   int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
1242 
1243   // Now the space for the inbound oop handle area
1244 
1245   int oop_handle_offset = stack_slots;
1246   stack_slots += 6*VMRegImpl::slots_per_word;
1247 
1248   // Now any space we need for handlizing a klass if static method
1249 
1250   int oop_temp_slot_offset = 0;
1251   int klass_slot_offset = 0;
1252   int klass_offset = -1;
1253   int lock_slot_offset = 0;
1254   bool is_static = false;
1255 
1256   if (method->is_static()) {
1257     klass_slot_offset = stack_slots;
1258     stack_slots += VMRegImpl::slots_per_word;
1259     klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size;
1260     is_static = true;
1261   }
1262 
1263   // Plus a lock if needed
1264 
1265   if (method->is_synchronized()) {
1266     lock_slot_offset = stack_slots;
1267     stack_slots += VMRegImpl::slots_per_word;
1268   }
1269 
1270   // Now a place (+2) to save return values or temp during shuffling
1271   // + 4 for return address (which we own) and saved rbp
1272   stack_slots += 6;
1273 
1274   // Ok The space we have allocated will look like:
1275   //
1276   //
1277   // FP-> |                     |
1278   //      |---------------------|
1279   //      | 2 slots for moves   |
1280   //      |---------------------|
1281   //      | lock box (if sync)  |
1282   //      |---------------------| <- lock_slot_offset
1283   //      | klass (if static)   |
1284   //      |---------------------| <- klass_slot_offset
1285   //      | oopHandle area      |
1286   //      |---------------------| <- oop_handle_offset (6 java arg registers)
1287   //      | outbound memory     |
1288   //      | based arguments     |
1289   //      |                     |
1290   //      |---------------------|
1291   //      |                     |
1292   // SP-> | out_preserved_slots |
1293   //
1294   //
1295 
1296 
1297   // Now compute actual number of stack words we need rounding to make
1298   // stack properly aligned.
1299   stack_slots = round_to(stack_slots, StackAlignmentInSlots);
1300 
1301   int stack_size = stack_slots * VMRegImpl::stack_slot_size;
1302 
1303 
1304   // First thing make an ic check to see if we should even be here
1305 
1306   // We are free to use all registers as temps without saving them and
1307   // restoring them except rbp. rbp is the only callee save register
1308   // as far as the interpreter and the compiler(s) are concerned.
1309 
1310 
1311   const Register ic_reg = rax;
1312   const Register receiver = j_rarg0;
1313 
1314   Label ok;
1315   Label exception_pending;
1316 
1317   assert_different_registers(ic_reg, receiver, rscratch1);
1318   __ verify_oop(receiver);
1319   __ load_klass(rscratch1, receiver);
1320   __ cmpq(ic_reg, rscratch1);
1321   __ jcc(Assembler::equal, ok);
1322 
1323   __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
1324 
1325   __ bind(ok);
1326 
1327   // Verified entry point must be aligned
1328   __ align(8);
1329 
1330   int vep_offset = ((intptr_t)__ pc()) - start;
1331 
1332   // The instruction at the verified entry point must be 5 bytes or longer
1333   // because it can be patched on the fly by make_non_entrant. The stack bang
1334   // instruction fits that requirement.
1335 
1336   // Generate stack overflow check
1337 
1338   if (UseStackBanging) {
1339     __ bang_stack_with_offset(StackShadowPages*os::vm_page_size());
1340   } else {
1341     // need a 5 byte instruction to allow MT safe patching to non-entrant
1342     __ fat_nop();
1343   }
1344 
1345   // Generate a new frame for the wrapper.
1346   __ enter();
1347   // -2 because return address is already present and so is saved rbp
1348   __ subptr(rsp, stack_size - 2*wordSize);
1349 
1350     // Frame is now completed as far as size and linkage.
1351 
1352     int frame_complete = ((intptr_t)__ pc()) - start;
1353 
1354 #ifdef ASSERT
1355     {
1356       Label L;
1357       __ mov(rax, rsp);
1358       __ andptr(rax, -16); // must be 16 byte boundary (see amd64 ABI)
1359       __ cmpptr(rax, rsp);
1360       __ jcc(Assembler::equal, L);
1361       __ stop("improperly aligned stack");
1362       __ bind(L);
1363     }
1364 #endif /* ASSERT */
1365 
1366 
1367   // We use r14 as the oop handle for the receiver/klass
1368   // It is callee save so it survives the call to native
1369 
1370   const Register oop_handle_reg = r14;
1371 
1372 
1373 
1374   //
1375   // We immediately shuffle the arguments so that any vm call we have to
1376   // make from here on out (sync slow path, jvmti, etc.) we will have
1377   // captured the oops from our caller and have a valid oopMap for
1378   // them.
1379 
1380   // -----------------
1381   // The Grand Shuffle
1382 
1383   // The Java calling convention is either equal (linux) or denser (win64) than the
1384   // c calling convention. However the because of the jni_env argument the c calling
1385   // convention always has at least one more (and two for static) arguments than Java.
1386   // Therefore if we move the args from java -> c backwards then we will never have
1387   // a register->register conflict and we don't have to build a dependency graph
1388   // and figure out how to break any cycles.
1389   //
1390 
1391   // Record esp-based slot for receiver on stack for non-static methods
1392   int receiver_offset = -1;
1393 
1394   // This is a trick. We double the stack slots so we can claim
1395   // the oops in the caller's frame. Since we are sure to have
1396   // more args than the caller doubling is enough to make
1397   // sure we can capture all the incoming oop args from the
1398   // caller.
1399   //
1400   OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1401 
1402   // Mark location of rbp (someday)
1403   // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, vmreg(rbp));
1404 
1405   // Use eax, ebx as temporaries during any memory-memory moves we have to do
1406   // All inbound args are referenced based on rbp and all outbound args via rsp.
1407 
1408 
1409 #ifdef ASSERT
1410   bool reg_destroyed[RegisterImpl::number_of_registers];
1411   bool freg_destroyed[XMMRegisterImpl::number_of_registers];
1412   for ( int r = 0 ; r < RegisterImpl::number_of_registers ; r++ ) {
1413     reg_destroyed[r] = false;
1414   }
1415   for ( int f = 0 ; f < XMMRegisterImpl::number_of_registers ; f++ ) {
1416     freg_destroyed[f] = false;
1417   }
1418 
1419 #endif /* ASSERT */
1420 
1421 
1422   int c_arg = total_c_args - 1;
1423   for ( int i = total_in_args - 1; i >= 0 ; i--, c_arg-- ) {
1424 #ifdef ASSERT
1425     if (in_regs[i].first()->is_Register()) {
1426       assert(!reg_destroyed[in_regs[i].first()->as_Register()->encoding()], "destroyed reg!");
1427     } else if (in_regs[i].first()->is_XMMRegister()) {
1428       assert(!freg_destroyed[in_regs[i].first()->as_XMMRegister()->encoding()], "destroyed reg!");
1429     }
1430     if (out_regs[c_arg].first()->is_Register()) {
1431       reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true;
1432     } else if (out_regs[c_arg].first()->is_XMMRegister()) {
1433       freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true;
1434     }
1435 #endif /* ASSERT */
1436     switch (in_sig_bt[i]) {
1437       case T_ARRAY:
1438       case T_OBJECT:
1439         object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg],
1440                     ((i == 0) && (!is_static)),
1441                     &receiver_offset);
1442         break;
1443       case T_VOID:
1444         break;
1445 
1446       case T_FLOAT:
1447         float_move(masm, in_regs[i], out_regs[c_arg]);
1448           break;
1449 
1450       case T_DOUBLE:
1451         assert( i + 1 < total_in_args &&
1452                 in_sig_bt[i + 1] == T_VOID &&
1453                 out_sig_bt[c_arg+1] == T_VOID, "bad arg list");
1454         double_move(masm, in_regs[i], out_regs[c_arg]);
1455         break;
1456 
1457       case T_LONG :
1458         long_move(masm, in_regs[i], out_regs[c_arg]);
1459         break;
1460 
1461       case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
1462 
1463       default:
1464         move32_64(masm, in_regs[i], out_regs[c_arg]);
1465     }
1466   }
1467 
1468   // point c_arg at the first arg that is already loaded in case we
1469   // need to spill before we call out
1470   c_arg++;
1471 
1472   // Pre-load a static method's oop into r14.  Used both by locking code and
1473   // the normal JNI call code.
1474   if (method->is_static()) {
1475 
1476     //  load oop into a register
1477     __ movoop(oop_handle_reg, JNIHandles::make_local(Klass::cast(method->method_holder())->java_mirror()));
1478 
1479     // Now handlize the static class mirror it's known not-null.
1480     __ movptr(Address(rsp, klass_offset), oop_handle_reg);
1481     map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
1482 
1483     // Now get the handle
1484     __ lea(oop_handle_reg, Address(rsp, klass_offset));
1485     // store the klass handle as second argument
1486     __ movptr(c_rarg1, oop_handle_reg);
1487     // and protect the arg if we must spill
1488     c_arg--;
1489   }
1490 
1491   // Change state to native (we save the return address in the thread, since it might not
1492   // be pushed on the stack when we do a a stack traversal). It is enough that the pc()
1493   // points into the right code segment. It does not have to be the correct return pc.
1494   // We use the same pc/oopMap repeatedly when we call out
1495 
1496   intptr_t the_pc = (intptr_t) __ pc();
1497   oop_maps->add_gc_map(the_pc - start, map);
1498 
1499   __ set_last_Java_frame(rsp, noreg, (address)the_pc);
1500 
1501 
1502   // We have all of the arguments setup at this point. We must not touch any register
1503   // argument registers at this point (what if we save/restore them there are no oop?
1504 
1505   {
1506     SkipIfEqual skip(masm, &DTraceMethodProbes, false);
1507     // protect the args we've loaded
1508     save_args(masm, total_c_args, c_arg, out_regs);
1509     __ movoop(c_rarg1, JNIHandles::make_local(method()));
1510     __ call_VM_leaf(
1511       CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
1512       r15_thread, c_rarg1);
1513     restore_args(masm, total_c_args, c_arg, out_regs);
1514   }
1515 
1516   // RedefineClasses() tracing support for obsolete method entry
1517   if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) {
1518     // protect the args we've loaded
1519     save_args(masm, total_c_args, c_arg, out_regs);
1520     __ movoop(c_rarg1, JNIHandles::make_local(method()));
1521     __ call_VM_leaf(
1522       CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry),
1523       r15_thread, c_rarg1);
1524     restore_args(masm, total_c_args, c_arg, out_regs);
1525   }
1526 
1527   // Lock a synchronized method
1528 
1529   // Register definitions used by locking and unlocking
1530 
1531   const Register swap_reg = rax;  // Must use rax for cmpxchg instruction
1532   const Register obj_reg  = rbx;  // Will contain the oop
1533   const Register lock_reg = r13;  // Address of compiler lock object (BasicLock)
1534   const Register old_hdr  = r13;  // value of old header at unlock time
1535 
1536   Label slow_path_lock;
1537   Label lock_done;
1538 
1539   if (method->is_synchronized()) {
1540 
1541 
1542     const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes();
1543 
1544     // Get the handle (the 2nd argument)
1545     __ mov(oop_handle_reg, c_rarg1);
1546 
1547     // Get address of the box
1548 
1549     __ lea(lock_reg, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size));
1550 
1551     // Load the oop from the handle
1552     __ movptr(obj_reg, Address(oop_handle_reg, 0));
1553 
1554     if (UseBiasedLocking) {
1555       __ biased_locking_enter(lock_reg, obj_reg, swap_reg, rscratch1, false, lock_done, &slow_path_lock);
1556     }
1557 
1558     // Load immediate 1 into swap_reg %rax
1559     __ movl(swap_reg, 1);
1560 
1561     // Load (object->mark() | 1) into swap_reg %rax
1562     __ orptr(swap_reg, Address(obj_reg, 0));
1563 
1564     // Save (object->mark() | 1) into BasicLock's displaced header
1565     __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
1566 
1567     if (os::is_MP()) {
1568       __ lock();
1569     }
1570 
1571     // src -> dest iff dest == rax else rax <- dest
1572     __ cmpxchgptr(lock_reg, Address(obj_reg, 0));
1573     __ jcc(Assembler::equal, lock_done);
1574 
1575     // Hmm should this move to the slow path code area???
1576 
1577     // Test if the oopMark is an obvious stack pointer, i.e.,
1578     //  1) (mark & 3) == 0, and
1579     //  2) rsp <= mark < mark + os::pagesize()
1580     // These 3 tests can be done by evaluating the following
1581     // expression: ((mark - rsp) & (3 - os::vm_page_size())),
1582     // assuming both stack pointer and pagesize have their
1583     // least significant 2 bits clear.
1584     // NOTE: the oopMark is in swap_reg %rax as the result of cmpxchg
1585 
1586     __ subptr(swap_reg, rsp);
1587     __ andptr(swap_reg, 3 - os::vm_page_size());
1588 
1589     // Save the test result, for recursive case, the result is zero
1590     __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
1591     __ jcc(Assembler::notEqual, slow_path_lock);
1592 
1593     // Slow path will re-enter here
1594 
1595     __ bind(lock_done);
1596   }
1597 
1598 
1599   // Finally just about ready to make the JNI call
1600 
1601 
1602   // get JNIEnv* which is first argument to native
1603 
1604   __ lea(c_rarg0, Address(r15_thread, in_bytes(JavaThread::jni_environment_offset())));
1605 
1606   // Now set thread in native
1607   __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native);
1608 
1609   __ call(RuntimeAddress(method->native_function()));
1610 
1611     // Either restore the MXCSR register after returning from the JNI Call
1612     // or verify that it wasn't changed.
1613     if (RestoreMXCSROnJNICalls) {
1614       __ ldmxcsr(ExternalAddress(StubRoutines::x86::mxcsr_std()));
1615 
1616     }
1617     else if (CheckJNICalls ) {
1618       __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, StubRoutines::x86::verify_mxcsr_entry())));
1619     }
1620 
1621 
1622   // Unpack native results.
1623   switch (ret_type) {
1624   case T_BOOLEAN: __ c2bool(rax);            break;
1625   case T_CHAR   : __ movzwl(rax, rax);      break;
1626   case T_BYTE   : __ sign_extend_byte (rax); break;
1627   case T_SHORT  : __ sign_extend_short(rax); break;
1628   case T_INT    : /* nothing to do */        break;
1629   case T_DOUBLE :
1630   case T_FLOAT  :
1631     // Result is in xmm0 we'll save as needed
1632     break;
1633   case T_ARRAY:                 // Really a handle
1634   case T_OBJECT:                // Really a handle
1635       break; // can't de-handlize until after safepoint check
1636   case T_VOID: break;
1637   case T_LONG: break;
1638   default       : ShouldNotReachHere();
1639   }
1640 
1641   // Switch thread to "native transition" state before reading the synchronization state.
1642   // This additional state is necessary because reading and testing the synchronization
1643   // state is not atomic w.r.t. GC, as this scenario demonstrates:
1644   //     Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted.
1645   //     VM thread changes sync state to synchronizing and suspends threads for GC.
1646   //     Thread A is resumed to finish this native method, but doesn't block here since it
1647   //     didn't see any synchronization is progress, and escapes.
1648   __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native_trans);
1649 
1650   if(os::is_MP()) {
1651     if (UseMembar) {
1652       // Force this write out before the read below
1653       __ membar(Assembler::Membar_mask_bits(
1654            Assembler::LoadLoad | Assembler::LoadStore |
1655            Assembler::StoreLoad | Assembler::StoreStore));
1656     } else {
1657       // Write serialization page so VM thread can do a pseudo remote membar.
1658       // We use the current thread pointer to calculate a thread specific
1659       // offset to write to within the page. This minimizes bus traffic
1660       // due to cache line collision.
1661       __ serialize_memory(r15_thread, rcx);
1662     }
1663   }
1664 
1665 
1666   // check for safepoint operation in progress and/or pending suspend requests
1667   {
1668     Label Continue;
1669 
1670     __ cmp32(ExternalAddress((address)SafepointSynchronize::address_of_state()),
1671              SafepointSynchronize::_not_synchronized);
1672 
1673     Label L;
1674     __ jcc(Assembler::notEqual, L);
1675     __ cmpl(Address(r15_thread, JavaThread::suspend_flags_offset()), 0);
1676     __ jcc(Assembler::equal, Continue);
1677     __ bind(L);
1678 
1679     // Don't use call_VM as it will see a possible pending exception and forward it
1680     // and never return here preventing us from clearing _last_native_pc down below.
1681     // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are
1682     // preserved and correspond to the bcp/locals pointers. So we do a runtime call
1683     // by hand.
1684     //
1685     save_native_result(masm, ret_type, stack_slots);
1686     __ mov(c_rarg0, r15_thread);
1687     __ mov(r12, rsp); // remember sp
1688     __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows
1689     __ andptr(rsp, -16); // align stack as required by ABI
1690     __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans)));
1691     __ mov(rsp, r12); // restore sp
1692     __ reinit_heapbase();
1693     // Restore any method result value
1694     restore_native_result(masm, ret_type, stack_slots);
1695     __ bind(Continue);
1696   }
1697 
1698   // change thread state
1699   __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_Java);
1700 
1701   Label reguard;
1702   Label reguard_done;
1703   __ cmpl(Address(r15_thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_disabled);
1704   __ jcc(Assembler::equal, reguard);
1705   __ bind(reguard_done);
1706 
1707   // native result if any is live
1708 
1709   // Unlock
1710   Label unlock_done;
1711   Label slow_path_unlock;
1712   if (method->is_synchronized()) {
1713 
1714     // Get locked oop from the handle we passed to jni
1715     __ movptr(obj_reg, Address(oop_handle_reg, 0));
1716 
1717     Label done;
1718 
1719     if (UseBiasedLocking) {
1720       __ biased_locking_exit(obj_reg, old_hdr, done);
1721     }
1722 
1723     // Simple recursive lock?
1724 
1725     __ cmpptr(Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size), (int32_t)NULL_WORD);
1726     __ jcc(Assembler::equal, done);
1727 
1728     // Must save rax if if it is live now because cmpxchg must use it
1729     if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
1730       save_native_result(masm, ret_type, stack_slots);
1731     }
1732 
1733 
1734     // get address of the stack lock
1735     __ lea(rax, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size));
1736     //  get old displaced header
1737     __ movptr(old_hdr, Address(rax, 0));
1738 
1739     // Atomic swap old header if oop still contains the stack lock
1740     if (os::is_MP()) {
1741       __ lock();
1742     }
1743     __ cmpxchgptr(old_hdr, Address(obj_reg, 0));
1744     __ jcc(Assembler::notEqual, slow_path_unlock);
1745 
1746     // slow path re-enters here
1747     __ bind(unlock_done);
1748     if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
1749       restore_native_result(masm, ret_type, stack_slots);
1750     }
1751 
1752     __ bind(done);
1753 
1754   }
1755   {
1756     SkipIfEqual skip(masm, &DTraceMethodProbes, false);
1757     save_native_result(masm, ret_type, stack_slots);
1758     __ movoop(c_rarg1, JNIHandles::make_local(method()));
1759     __ call_VM_leaf(
1760          CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
1761          r15_thread, c_rarg1);
1762     restore_native_result(masm, ret_type, stack_slots);
1763   }
1764 
1765   __ reset_last_Java_frame(false, true);
1766 
1767   // Unpack oop result
1768   if (ret_type == T_OBJECT || ret_type == T_ARRAY) {
1769       Label L;
1770       __ testptr(rax, rax);
1771       __ jcc(Assembler::zero, L);
1772       __ movptr(rax, Address(rax, 0));
1773       __ bind(L);
1774       __ verify_oop(rax);
1775   }
1776 
1777   // reset handle block
1778   __ movptr(rcx, Address(r15_thread, JavaThread::active_handles_offset()));
1779   __ movptr(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), (int32_t)NULL_WORD);
1780 
1781   // pop our frame
1782 
1783   __ leave();
1784 
1785   // Any exception pending?
1786   __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
1787   __ jcc(Assembler::notEqual, exception_pending);
1788 
1789   // Return
1790 
1791   __ ret(0);
1792 
1793   // Unexpected paths are out of line and go here
1794 
1795   // forward the exception
1796   __ bind(exception_pending);
1797 
1798   // and forward the exception
1799   __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
1800 
1801 
1802   // Slow path locking & unlocking
1803   if (method->is_synchronized()) {
1804 
1805     // BEGIN Slow path lock
1806     __ bind(slow_path_lock);
1807 
1808     // has last_Java_frame setup. No exceptions so do vanilla call not call_VM
1809     // args are (oop obj, BasicLock* lock, JavaThread* thread)
1810 
1811     // protect the args we've loaded
1812     save_args(masm, total_c_args, c_arg, out_regs);
1813 
1814     __ mov(c_rarg0, obj_reg);
1815     __ mov(c_rarg1, lock_reg);
1816     __ mov(c_rarg2, r15_thread);
1817 
1818     // Not a leaf but we have last_Java_frame setup as we want
1819     __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), 3);
1820     restore_args(masm, total_c_args, c_arg, out_regs);
1821 
1822 #ifdef ASSERT
1823     { Label L;
1824     __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
1825     __ jcc(Assembler::equal, L);
1826     __ stop("no pending exception allowed on exit from monitorenter");
1827     __ bind(L);
1828     }
1829 #endif
1830     __ jmp(lock_done);
1831 
1832     // END Slow path lock
1833 
1834     // BEGIN Slow path unlock
1835     __ bind(slow_path_unlock);
1836 
1837     // If we haven't already saved the native result we must save it now as xmm registers
1838     // are still exposed.
1839 
1840     if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
1841       save_native_result(masm, ret_type, stack_slots);
1842     }
1843 
1844     __ lea(c_rarg1, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size));
1845 
1846     __ mov(c_rarg0, obj_reg);
1847     __ mov(r12, rsp); // remember sp
1848     __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows
1849     __ andptr(rsp, -16); // align stack as required by ABI
1850 
1851     // Save pending exception around call to VM (which contains an EXCEPTION_MARK)
1852     // NOTE that obj_reg == rbx currently
1853     __ movptr(rbx, Address(r15_thread, in_bytes(Thread::pending_exception_offset())));
1854     __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
1855 
1856     __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C)));
1857     __ mov(rsp, r12); // restore sp
1858     __ reinit_heapbase();
1859 #ifdef ASSERT
1860     {
1861       Label L;
1862       __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD);
1863       __ jcc(Assembler::equal, L);
1864       __ stop("no pending exception allowed on exit complete_monitor_unlocking_C");
1865       __ bind(L);
1866     }
1867 #endif /* ASSERT */
1868 
1869     __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), rbx);
1870 
1871     if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
1872       restore_native_result(masm, ret_type, stack_slots);
1873     }
1874     __ jmp(unlock_done);
1875 
1876     // END Slow path unlock
1877 
1878   } // synchronized
1879 
1880   // SLOW PATH Reguard the stack if needed
1881 
1882   __ bind(reguard);
1883   save_native_result(masm, ret_type, stack_slots);
1884   __ mov(r12, rsp); // remember sp
1885   __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows
1886   __ andptr(rsp, -16); // align stack as required by ABI
1887   __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages)));
1888   __ mov(rsp, r12); // restore sp
1889   __ reinit_heapbase();
1890   restore_native_result(masm, ret_type, stack_slots);
1891   // and continue
1892   __ jmp(reguard_done);
1893 
1894 
1895 
1896   __ flush();
1897 
1898   nmethod *nm = nmethod::new_native_nmethod(method,
1899                                             masm->code(),
1900                                             vep_offset,
1901                                             frame_complete,
1902                                             stack_slots / VMRegImpl::slots_per_word,
1903                                             (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
1904                                             in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size),
1905                                             oop_maps);
1906   return nm;
1907 
1908 }
1909 
1910 #ifdef HAVE_DTRACE_H
1911 // ---------------------------------------------------------------------------
1912 // Generate a dtrace nmethod for a given signature.  The method takes arguments
1913 // in the Java compiled code convention, marshals them to the native
1914 // abi and then leaves nops at the position you would expect to call a native
1915 // function. When the probe is enabled the nops are replaced with a trap
1916 // instruction that dtrace inserts and the trace will cause a notification
1917 // to dtrace.
1918 //
1919 // The probes are only able to take primitive types and java/lang/String as
1920 // arguments.  No other java types are allowed. Strings are converted to utf8
1921 // strings so that from dtrace point of view java strings are converted to C
1922 // strings. There is an arbitrary fixed limit on the total space that a method
1923 // can use for converting the strings. (256 chars per string in the signature).
1924 // So any java string larger then this is truncated.
1925 
1926 static int  fp_offset[ConcreteRegisterImpl::number_of_registers] = { 0 };
1927 static bool offsets_initialized = false;
1928 
1929 
1930 nmethod *SharedRuntime::generate_dtrace_nmethod(MacroAssembler *masm,
1931                                                 methodHandle method) {
1932 
1933 
1934   // generate_dtrace_nmethod is guarded by a mutex so we are sure to
1935   // be single threaded in this method.
1936   assert(AdapterHandlerLibrary_lock->owned_by_self(), "must be");
1937 
1938   if (!offsets_initialized) {
1939     fp_offset[c_rarg0->as_VMReg()->value()] = -1 * wordSize;
1940     fp_offset[c_rarg1->as_VMReg()->value()] = -2 * wordSize;
1941     fp_offset[c_rarg2->as_VMReg()->value()] = -3 * wordSize;
1942     fp_offset[c_rarg3->as_VMReg()->value()] = -4 * wordSize;
1943     fp_offset[c_rarg4->as_VMReg()->value()] = -5 * wordSize;
1944     fp_offset[c_rarg5->as_VMReg()->value()] = -6 * wordSize;
1945 
1946     fp_offset[c_farg0->as_VMReg()->value()] = -7 * wordSize;
1947     fp_offset[c_farg1->as_VMReg()->value()] = -8 * wordSize;
1948     fp_offset[c_farg2->as_VMReg()->value()] = -9 * wordSize;
1949     fp_offset[c_farg3->as_VMReg()->value()] = -10 * wordSize;
1950     fp_offset[c_farg4->as_VMReg()->value()] = -11 * wordSize;
1951     fp_offset[c_farg5->as_VMReg()->value()] = -12 * wordSize;
1952     fp_offset[c_farg6->as_VMReg()->value()] = -13 * wordSize;
1953     fp_offset[c_farg7->as_VMReg()->value()] = -14 * wordSize;
1954 
1955     offsets_initialized = true;
1956   }
1957   // Fill in the signature array, for the calling-convention call.
1958   int total_args_passed = method->size_of_parameters();
1959 
1960   BasicType* in_sig_bt  = NEW_RESOURCE_ARRAY(BasicType, total_args_passed);
1961   VMRegPair  *in_regs   = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed);
1962 
1963   // The signature we are going to use for the trap that dtrace will see
1964   // java/lang/String is converted. We drop "this" and any other object
1965   // is converted to NULL.  (A one-slot java/lang/Long object reference
1966   // is converted to a two-slot long, which is why we double the allocation).
1967   BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed * 2);
1968   VMRegPair* out_regs   = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed * 2);
1969 
1970   int i=0;
1971   int total_strings = 0;
1972   int first_arg_to_pass = 0;
1973   int total_c_args = 0;
1974 
1975   // Skip the receiver as dtrace doesn't want to see it
1976   if( !method->is_static() ) {
1977     in_sig_bt[i++] = T_OBJECT;
1978     first_arg_to_pass = 1;
1979   }
1980 
1981   // We need to convert the java args to where a native (non-jni) function
1982   // would expect them. To figure out where they go we convert the java
1983   // signature to a C signature.
1984 
1985   SignatureStream ss(method->signature());
1986   for ( ; !ss.at_return_type(); ss.next()) {
1987     BasicType bt = ss.type();
1988     in_sig_bt[i++] = bt;  // Collect remaining bits of signature
1989     out_sig_bt[total_c_args++] = bt;
1990     if( bt == T_OBJECT) {
1991       symbolOop s = ss.as_symbol_or_null();
1992       if (s == vmSymbols::java_lang_String()) {
1993         total_strings++;
1994         out_sig_bt[total_c_args-1] = T_ADDRESS;
1995       } else if (s == vmSymbols::java_lang_Boolean() ||
1996                  s == vmSymbols::java_lang_Character() ||
1997                  s == vmSymbols::java_lang_Byte() ||
1998                  s == vmSymbols::java_lang_Short() ||
1999                  s == vmSymbols::java_lang_Integer() ||
2000                  s == vmSymbols::java_lang_Float()) {
2001         out_sig_bt[total_c_args-1] = T_INT;
2002       } else if (s == vmSymbols::java_lang_Long() ||
2003                  s == vmSymbols::java_lang_Double()) {
2004         out_sig_bt[total_c_args-1] = T_LONG;
2005         out_sig_bt[total_c_args++] = T_VOID;
2006       }
2007     } else if ( bt == T_LONG || bt == T_DOUBLE ) {
2008       in_sig_bt[i++] = T_VOID;   // Longs & doubles take 2 Java slots
2009       // We convert double to long
2010       out_sig_bt[total_c_args-1] = T_LONG;
2011       out_sig_bt[total_c_args++] = T_VOID;
2012     } else if ( bt == T_FLOAT) {
2013       // We convert float to int
2014       out_sig_bt[total_c_args-1] = T_INT;
2015     }
2016   }
2017 
2018   assert(i==total_args_passed, "validly parsed signature");
2019 
2020   // Now get the compiled-Java layout as input arguments
2021   int comp_args_on_stack;
2022   comp_args_on_stack = SharedRuntime::java_calling_convention(
2023       in_sig_bt, in_regs, total_args_passed, false);
2024 
2025   // Now figure out where the args must be stored and how much stack space
2026   // they require (neglecting out_preserve_stack_slots but space for storing
2027   // the 1st six register arguments). It's weird see int_stk_helper.
2028 
2029   int out_arg_slots;
2030   out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args);
2031 
2032   // Calculate the total number of stack slots we will need.
2033 
2034   // First count the abi requirement plus all of the outgoing args
2035   int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
2036 
2037   // Now space for the string(s) we must convert
2038   int* string_locs   = NEW_RESOURCE_ARRAY(int, total_strings + 1);
2039   for (i = 0; i < total_strings ; i++) {
2040     string_locs[i] = stack_slots;
2041     stack_slots += max_dtrace_string_size / VMRegImpl::stack_slot_size;
2042   }
2043 
2044   // Plus the temps we might need to juggle register args
2045   // regs take two slots each
2046   stack_slots += (Argument::n_int_register_parameters_c +
2047                   Argument::n_float_register_parameters_c) * 2;
2048 
2049 
2050   // + 4 for return address (which we own) and saved rbp,
2051 
2052   stack_slots += 4;
2053 
2054   // Ok The space we have allocated will look like:
2055   //
2056   //
2057   // FP-> |                     |
2058   //      |---------------------|
2059   //      | string[n]           |
2060   //      |---------------------| <- string_locs[n]
2061   //      | string[n-1]         |
2062   //      |---------------------| <- string_locs[n-1]
2063   //      | ...                 |
2064   //      | ...                 |
2065   //      |---------------------| <- string_locs[1]
2066   //      | string[0]           |
2067   //      |---------------------| <- string_locs[0]
2068   //      | outbound memory     |
2069   //      | based arguments     |
2070   //      |                     |
2071   //      |---------------------|
2072   //      |                     |
2073   // SP-> | out_preserved_slots |
2074   //
2075   //
2076 
2077   // Now compute actual number of stack words we need rounding to make
2078   // stack properly aligned.
2079   stack_slots = round_to(stack_slots, 4 * VMRegImpl::slots_per_word);
2080 
2081   int stack_size = stack_slots * VMRegImpl::stack_slot_size;
2082 
2083   intptr_t start = (intptr_t)__ pc();
2084 
2085   // First thing make an ic check to see if we should even be here
2086 
2087   // We are free to use all registers as temps without saving them and
2088   // restoring them except rbp. rbp, is the only callee save register
2089   // as far as the interpreter and the compiler(s) are concerned.
2090 
2091   const Register ic_reg = rax;
2092   const Register receiver = rcx;
2093   Label hit;
2094   Label exception_pending;
2095 
2096 
2097   __ verify_oop(receiver);
2098   __ cmpl(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes()));
2099   __ jcc(Assembler::equal, hit);
2100 
2101   __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
2102 
2103   // verified entry must be aligned for code patching.
2104   // and the first 5 bytes must be in the same cache line
2105   // if we align at 8 then we will be sure 5 bytes are in the same line
2106   __ align(8);
2107 
2108   __ bind(hit);
2109 
2110   int vep_offset = ((intptr_t)__ pc()) - start;
2111 
2112 
2113   // The instruction at the verified entry point must be 5 bytes or longer
2114   // because it can be patched on the fly by make_non_entrant. The stack bang
2115   // instruction fits that requirement.
2116 
2117   // Generate stack overflow check
2118 
2119   if (UseStackBanging) {
2120     if (stack_size <= StackShadowPages*os::vm_page_size()) {
2121       __ bang_stack_with_offset(StackShadowPages*os::vm_page_size());
2122     } else {
2123       __ movl(rax, stack_size);
2124       __ bang_stack_size(rax, rbx);
2125     }
2126   } else {
2127     // need a 5 byte instruction to allow MT safe patching to non-entrant
2128     __ fat_nop();
2129   }
2130 
2131   assert(((uintptr_t)__ pc() - start - vep_offset) >= 5,
2132          "valid size for make_non_entrant");
2133 
2134   // Generate a new frame for the wrapper.
2135   __ enter();
2136 
2137   // -4 because return address is already present and so is saved rbp,
2138   if (stack_size - 2*wordSize != 0) {
2139     __ subq(rsp, stack_size - 2*wordSize);
2140   }
2141 
2142   // Frame is now completed as far a size and linkage.
2143 
2144   int frame_complete = ((intptr_t)__ pc()) - start;
2145 
2146   int c_arg, j_arg;
2147 
2148   // State of input register args
2149 
2150   bool  live[ConcreteRegisterImpl::number_of_registers];
2151 
2152   live[j_rarg0->as_VMReg()->value()] = false;
2153   live[j_rarg1->as_VMReg()->value()] = false;
2154   live[j_rarg2->as_VMReg()->value()] = false;
2155   live[j_rarg3->as_VMReg()->value()] = false;
2156   live[j_rarg4->as_VMReg()->value()] = false;
2157   live[j_rarg5->as_VMReg()->value()] = false;
2158 
2159   live[j_farg0->as_VMReg()->value()] = false;
2160   live[j_farg1->as_VMReg()->value()] = false;
2161   live[j_farg2->as_VMReg()->value()] = false;
2162   live[j_farg3->as_VMReg()->value()] = false;
2163   live[j_farg4->as_VMReg()->value()] = false;
2164   live[j_farg5->as_VMReg()->value()] = false;
2165   live[j_farg6->as_VMReg()->value()] = false;
2166   live[j_farg7->as_VMReg()->value()] = false;
2167 
2168 
2169   bool rax_is_zero = false;
2170 
2171   // All args (except strings) destined for the stack are moved first
2172   for (j_arg = first_arg_to_pass, c_arg = 0 ;
2173        j_arg < total_args_passed ; j_arg++, c_arg++ ) {
2174     VMRegPair src = in_regs[j_arg];
2175     VMRegPair dst = out_regs[c_arg];
2176 
2177     // Get the real reg value or a dummy (rsp)
2178 
2179     int src_reg = src.first()->is_reg() ?
2180                   src.first()->value() :
2181                   rsp->as_VMReg()->value();
2182 
2183     bool useless =  in_sig_bt[j_arg] == T_ARRAY ||
2184                     (in_sig_bt[j_arg] == T_OBJECT &&
2185                      out_sig_bt[c_arg] != T_INT &&
2186                      out_sig_bt[c_arg] != T_ADDRESS &&
2187                      out_sig_bt[c_arg] != T_LONG);
2188 
2189     live[src_reg] = !useless;
2190 
2191     if (dst.first()->is_stack()) {
2192 
2193       // Even though a string arg in a register is still live after this loop
2194       // after the string conversion loop (next) it will be dead so we take
2195       // advantage of that now for simpler code to manage live.
2196 
2197       live[src_reg] = false;
2198       switch (in_sig_bt[j_arg]) {
2199 
2200         case T_ARRAY:
2201         case T_OBJECT:
2202           {
2203             Address stack_dst(rsp, reg2offset_out(dst.first()));
2204 
2205             if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) {
2206               // need to unbox a one-word value
2207               Register in_reg = rax;
2208               if ( src.first()->is_reg() ) {
2209                 in_reg = src.first()->as_Register();
2210               } else {
2211                 __ movq(rax, Address(rbp, reg2offset_in(src.first())));
2212                 rax_is_zero = false;
2213               }
2214               Label skipUnbox;
2215               __ movptr(Address(rsp, reg2offset_out(dst.first())),
2216                         (int32_t)NULL_WORD);
2217               __ testq(in_reg, in_reg);
2218               __ jcc(Assembler::zero, skipUnbox);
2219 
2220               BasicType bt = out_sig_bt[c_arg];
2221               int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt);
2222               Address src1(in_reg, box_offset);
2223               if ( bt == T_LONG ) {
2224                 __ movq(in_reg,  src1);
2225                 __ movq(stack_dst, in_reg);
2226                 assert(out_sig_bt[c_arg+1] == T_VOID, "must be");
2227                 ++c_arg; // skip over T_VOID to keep the loop indices in sync
2228               } else {
2229                 __ movl(in_reg,  src1);
2230                 __ movl(stack_dst, in_reg);
2231               }
2232 
2233               __ bind(skipUnbox);
2234             } else if (out_sig_bt[c_arg] != T_ADDRESS) {
2235               // Convert the arg to NULL
2236               if (!rax_is_zero) {
2237                 __ xorq(rax, rax);
2238                 rax_is_zero = true;
2239               }
2240               __ movq(stack_dst, rax);
2241             }
2242           }
2243           break;
2244 
2245         case T_VOID:
2246           break;
2247 
2248         case T_FLOAT:
2249           // This does the right thing since we know it is destined for the
2250           // stack
2251           float_move(masm, src, dst);
2252           break;
2253 
2254         case T_DOUBLE:
2255           // This does the right thing since we know it is destined for the
2256           // stack
2257           double_move(masm, src, dst);
2258           break;
2259 
2260         case T_LONG :
2261           long_move(masm, src, dst);
2262           break;
2263 
2264         case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
2265 
2266         default:
2267           move32_64(masm, src, dst);
2268       }
2269     }
2270 
2271   }
2272 
2273   // If we have any strings we must store any register based arg to the stack
2274   // This includes any still live xmm registers too.
2275 
2276   int sid = 0;
2277 
2278   if (total_strings > 0 ) {
2279     for (j_arg = first_arg_to_pass, c_arg = 0 ;
2280          j_arg < total_args_passed ; j_arg++, c_arg++ ) {
2281       VMRegPair src = in_regs[j_arg];
2282       VMRegPair dst = out_regs[c_arg];
2283 
2284       if (src.first()->is_reg()) {
2285         Address src_tmp(rbp, fp_offset[src.first()->value()]);
2286 
2287         // string oops were left untouched by the previous loop even if the
2288         // eventual (converted) arg is destined for the stack so park them
2289         // away now (except for first)
2290 
2291         if (out_sig_bt[c_arg] == T_ADDRESS) {
2292           Address utf8_addr = Address(
2293               rsp, string_locs[sid++] * VMRegImpl::stack_slot_size);
2294           if (sid != 1) {
2295             // The first string arg won't be killed until after the utf8
2296             // conversion
2297             __ movq(utf8_addr, src.first()->as_Register());
2298           }
2299         } else if (dst.first()->is_reg()) {
2300           if (in_sig_bt[j_arg] == T_FLOAT || in_sig_bt[j_arg] == T_DOUBLE) {
2301 
2302             // Convert the xmm register to an int and store it in the reserved
2303             // location for the eventual c register arg
2304             XMMRegister f = src.first()->as_XMMRegister();
2305             if (in_sig_bt[j_arg] == T_FLOAT) {
2306               __ movflt(src_tmp, f);
2307             } else {
2308               __ movdbl(src_tmp, f);
2309             }
2310           } else {
2311             // If the arg is an oop type we don't support don't bother to store
2312             // it remember string was handled above.
2313             bool useless =  in_sig_bt[j_arg] == T_ARRAY ||
2314                             (in_sig_bt[j_arg] == T_OBJECT &&
2315                              out_sig_bt[c_arg] != T_INT &&
2316                              out_sig_bt[c_arg] != T_LONG);
2317 
2318             if (!useless) {
2319               __ movq(src_tmp, src.first()->as_Register());
2320             }
2321           }
2322         }
2323       }
2324       if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) {
2325         assert(out_sig_bt[c_arg+1] == T_VOID, "must be");
2326         ++c_arg; // skip over T_VOID to keep the loop indices in sync
2327       }
2328     }
2329 
2330     // Now that the volatile registers are safe, convert all the strings
2331     sid = 0;
2332 
2333     for (j_arg = first_arg_to_pass, c_arg = 0 ;
2334          j_arg < total_args_passed ; j_arg++, c_arg++ ) {
2335       if (out_sig_bt[c_arg] == T_ADDRESS) {
2336         // It's a string
2337         Address utf8_addr = Address(
2338             rsp, string_locs[sid++] * VMRegImpl::stack_slot_size);
2339         // The first string we find might still be in the original java arg
2340         // register
2341 
2342         VMReg src = in_regs[j_arg].first();
2343 
2344         // We will need to eventually save the final argument to the trap
2345         // in the von-volatile location dedicated to src. This is the offset
2346         // from fp we will use.
2347         int src_off = src->is_reg() ?
2348             fp_offset[src->value()] : reg2offset_in(src);
2349 
2350         // This is where the argument will eventually reside
2351         VMRegPair dst = out_regs[c_arg];
2352 
2353         if (src->is_reg()) {
2354           if (sid == 1) {
2355             __ movq(c_rarg0, src->as_Register());
2356           } else {
2357             __ movq(c_rarg0, utf8_addr);
2358           }
2359         } else {
2360           // arg is still in the original location
2361           __ movq(c_rarg0, Address(rbp, reg2offset_in(src)));
2362         }
2363         Label done, convert;
2364 
2365         // see if the oop is NULL
2366         __ testq(c_rarg0, c_rarg0);
2367         __ jcc(Assembler::notEqual, convert);
2368 
2369         if (dst.first()->is_reg()) {
2370           // Save the ptr to utf string in the origina src loc or the tmp
2371           // dedicated to it
2372           __ movq(Address(rbp, src_off), c_rarg0);
2373         } else {
2374           __ movq(Address(rsp, reg2offset_out(dst.first())), c_rarg0);
2375         }
2376         __ jmp(done);
2377 
2378         __ bind(convert);
2379 
2380         __ lea(c_rarg1, utf8_addr);
2381         if (dst.first()->is_reg()) {
2382           __ movq(Address(rbp, src_off), c_rarg1);
2383         } else {
2384           __ movq(Address(rsp, reg2offset_out(dst.first())), c_rarg1);
2385         }
2386         // And do the conversion
2387         __ call(RuntimeAddress(
2388                 CAST_FROM_FN_PTR(address, SharedRuntime::get_utf)));
2389 
2390         __ bind(done);
2391       }
2392       if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) {
2393         assert(out_sig_bt[c_arg+1] == T_VOID, "must be");
2394         ++c_arg; // skip over T_VOID to keep the loop indices in sync
2395       }
2396     }
2397     // The get_utf call killed all the c_arg registers
2398     live[c_rarg0->as_VMReg()->value()] = false;
2399     live[c_rarg1->as_VMReg()->value()] = false;
2400     live[c_rarg2->as_VMReg()->value()] = false;
2401     live[c_rarg3->as_VMReg()->value()] = false;
2402     live[c_rarg4->as_VMReg()->value()] = false;
2403     live[c_rarg5->as_VMReg()->value()] = false;
2404 
2405     live[c_farg0->as_VMReg()->value()] = false;
2406     live[c_farg1->as_VMReg()->value()] = false;
2407     live[c_farg2->as_VMReg()->value()] = false;
2408     live[c_farg3->as_VMReg()->value()] = false;
2409     live[c_farg4->as_VMReg()->value()] = false;
2410     live[c_farg5->as_VMReg()->value()] = false;
2411     live[c_farg6->as_VMReg()->value()] = false;
2412     live[c_farg7->as_VMReg()->value()] = false;
2413   }
2414 
2415   // Now we can finally move the register args to their desired locations
2416 
2417   rax_is_zero = false;
2418 
2419   for (j_arg = first_arg_to_pass, c_arg = 0 ;
2420        j_arg < total_args_passed ; j_arg++, c_arg++ ) {
2421 
2422     VMRegPair src = in_regs[j_arg];
2423     VMRegPair dst = out_regs[c_arg];
2424 
2425     // Only need to look for args destined for the interger registers (since we
2426     // convert float/double args to look like int/long outbound)
2427     if (dst.first()->is_reg()) {
2428       Register r =  dst.first()->as_Register();
2429 
2430       // Check if the java arg is unsupported and thereofre useless
2431       bool useless =  in_sig_bt[j_arg] == T_ARRAY ||
2432                       (in_sig_bt[j_arg] == T_OBJECT &&
2433                        out_sig_bt[c_arg] != T_INT &&
2434                        out_sig_bt[c_arg] != T_ADDRESS &&
2435                        out_sig_bt[c_arg] != T_LONG);
2436 
2437 
2438       // If we're going to kill an existing arg save it first
2439       if (live[dst.first()->value()]) {
2440         // you can't kill yourself
2441         if (src.first() != dst.first()) {
2442           __ movq(Address(rbp, fp_offset[dst.first()->value()]), r);
2443         }
2444       }
2445       if (src.first()->is_reg()) {
2446         if (live[src.first()->value()] ) {
2447           if (in_sig_bt[j_arg] == T_FLOAT) {
2448             __ movdl(r, src.first()->as_XMMRegister());
2449           } else if (in_sig_bt[j_arg] == T_DOUBLE) {
2450             __ movdq(r, src.first()->as_XMMRegister());
2451           } else if (r != src.first()->as_Register()) {
2452             if (!useless) {
2453               __ movq(r, src.first()->as_Register());
2454             }
2455           }
2456         } else {
2457           // If the arg is an oop type we don't support don't bother to store
2458           // it
2459           if (!useless) {
2460             if (in_sig_bt[j_arg] == T_DOUBLE ||
2461                 in_sig_bt[j_arg] == T_LONG  ||
2462                 in_sig_bt[j_arg] == T_OBJECT ) {
2463               __ movq(r, Address(rbp, fp_offset[src.first()->value()]));
2464             } else {
2465               __ movl(r, Address(rbp, fp_offset[src.first()->value()]));
2466             }
2467           }
2468         }
2469         live[src.first()->value()] = false;
2470       } else if (!useless) {
2471         // full sized move even for int should be ok
2472         __ movq(r, Address(rbp, reg2offset_in(src.first())));
2473       }
2474 
2475       // At this point r has the original java arg in the final location
2476       // (assuming it wasn't useless). If the java arg was an oop
2477       // we have a bit more to do
2478 
2479       if (in_sig_bt[j_arg] == T_ARRAY || in_sig_bt[j_arg] == T_OBJECT ) {
2480         if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) {
2481           // need to unbox a one-word value
2482           Label skip;
2483           __ testq(r, r);
2484           __ jcc(Assembler::equal, skip);
2485           BasicType bt = out_sig_bt[c_arg];
2486           int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt);
2487           Address src1(r, box_offset);
2488           if ( bt == T_LONG ) {
2489             __ movq(r, src1);
2490           } else {
2491             __ movl(r, src1);
2492           }
2493           __ bind(skip);
2494 
2495         } else if (out_sig_bt[c_arg] != T_ADDRESS) {
2496           // Convert the arg to NULL
2497           __ xorq(r, r);
2498         }
2499       }
2500 
2501       // dst can longer be holding an input value
2502       live[dst.first()->value()] = false;
2503     }
2504     if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) {
2505       assert(out_sig_bt[c_arg+1] == T_VOID, "must be");
2506       ++c_arg; // skip over T_VOID to keep the loop indices in sync
2507     }
2508   }
2509 
2510 
2511   // Ok now we are done. Need to place the nop that dtrace wants in order to
2512   // patch in the trap
2513   int patch_offset = ((intptr_t)__ pc()) - start;
2514 
2515   __ nop();
2516 
2517 
2518   // Return
2519 
2520   __ leave();
2521   __ ret(0);
2522 
2523   __ flush();
2524 
2525   nmethod *nm = nmethod::new_dtrace_nmethod(
2526       method, masm->code(), vep_offset, patch_offset, frame_complete,
2527       stack_slots / VMRegImpl::slots_per_word);
2528   return nm;
2529 
2530 }
2531 
2532 #endif // HAVE_DTRACE_H
2533 
2534 // this function returns the adjust size (in number of words) to a c2i adapter
2535 // activation for use during deoptimization
2536 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) {
2537   return (callee_locals - callee_parameters) * Interpreter::stackElementWords();
2538 }
2539 
2540 
2541 uint SharedRuntime::out_preserve_stack_slots() {
2542   return 0;
2543 }
2544 
2545 
2546 //------------------------------generate_deopt_blob----------------------------
2547 void SharedRuntime::generate_deopt_blob() {
2548   // Allocate space for the code
2549   ResourceMark rm;
2550   // Setup code generation tools
2551   CodeBuffer buffer("deopt_blob", 2048, 1024);
2552   MacroAssembler* masm = new MacroAssembler(&buffer);
2553   int frame_size_in_words;
2554   OopMap* map = NULL;
2555   OopMapSet *oop_maps = new OopMapSet();
2556 
2557   // -------------
2558   // This code enters when returning to a de-optimized nmethod.  A return
2559   // address has been pushed on the the stack, and return values are in
2560   // registers.
2561   // If we are doing a normal deopt then we were called from the patched
2562   // nmethod from the point we returned to the nmethod. So the return
2563   // address on the stack is wrong by NativeCall::instruction_size
2564   // We will adjust the value so it looks like we have the original return
2565   // address on the stack (like when we eagerly deoptimized).
2566   // In the case of an exception pending when deoptimizing, we enter
2567   // with a return address on the stack that points after the call we patched
2568   // into the exception handler. We have the following register state from,
2569   // e.g., the forward exception stub (see stubGenerator_x86_64.cpp).
2570   //    rax: exception oop
2571   //    rbx: exception handler
2572   //    rdx: throwing pc
2573   // So in this case we simply jam rdx into the useless return address and
2574   // the stack looks just like we want.
2575   //
2576   // At this point we need to de-opt.  We save the argument return
2577   // registers.  We call the first C routine, fetch_unroll_info().  This
2578   // routine captures the return values and returns a structure which
2579   // describes the current frame size and the sizes of all replacement frames.
2580   // The current frame is compiled code and may contain many inlined
2581   // functions, each with their own JVM state.  We pop the current frame, then
2582   // push all the new frames.  Then we call the C routine unpack_frames() to
2583   // populate these frames.  Finally unpack_frames() returns us the new target
2584   // address.  Notice that callee-save registers are BLOWN here; they have
2585   // already been captured in the vframeArray at the time the return PC was
2586   // patched.
2587   address start = __ pc();
2588   Label cont;
2589 
2590   // Prolog for non exception case!
2591 
2592   // Save everything in sight.
2593   map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
2594 
2595   // Normal deoptimization.  Save exec mode for unpack_frames.
2596   __ movl(r14, Deoptimization::Unpack_deopt); // callee-saved
2597   __ jmp(cont);
2598 
2599   int reexecute_offset = __ pc() - start;
2600 
2601   // Reexecute case
2602   // return address is the pc describes what bci to do re-execute at
2603 
2604   // No need to update map as each call to save_live_registers will produce identical oopmap
2605   (void) RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
2606 
2607   __ movl(r14, Deoptimization::Unpack_reexecute); // callee-saved
2608   __ jmp(cont);
2609 
2610   int exception_offset = __ pc() - start;
2611 
2612   // Prolog for exception case
2613 
2614   // all registers are dead at this entry point, except for rax, and
2615   // rdx which contain the exception oop and exception pc
2616   // respectively.  Set them in TLS and fall thru to the
2617   // unpack_with_exception_in_tls entry point.
2618 
2619   __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx);
2620   __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), rax);
2621 
2622   int exception_in_tls_offset = __ pc() - start;
2623 
2624   // new implementation because exception oop is now passed in JavaThread
2625 
2626   // Prolog for exception case
2627   // All registers must be preserved because they might be used by LinearScan
2628   // Exceptiop oop and throwing PC are passed in JavaThread
2629   // tos: stack at point of call to method that threw the exception (i.e. only
2630   // args are on the stack, no return address)
2631 
2632   // make room on stack for the return address
2633   // It will be patched later with the throwing pc. The correct value is not
2634   // available now because loading it from memory would destroy registers.
2635   __ push(0);
2636 
2637   // Save everything in sight.
2638   map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
2639 
2640   // Now it is safe to overwrite any register
2641 
2642   // Deopt during an exception.  Save exec mode for unpack_frames.
2643   __ movl(r14, Deoptimization::Unpack_exception); // callee-saved
2644 
2645   // load throwing pc from JavaThread and patch it as the return address
2646   // of the current frame. Then clear the field in JavaThread
2647 
2648   __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset()));
2649   __ movptr(Address(rbp, wordSize), rdx);
2650   __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD);
2651 
2652 #ifdef ASSERT
2653   // verify that there is really an exception oop in JavaThread
2654   __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset()));
2655   __ verify_oop(rax);
2656 
2657   // verify that there is no pending exception
2658   Label no_pending_exception;
2659   __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset()));
2660   __ testptr(rax, rax);
2661   __ jcc(Assembler::zero, no_pending_exception);
2662   __ stop("must not have pending exception here");
2663   __ bind(no_pending_exception);
2664 #endif
2665 
2666   __ bind(cont);
2667 
2668   // Call C code.  Need thread and this frame, but NOT official VM entry
2669   // crud.  We cannot block on this call, no GC can happen.
2670   //
2671   // UnrollBlock* fetch_unroll_info(JavaThread* thread)
2672 
2673   // fetch_unroll_info needs to call last_java_frame().
2674 
2675   __ set_last_Java_frame(noreg, noreg, NULL);
2676 #ifdef ASSERT
2677   { Label L;
2678     __ cmpptr(Address(r15_thread,
2679                     JavaThread::last_Java_fp_offset()),
2680             (int32_t)0);
2681     __ jcc(Assembler::equal, L);
2682     __ stop("SharedRuntime::generate_deopt_blob: last_Java_fp not cleared");
2683     __ bind(L);
2684   }
2685 #endif // ASSERT
2686   __ mov(c_rarg0, r15_thread);
2687   __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info)));
2688 
2689   // Need to have an oopmap that tells fetch_unroll_info where to
2690   // find any register it might need.
2691   oop_maps->add_gc_map(__ pc() - start, map);
2692 
2693   __ reset_last_Java_frame(false, false);
2694 
2695   // Load UnrollBlock* into rdi
2696   __ mov(rdi, rax);
2697 
2698    Label noException;
2699   __ cmpl(r14, Deoptimization::Unpack_exception);   // Was exception pending?
2700   __ jcc(Assembler::notEqual, noException);
2701   __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset()));
2702   // QQQ this is useless it was NULL above
2703   __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset()));
2704   __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int32_t)NULL_WORD);
2705   __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD);
2706 
2707   __ verify_oop(rax);
2708 
2709   // Overwrite the result registers with the exception results.
2710   __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax);
2711   // I think this is useless
2712   __ movptr(Address(rsp, RegisterSaver::rdx_offset_in_bytes()), rdx);
2713 
2714   __ bind(noException);
2715 
2716   // Only register save data is on the stack.
2717   // Now restore the result registers.  Everything else is either dead
2718   // or captured in the vframeArray.
2719   RegisterSaver::restore_result_registers(masm);
2720 
2721   // All of the register save area has been popped of the stack. Only the
2722   // return address remains.
2723 
2724   // Pop all the frames we must move/replace.
2725   //
2726   // Frame picture (youngest to oldest)
2727   // 1: self-frame (no frame link)
2728   // 2: deopting frame  (no frame link)
2729   // 3: caller of deopting frame (could be compiled/interpreted).
2730   //
2731   // Note: by leaving the return address of self-frame on the stack
2732   // and using the size of frame 2 to adjust the stack
2733   // when we are done the return to frame 3 will still be on the stack.
2734 
2735   // Pop deoptimized frame
2736   __ movl(rcx, Address(rdi, Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
2737   __ addptr(rsp, rcx);
2738 
2739   // rsp should be pointing at the return address to the caller (3)
2740 
2741   // Stack bang to make sure there's enough room for these interpreter frames.
2742   if (UseStackBanging) {
2743     __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
2744     __ bang_stack_size(rbx, rcx);
2745   }
2746 
2747   // Load address of array of frame pcs into rcx
2748   __ movptr(rcx, Address(rdi, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
2749 
2750   // Trash the old pc
2751   __ addptr(rsp, wordSize);
2752 
2753   // Load address of array of frame sizes into rsi
2754   __ movptr(rsi, Address(rdi, Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
2755 
2756   // Load counter into rdx
2757   __ movl(rdx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
2758 
2759   // Pick up the initial fp we should save
2760   __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_fp_offset_in_bytes()));
2761 
2762   // Now adjust the caller's stack to make up for the extra locals
2763   // but record the original sp so that we can save it in the skeletal interpreter
2764   // frame and the stack walking of interpreter_sender will get the unextended sp
2765   // value and not the "real" sp value.
2766 
2767   const Register sender_sp = r8;
2768 
2769   __ mov(sender_sp, rsp);
2770   __ movl(rbx, Address(rdi,
2771                        Deoptimization::UnrollBlock::
2772                        caller_adjustment_offset_in_bytes()));
2773   __ subptr(rsp, rbx);
2774 
2775   // Push interpreter frames in a loop
2776   Label loop;
2777   __ bind(loop);
2778   __ movptr(rbx, Address(rsi, 0));      // Load frame size
2779 #ifdef CC_INTERP
2780   __ subptr(rbx, 4*wordSize);           // we'll push pc and ebp by hand and
2781 #ifdef ASSERT
2782   __ push(0xDEADDEAD);                  // Make a recognizable pattern
2783   __ push(0xDEADDEAD);
2784 #else /* ASSERT */
2785   __ subptr(rsp, 2*wordSize);           // skip the "static long no_param"
2786 #endif /* ASSERT */
2787 #else
2788   __ subptr(rbx, 2*wordSize);           // We'll push pc and ebp by hand
2789 #endif // CC_INTERP
2790   __ pushptr(Address(rcx, 0));          // Save return address
2791   __ enter();                           // Save old & set new ebp
2792   __ subptr(rsp, rbx);                  // Prolog
2793 #ifdef CC_INTERP
2794   __ movptr(Address(rbp,
2795                   -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))),
2796             sender_sp); // Make it walkable
2797 #else /* CC_INTERP */
2798   // This value is corrected by layout_activation_impl
2799   __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD );
2800   __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), sender_sp); // Make it walkable
2801 #endif /* CC_INTERP */
2802   __ mov(sender_sp, rsp);               // Pass sender_sp to next frame
2803   __ addptr(rsi, wordSize);             // Bump array pointer (sizes)
2804   __ addptr(rcx, wordSize);             // Bump array pointer (pcs)
2805   __ decrementl(rdx);                   // Decrement counter
2806   __ jcc(Assembler::notZero, loop);
2807   __ pushptr(Address(rcx, 0));          // Save final return address
2808 
2809   // Re-push self-frame
2810   __ enter();                           // Save old & set new ebp
2811 
2812   // Allocate a full sized register save area.
2813   // Return address and rbp are in place, so we allocate two less words.
2814   __ subptr(rsp, (frame_size_in_words - 2) * wordSize);
2815 
2816   // Restore frame locals after moving the frame
2817   __ movdbl(Address(rsp, RegisterSaver::xmm0_offset_in_bytes()), xmm0);
2818   __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax);
2819 
2820   // Call C code.  Need thread but NOT official VM entry
2821   // crud.  We cannot block on this call, no GC can happen.  Call should
2822   // restore return values to their stack-slots with the new SP.
2823   //
2824   // void Deoptimization::unpack_frames(JavaThread* thread, int exec_mode)
2825 
2826   // Use rbp because the frames look interpreted now
2827   __ set_last_Java_frame(noreg, rbp, NULL);
2828 
2829   __ mov(c_rarg0, r15_thread);
2830   __ movl(c_rarg1, r14); // second arg: exec_mode
2831   __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2832 
2833   // Set an oopmap for the call site
2834   oop_maps->add_gc_map(__ pc() - start,
2835                        new OopMap( frame_size_in_words, 0 ));
2836 
2837   __ reset_last_Java_frame(true, false);
2838 
2839   // Collect return values
2840   __ movdbl(xmm0, Address(rsp, RegisterSaver::xmm0_offset_in_bytes()));
2841   __ movptr(rax, Address(rsp, RegisterSaver::rax_offset_in_bytes()));
2842   // I think this is useless (throwing pc?)
2843   __ movptr(rdx, Address(rsp, RegisterSaver::rdx_offset_in_bytes()));
2844 
2845   // Pop self-frame.
2846   __ leave();                           // Epilog
2847 
2848   // Jump to interpreter
2849   __ ret(0);
2850 
2851   // Make sure all code is generated
2852   masm->flush();
2853 
2854   _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words);
2855   _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset);
2856 }
2857 
2858 #ifdef COMPILER2
2859 //------------------------------generate_uncommon_trap_blob--------------------
2860 void SharedRuntime::generate_uncommon_trap_blob() {
2861   // Allocate space for the code
2862   ResourceMark rm;
2863   // Setup code generation tools
2864   CodeBuffer buffer("uncommon_trap_blob", 2048, 1024);
2865   MacroAssembler* masm = new MacroAssembler(&buffer);
2866 
2867   assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned");
2868 
2869   address start = __ pc();
2870 
2871   // Push self-frame.  We get here with a return address on the
2872   // stack, so rsp is 8-byte aligned until we allocate our frame.
2873   __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog!
2874 
2875   // No callee saved registers. rbp is assumed implicitly saved
2876   __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp);
2877 
2878   // compiler left unloaded_class_index in j_rarg0 move to where the
2879   // runtime expects it.
2880   __ movl(c_rarg1, j_rarg0);
2881 
2882   __ set_last_Java_frame(noreg, noreg, NULL);
2883 
2884   // Call C code.  Need thread but NOT official VM entry
2885   // crud.  We cannot block on this call, no GC can happen.  Call should
2886   // capture callee-saved registers as well as return values.
2887   // Thread is in rdi already.
2888   //
2889   // UnrollBlock* uncommon_trap(JavaThread* thread, jint unloaded_class_index);
2890 
2891   __ mov(c_rarg0, r15_thread);
2892   __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap)));
2893 
2894   // Set an oopmap for the call site
2895   OopMapSet* oop_maps = new OopMapSet();
2896   OopMap* map = new OopMap(SimpleRuntimeFrame::framesize, 0);
2897 
2898   // location of rbp is known implicitly by the frame sender code
2899 
2900   oop_maps->add_gc_map(__ pc() - start, map);
2901 
2902   __ reset_last_Java_frame(false, false);
2903 
2904   // Load UnrollBlock* into rdi
2905   __ mov(rdi, rax);
2906 
2907   // Pop all the frames we must move/replace.
2908   //
2909   // Frame picture (youngest to oldest)
2910   // 1: self-frame (no frame link)
2911   // 2: deopting frame  (no frame link)
2912   // 3: caller of deopting frame (could be compiled/interpreted).
2913 
2914   // Pop self-frame.  We have no frame, and must rely only on rax and rsp.
2915   __ addptr(rsp, (SimpleRuntimeFrame::framesize - 2) << LogBytesPerInt); // Epilog!
2916 
2917   // Pop deoptimized frame (int)
2918   __ movl(rcx, Address(rdi,
2919                        Deoptimization::UnrollBlock::
2920                        size_of_deoptimized_frame_offset_in_bytes()));
2921   __ addptr(rsp, rcx);
2922 
2923   // rsp should be pointing at the return address to the caller (3)
2924 
2925   // Stack bang to make sure there's enough room for these interpreter frames.
2926   if (UseStackBanging) {
2927     __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
2928     __ bang_stack_size(rbx, rcx);
2929   }
2930 
2931   // Load address of array of frame pcs into rcx (address*)
2932   __ movptr(rcx,
2933             Address(rdi,
2934                     Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
2935 
2936   // Trash the return pc
2937   __ addptr(rsp, wordSize);
2938 
2939   // Load address of array of frame sizes into rsi (intptr_t*)
2940   __ movptr(rsi, Address(rdi,
2941                          Deoptimization::UnrollBlock::
2942                          frame_sizes_offset_in_bytes()));
2943 
2944   // Counter
2945   __ movl(rdx, Address(rdi,
2946                        Deoptimization::UnrollBlock::
2947                        number_of_frames_offset_in_bytes())); // (int)
2948 
2949   // Pick up the initial fp we should save
2950   __ movptr(rbp,
2951             Address(rdi,
2952                     Deoptimization::UnrollBlock::initial_fp_offset_in_bytes()));
2953 
2954   // Now adjust the caller's stack to make up for the extra locals but
2955   // record the original sp so that we can save it in the skeletal
2956   // interpreter frame and the stack walking of interpreter_sender
2957   // will get the unextended sp value and not the "real" sp value.
2958 
2959   const Register sender_sp = r8;
2960 
2961   __ mov(sender_sp, rsp);
2962   __ movl(rbx, Address(rdi,
2963                        Deoptimization::UnrollBlock::
2964                        caller_adjustment_offset_in_bytes())); // (int)
2965   __ subptr(rsp, rbx);
2966 
2967   // Push interpreter frames in a loop
2968   Label loop;
2969   __ bind(loop);
2970   __ movptr(rbx, Address(rsi, 0)); // Load frame size
2971   __ subptr(rbx, 2 * wordSize);    // We'll push pc and rbp by hand
2972   __ pushptr(Address(rcx, 0));     // Save return address
2973   __ enter();                      // Save old & set new rbp
2974   __ subptr(rsp, rbx);             // Prolog
2975 #ifdef CC_INTERP
2976   __ movptr(Address(rbp,
2977                   -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))),
2978             sender_sp); // Make it walkable
2979 #else // CC_INTERP
2980   __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize),
2981             sender_sp);            // Make it walkable
2982   // This value is corrected by layout_activation_impl
2983   __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD );
2984 #endif // CC_INTERP
2985   __ mov(sender_sp, rsp);          // Pass sender_sp to next frame
2986   __ addptr(rsi, wordSize);        // Bump array pointer (sizes)
2987   __ addptr(rcx, wordSize);        // Bump array pointer (pcs)
2988   __ decrementl(rdx);              // Decrement counter
2989   __ jcc(Assembler::notZero, loop);
2990   __ pushptr(Address(rcx, 0));     // Save final return address
2991 
2992   // Re-push self-frame
2993   __ enter();                 // Save old & set new rbp
2994   __ subptr(rsp, (SimpleRuntimeFrame::framesize - 4) << LogBytesPerInt);
2995                               // Prolog
2996 
2997   // Use rbp because the frames look interpreted now
2998   __ set_last_Java_frame(noreg, rbp, NULL);
2999 
3000   // Call C code.  Need thread but NOT official VM entry
3001   // crud.  We cannot block on this call, no GC can happen.  Call should
3002   // restore return values to their stack-slots with the new SP.
3003   // Thread is in rdi already.
3004   //
3005   // BasicType unpack_frames(JavaThread* thread, int exec_mode);
3006 
3007   __ mov(c_rarg0, r15_thread);
3008   __ movl(c_rarg1, Deoptimization::Unpack_uncommon_trap);
3009   __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
3010 
3011   // Set an oopmap for the call site
3012   oop_maps->add_gc_map(__ pc() - start, new OopMap(SimpleRuntimeFrame::framesize, 0));
3013 
3014   __ reset_last_Java_frame(true, false);
3015 
3016   // Pop self-frame.
3017   __ leave();                 // Epilog
3018 
3019   // Jump to interpreter
3020   __ ret(0);
3021 
3022   // Make sure all code is generated
3023   masm->flush();
3024 
3025   _uncommon_trap_blob =  UncommonTrapBlob::create(&buffer, oop_maps,
3026                                                  SimpleRuntimeFrame::framesize >> 1);
3027 }
3028 #endif // COMPILER2
3029 
3030 
3031 //------------------------------generate_handler_blob------
3032 //
3033 // Generate a special Compile2Runtime blob that saves all registers,
3034 // and setup oopmap.
3035 //
3036 static SafepointBlob* generate_handler_blob(address call_ptr, bool cause_return) {
3037   assert(StubRoutines::forward_exception_entry() != NULL,
3038          "must be generated before");
3039 
3040   ResourceMark rm;
3041   OopMapSet *oop_maps = new OopMapSet();
3042   OopMap* map;
3043 
3044   // Allocate space for the code.  Setup code generation tools.
3045   CodeBuffer buffer("handler_blob", 2048, 1024);
3046   MacroAssembler* masm = new MacroAssembler(&buffer);
3047 
3048   address start   = __ pc();
3049   address call_pc = NULL;
3050   int frame_size_in_words;
3051 
3052   // Make room for return address (or push it again)
3053   if (!cause_return) {
3054     __ push(rbx);
3055   }
3056 
3057   // Save registers, fpu state, and flags
3058   map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
3059 
3060   // The following is basically a call_VM.  However, we need the precise
3061   // address of the call in order to generate an oopmap. Hence, we do all the
3062   // work outselves.
3063 
3064   __ set_last_Java_frame(noreg, noreg, NULL);
3065 
3066   // The return address must always be correct so that frame constructor never
3067   // sees an invalid pc.
3068 
3069   if (!cause_return) {
3070     // overwrite the dummy value we pushed on entry
3071     __ movptr(c_rarg0, Address(r15_thread, JavaThread::saved_exception_pc_offset()));
3072     __ movptr(Address(rbp, wordSize), c_rarg0);
3073   }
3074 
3075   // Do the call
3076   __ mov(c_rarg0, r15_thread);
3077   __ call(RuntimeAddress(call_ptr));
3078 
3079   // Set an oopmap for the call site.  This oopmap will map all
3080   // oop-registers and debug-info registers as callee-saved.  This
3081   // will allow deoptimization at this safepoint to find all possible
3082   // debug-info recordings, as well as let GC find all oops.
3083 
3084   oop_maps->add_gc_map( __ pc() - start, map);
3085 
3086   Label noException;
3087 
3088   __ reset_last_Java_frame(false, false);
3089 
3090   __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
3091   __ jcc(Assembler::equal, noException);
3092 
3093   // Exception pending
3094 
3095   RegisterSaver::restore_live_registers(masm);
3096 
3097   __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3098 
3099   // No exception case
3100   __ bind(noException);
3101 
3102   // Normal exit, restore registers and exit.
3103   RegisterSaver::restore_live_registers(masm);
3104 
3105   __ ret(0);
3106 
3107   // Make sure all code is generated
3108   masm->flush();
3109 
3110   // Fill-out other meta info
3111   return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words);
3112 }
3113 
3114 //
3115 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss
3116 //
3117 // Generate a stub that calls into vm to find out the proper destination
3118 // of a java call. All the argument registers are live at this point
3119 // but since this is generic code we don't know what they are and the caller
3120 // must do any gc of the args.
3121 //
3122 static RuntimeStub* generate_resolve_blob(address destination, const char* name) {
3123   assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
3124 
3125   // allocate space for the code
3126   ResourceMark rm;
3127 
3128   CodeBuffer buffer(name, 1000, 512);
3129   MacroAssembler* masm                = new MacroAssembler(&buffer);
3130 
3131   int frame_size_in_words;
3132 
3133   OopMapSet *oop_maps = new OopMapSet();
3134   OopMap* map = NULL;
3135 
3136   int start = __ offset();
3137 
3138   map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
3139 
3140   int frame_complete = __ offset();
3141 
3142   __ set_last_Java_frame(noreg, noreg, NULL);
3143 
3144   __ mov(c_rarg0, r15_thread);
3145 
3146   __ call(RuntimeAddress(destination));
3147 
3148 
3149   // Set an oopmap for the call site.
3150   // We need this not only for callee-saved registers, but also for volatile
3151   // registers that the compiler might be keeping live across a safepoint.
3152 
3153   oop_maps->add_gc_map( __ offset() - start, map);
3154 
3155   // rax contains the address we are going to jump to assuming no exception got installed
3156 
3157   // clear last_Java_sp
3158   __ reset_last_Java_frame(false, false);
3159   // check for pending exceptions
3160   Label pending;
3161   __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
3162   __ jcc(Assembler::notEqual, pending);
3163 
3164   // get the returned methodOop
3165   __ movptr(rbx, Address(r15_thread, JavaThread::vm_result_offset()));
3166   __ movptr(Address(rsp, RegisterSaver::rbx_offset_in_bytes()), rbx);
3167 
3168   __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax);
3169 
3170   RegisterSaver::restore_live_registers(masm);
3171 
3172   // We are back the the original state on entry and ready to go.
3173 
3174   __ jmp(rax);
3175 
3176   // Pending exception after the safepoint
3177 
3178   __ bind(pending);
3179 
3180   RegisterSaver::restore_live_registers(masm);
3181 
3182   // exception pending => remove activation and forward to exception handler
3183 
3184   __ movptr(Address(r15_thread, JavaThread::vm_result_offset()), (int)NULL_WORD);
3185 
3186   __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset()));
3187   __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3188 
3189   // -------------
3190   // make sure all code is generated
3191   masm->flush();
3192 
3193   // return the  blob
3194   // frame_size_words or bytes??
3195   return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_in_words, oop_maps, true);
3196 }
3197 
3198 
3199 void SharedRuntime::generate_stubs() {
3200 
3201   _wrong_method_blob = generate_resolve_blob(CAST_FROM_FN_PTR(address, SharedRuntime::handle_wrong_method),
3202                                         "wrong_method_stub");
3203   _ic_miss_blob =      generate_resolve_blob(CAST_FROM_FN_PTR(address, SharedRuntime::handle_wrong_method_ic_miss),
3204                                         "ic_miss_stub");
3205   _resolve_opt_virtual_call_blob = generate_resolve_blob(CAST_FROM_FN_PTR(address, SharedRuntime::resolve_opt_virtual_call_C),
3206                                         "resolve_opt_virtual_call");
3207 
3208   _resolve_virtual_call_blob = generate_resolve_blob(CAST_FROM_FN_PTR(address, SharedRuntime::resolve_virtual_call_C),
3209                                         "resolve_virtual_call");
3210 
3211   _resolve_static_call_blob = generate_resolve_blob(CAST_FROM_FN_PTR(address, SharedRuntime::resolve_static_call_C),
3212                                         "resolve_static_call");
3213   _polling_page_safepoint_handler_blob =
3214     generate_handler_blob(CAST_FROM_FN_PTR(address,
3215                    SafepointSynchronize::handle_polling_page_exception), false);
3216 
3217   _polling_page_return_handler_blob =
3218     generate_handler_blob(CAST_FROM_FN_PTR(address,
3219                    SafepointSynchronize::handle_polling_page_exception), true);
3220 
3221   generate_deopt_blob();
3222 
3223 #ifdef COMPILER2
3224   generate_uncommon_trap_blob();
3225 #endif // COMPILER2
3226 }
3227 
3228 
3229 #ifdef COMPILER2
3230 // This is here instead of runtime_x86_64.cpp because it uses SimpleRuntimeFrame
3231 //
3232 //------------------------------generate_exception_blob---------------------------
3233 // creates exception blob at the end
3234 // Using exception blob, this code is jumped from a compiled method.
3235 // (see emit_exception_handler in x86_64.ad file)
3236 //
3237 // Given an exception pc at a call we call into the runtime for the
3238 // handler in this method. This handler might merely restore state
3239 // (i.e. callee save registers) unwind the frame and jump to the
3240 // exception handler for the nmethod if there is no Java level handler
3241 // for the nmethod.
3242 //
3243 // This code is entered with a jmp.
3244 //
3245 // Arguments:
3246 //   rax: exception oop
3247 //   rdx: exception pc
3248 //
3249 // Results:
3250 //   rax: exception oop
3251 //   rdx: exception pc in caller or ???
3252 //   destination: exception handler of caller
3253 //
3254 // Note: the exception pc MUST be at a call (precise debug information)
3255 //       Registers rax, rdx, rcx, rsi, rdi, r8-r11 are not callee saved.
3256 //
3257 
3258 void OptoRuntime::generate_exception_blob() {
3259   assert(!OptoRuntime::is_callee_saved_register(RDX_num), "");
3260   assert(!OptoRuntime::is_callee_saved_register(RAX_num), "");
3261   assert(!OptoRuntime::is_callee_saved_register(RCX_num), "");
3262 
3263   assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned");
3264 
3265   // Allocate space for the code
3266   ResourceMark rm;
3267   // Setup code generation tools
3268   CodeBuffer buffer("exception_blob", 2048, 1024);
3269   MacroAssembler* masm = new MacroAssembler(&buffer);
3270 
3271 
3272   address start = __ pc();
3273 
3274   // Exception pc is 'return address' for stack walker
3275   __ push(rdx);
3276   __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Prolog
3277 
3278   // Save callee-saved registers.  See x86_64.ad.
3279 
3280   // rbp is an implicitly saved callee saved register (i.e. the calling
3281   // convention will save restore it in prolog/epilog) Other than that
3282   // there are no callee save registers now that adapter frames are gone.
3283 
3284   __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp);
3285 
3286   // Store exception in Thread object. We cannot pass any arguments to the
3287   // handle_exception call, since we do not want to make any assumption
3288   // about the size of the frame where the exception happened in.
3289   // c_rarg0 is either rdi (Linux) or rcx (Windows).
3290   __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()),rax);
3291   __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx);
3292 
3293   // This call does all the hard work.  It checks if an exception handler
3294   // exists in the method.
3295   // If so, it returns the handler address.
3296   // If not, it prepares for stack-unwinding, restoring the callee-save
3297   // registers of the frame being removed.
3298   //
3299   // address OptoRuntime::handle_exception_C(JavaThread* thread)
3300 
3301   __ set_last_Java_frame(noreg, noreg, NULL);
3302   __ mov(c_rarg0, r15_thread);
3303   __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, OptoRuntime::handle_exception_C)));
3304 
3305   // Set an oopmap for the call site.  This oopmap will only be used if we
3306   // are unwinding the stack.  Hence, all locations will be dead.
3307   // Callee-saved registers will be the same as the frame above (i.e.,
3308   // handle_exception_stub), since they were restored when we got the
3309   // exception.
3310 
3311   OopMapSet* oop_maps = new OopMapSet();
3312 
3313   oop_maps->add_gc_map( __ pc()-start, new OopMap(SimpleRuntimeFrame::framesize, 0));
3314 
3315   __ reset_last_Java_frame(false, false);
3316 
3317   // Restore callee-saved registers
3318 
3319   // rbp is an implicitly saved callee saved register (i.e. the calling
3320   // convention will save restore it in prolog/epilog) Other than that
3321   // there are no callee save registers no that adapter frames are gone.
3322 
3323   __ movptr(rbp, Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt));
3324 
3325   __ addptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog
3326   __ pop(rdx);                  // No need for exception pc anymore
3327 
3328   // rax: exception handler
3329 
3330   // Restore SP from BP if the exception PC is a MethodHandle call.
3331   __ cmpl(Address(r15_thread, JavaThread::is_method_handle_exception_offset()), 0);
3332   __ cmovptr(Assembler::notEqual, rsp, rbp);
3333 
3334   // We have a handler in rax (could be deopt blob).
3335   __ mov(r8, rax);
3336 
3337   // Get the exception oop
3338   __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset()));
3339   // Get the exception pc in case we are deoptimized
3340   __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset()));
3341 #ifdef ASSERT
3342   __ movptr(Address(r15_thread, JavaThread::exception_handler_pc_offset()), (int)NULL_WORD);
3343   __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int)NULL_WORD);
3344 #endif
3345   // Clear the exception oop so GC no longer processes it as a root.
3346   __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int)NULL_WORD);
3347 
3348   // rax: exception oop
3349   // r8:  exception handler
3350   // rdx: exception pc
3351   // Jump to handler
3352 
3353   __ jmp(r8);
3354 
3355   // Make sure all code is generated
3356   masm->flush();
3357 
3358   // Set exception blob
3359   _exception_blob =  ExceptionBlob::create(&buffer, oop_maps, SimpleRuntimeFrame::framesize >> 1);
3360 }
3361 #endif // COMPILER2
--- EOF ---