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--- old/src/cpu/sparc/vm/c1_Runtime1_sparc.cpp
+++ new/src/cpu/sparc/vm/c1_Runtime1_sparc.cpp
1 1 /*
2 2 * Copyright 1999-2010 Sun Microsystems, Inc. All Rights Reserved.
3 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 4 *
5 5 * This code is free software; you can redistribute it and/or modify it
6 6 * under the terms of the GNU General Public License version 2 only, as
7 7 * published by the Free Software Foundation.
8 8 *
9 9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 12 * version 2 for more details (a copy is included in the LICENSE file that
13 13 * accompanied this code).
14 14 *
15 15 * You should have received a copy of the GNU General Public License version
16 16 * 2 along with this work; if not, write to the Free Software Foundation,
17 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 18 *
19 19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
20 20 * CA 95054 USA or visit www.sun.com if you need additional information or
21 21 * have any questions.
22 22 *
23 23 */
24 24
25 25 #include "incls/_precompiled.incl"
26 26 #include "incls/_c1_Runtime1_sparc.cpp.incl"
27 27
28 28 // Implementation of StubAssembler
29 29
30 30 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry_point, int number_of_arguments) {
31 31 // for sparc changing the number of arguments doesn't change
32 32 // anything about the frame size so we'll always lie and claim that
33 33 // we are only passing 1 argument.
34 34 set_num_rt_args(1);
35 35
36 36 assert_not_delayed();
37 37 // bang stack before going to runtime
38 38 set(-os::vm_page_size() + STACK_BIAS, G3_scratch);
39 39 st(G0, SP, G3_scratch);
40 40
41 41 // debugging support
42 42 assert(number_of_arguments >= 0 , "cannot have negative number of arguments");
43 43
44 44 set_last_Java_frame(SP, noreg);
45 45 if (VerifyThread) mov(G2_thread, O0); // about to be smashed; pass early
46 46 save_thread(L7_thread_cache);
47 47 // do the call
48 48 call(entry_point, relocInfo::runtime_call_type);
49 49 if (!VerifyThread) {
50 50 delayed()->mov(G2_thread, O0); // pass thread as first argument
51 51 } else {
52 52 delayed()->nop(); // (thread already passed)
53 53 }
54 54 int call_offset = offset(); // offset of return address
55 55 restore_thread(L7_thread_cache);
56 56 reset_last_Java_frame();
57 57
58 58 // check for pending exceptions
59 59 { Label L;
60 60 Address exception_addr(G2_thread, Thread::pending_exception_offset());
61 61 ld_ptr(exception_addr, Gtemp);
62 62 br_null(Gtemp, false, pt, L);
63 63 delayed()->nop();
64 64 Address vm_result_addr(G2_thread, JavaThread::vm_result_offset());
65 65 st_ptr(G0, vm_result_addr);
66 66 Address vm_result_addr_2(G2_thread, JavaThread::vm_result_2_offset());
67 67 st_ptr(G0, vm_result_addr_2);
68 68
69 69 if (frame_size() == no_frame_size) {
70 70 // we use O7 linkage so that forward_exception_entry has the issuing PC
71 71 call(StubRoutines::forward_exception_entry(), relocInfo::runtime_call_type);
72 72 delayed()->restore();
73 73 } else if (_stub_id == Runtime1::forward_exception_id) {
74 74 should_not_reach_here();
75 75 } else {
76 76 AddressLiteral exc(Runtime1::entry_for(Runtime1::forward_exception_id));
77 77 jump_to(exc, G4);
78 78 delayed()->nop();
79 79 }
80 80 bind(L);
81 81 }
82 82
83 83 // get oop result if there is one and reset the value in the thread
84 84 if (oop_result1->is_valid()) { // get oop result if there is one and reset it in the thread
85 85 get_vm_result (oop_result1);
86 86 } else {
87 87 // be a little paranoid and clear the result
88 88 Address vm_result_addr(G2_thread, JavaThread::vm_result_offset());
89 89 st_ptr(G0, vm_result_addr);
90 90 }
91 91
92 92 if (oop_result2->is_valid()) {
93 93 get_vm_result_2(oop_result2);
94 94 } else {
95 95 // be a little paranoid and clear the result
96 96 Address vm_result_addr_2(G2_thread, JavaThread::vm_result_2_offset());
97 97 st_ptr(G0, vm_result_addr_2);
98 98 }
99 99
100 100 return call_offset;
101 101 }
102 102
103 103
104 104 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1) {
105 105 // O0 is reserved for the thread
106 106 mov(arg1, O1);
107 107 return call_RT(oop_result1, oop_result2, entry, 1);
108 108 }
109 109
110 110
111 111 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1, Register arg2) {
112 112 // O0 is reserved for the thread
113 113 mov(arg1, O1);
114 114 mov(arg2, O2); assert(arg2 != O1, "smashed argument");
115 115 return call_RT(oop_result1, oop_result2, entry, 2);
116 116 }
117 117
118 118
119 119 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1, Register arg2, Register arg3) {
120 120 // O0 is reserved for the thread
121 121 mov(arg1, O1);
122 122 mov(arg2, O2); assert(arg2 != O1, "smashed argument");
123 123 mov(arg3, O3); assert(arg3 != O1 && arg3 != O2, "smashed argument");
124 124 return call_RT(oop_result1, oop_result2, entry, 3);
125 125 }
126 126
127 127
128 128 // Implementation of Runtime1
129 129
130 130 #define __ sasm->
131 131
132 132 static int cpu_reg_save_offsets[FrameMap::nof_cpu_regs];
133 133 static int fpu_reg_save_offsets[FrameMap::nof_fpu_regs];
134 134 static int reg_save_size_in_words;
135 135 static int frame_size_in_bytes = -1;
136 136
137 137 static OopMap* generate_oop_map(StubAssembler* sasm, bool save_fpu_registers) {
138 138 assert(frame_size_in_bytes == __ total_frame_size_in_bytes(reg_save_size_in_words),
139 139 " mismatch in calculation");
140 140 sasm->set_frame_size(frame_size_in_bytes / BytesPerWord);
141 141 int frame_size_in_slots = frame_size_in_bytes / sizeof(jint);
142 142 OopMap* oop_map = new OopMap(frame_size_in_slots, 0);
143 143
144 144 int i;
145 145 for (i = 0; i < FrameMap::nof_cpu_regs; i++) {
146 146 Register r = as_Register(i);
147 147 if (r == G1 || r == G3 || r == G4 || r == G5) {
148 148 int sp_offset = cpu_reg_save_offsets[i];
149 149 oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset),
150 150 r->as_VMReg());
151 151 }
152 152 }
153 153
154 154 if (save_fpu_registers) {
155 155 for (i = 0; i < FrameMap::nof_fpu_regs; i++) {
156 156 FloatRegister r = as_FloatRegister(i);
157 157 int sp_offset = fpu_reg_save_offsets[i];
158 158 oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset),
159 159 r->as_VMReg());
160 160 }
161 161 }
162 162 return oop_map;
163 163 }
164 164
165 165 static OopMap* save_live_registers(StubAssembler* sasm, bool save_fpu_registers = true) {
166 166 assert(frame_size_in_bytes == __ total_frame_size_in_bytes(reg_save_size_in_words),
167 167 " mismatch in calculation");
168 168 __ save_frame_c1(frame_size_in_bytes);
169 169 sasm->set_frame_size(frame_size_in_bytes / BytesPerWord);
170 170
171 171 // Record volatile registers as callee-save values in an OopMap so their save locations will be
172 172 // propagated to the caller frame's RegisterMap during StackFrameStream construction (needed for
173 173 // deoptimization; see compiledVFrame::create_stack_value). The caller's I, L and O registers
174 174 // are saved in register windows - I's and L's in the caller's frame and O's in the stub frame
175 175 // (as the stub's I's) when the runtime routine called by the stub creates its frame.
176 176 // OopMap frame sizes are in c2 stack slot sizes (sizeof(jint))
177 177
178 178 int i;
179 179 for (i = 0; i < FrameMap::nof_cpu_regs; i++) {
180 180 Register r = as_Register(i);
181 181 if (r == G1 || r == G3 || r == G4 || r == G5) {
182 182 int sp_offset = cpu_reg_save_offsets[i];
183 183 __ st_ptr(r, SP, (sp_offset * BytesPerWord) + STACK_BIAS);
184 184 }
185 185 }
186 186
187 187 if (save_fpu_registers) {
188 188 for (i = 0; i < FrameMap::nof_fpu_regs; i++) {
189 189 FloatRegister r = as_FloatRegister(i);
190 190 int sp_offset = fpu_reg_save_offsets[i];
191 191 __ stf(FloatRegisterImpl::S, r, SP, (sp_offset * BytesPerWord) + STACK_BIAS);
192 192 }
193 193 }
194 194
195 195 return generate_oop_map(sasm, save_fpu_registers);
196 196 }
197 197
198 198 static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = true) {
199 199 for (int i = 0; i < FrameMap::nof_cpu_regs; i++) {
200 200 Register r = as_Register(i);
201 201 if (r == G1 || r == G3 || r == G4 || r == G5) {
202 202 __ ld_ptr(SP, (cpu_reg_save_offsets[i] * BytesPerWord) + STACK_BIAS, r);
203 203 }
204 204 }
205 205
206 206 if (restore_fpu_registers) {
207 207 for (int i = 0; i < FrameMap::nof_fpu_regs; i++) {
208 208 FloatRegister r = as_FloatRegister(i);
209 209 __ ldf(FloatRegisterImpl::S, SP, (fpu_reg_save_offsets[i] * BytesPerWord) + STACK_BIAS, r);
210 210 }
211 211 }
212 212 }
213 213
214 214
215 215 void Runtime1::initialize_pd() {
216 216 // compute word offsets from SP at which live (non-windowed) registers are captured by stub routines
217 217 //
218 218 // A stub routine will have a frame that is at least large enough to hold
219 219 // a register window save area (obviously) and the volatile g registers
220 220 // and floating registers. A user of save_live_registers can have a frame
221 221 // that has more scratch area in it (although typically they will use L-regs).
222 222 // in that case the frame will look like this (stack growing down)
223 223 //
224 224 // FP -> | |
225 225 // | scratch mem |
226 226 // | " " |
227 227 // --------------
228 228 // | float regs |
229 229 // | " " |
230 230 // ---------------
231 231 // | G regs |
232 232 // | " " |
233 233 // ---------------
234 234 // | abi reg. |
235 235 // | window save |
236 236 // | area |
237 237 // SP -> ---------------
238 238 //
239 239 int i;
240 240 int sp_offset = round_to(frame::register_save_words, 2); // start doubleword aligned
241 241
242 242 // only G int registers are saved explicitly; others are found in register windows
243 243 for (i = 0; i < FrameMap::nof_cpu_regs; i++) {
244 244 Register r = as_Register(i);
245 245 if (r == G1 || r == G3 || r == G4 || r == G5) {
246 246 cpu_reg_save_offsets[i] = sp_offset;
247 247 sp_offset++;
248 248 }
249 249 }
250 250
251 251 // all float registers are saved explicitly
252 252 assert(FrameMap::nof_fpu_regs == 32, "double registers not handled here");
253 253 for (i = 0; i < FrameMap::nof_fpu_regs; i++) {
254 254 fpu_reg_save_offsets[i] = sp_offset;
255 255 sp_offset++;
256 256 }
257 257 reg_save_size_in_words = sp_offset - frame::memory_parameter_word_sp_offset;
258 258 // this should match assembler::total_frame_size_in_bytes, which
259 259 // isn't callable from this context. It's checked by an assert when
260 260 // it's used though.
261 261 frame_size_in_bytes = align_size_up(sp_offset * wordSize, 8);
262 262 }
263 263
264 264
265 265 OopMapSet* Runtime1::generate_exception_throw(StubAssembler* sasm, address target, bool has_argument) {
266 266 // make a frame and preserve the caller's caller-save registers
267 267 OopMap* oop_map = save_live_registers(sasm);
268 268 int call_offset;
269 269 if (!has_argument) {
270 270 call_offset = __ call_RT(noreg, noreg, target);
271 271 } else {
272 272 call_offset = __ call_RT(noreg, noreg, target, G4);
273 273 }
274 274 OopMapSet* oop_maps = new OopMapSet();
275 275 oop_maps->add_gc_map(call_offset, oop_map);
276 276
277 277 __ should_not_reach_here();
278 278 return oop_maps;
279 279 }
280 280
281 281
282 282 OopMapSet* Runtime1::generate_stub_call(StubAssembler* sasm, Register result, address target,
283 283 Register arg1, Register arg2, Register arg3) {
284 284 // make a frame and preserve the caller's caller-save registers
285 285 OopMap* oop_map = save_live_registers(sasm);
286 286
287 287 int call_offset;
288 288 if (arg1 == noreg) {
289 289 call_offset = __ call_RT(result, noreg, target);
290 290 } else if (arg2 == noreg) {
291 291 call_offset = __ call_RT(result, noreg, target, arg1);
292 292 } else if (arg3 == noreg) {
293 293 call_offset = __ call_RT(result, noreg, target, arg1, arg2);
294 294 } else {
295 295 call_offset = __ call_RT(result, noreg, target, arg1, arg2, arg3);
296 296 }
297 297 OopMapSet* oop_maps = NULL;
298 298
299 299 oop_maps = new OopMapSet();
300 300 oop_maps->add_gc_map(call_offset, oop_map);
301 301 restore_live_registers(sasm);
302 302
303 303 __ ret();
304 304 __ delayed()->restore();
305 305
306 306 return oop_maps;
307 307 }
308 308
309 309
310 310 OopMapSet* Runtime1::generate_patching(StubAssembler* sasm, address target) {
311 311 // make a frame and preserve the caller's caller-save registers
312 312 OopMap* oop_map = save_live_registers(sasm);
313 313
314 314 // call the runtime patching routine, returns non-zero if nmethod got deopted.
315 315 int call_offset = __ call_RT(noreg, noreg, target);
316 316 OopMapSet* oop_maps = new OopMapSet();
317 317 oop_maps->add_gc_map(call_offset, oop_map);
318 318
319 319 // re-execute the patched instruction or, if the nmethod was deoptmized, return to the
320 320 // deoptimization handler entry that will cause re-execution of the current bytecode
321 321 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
322 322 assert(deopt_blob != NULL, "deoptimization blob must have been created");
323 323
324 324 Label no_deopt;
325 325 __ tst(O0);
326 326 __ brx(Assembler::equal, false, Assembler::pt, no_deopt);
327 327 __ delayed()->nop();
328 328
329 329 // return to the deoptimization handler entry for unpacking and rexecute
330 330 // if we simply returned the we'd deopt as if any call we patched had just
331 331 // returned.
332 332
333 333 restore_live_registers(sasm);
334 334 __ restore();
335 335 __ br(Assembler::always, false, Assembler::pt, deopt_blob->unpack_with_reexecution(), relocInfo::runtime_call_type);
336 336 __ delayed()->nop();
337 337
338 338 __ bind(no_deopt);
339 339 restore_live_registers(sasm);
340 340 __ ret();
341 341 __ delayed()->restore();
342 342
343 343 return oop_maps;
344 344 }
345 345
346 346 OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) {
347 347
348 348 OopMapSet* oop_maps = NULL;
349 349 // for better readability
350 350 const bool must_gc_arguments = true;
351 351 const bool dont_gc_arguments = false;
352 352
353 353 // stub code & info for the different stubs
354 354 switch (id) {
355 355 case forward_exception_id:
356 356 {
357 357 // we're handling an exception in the context of a compiled
358 358 // frame. The registers have been saved in the standard
359 359 // places. Perform an exception lookup in the caller and
360 360 // dispatch to the handler if found. Otherwise unwind and
361 361 // dispatch to the callers exception handler.
362 362
363 363 oop_maps = new OopMapSet();
364 364 OopMap* oop_map = generate_oop_map(sasm, true);
365 365
366 366 // transfer the pending exception to the exception_oop
367 367 __ ld_ptr(G2_thread, in_bytes(JavaThread::pending_exception_offset()), Oexception);
368 368 __ ld_ptr(Oexception, 0, G0);
369 369 __ st_ptr(G0, G2_thread, in_bytes(JavaThread::pending_exception_offset()));
370 370 __ add(I7, frame::pc_return_offset, Oissuing_pc);
371 371
372 372 generate_handle_exception(sasm, oop_maps, oop_map);
373 373 __ should_not_reach_here();
374 374 }
375 375 break;
376 376
377 377 case new_instance_id:
378 378 case fast_new_instance_id:
379 379 case fast_new_instance_init_check_id:
380 380 {
381 381 Register G5_klass = G5; // Incoming
382 382 Register O0_obj = O0; // Outgoing
383 383
384 384 if (id == new_instance_id) {
385 385 __ set_info("new_instance", dont_gc_arguments);
386 386 } else if (id == fast_new_instance_id) {
387 387 __ set_info("fast new_instance", dont_gc_arguments);
388 388 } else {
389 389 assert(id == fast_new_instance_init_check_id, "bad StubID");
390 390 __ set_info("fast new_instance init check", dont_gc_arguments);
391 391 }
392 392
393 393 if ((id == fast_new_instance_id || id == fast_new_instance_init_check_id) &&
394 394 UseTLAB && FastTLABRefill) {
395 395 Label slow_path;
396 396 Register G1_obj_size = G1;
397 397 Register G3_t1 = G3;
398 398 Register G4_t2 = G4;
399 399 assert_different_registers(G5_klass, G1_obj_size, G3_t1, G4_t2);
400 400
401 401 // Push a frame since we may do dtrace notification for the
402 402 // allocation which requires calling out and we don't want
403 403 // to stomp the real return address.
404 404 __ save_frame(0);
405 405
406 406 if (id == fast_new_instance_init_check_id) {
407 407 // make sure the klass is initialized
408 408 __ ld(G5_klass, instanceKlass::init_state_offset_in_bytes() + sizeof(oopDesc), G3_t1);
409 409 __ cmp(G3_t1, instanceKlass::fully_initialized);
410 410 __ br(Assembler::notEqual, false, Assembler::pn, slow_path);
411 411 __ delayed()->nop();
412 412 }
413 413 #ifdef ASSERT
414 414 // assert object can be fast path allocated
415 415 {
416 416 Label ok, not_ok;
417 417 __ ld(G5_klass, Klass::layout_helper_offset_in_bytes() + sizeof(oopDesc), G1_obj_size);
418 418 __ cmp(G1_obj_size, 0); // make sure it's an instance (LH > 0)
419 419 __ br(Assembler::lessEqual, false, Assembler::pn, not_ok);
420 420 __ delayed()->nop();
421 421 __ btst(Klass::_lh_instance_slow_path_bit, G1_obj_size);
422 422 __ br(Assembler::zero, false, Assembler::pn, ok);
423 423 __ delayed()->nop();
424 424 __ bind(not_ok);
425 425 __ stop("assert(can be fast path allocated)");
426 426 __ should_not_reach_here();
427 427 __ bind(ok);
428 428 }
429 429 #endif // ASSERT
430 430 // if we got here then the TLAB allocation failed, so try
431 431 // refilling the TLAB or allocating directly from eden.
432 432 Label retry_tlab, try_eden;
433 433 __ tlab_refill(retry_tlab, try_eden, slow_path); // preserves G5_klass
434 434
435 435 __ bind(retry_tlab);
436 436
437 437 // get the instance size
438 438 __ ld(G5_klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes(), G1_obj_size);
439 439 __ tlab_allocate(O0_obj, G1_obj_size, 0, G3_t1, slow_path);
440 440 __ initialize_object(O0_obj, G5_klass, G1_obj_size, 0, G3_t1, G4_t2);
441 441 __ verify_oop(O0_obj);
442 442 __ mov(O0, I0);
443 443 __ ret();
444 444 __ delayed()->restore();
445 445
446 446 __ bind(try_eden);
447 447 // get the instance size
448 448 __ ld(G5_klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes(), G1_obj_size);
449 449 __ eden_allocate(O0_obj, G1_obj_size, 0, G3_t1, G4_t2, slow_path);
450 450 __ initialize_object(O0_obj, G5_klass, G1_obj_size, 0, G3_t1, G4_t2);
451 451 __ verify_oop(O0_obj);
452 452 __ mov(O0, I0);
453 453 __ ret();
454 454 __ delayed()->restore();
455 455
456 456 __ bind(slow_path);
457 457
458 458 // pop this frame so generate_stub_call can push it's own
459 459 __ restore();
460 460 }
461 461
462 462 oop_maps = generate_stub_call(sasm, I0, CAST_FROM_FN_PTR(address, new_instance), G5_klass);
463 463 // I0->O0: new instance
464 464 }
465 465
466 466 break;
467 467
468 468 #ifdef TIERED
469 469 case counter_overflow_id:
470 470 // G4 contains bci
471 471 oop_maps = generate_stub_call(sasm, noreg, CAST_FROM_FN_PTR(address, counter_overflow), G4);
472 472 break;
473 473 #endif // TIERED
474 474
475 475 case new_type_array_id:
476 476 case new_object_array_id:
477 477 {
478 478 Register G5_klass = G5; // Incoming
479 479 Register G4_length = G4; // Incoming
480 480 Register O0_obj = O0; // Outgoing
481 481
482 482 Address klass_lh(G5_klass, ((klassOopDesc::header_size() * HeapWordSize)
483 483 + Klass::layout_helper_offset_in_bytes()));
484 484 assert(Klass::_lh_header_size_shift % BitsPerByte == 0, "bytewise");
485 485 assert(Klass::_lh_header_size_mask == 0xFF, "bytewise");
486 486 // Use this offset to pick out an individual byte of the layout_helper:
487 487 const int klass_lh_header_size_offset = ((BytesPerInt - 1) // 3 - 2 selects byte {0,1,0,0}
488 488 - Klass::_lh_header_size_shift / BitsPerByte);
489 489
490 490 if (id == new_type_array_id) {
491 491 __ set_info("new_type_array", dont_gc_arguments);
492 492 } else {
493 493 __ set_info("new_object_array", dont_gc_arguments);
494 494 }
495 495
496 496 #ifdef ASSERT
497 497 // assert object type is really an array of the proper kind
498 498 {
499 499 Label ok;
500 500 Register G3_t1 = G3;
501 501 __ ld(klass_lh, G3_t1);
502 502 __ sra(G3_t1, Klass::_lh_array_tag_shift, G3_t1);
503 503 int tag = ((id == new_type_array_id)
504 504 ? Klass::_lh_array_tag_type_value
505 505 : Klass::_lh_array_tag_obj_value);
506 506 __ cmp(G3_t1, tag);
507 507 __ brx(Assembler::equal, false, Assembler::pt, ok);
508 508 __ delayed()->nop();
509 509 __ stop("assert(is an array klass)");
510 510 __ should_not_reach_here();
511 511 __ bind(ok);
512 512 }
513 513 #endif // ASSERT
514 514
515 515 if (UseTLAB && FastTLABRefill) {
516 516 Label slow_path;
517 517 Register G1_arr_size = G1;
518 518 Register G3_t1 = G3;
519 519 Register O1_t2 = O1;
520 520 assert_different_registers(G5_klass, G4_length, G1_arr_size, G3_t1, O1_t2);
521 521
522 522 // check that array length is small enough for fast path
523 523 __ set(C1_MacroAssembler::max_array_allocation_length, G3_t1);
524 524 __ cmp(G4_length, G3_t1);
525 525 __ br(Assembler::greaterUnsigned, false, Assembler::pn, slow_path);
526 526 __ delayed()->nop();
527 527
528 528 // if we got here then the TLAB allocation failed, so try
529 529 // refilling the TLAB or allocating directly from eden.
530 530 Label retry_tlab, try_eden;
531 531 __ tlab_refill(retry_tlab, try_eden, slow_path); // preserves G4_length and G5_klass
532 532
533 533 __ bind(retry_tlab);
534 534
535 535 // get the allocation size: (length << (layout_helper & 0x1F)) + header_size
536 536 __ ld(klass_lh, G3_t1);
537 537 __ sll(G4_length, G3_t1, G1_arr_size);
538 538 __ srl(G3_t1, Klass::_lh_header_size_shift, G3_t1);
539 539 __ and3(G3_t1, Klass::_lh_header_size_mask, G3_t1);
540 540 __ add(G1_arr_size, G3_t1, G1_arr_size);
541 541 __ add(G1_arr_size, MinObjAlignmentInBytesMask, G1_arr_size); // align up
542 542 __ and3(G1_arr_size, ~MinObjAlignmentInBytesMask, G1_arr_size);
543 543
544 544 __ tlab_allocate(O0_obj, G1_arr_size, 0, G3_t1, slow_path); // preserves G1_arr_size
545 545
546 546 __ initialize_header(O0_obj, G5_klass, G4_length, G3_t1, O1_t2);
547 547 __ ldub(klass_lh, G3_t1, klass_lh_header_size_offset);
548 548 __ sub(G1_arr_size, G3_t1, O1_t2); // body length
549 549 __ add(O0_obj, G3_t1, G3_t1); // body start
550 550 __ initialize_body(G3_t1, O1_t2);
551 551 __ verify_oop(O0_obj);
552 552 __ retl();
553 553 __ delayed()->nop();
554 554
555 555 __ bind(try_eden);
556 556 // get the allocation size: (length << (layout_helper & 0x1F)) + header_size
557 557 __ ld(klass_lh, G3_t1);
558 558 __ sll(G4_length, G3_t1, G1_arr_size);
559 559 __ srl(G3_t1, Klass::_lh_header_size_shift, G3_t1);
560 560 __ and3(G3_t1, Klass::_lh_header_size_mask, G3_t1);
561 561 __ add(G1_arr_size, G3_t1, G1_arr_size);
562 562 __ add(G1_arr_size, MinObjAlignmentInBytesMask, G1_arr_size);
563 563 __ and3(G1_arr_size, ~MinObjAlignmentInBytesMask, G1_arr_size);
564 564
565 565 __ eden_allocate(O0_obj, G1_arr_size, 0, G3_t1, O1_t2, slow_path); // preserves G1_arr_size
566 566
567 567 __ initialize_header(O0_obj, G5_klass, G4_length, G3_t1, O1_t2);
568 568 __ ldub(klass_lh, G3_t1, klass_lh_header_size_offset);
569 569 __ sub(G1_arr_size, G3_t1, O1_t2); // body length
570 570 __ add(O0_obj, G3_t1, G3_t1); // body start
571 571 __ initialize_body(G3_t1, O1_t2);
572 572 __ verify_oop(O0_obj);
573 573 __ retl();
574 574 __ delayed()->nop();
575 575
576 576 __ bind(slow_path);
577 577 }
578 578
579 579 if (id == new_type_array_id) {
580 580 oop_maps = generate_stub_call(sasm, I0, CAST_FROM_FN_PTR(address, new_type_array), G5_klass, G4_length);
581 581 } else {
582 582 oop_maps = generate_stub_call(sasm, I0, CAST_FROM_FN_PTR(address, new_object_array), G5_klass, G4_length);
583 583 }
584 584 // I0 -> O0: new array
585 585 }
586 586 break;
587 587
588 588 case new_multi_array_id:
589 589 { // O0: klass
590 590 // O1: rank
591 591 // O2: address of 1st dimension
592 592 __ set_info("new_multi_array", dont_gc_arguments);
593 593 oop_maps = generate_stub_call(sasm, I0, CAST_FROM_FN_PTR(address, new_multi_array), I0, I1, I2);
594 594 // I0 -> O0: new multi array
595 595 }
596 596 break;
597 597
598 598 case register_finalizer_id:
599 599 {
600 600 __ set_info("register_finalizer", dont_gc_arguments);
601 601
602 602 // load the klass and check the has finalizer flag
603 603 Label register_finalizer;
604 604 Register t = O1;
605 605 __ ld_ptr(O0, oopDesc::klass_offset_in_bytes(), t);
606 606 __ ld(t, Klass::access_flags_offset_in_bytes() + sizeof(oopDesc), t);
607 607 __ set(JVM_ACC_HAS_FINALIZER, G3);
608 608 __ andcc(G3, t, G0);
609 609 __ br(Assembler::notZero, false, Assembler::pt, register_finalizer);
610 610 __ delayed()->nop();
611 611
612 612 // do a leaf return
613 613 __ retl();
614 614 __ delayed()->nop();
615 615
616 616 __ bind(register_finalizer);
617 617 OopMap* oop_map = save_live_registers(sasm);
618 618 int call_offset = __ call_RT(noreg, noreg,
619 619 CAST_FROM_FN_PTR(address, SharedRuntime::register_finalizer), I0);
620 620 oop_maps = new OopMapSet();
621 621 oop_maps->add_gc_map(call_offset, oop_map);
622 622
623 623 // Now restore all the live registers
624 624 restore_live_registers(sasm);
625 625
626 626 __ ret();
627 627 __ delayed()->restore();
628 628 }
629 629 break;
630 630
631 631 case throw_range_check_failed_id:
632 632 { __ set_info("range_check_failed", dont_gc_arguments); // arguments will be discarded
633 633 // G4: index
634 634 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_range_check_exception), true);
635 635 }
636 636 break;
637 637
638 638 case throw_index_exception_id:
639 639 { __ set_info("index_range_check_failed", dont_gc_arguments); // arguments will be discarded
640 640 // G4: index
641 641 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_index_exception), true);
642 642 }
643 643 break;
644 644
645 645 case throw_div0_exception_id:
646 646 { __ set_info("throw_div0_exception", dont_gc_arguments);
647 647 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_div0_exception), false);
648 648 }
649 649 break;
650 650
651 651 case throw_null_pointer_exception_id:
652 652 { __ set_info("throw_null_pointer_exception", dont_gc_arguments);
653 653 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_null_pointer_exception), false);
654 654 }
655 655 break;
656 656
657 657 case handle_exception_id:
658 658 {
659 659 __ set_info("handle_exception", dont_gc_arguments);
660 660 // make a frame and preserve the caller's caller-save registers
661 661
662 662 oop_maps = new OopMapSet();
663 663 OopMap* oop_map = save_live_registers(sasm);
664 664 __ mov(Oexception->after_save(), Oexception);
665 665 __ mov(Oissuing_pc->after_save(), Oissuing_pc);
666 666 generate_handle_exception(sasm, oop_maps, oop_map);
667 667 }
668 668 break;
669 669
670 670 case unwind_exception_id:
671 671 {
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672 672 // O0: exception
673 673 // I7: address of call to this method
674 674
675 675 __ set_info("unwind_exception", dont_gc_arguments);
676 676 __ mov(Oexception, Oexception->after_save());
677 677 __ add(I7, frame::pc_return_offset, Oissuing_pc->after_save());
678 678
679 679 __ call_VM_leaf(L7_thread_cache, CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address),
680 680 G2_thread, Oissuing_pc->after_save());
681 681 __ verify_not_null_oop(Oexception->after_save());
682 - __ jmp(O0, 0);
683 - __ delayed()->restore();
682 +
683 + // Restore SP from L7 if the exception PC is a MethodHandle call site.
684 + __ mov(O0, G5); // Save the target address.
685 + __ lduw(Address(G2_thread, JavaThread::is_method_handle_return_offset()), L0);
686 + __ tst(L0); // Condition codes are preserved over the restore.
687 + __ restore();
688 +
689 + __ jmp(G5, 0);
690 + __ delayed()->movcc(Assembler::notZero, false, Assembler::icc, L7, SP); // Restore SP if required.
684 691 }
685 692 break;
686 693
687 694 case throw_array_store_exception_id:
688 695 {
689 696 __ set_info("throw_array_store_exception", dont_gc_arguments);
690 697 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_array_store_exception), false);
691 698 }
692 699 break;
693 700
694 701 case throw_class_cast_exception_id:
695 702 {
696 703 // G4: object
697 704 __ set_info("throw_class_cast_exception", dont_gc_arguments);
698 705 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_class_cast_exception), true);
699 706 }
700 707 break;
701 708
702 709 case throw_incompatible_class_change_error_id:
703 710 {
704 711 __ set_info("throw_incompatible_class_cast_exception", dont_gc_arguments);
705 712 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_incompatible_class_change_error), false);
706 713 }
707 714 break;
708 715
709 716 case slow_subtype_check_id:
710 717 { // Support for uint StubRoutine::partial_subtype_check( Klass sub, Klass super );
711 718 // Arguments :
712 719 //
713 720 // ret : G3
714 721 // sub : G3, argument, destroyed
715 722 // super: G1, argument, not changed
716 723 // raddr: O7, blown by call
717 724 Label miss;
718 725
719 726 __ save_frame(0); // Blow no registers!
720 727
721 728 __ check_klass_subtype_slow_path(G3, G1, L0, L1, L2, L4, NULL, &miss);
722 729
723 730 __ mov(1, G3);
724 731 __ ret(); // Result in G5 is 'true'
725 732 __ delayed()->restore(); // free copy or add can go here
726 733
727 734 __ bind(miss);
728 735 __ mov(0, G3);
729 736 __ ret(); // Result in G5 is 'false'
730 737 __ delayed()->restore(); // free copy or add can go here
731 738 }
732 739
733 740 case monitorenter_nofpu_id:
734 741 case monitorenter_id:
735 742 { // G4: object
736 743 // G5: lock address
737 744 __ set_info("monitorenter", dont_gc_arguments);
738 745
739 746 int save_fpu_registers = (id == monitorenter_id);
740 747 // make a frame and preserve the caller's caller-save registers
741 748 OopMap* oop_map = save_live_registers(sasm, save_fpu_registers);
742 749
743 750 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorenter), G4, G5);
744 751
745 752 oop_maps = new OopMapSet();
746 753 oop_maps->add_gc_map(call_offset, oop_map);
747 754 restore_live_registers(sasm, save_fpu_registers);
748 755
749 756 __ ret();
750 757 __ delayed()->restore();
751 758 }
752 759 break;
753 760
754 761 case monitorexit_nofpu_id:
755 762 case monitorexit_id:
756 763 { // G4: lock address
757 764 // note: really a leaf routine but must setup last java sp
758 765 // => use call_RT for now (speed can be improved by
759 766 // doing last java sp setup manually)
760 767 __ set_info("monitorexit", dont_gc_arguments);
761 768
762 769 int save_fpu_registers = (id == monitorexit_id);
763 770 // make a frame and preserve the caller's caller-save registers
764 771 OopMap* oop_map = save_live_registers(sasm, save_fpu_registers);
765 772
766 773 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorexit), G4);
767 774
768 775 oop_maps = new OopMapSet();
769 776 oop_maps->add_gc_map(call_offset, oop_map);
770 777 restore_live_registers(sasm, save_fpu_registers);
771 778
772 779 __ ret();
773 780 __ delayed()->restore();
774 781
775 782 }
776 783 break;
777 784
778 785 case access_field_patching_id:
779 786 { __ set_info("access_field_patching", dont_gc_arguments);
780 787 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, access_field_patching));
781 788 }
782 789 break;
783 790
784 791 case load_klass_patching_id:
785 792 { __ set_info("load_klass_patching", dont_gc_arguments);
786 793 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_klass_patching));
787 794 }
788 795 break;
789 796
790 797 case jvmti_exception_throw_id:
791 798 { // Oexception : exception
792 799 __ set_info("jvmti_exception_throw", dont_gc_arguments);
793 800 oop_maps = generate_stub_call(sasm, noreg, CAST_FROM_FN_PTR(address, Runtime1::post_jvmti_exception_throw), I0);
794 801 }
795 802 break;
796 803
797 804 case dtrace_object_alloc_id:
798 805 { // O0: object
799 806 __ set_info("dtrace_object_alloc", dont_gc_arguments);
800 807 // we can't gc here so skip the oopmap but make sure that all
801 808 // the live registers get saved.
802 809 save_live_registers(sasm);
803 810
804 811 __ save_thread(L7_thread_cache);
805 812 __ call(CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_object_alloc),
806 813 relocInfo::runtime_call_type);
807 814 __ delayed()->mov(I0, O0);
808 815 __ restore_thread(L7_thread_cache);
809 816
810 817 restore_live_registers(sasm);
811 818 __ ret();
812 819 __ delayed()->restore();
813 820 }
814 821 break;
815 822
816 823 #ifndef SERIALGC
817 824 case g1_pre_barrier_slow_id:
818 825 { // G4: previous value of memory
819 826 BarrierSet* bs = Universe::heap()->barrier_set();
820 827 if (bs->kind() != BarrierSet::G1SATBCTLogging) {
821 828 __ save_frame(0);
822 829 __ set((int)id, O1);
823 830 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), I0);
824 831 __ should_not_reach_here();
825 832 break;
826 833 }
827 834
828 835 __ set_info("g1_pre_barrier_slow_id", dont_gc_arguments);
829 836
830 837 Register pre_val = G4;
831 838 Register tmp = G1_scratch;
832 839 Register tmp2 = G3_scratch;
833 840
834 841 Label refill, restart;
835 842 bool with_frame = false; // I don't know if we can do with-frame.
836 843 int satb_q_index_byte_offset =
837 844 in_bytes(JavaThread::satb_mark_queue_offset() +
838 845 PtrQueue::byte_offset_of_index());
839 846 int satb_q_buf_byte_offset =
840 847 in_bytes(JavaThread::satb_mark_queue_offset() +
841 848 PtrQueue::byte_offset_of_buf());
842 849 __ bind(restart);
843 850 __ ld_ptr(G2_thread, satb_q_index_byte_offset, tmp);
844 851
845 852 __ br_on_reg_cond(Assembler::rc_z, /*annul*/false,
846 853 Assembler::pn, tmp, refill);
847 854
848 855 // If the branch is taken, no harm in executing this in the delay slot.
849 856 __ delayed()->ld_ptr(G2_thread, satb_q_buf_byte_offset, tmp2);
850 857 __ sub(tmp, oopSize, tmp);
851 858
852 859 __ st_ptr(pre_val, tmp2, tmp); // [_buf + index] := <address_of_card>
853 860 // Use return-from-leaf
854 861 __ retl();
855 862 __ delayed()->st_ptr(tmp, G2_thread, satb_q_index_byte_offset);
856 863
857 864 __ bind(refill);
858 865 __ save_frame(0);
859 866
860 867 __ mov(pre_val, L0);
861 868 __ mov(tmp, L1);
862 869 __ mov(tmp2, L2);
863 870
864 871 __ call_VM_leaf(L7_thread_cache,
865 872 CAST_FROM_FN_PTR(address,
866 873 SATBMarkQueueSet::handle_zero_index_for_thread),
867 874 G2_thread);
868 875
869 876 __ mov(L0, pre_val);
870 877 __ mov(L1, tmp);
871 878 __ mov(L2, tmp2);
872 879
873 880 __ br(Assembler::always, /*annul*/false, Assembler::pt, restart);
874 881 __ delayed()->restore();
875 882 }
876 883 break;
877 884
878 885 case g1_post_barrier_slow_id:
879 886 {
880 887 BarrierSet* bs = Universe::heap()->barrier_set();
881 888 if (bs->kind() != BarrierSet::G1SATBCTLogging) {
882 889 __ save_frame(0);
883 890 __ set((int)id, O1);
884 891 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), I0);
885 892 __ should_not_reach_here();
886 893 break;
887 894 }
888 895
889 896 __ set_info("g1_post_barrier_slow_id", dont_gc_arguments);
890 897
891 898 Register addr = G4;
892 899 Register cardtable = G5;
893 900 Register tmp = G1_scratch;
894 901 Register tmp2 = G3_scratch;
895 902 jbyte* byte_map_base = ((CardTableModRefBS*)bs)->byte_map_base;
896 903
897 904 Label not_already_dirty, restart, refill;
898 905
899 906 #ifdef _LP64
900 907 __ srlx(addr, CardTableModRefBS::card_shift, addr);
901 908 #else
902 909 __ srl(addr, CardTableModRefBS::card_shift, addr);
903 910 #endif
904 911
905 912 AddressLiteral rs(byte_map_base);
906 913 __ set(rs, cardtable); // cardtable := <card table base>
907 914 __ ldub(addr, cardtable, tmp); // tmp := [addr + cardtable]
908 915
909 916 __ br_on_reg_cond(Assembler::rc_nz, /*annul*/false, Assembler::pt,
910 917 tmp, not_already_dirty);
911 918 // Get cardtable + tmp into a reg by itself -- useful in the take-the-branch
912 919 // case, harmless if not.
913 920 __ delayed()->add(addr, cardtable, tmp2);
914 921
915 922 // We didn't take the branch, so we're already dirty: return.
916 923 // Use return-from-leaf
917 924 __ retl();
918 925 __ delayed()->nop();
919 926
920 927 // Not dirty.
921 928 __ bind(not_already_dirty);
922 929 // First, dirty it.
923 930 __ stb(G0, tmp2, 0); // [cardPtr] := 0 (i.e., dirty).
924 931
925 932 Register tmp3 = cardtable;
926 933 Register tmp4 = tmp;
927 934
928 935 // these registers are now dead
929 936 addr = cardtable = tmp = noreg;
930 937
931 938 int dirty_card_q_index_byte_offset =
932 939 in_bytes(JavaThread::dirty_card_queue_offset() +
933 940 PtrQueue::byte_offset_of_index());
934 941 int dirty_card_q_buf_byte_offset =
935 942 in_bytes(JavaThread::dirty_card_queue_offset() +
936 943 PtrQueue::byte_offset_of_buf());
937 944 __ bind(restart);
938 945 __ ld_ptr(G2_thread, dirty_card_q_index_byte_offset, tmp3);
939 946
940 947 __ br_on_reg_cond(Assembler::rc_z, /*annul*/false, Assembler::pn,
941 948 tmp3, refill);
942 949 // If the branch is taken, no harm in executing this in the delay slot.
943 950 __ delayed()->ld_ptr(G2_thread, dirty_card_q_buf_byte_offset, tmp4);
944 951 __ sub(tmp3, oopSize, tmp3);
945 952
946 953 __ st_ptr(tmp2, tmp4, tmp3); // [_buf + index] := <address_of_card>
947 954 // Use return-from-leaf
948 955 __ retl();
949 956 __ delayed()->st_ptr(tmp3, G2_thread, dirty_card_q_index_byte_offset);
950 957
951 958 __ bind(refill);
952 959 __ save_frame(0);
953 960
954 961 __ mov(tmp2, L0);
955 962 __ mov(tmp3, L1);
956 963 __ mov(tmp4, L2);
957 964
958 965 __ call_VM_leaf(L7_thread_cache,
959 966 CAST_FROM_FN_PTR(address,
960 967 DirtyCardQueueSet::handle_zero_index_for_thread),
961 968 G2_thread);
962 969
963 970 __ mov(L0, tmp2);
964 971 __ mov(L1, tmp3);
965 972 __ mov(L2, tmp4);
966 973
967 974 __ br(Assembler::always, /*annul*/false, Assembler::pt, restart);
968 975 __ delayed()->restore();
969 976 }
970 977 break;
971 978 #endif // !SERIALGC
972 979
973 980 default:
974 981 { __ set_info("unimplemented entry", dont_gc_arguments);
975 982 __ save_frame(0);
976 983 __ set((int)id, O1);
977 984 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), O1);
978 985 __ should_not_reach_here();
979 986 }
980 987 break;
981 988 }
982 989 return oop_maps;
983 990 }
984 991
985 992
986 993 void Runtime1::generate_handle_exception(StubAssembler* sasm, OopMapSet* oop_maps, OopMap* oop_map, bool) {
987 994 Label no_deopt;
988 995
989 996 __ verify_not_null_oop(Oexception);
990 997
991 998 // save the exception and issuing pc in the thread
992 999 __ st_ptr(Oexception, G2_thread, in_bytes(JavaThread::exception_oop_offset()));
993 1000 __ st_ptr(Oissuing_pc, G2_thread, in_bytes(JavaThread::exception_pc_offset()));
994 1001
995 1002 // save the real return address and use the throwing pc as the return address to lookup (has bci & oop map)
996 1003 __ mov(I7, L0);
997 1004 __ mov(Oissuing_pc, I7);
998 1005 __ sub(I7, frame::pc_return_offset, I7);
999 1006 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, exception_handler_for_pc));
1000 1007
1001 1008 // Note: if nmethod has been deoptimized then regardless of
1002 1009 // whether it had a handler or not we will deoptimize
1003 1010 // by entering the deopt blob with a pending exception.
1004 1011
1005 1012 #ifdef ASSERT
1006 1013 Label done;
1007 1014 __ tst(O0);
1008 1015 __ br(Assembler::notZero, false, Assembler::pn, done);
1009 1016 __ delayed()->nop();
1010 1017 __ stop("should have found address");
1011 1018 __ bind(done);
1012 1019 #endif
1013 1020
1014 1021 // restore the registers that were saved at the beginning and jump to the exception handler.
1015 1022 restore_live_registers(sasm);
1016 1023
1017 1024 __ jmp(O0, 0);
1018 1025 __ delayed()->restore();
1019 1026
1020 1027 oop_maps->add_gc_map(call_offset, oop_map);
1021 1028 }
1022 1029
1023 1030
1024 1031 #undef __
1025 1032
1026 1033 #define __ masm->
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