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          --- old/src/cpu/sparc/vm/assembler_sparc.hpp
          +++ new/src/cpu/sparc/vm/assembler_sparc.hpp
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  80   80  REGISTER_DECLARATION(Register, G3_scratch    , G3);
  81   81  REGISTER_DECLARATION(Register, G4_scratch    , G4);
  82   82  
  83   83  // These globals are used as short-lived scratch registers in the compiler:
  84   84  
  85   85  REGISTER_DECLARATION(Register, Gtemp  , G5);
  86   86  
  87   87  // JSR 292 fixed register usages:
  88   88  REGISTER_DECLARATION(Register, G5_method_type        , G5);
  89   89  REGISTER_DECLARATION(Register, G3_method_handle      , G3);
       90 +REGISTER_DECLARATION(Register, L7_mh_SP_save         , L7);
  90   91  
  91   92  // The compiler requires that G5_megamorphic_method is G5_inline_cache_klass,
  92   93  // because a single patchable "set" instruction (NativeMovConstReg,
  93   94  // or NativeMovConstPatching for compiler1) instruction
  94   95  // serves to set up either quantity, depending on whether the compiled
  95   96  // call site is an inline cache or is megamorphic.  See the function
  96   97  // CompiledIC::set_to_megamorphic.
  97   98  //
  98   99  // If a inline cache targets an interpreted method, then the
  99  100  // G5 register will be used twice during the call.  First,
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