1 /*
2 * Copyright 2000-2010 Sun Microsystems, Inc. All Rights Reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
20 * CA 95054 USA or visit www.sun.com if you need additional information or
21 * have any questions.
22 *
23 */
24
25 # include "incls/_precompiled.incl"
26 # include "incls/_c1_LIR.cpp.incl"
27
28 Register LIR_OprDesc::as_register() const {
29 return FrameMap::cpu_rnr2reg(cpu_regnr());
30 }
31
32 Register LIR_OprDesc::as_register_lo() const {
33 return FrameMap::cpu_rnr2reg(cpu_regnrLo());
34 }
35
36 Register LIR_OprDesc::as_register_hi() const {
37 return FrameMap::cpu_rnr2reg(cpu_regnrHi());
38 }
39
40 #if defined(X86)
41
42 XMMRegister LIR_OprDesc::as_xmm_float_reg() const {
43 return FrameMap::nr2xmmreg(xmm_regnr());
44 }
45
46 XMMRegister LIR_OprDesc::as_xmm_double_reg() const {
47 assert(xmm_regnrLo() == xmm_regnrHi(), "assumed in calculation");
48 return FrameMap::nr2xmmreg(xmm_regnrLo());
49 }
50
51 #endif // X86
52
53
54 #ifdef SPARC
55
56 FloatRegister LIR_OprDesc::as_float_reg() const {
57 return FrameMap::nr2floatreg(fpu_regnr());
58 }
59
60 FloatRegister LIR_OprDesc::as_double_reg() const {
61 return FrameMap::nr2floatreg(fpu_regnrHi());
62 }
63
64 #endif
65
66 LIR_Opr LIR_OprFact::illegalOpr = LIR_OprFact::illegal();
67
68 LIR_Opr LIR_OprFact::value_type(ValueType* type) {
69 ValueTag tag = type->tag();
70 switch (tag) {
71 case objectTag : {
72 ClassConstant* c = type->as_ClassConstant();
73 if (c != NULL && !c->value()->is_loaded()) {
74 return LIR_OprFact::oopConst(NULL);
75 } else {
76 return LIR_OprFact::oopConst(type->as_ObjectType()->encoding());
77 }
78 }
79 case addressTag: return LIR_OprFact::addressConst(type->as_AddressConstant()->value());
80 case intTag : return LIR_OprFact::intConst(type->as_IntConstant()->value());
81 case floatTag : return LIR_OprFact::floatConst(type->as_FloatConstant()->value());
82 case longTag : return LIR_OprFact::longConst(type->as_LongConstant()->value());
83 case doubleTag : return LIR_OprFact::doubleConst(type->as_DoubleConstant()->value());
84 default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1);
85 }
86 }
87
88
89 LIR_Opr LIR_OprFact::dummy_value_type(ValueType* type) {
90 switch (type->tag()) {
91 case objectTag: return LIR_OprFact::oopConst(NULL);
92 case addressTag:return LIR_OprFact::addressConst(0);
93 case intTag: return LIR_OprFact::intConst(0);
94 case floatTag: return LIR_OprFact::floatConst(0.0);
95 case longTag: return LIR_OprFact::longConst(0);
96 case doubleTag: return LIR_OprFact::doubleConst(0.0);
97 default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1);
98 }
99 return illegalOpr;
100 }
101
102
103
104 //---------------------------------------------------
105
106
107 LIR_Address::Scale LIR_Address::scale(BasicType type) {
108 int elem_size = type2aelembytes(type);
109 switch (elem_size) {
110 case 1: return LIR_Address::times_1;
111 case 2: return LIR_Address::times_2;
112 case 4: return LIR_Address::times_4;
113 case 8: return LIR_Address::times_8;
114 }
115 ShouldNotReachHere();
116 return LIR_Address::times_1;
117 }
118
119
120 #ifndef PRODUCT
121 void LIR_Address::verify() const {
122 #ifdef SPARC
123 assert(scale() == times_1, "Scaled addressing mode not available on SPARC and should not be used");
124 assert(disp() == 0 || index()->is_illegal(), "can't have both");
125 #endif
126 #ifdef _LP64
127 assert(base()->is_cpu_register(), "wrong base operand");
128 assert(index()->is_illegal() || index()->is_double_cpu(), "wrong index operand");
129 assert(base()->type() == T_OBJECT || base()->type() == T_LONG,
130 "wrong type for addresses");
131 #else
132 assert(base()->is_single_cpu(), "wrong base operand");
133 assert(index()->is_illegal() || index()->is_single_cpu(), "wrong index operand");
134 assert(base()->type() == T_OBJECT || base()->type() == T_INT,
135 "wrong type for addresses");
136 #endif
137 }
138 #endif
139
140
141 //---------------------------------------------------
142
143 char LIR_OprDesc::type_char(BasicType t) {
144 switch (t) {
145 case T_ARRAY:
146 t = T_OBJECT;
147 case T_BOOLEAN:
148 case T_CHAR:
149 case T_FLOAT:
150 case T_DOUBLE:
151 case T_BYTE:
152 case T_SHORT:
153 case T_INT:
154 case T_LONG:
155 case T_OBJECT:
156 case T_ADDRESS:
157 case T_VOID:
158 return ::type2char(t);
159
160 case T_ILLEGAL:
161 return '?';
162
163 default:
164 ShouldNotReachHere();
165 return '?';
166 }
167 }
168
169 #ifndef PRODUCT
170 void LIR_OprDesc::validate_type() const {
171
172 #ifdef ASSERT
173 if (!is_pointer() && !is_illegal()) {
174 switch (as_BasicType(type_field())) {
175 case T_LONG:
176 assert((kind_field() == cpu_register || kind_field() == stack_value) && size_field() == double_size, "must match");
177 break;
178 case T_FLOAT:
179 assert((kind_field() == fpu_register || kind_field() == stack_value) && size_field() == single_size, "must match");
180 break;
181 case T_DOUBLE:
182 assert((kind_field() == fpu_register || kind_field() == stack_value) && size_field() == double_size, "must match");
183 break;
184 case T_BOOLEAN:
185 case T_CHAR:
186 case T_BYTE:
187 case T_SHORT:
188 case T_INT:
189 case T_OBJECT:
190 case T_ARRAY:
191 assert((kind_field() == cpu_register || kind_field() == stack_value) && size_field() == single_size, "must match");
192 break;
193
194 case T_ILLEGAL:
195 // XXX TKR also means unknown right now
196 // assert(is_illegal(), "must match");
197 break;
198
199 default:
200 ShouldNotReachHere();
201 }
202 }
203 #endif
204
205 }
206 #endif // PRODUCT
207
208
209 bool LIR_OprDesc::is_oop() const {
210 if (is_pointer()) {
211 return pointer()->is_oop_pointer();
212 } else {
213 OprType t= type_field();
214 assert(t != unknown_type, "not set");
215 return t == object_type;
216 }
217 }
218
219
220
221 void LIR_Op2::verify() const {
222 #ifdef ASSERT
223 switch (code()) {
224 case lir_cmove:
225 break;
226
227 default:
228 assert(!result_opr()->is_register() || !result_opr()->is_oop_register(),
229 "can't produce oops from arith");
230 }
231
232 if (TwoOperandLIRForm) {
233 switch (code()) {
234 case lir_add:
235 case lir_sub:
236 case lir_mul:
237 case lir_mul_strictfp:
238 case lir_div:
239 case lir_div_strictfp:
240 case lir_rem:
241 case lir_logic_and:
242 case lir_logic_or:
243 case lir_logic_xor:
244 case lir_shl:
245 case lir_shr:
246 assert(in_opr1() == result_opr(), "opr1 and result must match");
247 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
248 break;
249
250 // special handling for lir_ushr because of write barriers
251 case lir_ushr:
252 assert(in_opr1() == result_opr() || in_opr2()->is_constant(), "opr1 and result must match or shift count is constant");
253 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
254 break;
255
256 }
257 }
258 #endif
259 }
260
261
262 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block)
263 : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
264 , _cond(cond)
265 , _type(type)
266 , _label(block->label())
267 , _block(block)
268 , _ublock(NULL)
269 , _stub(NULL) {
270 }
271
272 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub) :
273 LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
274 , _cond(cond)
275 , _type(type)
276 , _label(stub->entry())
277 , _block(NULL)
278 , _ublock(NULL)
279 , _stub(stub) {
280 }
281
282 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock)
283 : LIR_Op(lir_cond_float_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
284 , _cond(cond)
285 , _type(type)
286 , _label(block->label())
287 , _block(block)
288 , _ublock(ublock)
289 , _stub(NULL)
290 {
291 }
292
293 void LIR_OpBranch::change_block(BlockBegin* b) {
294 assert(_block != NULL, "must have old block");
295 assert(_block->label() == label(), "must be equal");
296
297 _block = b;
298 _label = b->label();
299 }
300
301 void LIR_OpBranch::change_ublock(BlockBegin* b) {
302 assert(_ublock != NULL, "must have old block");
303 _ublock = b;
304 }
305
306 void LIR_OpBranch::negate_cond() {
307 switch (_cond) {
308 case lir_cond_equal: _cond = lir_cond_notEqual; break;
309 case lir_cond_notEqual: _cond = lir_cond_equal; break;
310 case lir_cond_less: _cond = lir_cond_greaterEqual; break;
311 case lir_cond_lessEqual: _cond = lir_cond_greater; break;
312 case lir_cond_greaterEqual: _cond = lir_cond_less; break;
313 case lir_cond_greater: _cond = lir_cond_lessEqual; break;
314 default: ShouldNotReachHere();
315 }
316 }
317
318
319 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass,
320 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3,
321 bool fast_check, CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch,
322 CodeStub* stub,
323 ciMethod* profiled_method,
324 int profiled_bci)
325 : LIR_Op(code, result, NULL)
326 , _object(object)
327 , _array(LIR_OprFact::illegalOpr)
328 , _klass(klass)
329 , _tmp1(tmp1)
330 , _tmp2(tmp2)
331 , _tmp3(tmp3)
332 , _fast_check(fast_check)
333 , _stub(stub)
334 , _info_for_patch(info_for_patch)
335 , _info_for_exception(info_for_exception)
336 , _profiled_method(profiled_method)
337 , _profiled_bci(profiled_bci) {
338 if (code == lir_checkcast) {
339 assert(info_for_exception != NULL, "checkcast throws exceptions");
340 } else if (code == lir_instanceof) {
341 assert(info_for_exception == NULL, "instanceof throws no exceptions");
342 } else {
343 ShouldNotReachHere();
344 }
345 }
346
347
348
349 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci)
350 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL)
351 , _object(object)
352 , _array(array)
353 , _klass(NULL)
354 , _tmp1(tmp1)
355 , _tmp2(tmp2)
356 , _tmp3(tmp3)
357 , _fast_check(false)
358 , _stub(NULL)
359 , _info_for_patch(NULL)
360 , _info_for_exception(info_for_exception)
361 , _profiled_method(profiled_method)
362 , _profiled_bci(profiled_bci) {
363 if (code == lir_store_check) {
364 _stub = new ArrayStoreExceptionStub(info_for_exception);
365 assert(info_for_exception != NULL, "store_check throws exceptions");
366 } else {
367 ShouldNotReachHere();
368 }
369 }
370
371
372 LIR_OpArrayCopy::LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length,
373 LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info)
374 : LIR_Op(lir_arraycopy, LIR_OprFact::illegalOpr, info)
375 , _tmp(tmp)
376 , _src(src)
377 , _src_pos(src_pos)
378 , _dst(dst)
379 , _dst_pos(dst_pos)
380 , _flags(flags)
381 , _expected_type(expected_type)
382 , _length(length) {
383 _stub = new ArrayCopyStub(this);
384 }
385
386
387 //-------------------verify--------------------------
388
389 void LIR_Op1::verify() const {
390 switch(code()) {
391 case lir_move:
392 assert(in_opr()->is_valid() && result_opr()->is_valid(), "must be");
393 break;
394 case lir_null_check:
395 assert(in_opr()->is_register(), "must be");
396 break;
397 case lir_return:
398 assert(in_opr()->is_register() || in_opr()->is_illegal(), "must be");
399 break;
400 }
401 }
402
403 void LIR_OpRTCall::verify() const {
404 assert(strcmp(Runtime1::name_for_address(addr()), "<unknown function>") != 0, "unknown function");
405 }
406
407 //-------------------visits--------------------------
408
409 // complete rework of LIR instruction visitor.
410 // The virtual calls for each instruction type is replaced by a big
411 // switch that adds the operands for each instruction
412
413 void LIR_OpVisitState::visit(LIR_Op* op) {
414 // copy information from the LIR_Op
415 reset();
416 set_op(op);
417
418 switch (op->code()) {
419
420 // LIR_Op0
421 case lir_word_align: // result and info always invalid
422 case lir_backwardbranch_target: // result and info always invalid
423 case lir_build_frame: // result and info always invalid
424 case lir_fpop_raw: // result and info always invalid
425 case lir_24bit_FPU: // result and info always invalid
426 case lir_reset_FPU: // result and info always invalid
427 case lir_breakpoint: // result and info always invalid
428 case lir_membar: // result and info always invalid
429 case lir_membar_acquire: // result and info always invalid
430 case lir_membar_release: // result and info always invalid
431 {
432 assert(op->as_Op0() != NULL, "must be");
433 assert(op->_info == NULL, "info not used by this instruction");
434 assert(op->_result->is_illegal(), "not used");
435 break;
436 }
437
438 case lir_nop: // may have info, result always invalid
439 case lir_std_entry: // may have result, info always invalid
440 case lir_osr_entry: // may have result, info always invalid
441 case lir_get_thread: // may have result, info always invalid
442 {
443 assert(op->as_Op0() != NULL, "must be");
444 if (op->_info != NULL) do_info(op->_info);
445 if (op->_result->is_valid()) do_output(op->_result);
446 break;
447 }
448
449
450 // LIR_OpLabel
451 case lir_label: // result and info always invalid
452 {
453 assert(op->as_OpLabel() != NULL, "must be");
454 assert(op->_info == NULL, "info not used by this instruction");
455 assert(op->_result->is_illegal(), "not used");
456 break;
457 }
458
459
460 // LIR_Op1
461 case lir_fxch: // input always valid, result and info always invalid
462 case lir_fld: // input always valid, result and info always invalid
463 case lir_ffree: // input always valid, result and info always invalid
464 case lir_push: // input always valid, result and info always invalid
465 case lir_pop: // input always valid, result and info always invalid
466 case lir_return: // input always valid, result and info always invalid
467 case lir_leal: // input and result always valid, info always invalid
468 case lir_neg: // input and result always valid, info always invalid
469 case lir_monaddr: // input and result always valid, info always invalid
470 case lir_null_check: // input and info always valid, result always invalid
471 case lir_move: // input and result always valid, may have info
472 case lir_prefetchr: // input always valid, result and info always invalid
473 case lir_prefetchw: // input always valid, result and info always invalid
474 {
475 assert(op->as_Op1() != NULL, "must be");
476 LIR_Op1* op1 = (LIR_Op1*)op;
477
478 if (op1->_info) do_info(op1->_info);
479 if (op1->_opr->is_valid()) do_input(op1->_opr);
480 if (op1->_result->is_valid()) do_output(op1->_result);
481
482 break;
483 }
484
485 case lir_safepoint:
486 {
487 assert(op->as_Op1() != NULL, "must be");
488 LIR_Op1* op1 = (LIR_Op1*)op;
489
490 assert(op1->_info != NULL, ""); do_info(op1->_info);
491 if (op1->_opr->is_valid()) do_temp(op1->_opr); // safepoints on SPARC need temporary register
492 assert(op1->_result->is_illegal(), "safepoint does not produce value");
493
494 break;
495 }
496
497 // LIR_OpConvert;
498 case lir_convert: // input and result always valid, info always invalid
499 {
500 assert(op->as_OpConvert() != NULL, "must be");
501 LIR_OpConvert* opConvert = (LIR_OpConvert*)op;
502
503 assert(opConvert->_info == NULL, "must be");
504 if (opConvert->_opr->is_valid()) do_input(opConvert->_opr);
505 if (opConvert->_result->is_valid()) do_output(opConvert->_result);
506 do_stub(opConvert->_stub);
507
508 break;
509 }
510
511 // LIR_OpBranch;
512 case lir_branch: // may have info, input and result register always invalid
513 case lir_cond_float_branch: // may have info, input and result register always invalid
514 {
515 assert(op->as_OpBranch() != NULL, "must be");
516 LIR_OpBranch* opBranch = (LIR_OpBranch*)op;
517
518 if (opBranch->_info != NULL) do_info(opBranch->_info);
519 assert(opBranch->_result->is_illegal(), "not used");
520 if (opBranch->_stub != NULL) opBranch->stub()->visit(this);
521
522 break;
523 }
524
525
526 // LIR_OpAllocObj
527 case lir_alloc_object:
528 {
529 assert(op->as_OpAllocObj() != NULL, "must be");
530 LIR_OpAllocObj* opAllocObj = (LIR_OpAllocObj*)op;
531
532 if (opAllocObj->_info) do_info(opAllocObj->_info);
533 if (opAllocObj->_opr->is_valid()) do_input(opAllocObj->_opr);
534 if (opAllocObj->_tmp1->is_valid()) do_temp(opAllocObj->_tmp1);
535 if (opAllocObj->_tmp2->is_valid()) do_temp(opAllocObj->_tmp2);
536 if (opAllocObj->_tmp3->is_valid()) do_temp(opAllocObj->_tmp3);
537 if (opAllocObj->_tmp4->is_valid()) do_temp(opAllocObj->_tmp4);
538 if (opAllocObj->_result->is_valid()) do_output(opAllocObj->_result);
539 do_stub(opAllocObj->_stub);
540 break;
541 }
542
543
544 // LIR_OpRoundFP;
545 case lir_roundfp: {
546 assert(op->as_OpRoundFP() != NULL, "must be");
547 LIR_OpRoundFP* opRoundFP = (LIR_OpRoundFP*)op;
548
549 assert(op->_info == NULL, "info not used by this instruction");
550 assert(opRoundFP->_tmp->is_illegal(), "not used");
551 do_input(opRoundFP->_opr);
552 do_output(opRoundFP->_result);
553
554 break;
555 }
556
557
558 // LIR_Op2
559 case lir_cmp:
560 case lir_cmp_l2i:
561 case lir_ucmp_fd2i:
562 case lir_cmp_fd2i:
563 case lir_add:
564 case lir_sub:
565 case lir_mul:
566 case lir_div:
567 case lir_rem:
568 case lir_sqrt:
569 case lir_abs:
570 case lir_logic_and:
571 case lir_logic_or:
572 case lir_logic_xor:
573 case lir_shl:
574 case lir_shr:
575 case lir_ushr:
576 {
577 assert(op->as_Op2() != NULL, "must be");
578 LIR_Op2* op2 = (LIR_Op2*)op;
579
580 if (op2->_info) do_info(op2->_info);
581 if (op2->_opr1->is_valid()) do_input(op2->_opr1);
582 if (op2->_opr2->is_valid()) do_input(op2->_opr2);
583 if (op2->_tmp->is_valid()) do_temp(op2->_tmp);
584 if (op2->_result->is_valid()) do_output(op2->_result);
585
586 break;
587 }
588
589 // special handling for cmove: right input operand must not be equal
590 // to the result operand, otherwise the backend fails
591 case lir_cmove:
592 {
593 assert(op->as_Op2() != NULL, "must be");
594 LIR_Op2* op2 = (LIR_Op2*)op;
595
596 assert(op2->_info == NULL && op2->_tmp->is_illegal(), "not used");
597 assert(op2->_opr1->is_valid() && op2->_opr2->is_valid() && op2->_result->is_valid(), "used");
598
599 do_input(op2->_opr1);
600 do_input(op2->_opr2);
601 do_temp(op2->_opr2);
602 do_output(op2->_result);
603
604 break;
605 }
606
607 // vspecial handling for strict operations: register input operands
608 // as temp to guarantee that they do not overlap with other
609 // registers
610 case lir_mul_strictfp:
611 case lir_div_strictfp:
612 {
613 assert(op->as_Op2() != NULL, "must be");
614 LIR_Op2* op2 = (LIR_Op2*)op;
615
616 assert(op2->_info == NULL, "not used");
617 assert(op2->_opr1->is_valid(), "used");
618 assert(op2->_opr2->is_valid(), "used");
619 assert(op2->_result->is_valid(), "used");
620
621 do_input(op2->_opr1); do_temp(op2->_opr1);
622 do_input(op2->_opr2); do_temp(op2->_opr2);
623 if (op2->_tmp->is_valid()) do_temp(op2->_tmp);
624 do_output(op2->_result);
625
626 break;
627 }
628
629 case lir_throw: {
630 assert(op->as_Op2() != NULL, "must be");
631 LIR_Op2* op2 = (LIR_Op2*)op;
632
633 if (op2->_info) do_info(op2->_info);
634 if (op2->_opr1->is_valid()) do_temp(op2->_opr1);
635 if (op2->_opr2->is_valid()) do_input(op2->_opr2); // exception object is input parameter
636 assert(op2->_result->is_illegal(), "no result");
637
638 break;
639 }
640
641 case lir_unwind: {
642 assert(op->as_Op1() != NULL, "must be");
643 LIR_Op1* op1 = (LIR_Op1*)op;
644
645 assert(op1->_info == NULL, "no info");
646 assert(op1->_opr->is_valid(), "exception oop"); do_input(op1->_opr);
647 assert(op1->_result->is_illegal(), "no result");
648
649 break;
650 }
651
652
653 case lir_tan:
654 case lir_sin:
655 case lir_cos:
656 case lir_log:
657 case lir_log10: {
658 assert(op->as_Op2() != NULL, "must be");
659 LIR_Op2* op2 = (LIR_Op2*)op;
660
661 // On x86 tan/sin/cos need two temporary fpu stack slots and
662 // log/log10 need one so handle opr2 and tmp as temp inputs.
663 // Register input operand as temp to guarantee that it doesn't
664 // overlap with the input.
665 assert(op2->_info == NULL, "not used");
666 assert(op2->_opr1->is_valid(), "used");
667 do_input(op2->_opr1); do_temp(op2->_opr1);
668
669 if (op2->_opr2->is_valid()) do_temp(op2->_opr2);
670 if (op2->_tmp->is_valid()) do_temp(op2->_tmp);
671 if (op2->_result->is_valid()) do_output(op2->_result);
672
673 break;
674 }
675
676
677 // LIR_Op3
678 case lir_idiv:
679 case lir_irem: {
680 assert(op->as_Op3() != NULL, "must be");
681 LIR_Op3* op3= (LIR_Op3*)op;
682
683 if (op3->_info) do_info(op3->_info);
684 if (op3->_opr1->is_valid()) do_input(op3->_opr1);
685
686 // second operand is input and temp, so ensure that second operand
687 // and third operand get not the same register
688 if (op3->_opr2->is_valid()) do_input(op3->_opr2);
689 if (op3->_opr2->is_valid()) do_temp(op3->_opr2);
690 if (op3->_opr3->is_valid()) do_temp(op3->_opr3);
691
692 if (op3->_result->is_valid()) do_output(op3->_result);
693
694 break;
695 }
696
697
698 // LIR_OpJavaCall
699 case lir_static_call:
700 case lir_optvirtual_call:
701 case lir_icvirtual_call:
702 case lir_virtual_call:
703 case lir_dynamic_call: {
704 LIR_OpJavaCall* opJavaCall = op->as_OpJavaCall();
705 assert(opJavaCall != NULL, "must be");
706
707 if (opJavaCall->_receiver->is_valid()) do_input(opJavaCall->_receiver);
708
709 // only visit register parameters
710 int n = opJavaCall->_arguments->length();
711 for (int i = 0; i < n; i++) {
712 if (!opJavaCall->_arguments->at(i)->is_pointer()) {
713 do_input(*opJavaCall->_arguments->adr_at(i));
714 }
715 }
716
717 if (opJavaCall->_info) do_info(opJavaCall->_info);
718 if (opJavaCall->is_method_handle_invoke()) {
719 LIR_Opr method_handle_invoke_SP_save_opr = FrameMap::method_handle_invoke_SP_save_opr();
720 do_temp(method_handle_invoke_SP_save_opr);
721 }
722 do_call();
723 if (opJavaCall->_result->is_valid()) do_output(opJavaCall->_result);
724
725 break;
726 }
727
728
729 // LIR_OpRTCall
730 case lir_rtcall: {
731 assert(op->as_OpRTCall() != NULL, "must be");
732 LIR_OpRTCall* opRTCall = (LIR_OpRTCall*)op;
733
734 // only visit register parameters
735 int n = opRTCall->_arguments->length();
736 for (int i = 0; i < n; i++) {
737 if (!opRTCall->_arguments->at(i)->is_pointer()) {
738 do_input(*opRTCall->_arguments->adr_at(i));
739 }
740 }
741 if (opRTCall->_info) do_info(opRTCall->_info);
742 if (opRTCall->_tmp->is_valid()) do_temp(opRTCall->_tmp);
743 do_call();
744 if (opRTCall->_result->is_valid()) do_output(opRTCall->_result);
745
746 break;
747 }
748
749
750 // LIR_OpArrayCopy
751 case lir_arraycopy: {
752 assert(op->as_OpArrayCopy() != NULL, "must be");
753 LIR_OpArrayCopy* opArrayCopy = (LIR_OpArrayCopy*)op;
754
755 assert(opArrayCopy->_result->is_illegal(), "unused");
756 assert(opArrayCopy->_src->is_valid(), "used"); do_input(opArrayCopy->_src); do_temp(opArrayCopy->_src);
757 assert(opArrayCopy->_src_pos->is_valid(), "used"); do_input(opArrayCopy->_src_pos); do_temp(opArrayCopy->_src_pos);
758 assert(opArrayCopy->_dst->is_valid(), "used"); do_input(opArrayCopy->_dst); do_temp(opArrayCopy->_dst);
759 assert(opArrayCopy->_dst_pos->is_valid(), "used"); do_input(opArrayCopy->_dst_pos); do_temp(opArrayCopy->_dst_pos);
760 assert(opArrayCopy->_length->is_valid(), "used"); do_input(opArrayCopy->_length); do_temp(opArrayCopy->_length);
761 assert(opArrayCopy->_tmp->is_valid(), "used"); do_temp(opArrayCopy->_tmp);
762 if (opArrayCopy->_info) do_info(opArrayCopy->_info);
763
764 // the implementation of arraycopy always has a call into the runtime
765 do_call();
766
767 break;
768 }
769
770
771 // LIR_OpLock
772 case lir_lock:
773 case lir_unlock: {
774 assert(op->as_OpLock() != NULL, "must be");
775 LIR_OpLock* opLock = (LIR_OpLock*)op;
776
777 if (opLock->_info) do_info(opLock->_info);
778
779 // TODO: check if these operands really have to be temp
780 // (or if input is sufficient). This may have influence on the oop map!
781 assert(opLock->_lock->is_valid(), "used"); do_temp(opLock->_lock);
782 assert(opLock->_hdr->is_valid(), "used"); do_temp(opLock->_hdr);
783 assert(opLock->_obj->is_valid(), "used"); do_temp(opLock->_obj);
784
785 if (opLock->_scratch->is_valid()) do_temp(opLock->_scratch);
786 assert(opLock->_result->is_illegal(), "unused");
787
788 do_stub(opLock->_stub);
789
790 break;
791 }
792
793
794 // LIR_OpDelay
795 case lir_delay_slot: {
796 assert(op->as_OpDelay() != NULL, "must be");
797 LIR_OpDelay* opDelay = (LIR_OpDelay*)op;
798
799 visit(opDelay->delay_op());
800 break;
801 }
802
803 // LIR_OpTypeCheck
804 case lir_instanceof:
805 case lir_checkcast:
806 case lir_store_check: {
807 assert(op->as_OpTypeCheck() != NULL, "must be");
808 LIR_OpTypeCheck* opTypeCheck = (LIR_OpTypeCheck*)op;
809
810 if (opTypeCheck->_info_for_exception) do_info(opTypeCheck->_info_for_exception);
811 if (opTypeCheck->_info_for_patch) do_info(opTypeCheck->_info_for_patch);
812 if (opTypeCheck->_object->is_valid()) do_input(opTypeCheck->_object);
813 if (opTypeCheck->_array->is_valid()) do_input(opTypeCheck->_array);
814 if (opTypeCheck->_tmp1->is_valid()) do_temp(opTypeCheck->_tmp1);
815 if (opTypeCheck->_tmp2->is_valid()) do_temp(opTypeCheck->_tmp2);
816 if (opTypeCheck->_tmp3->is_valid()) do_temp(opTypeCheck->_tmp3);
817 if (opTypeCheck->_result->is_valid()) do_output(opTypeCheck->_result);
818 do_stub(opTypeCheck->_stub);
819 break;
820 }
821
822 // LIR_OpCompareAndSwap
823 case lir_cas_long:
824 case lir_cas_obj:
825 case lir_cas_int: {
826 assert(op->as_OpCompareAndSwap() != NULL, "must be");
827 LIR_OpCompareAndSwap* opCompareAndSwap = (LIR_OpCompareAndSwap*)op;
828
829 if (opCompareAndSwap->_info) do_info(opCompareAndSwap->_info);
830 if (opCompareAndSwap->_addr->is_valid()) do_input(opCompareAndSwap->_addr);
831 if (opCompareAndSwap->_cmp_value->is_valid()) do_input(opCompareAndSwap->_cmp_value);
832 if (opCompareAndSwap->_new_value->is_valid()) do_input(opCompareAndSwap->_new_value);
833 if (opCompareAndSwap->_tmp1->is_valid()) do_temp(opCompareAndSwap->_tmp1);
834 if (opCompareAndSwap->_tmp2->is_valid()) do_temp(opCompareAndSwap->_tmp2);
835 if (opCompareAndSwap->_result->is_valid()) do_output(opCompareAndSwap->_result);
836
837 break;
838 }
839
840
841 // LIR_OpAllocArray;
842 case lir_alloc_array: {
843 assert(op->as_OpAllocArray() != NULL, "must be");
844 LIR_OpAllocArray* opAllocArray = (LIR_OpAllocArray*)op;
845
846 if (opAllocArray->_info) do_info(opAllocArray->_info);
847 if (opAllocArray->_klass->is_valid()) do_input(opAllocArray->_klass); do_temp(opAllocArray->_klass);
848 if (opAllocArray->_len->is_valid()) do_input(opAllocArray->_len); do_temp(opAllocArray->_len);
849 if (opAllocArray->_tmp1->is_valid()) do_temp(opAllocArray->_tmp1);
850 if (opAllocArray->_tmp2->is_valid()) do_temp(opAllocArray->_tmp2);
851 if (opAllocArray->_tmp3->is_valid()) do_temp(opAllocArray->_tmp3);
852 if (opAllocArray->_tmp4->is_valid()) do_temp(opAllocArray->_tmp4);
853 if (opAllocArray->_result->is_valid()) do_output(opAllocArray->_result);
854 do_stub(opAllocArray->_stub);
855 break;
856 }
857
858 // LIR_OpProfileCall:
859 case lir_profile_call: {
860 assert(op->as_OpProfileCall() != NULL, "must be");
861 LIR_OpProfileCall* opProfileCall = (LIR_OpProfileCall*)op;
862
863 if (opProfileCall->_recv->is_valid()) do_temp(opProfileCall->_recv);
864 assert(opProfileCall->_mdo->is_valid(), "used"); do_temp(opProfileCall->_mdo);
865 assert(opProfileCall->_tmp1->is_valid(), "used"); do_temp(opProfileCall->_tmp1);
866 break;
867 }
868
869 default:
870 ShouldNotReachHere();
871 }
872 }
873
874
875 void LIR_OpVisitState::do_stub(CodeStub* stub) {
876 if (stub != NULL) {
877 stub->visit(this);
878 }
879 }
880
881 XHandlers* LIR_OpVisitState::all_xhandler() {
882 XHandlers* result = NULL;
883
884 int i;
885 for (i = 0; i < info_count(); i++) {
886 if (info_at(i)->exception_handlers() != NULL) {
887 result = info_at(i)->exception_handlers();
888 break;
889 }
890 }
891
892 #ifdef ASSERT
893 for (i = 0; i < info_count(); i++) {
894 assert(info_at(i)->exception_handlers() == NULL ||
895 info_at(i)->exception_handlers() == result,
896 "only one xhandler list allowed per LIR-operation");
897 }
898 #endif
899
900 if (result != NULL) {
901 return result;
902 } else {
903 return new XHandlers();
904 }
905
906 return result;
907 }
908
909
910 #ifdef ASSERT
911 bool LIR_OpVisitState::no_operands(LIR_Op* op) {
912 visit(op);
913
914 return opr_count(inputMode) == 0 &&
915 opr_count(outputMode) == 0 &&
916 opr_count(tempMode) == 0 &&
917 info_count() == 0 &&
918 !has_call() &&
919 !has_slow_case();
920 }
921 #endif
922
923 //---------------------------------------------------
924
925
926 void LIR_OpJavaCall::emit_code(LIR_Assembler* masm) {
927 masm->emit_call(this);
928 }
929
930 void LIR_OpRTCall::emit_code(LIR_Assembler* masm) {
931 masm->emit_rtcall(this);
932 }
933
934 void LIR_OpLabel::emit_code(LIR_Assembler* masm) {
935 masm->emit_opLabel(this);
936 }
937
938 void LIR_OpArrayCopy::emit_code(LIR_Assembler* masm) {
939 masm->emit_arraycopy(this);
940 masm->emit_code_stub(stub());
941 }
942
943 void LIR_Op0::emit_code(LIR_Assembler* masm) {
944 masm->emit_op0(this);
945 }
946
947 void LIR_Op1::emit_code(LIR_Assembler* masm) {
948 masm->emit_op1(this);
949 }
950
951 void LIR_OpAllocObj::emit_code(LIR_Assembler* masm) {
952 masm->emit_alloc_obj(this);
953 masm->emit_code_stub(stub());
954 }
955
956 void LIR_OpBranch::emit_code(LIR_Assembler* masm) {
957 masm->emit_opBranch(this);
958 if (stub()) {
959 masm->emit_code_stub(stub());
960 }
961 }
962
963 void LIR_OpConvert::emit_code(LIR_Assembler* masm) {
964 masm->emit_opConvert(this);
965 if (stub() != NULL) {
966 masm->emit_code_stub(stub());
967 }
968 }
969
970 void LIR_Op2::emit_code(LIR_Assembler* masm) {
971 masm->emit_op2(this);
972 }
973
974 void LIR_OpAllocArray::emit_code(LIR_Assembler* masm) {
975 masm->emit_alloc_array(this);
976 masm->emit_code_stub(stub());
977 }
978
979 void LIR_OpTypeCheck::emit_code(LIR_Assembler* masm) {
980 masm->emit_opTypeCheck(this);
981 if (stub()) {
982 masm->emit_code_stub(stub());
983 }
984 }
985
986 void LIR_OpCompareAndSwap::emit_code(LIR_Assembler* masm) {
987 masm->emit_compare_and_swap(this);
988 }
989
990 void LIR_Op3::emit_code(LIR_Assembler* masm) {
991 masm->emit_op3(this);
992 }
993
994 void LIR_OpLock::emit_code(LIR_Assembler* masm) {
995 masm->emit_lock(this);
996 if (stub()) {
997 masm->emit_code_stub(stub());
998 }
999 }
1000
1001
1002 void LIR_OpDelay::emit_code(LIR_Assembler* masm) {
1003 masm->emit_delay(this);
1004 }
1005
1006
1007 void LIR_OpProfileCall::emit_code(LIR_Assembler* masm) {
1008 masm->emit_profile_call(this);
1009 }
1010
1011
1012 // LIR_List
1013 LIR_List::LIR_List(Compilation* compilation, BlockBegin* block)
1014 : _operations(8)
1015 , _compilation(compilation)
1016 #ifndef PRODUCT
1017 , _block(block)
1018 #endif
1019 #ifdef ASSERT
1020 , _file(NULL)
1021 , _line(0)
1022 #endif
1023 { }
1024
1025
1026 #ifdef ASSERT
1027 void LIR_List::set_file_and_line(const char * file, int line) {
1028 const char * f = strrchr(file, '/');
1029 if (f == NULL) f = strrchr(file, '\\');
1030 if (f == NULL) {
1031 f = file;
1032 } else {
1033 f++;
1034 }
1035 _file = f;
1036 _line = line;
1037 }
1038 #endif
1039
1040
1041 void LIR_List::append(LIR_InsertionBuffer* buffer) {
1042 assert(this == buffer->lir_list(), "wrong lir list");
1043 const int n = _operations.length();
1044
1045 if (buffer->number_of_ops() > 0) {
1046 // increase size of instructions list
1047 _operations.at_grow(n + buffer->number_of_ops() - 1, NULL);
1048 // insert ops from buffer into instructions list
1049 int op_index = buffer->number_of_ops() - 1;
1050 int ip_index = buffer->number_of_insertion_points() - 1;
1051 int from_index = n - 1;
1052 int to_index = _operations.length() - 1;
1053 for (; ip_index >= 0; ip_index --) {
1054 int index = buffer->index_at(ip_index);
1055 // make room after insertion point
1056 while (index < from_index) {
1057 _operations.at_put(to_index --, _operations.at(from_index --));
1058 }
1059 // insert ops from buffer
1060 for (int i = buffer->count_at(ip_index); i > 0; i --) {
1061 _operations.at_put(to_index --, buffer->op_at(op_index --));
1062 }
1063 }
1064 }
1065
1066 buffer->finish();
1067 }
1068
1069
1070 void LIR_List::oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info) {
1071 append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg, T_OBJECT, lir_patch_normal, info));
1072 }
1073
1074
1075 void LIR_List::load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1076 append(new LIR_Op1(
1077 lir_move,
1078 LIR_OprFact::address(addr),
1079 src,
1080 addr->type(),
1081 patch_code,
1082 info));
1083 }
1084
1085
1086 void LIR_List::volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1087 append(new LIR_Op1(
1088 lir_move,
1089 LIR_OprFact::address(address),
1090 dst,
1091 address->type(),
1092 patch_code,
1093 info, lir_move_volatile));
1094 }
1095
1096 void LIR_List::volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1097 append(new LIR_Op1(
1098 lir_move,
1099 LIR_OprFact::address(new LIR_Address(base, offset, type)),
1100 dst,
1101 type,
1102 patch_code,
1103 info, lir_move_volatile));
1104 }
1105
1106
1107 void LIR_List::prefetch(LIR_Address* addr, bool is_store) {
1108 append(new LIR_Op1(
1109 is_store ? lir_prefetchw : lir_prefetchr,
1110 LIR_OprFact::address(addr)));
1111 }
1112
1113
1114 void LIR_List::store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1115 append(new LIR_Op1(
1116 lir_move,
1117 LIR_OprFact::intConst(v),
1118 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)),
1119 type,
1120 patch_code,
1121 info));
1122 }
1123
1124
1125 void LIR_List::store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1126 append(new LIR_Op1(
1127 lir_move,
1128 LIR_OprFact::oopConst(o),
1129 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)),
1130 type,
1131 patch_code,
1132 info));
1133 }
1134
1135
1136 void LIR_List::store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1137 append(new LIR_Op1(
1138 lir_move,
1139 src,
1140 LIR_OprFact::address(addr),
1141 addr->type(),
1142 patch_code,
1143 info));
1144 }
1145
1146
1147 void LIR_List::volatile_store_mem_reg(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1148 append(new LIR_Op1(
1149 lir_move,
1150 src,
1151 LIR_OprFact::address(addr),
1152 addr->type(),
1153 patch_code,
1154 info,
1155 lir_move_volatile));
1156 }
1157
1158 void LIR_List::volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1159 append(new LIR_Op1(
1160 lir_move,
1161 src,
1162 LIR_OprFact::address(new LIR_Address(base, offset, type)),
1163 type,
1164 patch_code,
1165 info, lir_move_volatile));
1166 }
1167
1168
1169 void LIR_List::idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1170 append(new LIR_Op3(
1171 lir_idiv,
1172 left,
1173 right,
1174 tmp,
1175 res,
1176 info));
1177 }
1178
1179
1180 void LIR_List::idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1181 append(new LIR_Op3(
1182 lir_idiv,
1183 left,
1184 LIR_OprFact::intConst(right),
1185 tmp,
1186 res,
1187 info));
1188 }
1189
1190
1191 void LIR_List::irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1192 append(new LIR_Op3(
1193 lir_irem,
1194 left,
1195 right,
1196 tmp,
1197 res,
1198 info));
1199 }
1200
1201
1202 void LIR_List::irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1203 append(new LIR_Op3(
1204 lir_irem,
1205 left,
1206 LIR_OprFact::intConst(right),
1207 tmp,
1208 res,
1209 info));
1210 }
1211
1212
1213 void LIR_List::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
1214 append(new LIR_Op2(
1215 lir_cmp,
1216 condition,
1217 LIR_OprFact::address(new LIR_Address(base, disp, T_INT)),
1218 LIR_OprFact::intConst(c),
1219 info));
1220 }
1221
1222
1223 void LIR_List::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info) {
1224 append(new LIR_Op2(
1225 lir_cmp,
1226 condition,
1227 reg,
1228 LIR_OprFact::address(addr),
1229 info));
1230 }
1231
1232 void LIR_List::allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,
1233 int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub) {
1234 append(new LIR_OpAllocObj(
1235 klass,
1236 dst,
1237 t1,
1238 t2,
1239 t3,
1240 t4,
1241 header_size,
1242 object_size,
1243 init_check,
1244 stub));
1245 }
1246
1247 void LIR_List::allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub) {
1248 append(new LIR_OpAllocArray(
1249 klass,
1250 len,
1251 dst,
1252 t1,
1253 t2,
1254 t3,
1255 t4,
1256 type,
1257 stub));
1258 }
1259
1260 void LIR_List::shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1261 append(new LIR_Op2(
1262 lir_shl,
1263 value,
1264 count,
1265 dst,
1266 tmp));
1267 }
1268
1269 void LIR_List::shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1270 append(new LIR_Op2(
1271 lir_shr,
1272 value,
1273 count,
1274 dst,
1275 tmp));
1276 }
1277
1278
1279 void LIR_List::unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1280 append(new LIR_Op2(
1281 lir_ushr,
1282 value,
1283 count,
1284 dst,
1285 tmp));
1286 }
1287
1288 void LIR_List::fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less) {
1289 append(new LIR_Op2(is_unordered_less ? lir_ucmp_fd2i : lir_cmp_fd2i,
1290 left,
1291 right,
1292 dst));
1293 }
1294
1295 void LIR_List::lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info) {
1296 append(new LIR_OpLock(
1297 lir_lock,
1298 hdr,
1299 obj,
1300 lock,
1301 scratch,
1302 stub,
1303 info));
1304 }
1305
1306 void LIR_List::unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, CodeStub* stub) {
1307 append(new LIR_OpLock(
1308 lir_unlock,
1309 hdr,
1310 obj,
1311 lock,
1312 LIR_OprFact::illegalOpr,
1313 stub,
1314 NULL));
1315 }
1316
1317
1318 void check_LIR() {
1319 // cannot do the proper checking as PRODUCT and other modes return different results
1320 // guarantee(sizeof(LIR_OprDesc) == wordSize, "may not have a v-table");
1321 }
1322
1323
1324
1325 void LIR_List::checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass,
1326 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
1327 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub,
1328 ciMethod* profiled_method, int profiled_bci) {
1329 append(new LIR_OpTypeCheck(lir_checkcast, result, object, klass,
1330 tmp1, tmp2, tmp3, fast_check, info_for_exception, info_for_patch, stub,
1331 profiled_method, profiled_bci));
1332 }
1333
1334
1335 void LIR_List::instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch) {
1336 append(new LIR_OpTypeCheck(lir_instanceof, result, object, klass, tmp1, tmp2, tmp3, fast_check, NULL, info_for_patch, NULL, NULL, 0));
1337 }
1338
1339
1340 void LIR_List::store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception) {
1341 append(new LIR_OpTypeCheck(lir_store_check, object, array, tmp1, tmp2, tmp3, info_for_exception, NULL, 0));
1342 }
1343
1344
1345 void LIR_List::cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, LIR_Opr t1, LIR_Opr t2) {
1346 // Compare and swap produces condition code "zero" if contents_of(addr) == cmp_value,
1347 // implying successful swap of new_value into addr
1348 append(new LIR_OpCompareAndSwap(lir_cas_long, addr, cmp_value, new_value, t1, t2));
1349 }
1350
1351 void LIR_List::cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, LIR_Opr t1, LIR_Opr t2) {
1352 // Compare and swap produces condition code "zero" if contents_of(addr) == cmp_value,
1353 // implying successful swap of new_value into addr
1354 append(new LIR_OpCompareAndSwap(lir_cas_obj, addr, cmp_value, new_value, t1, t2));
1355 }
1356
1357 void LIR_List::cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, LIR_Opr t1, LIR_Opr t2) {
1358 // Compare and swap produces condition code "zero" if contents_of(addr) == cmp_value,
1359 // implying successful swap of new_value into addr
1360 append(new LIR_OpCompareAndSwap(lir_cas_int, addr, cmp_value, new_value, t1, t2));
1361 }
1362
1363
1364 #ifdef PRODUCT
1365
1366 void print_LIR(BlockList* blocks) {
1367 }
1368
1369 #else
1370 // LIR_OprDesc
1371 void LIR_OprDesc::print() const {
1372 print(tty);
1373 }
1374
1375 void LIR_OprDesc::print(outputStream* out) const {
1376 if (is_illegal()) {
1377 return;
1378 }
1379
1380 out->print("[");
1381 if (is_pointer()) {
1382 pointer()->print_value_on(out);
1383 } else if (is_single_stack()) {
1384 out->print("stack:%d", single_stack_ix());
1385 } else if (is_double_stack()) {
1386 out->print("dbl_stack:%d",double_stack_ix());
1387 } else if (is_virtual()) {
1388 out->print("R%d", vreg_number());
1389 } else if (is_single_cpu()) {
1390 out->print(as_register()->name());
1391 } else if (is_double_cpu()) {
1392 out->print(as_register_hi()->name());
1393 out->print(as_register_lo()->name());
1394 #if defined(X86)
1395 } else if (is_single_xmm()) {
1396 out->print(as_xmm_float_reg()->name());
1397 } else if (is_double_xmm()) {
1398 out->print(as_xmm_double_reg()->name());
1399 } else if (is_single_fpu()) {
1400 out->print("fpu%d", fpu_regnr());
1401 } else if (is_double_fpu()) {
1402 out->print("fpu%d", fpu_regnrLo());
1403 #else
1404 } else if (is_single_fpu()) {
1405 out->print(as_float_reg()->name());
1406 } else if (is_double_fpu()) {
1407 out->print(as_double_reg()->name());
1408 #endif
1409
1410 } else if (is_illegal()) {
1411 out->print("-");
1412 } else {
1413 out->print("Unknown Operand");
1414 }
1415 if (!is_illegal()) {
1416 out->print("|%c", type_char());
1417 }
1418 if (is_register() && is_last_use()) {
1419 out->print("(last_use)");
1420 }
1421 out->print("]");
1422 }
1423
1424
1425 // LIR_Address
1426 void LIR_Const::print_value_on(outputStream* out) const {
1427 switch (type()) {
1428 case T_ADDRESS:out->print("address:%d",as_jint()); break;
1429 case T_INT: out->print("int:%d", as_jint()); break;
1430 case T_LONG: out->print("lng:%lld", as_jlong()); break;
1431 case T_FLOAT: out->print("flt:%f", as_jfloat()); break;
1432 case T_DOUBLE: out->print("dbl:%f", as_jdouble()); break;
1433 case T_OBJECT: out->print("obj:0x%x", as_jobject()); break;
1434 default: out->print("%3d:0x%x",type(), as_jdouble()); break;
1435 }
1436 }
1437
1438 // LIR_Address
1439 void LIR_Address::print_value_on(outputStream* out) const {
1440 out->print("Base:"); _base->print(out);
1441 if (!_index->is_illegal()) {
1442 out->print(" Index:"); _index->print(out);
1443 switch (scale()) {
1444 case times_1: break;
1445 case times_2: out->print(" * 2"); break;
1446 case times_4: out->print(" * 4"); break;
1447 case times_8: out->print(" * 8"); break;
1448 }
1449 }
1450 out->print(" Disp: %d", _disp);
1451 }
1452
1453 // debug output of block header without InstructionPrinter
1454 // (because phi functions are not necessary for LIR)
1455 static void print_block(BlockBegin* x) {
1456 // print block id
1457 BlockEnd* end = x->end();
1458 tty->print("B%d ", x->block_id());
1459
1460 // print flags
1461 if (x->is_set(BlockBegin::std_entry_flag)) tty->print("std ");
1462 if (x->is_set(BlockBegin::osr_entry_flag)) tty->print("osr ");
1463 if (x->is_set(BlockBegin::exception_entry_flag)) tty->print("ex ");
1464 if (x->is_set(BlockBegin::subroutine_entry_flag)) tty->print("jsr ");
1465 if (x->is_set(BlockBegin::backward_branch_target_flag)) tty->print("bb ");
1466 if (x->is_set(BlockBegin::linear_scan_loop_header_flag)) tty->print("lh ");
1467 if (x->is_set(BlockBegin::linear_scan_loop_end_flag)) tty->print("le ");
1468
1469 // print block bci range
1470 tty->print("[%d, %d] ", x->bci(), (end == NULL ? -1 : end->bci()));
1471
1472 // print predecessors and successors
1473 if (x->number_of_preds() > 0) {
1474 tty->print("preds: ");
1475 for (int i = 0; i < x->number_of_preds(); i ++) {
1476 tty->print("B%d ", x->pred_at(i)->block_id());
1477 }
1478 }
1479
1480 if (x->number_of_sux() > 0) {
1481 tty->print("sux: ");
1482 for (int i = 0; i < x->number_of_sux(); i ++) {
1483 tty->print("B%d ", x->sux_at(i)->block_id());
1484 }
1485 }
1486
1487 // print exception handlers
1488 if (x->number_of_exception_handlers() > 0) {
1489 tty->print("xhandler: ");
1490 for (int i = 0; i < x->number_of_exception_handlers(); i++) {
1491 tty->print("B%d ", x->exception_handler_at(i)->block_id());
1492 }
1493 }
1494
1495 tty->cr();
1496 }
1497
1498 void print_LIR(BlockList* blocks) {
1499 tty->print_cr("LIR:");
1500 int i;
1501 for (i = 0; i < blocks->length(); i++) {
1502 BlockBegin* bb = blocks->at(i);
1503 print_block(bb);
1504 tty->print("__id_Instruction___________________________________________"); tty->cr();
1505 bb->lir()->print_instructions();
1506 }
1507 }
1508
1509 void LIR_List::print_instructions() {
1510 for (int i = 0; i < _operations.length(); i++) {
1511 _operations.at(i)->print(); tty->cr();
1512 }
1513 tty->cr();
1514 }
1515
1516 // LIR_Ops printing routines
1517 // LIR_Op
1518 void LIR_Op::print_on(outputStream* out) const {
1519 if (id() != -1 || PrintCFGToFile) {
1520 out->print("%4d ", id());
1521 } else {
1522 out->print(" ");
1523 }
1524 out->print(name()); out->print(" ");
1525 print_instr(out);
1526 if (info() != NULL) out->print(" [bci:%d]", info()->bci());
1527 #ifdef ASSERT
1528 if (Verbose && _file != NULL) {
1529 out->print(" (%s:%d)", _file, _line);
1530 }
1531 #endif
1532 }
1533
1534 const char * LIR_Op::name() const {
1535 const char* s = NULL;
1536 switch(code()) {
1537 // LIR_Op0
1538 case lir_membar: s = "membar"; break;
1539 case lir_membar_acquire: s = "membar_acquire"; break;
1540 case lir_membar_release: s = "membar_release"; break;
1541 case lir_word_align: s = "word_align"; break;
1542 case lir_label: s = "label"; break;
1543 case lir_nop: s = "nop"; break;
1544 case lir_backwardbranch_target: s = "backbranch"; break;
1545 case lir_std_entry: s = "std_entry"; break;
1546 case lir_osr_entry: s = "osr_entry"; break;
1547 case lir_build_frame: s = "build_frm"; break;
1548 case lir_fpop_raw: s = "fpop_raw"; break;
1549 case lir_24bit_FPU: s = "24bit_FPU"; break;
1550 case lir_reset_FPU: s = "reset_FPU"; break;
1551 case lir_breakpoint: s = "breakpoint"; break;
1552 case lir_get_thread: s = "get_thread"; break;
1553 // LIR_Op1
1554 case lir_fxch: s = "fxch"; break;
1555 case lir_fld: s = "fld"; break;
1556 case lir_ffree: s = "ffree"; break;
1557 case lir_push: s = "push"; break;
1558 case lir_pop: s = "pop"; break;
1559 case lir_null_check: s = "null_check"; break;
1560 case lir_return: s = "return"; break;
1561 case lir_safepoint: s = "safepoint"; break;
1562 case lir_neg: s = "neg"; break;
1563 case lir_leal: s = "leal"; break;
1564 case lir_branch: s = "branch"; break;
1565 case lir_cond_float_branch: s = "flt_cond_br"; break;
1566 case lir_move: s = "move"; break;
1567 case lir_roundfp: s = "roundfp"; break;
1568 case lir_rtcall: s = "rtcall"; break;
1569 case lir_throw: s = "throw"; break;
1570 case lir_unwind: s = "unwind"; break;
1571 case lir_convert: s = "convert"; break;
1572 case lir_alloc_object: s = "alloc_obj"; break;
1573 case lir_monaddr: s = "mon_addr"; break;
1574 // LIR_Op2
1575 case lir_cmp: s = "cmp"; break;
1576 case lir_cmp_l2i: s = "cmp_l2i"; break;
1577 case lir_ucmp_fd2i: s = "ucomp_fd2i"; break;
1578 case lir_cmp_fd2i: s = "comp_fd2i"; break;
1579 case lir_cmove: s = "cmove"; break;
1580 case lir_add: s = "add"; break;
1581 case lir_sub: s = "sub"; break;
1582 case lir_mul: s = "mul"; break;
1583 case lir_mul_strictfp: s = "mul_strictfp"; break;
1584 case lir_div: s = "div"; break;
1585 case lir_div_strictfp: s = "div_strictfp"; break;
1586 case lir_rem: s = "rem"; break;
1587 case lir_abs: s = "abs"; break;
1588 case lir_sqrt: s = "sqrt"; break;
1589 case lir_sin: s = "sin"; break;
1590 case lir_cos: s = "cos"; break;
1591 case lir_tan: s = "tan"; break;
1592 case lir_log: s = "log"; break;
1593 case lir_log10: s = "log10"; break;
1594 case lir_logic_and: s = "logic_and"; break;
1595 case lir_logic_or: s = "logic_or"; break;
1596 case lir_logic_xor: s = "logic_xor"; break;
1597 case lir_shl: s = "shift_left"; break;
1598 case lir_shr: s = "shift_right"; break;
1599 case lir_ushr: s = "ushift_right"; break;
1600 case lir_alloc_array: s = "alloc_array"; break;
1601 // LIR_Op3
1602 case lir_idiv: s = "idiv"; break;
1603 case lir_irem: s = "irem"; break;
1604 // LIR_OpJavaCall
1605 case lir_static_call: s = "static"; break;
1606 case lir_optvirtual_call: s = "optvirtual"; break;
1607 case lir_icvirtual_call: s = "icvirtual"; break;
1608 case lir_virtual_call: s = "virtual"; break;
1609 case lir_dynamic_call: s = "dynamic"; break;
1610 // LIR_OpArrayCopy
1611 case lir_arraycopy: s = "arraycopy"; break;
1612 // LIR_OpLock
1613 case lir_lock: s = "lock"; break;
1614 case lir_unlock: s = "unlock"; break;
1615 // LIR_OpDelay
1616 case lir_delay_slot: s = "delay"; break;
1617 // LIR_OpTypeCheck
1618 case lir_instanceof: s = "instanceof"; break;
1619 case lir_checkcast: s = "checkcast"; break;
1620 case lir_store_check: s = "store_check"; break;
1621 // LIR_OpCompareAndSwap
1622 case lir_cas_long: s = "cas_long"; break;
1623 case lir_cas_obj: s = "cas_obj"; break;
1624 case lir_cas_int: s = "cas_int"; break;
1625 // LIR_OpProfileCall
1626 case lir_profile_call: s = "profile_call"; break;
1627
1628 case lir_none: ShouldNotReachHere();break;
1629 default: s = "illegal_op"; break;
1630 }
1631 return s;
1632 }
1633
1634 // LIR_OpJavaCall
1635 void LIR_OpJavaCall::print_instr(outputStream* out) const {
1636 out->print("call: ");
1637 out->print("[addr: 0x%x]", address());
1638 if (receiver()->is_valid()) {
1639 out->print(" [recv: "); receiver()->print(out); out->print("]");
1640 }
1641 if (result_opr()->is_valid()) {
1642 out->print(" [result: "); result_opr()->print(out); out->print("]");
1643 }
1644 }
1645
1646 // LIR_OpLabel
1647 void LIR_OpLabel::print_instr(outputStream* out) const {
1648 out->print("[label:0x%x]", _label);
1649 }
1650
1651 // LIR_OpArrayCopy
1652 void LIR_OpArrayCopy::print_instr(outputStream* out) const {
1653 src()->print(out); out->print(" ");
1654 src_pos()->print(out); out->print(" ");
1655 dst()->print(out); out->print(" ");
1656 dst_pos()->print(out); out->print(" ");
1657 length()->print(out); out->print(" ");
1658 tmp()->print(out); out->print(" ");
1659 }
1660
1661 // LIR_OpCompareAndSwap
1662 void LIR_OpCompareAndSwap::print_instr(outputStream* out) const {
1663 addr()->print(out); out->print(" ");
1664 cmp_value()->print(out); out->print(" ");
1665 new_value()->print(out); out->print(" ");
1666 tmp1()->print(out); out->print(" ");
1667 tmp2()->print(out); out->print(" ");
1668
1669 }
1670
1671 // LIR_Op0
1672 void LIR_Op0::print_instr(outputStream* out) const {
1673 result_opr()->print(out);
1674 }
1675
1676 // LIR_Op1
1677 const char * LIR_Op1::name() const {
1678 if (code() == lir_move) {
1679 switch (move_kind()) {
1680 case lir_move_normal:
1681 return "move";
1682 case lir_move_unaligned:
1683 return "unaligned move";
1684 case lir_move_volatile:
1685 return "volatile_move";
1686 default:
1687 ShouldNotReachHere();
1688 return "illegal_op";
1689 }
1690 } else {
1691 return LIR_Op::name();
1692 }
1693 }
1694
1695
1696 void LIR_Op1::print_instr(outputStream* out) const {
1697 _opr->print(out); out->print(" ");
1698 result_opr()->print(out); out->print(" ");
1699 print_patch_code(out, patch_code());
1700 }
1701
1702
1703 // LIR_Op1
1704 void LIR_OpRTCall::print_instr(outputStream* out) const {
1705 intx a = (intx)addr();
1706 out->print(Runtime1::name_for_address(addr()));
1707 out->print(" ");
1708 tmp()->print(out);
1709 }
1710
1711 void LIR_Op1::print_patch_code(outputStream* out, LIR_PatchCode code) {
1712 switch(code) {
1713 case lir_patch_none: break;
1714 case lir_patch_low: out->print("[patch_low]"); break;
1715 case lir_patch_high: out->print("[patch_high]"); break;
1716 case lir_patch_normal: out->print("[patch_normal]"); break;
1717 default: ShouldNotReachHere();
1718 }
1719 }
1720
1721 // LIR_OpBranch
1722 void LIR_OpBranch::print_instr(outputStream* out) const {
1723 print_condition(out, cond()); out->print(" ");
1724 if (block() != NULL) {
1725 out->print("[B%d] ", block()->block_id());
1726 } else if (stub() != NULL) {
1727 out->print("[");
1728 stub()->print_name(out);
1729 out->print(": 0x%x]", stub());
1730 if (stub()->info() != NULL) out->print(" [bci:%d]", stub()->info()->bci());
1731 } else {
1732 out->print("[label:0x%x] ", label());
1733 }
1734 if (ublock() != NULL) {
1735 out->print("unordered: [B%d] ", ublock()->block_id());
1736 }
1737 }
1738
1739 void LIR_Op::print_condition(outputStream* out, LIR_Condition cond) {
1740 switch(cond) {
1741 case lir_cond_equal: out->print("[EQ]"); break;
1742 case lir_cond_notEqual: out->print("[NE]"); break;
1743 case lir_cond_less: out->print("[LT]"); break;
1744 case lir_cond_lessEqual: out->print("[LE]"); break;
1745 case lir_cond_greaterEqual: out->print("[GE]"); break;
1746 case lir_cond_greater: out->print("[GT]"); break;
1747 case lir_cond_belowEqual: out->print("[BE]"); break;
1748 case lir_cond_aboveEqual: out->print("[AE]"); break;
1749 case lir_cond_always: out->print("[AL]"); break;
1750 default: out->print("[%d]",cond); break;
1751 }
1752 }
1753
1754 // LIR_OpConvert
1755 void LIR_OpConvert::print_instr(outputStream* out) const {
1756 print_bytecode(out, bytecode());
1757 in_opr()->print(out); out->print(" ");
1758 result_opr()->print(out); out->print(" ");
1759 }
1760
1761 void LIR_OpConvert::print_bytecode(outputStream* out, Bytecodes::Code code) {
1762 switch(code) {
1763 case Bytecodes::_d2f: out->print("[d2f] "); break;
1764 case Bytecodes::_d2i: out->print("[d2i] "); break;
1765 case Bytecodes::_d2l: out->print("[d2l] "); break;
1766 case Bytecodes::_f2d: out->print("[f2d] "); break;
1767 case Bytecodes::_f2i: out->print("[f2i] "); break;
1768 case Bytecodes::_f2l: out->print("[f2l] "); break;
1769 case Bytecodes::_i2b: out->print("[i2b] "); break;
1770 case Bytecodes::_i2c: out->print("[i2c] "); break;
1771 case Bytecodes::_i2d: out->print("[i2d] "); break;
1772 case Bytecodes::_i2f: out->print("[i2f] "); break;
1773 case Bytecodes::_i2l: out->print("[i2l] "); break;
1774 case Bytecodes::_i2s: out->print("[i2s] "); break;
1775 case Bytecodes::_l2i: out->print("[l2i] "); break;
1776 case Bytecodes::_l2f: out->print("[l2f] "); break;
1777 case Bytecodes::_l2d: out->print("[l2d] "); break;
1778 default:
1779 out->print("[?%d]",code);
1780 break;
1781 }
1782 }
1783
1784 void LIR_OpAllocObj::print_instr(outputStream* out) const {
1785 klass()->print(out); out->print(" ");
1786 obj()->print(out); out->print(" ");
1787 tmp1()->print(out); out->print(" ");
1788 tmp2()->print(out); out->print(" ");
1789 tmp3()->print(out); out->print(" ");
1790 tmp4()->print(out); out->print(" ");
1791 out->print("[hdr:%d]", header_size()); out->print(" ");
1792 out->print("[obj:%d]", object_size()); out->print(" ");
1793 out->print("[lbl:0x%x]", stub()->entry());
1794 }
1795
1796 void LIR_OpRoundFP::print_instr(outputStream* out) const {
1797 _opr->print(out); out->print(" ");
1798 tmp()->print(out); out->print(" ");
1799 result_opr()->print(out); out->print(" ");
1800 }
1801
1802 // LIR_Op2
1803 void LIR_Op2::print_instr(outputStream* out) const {
1804 if (code() == lir_cmove) {
1805 print_condition(out, condition()); out->print(" ");
1806 }
1807 in_opr1()->print(out); out->print(" ");
1808 in_opr2()->print(out); out->print(" ");
1809 if (tmp_opr()->is_valid()) { tmp_opr()->print(out); out->print(" "); }
1810 result_opr()->print(out);
1811 }
1812
1813 void LIR_OpAllocArray::print_instr(outputStream* out) const {
1814 klass()->print(out); out->print(" ");
1815 len()->print(out); out->print(" ");
1816 obj()->print(out); out->print(" ");
1817 tmp1()->print(out); out->print(" ");
1818 tmp2()->print(out); out->print(" ");
1819 tmp3()->print(out); out->print(" ");
1820 tmp4()->print(out); out->print(" ");
1821 out->print("[type:0x%x]", type()); out->print(" ");
1822 out->print("[label:0x%x]", stub()->entry());
1823 }
1824
1825
1826 void LIR_OpTypeCheck::print_instr(outputStream* out) const {
1827 object()->print(out); out->print(" ");
1828 if (code() == lir_store_check) {
1829 array()->print(out); out->print(" ");
1830 }
1831 if (code() != lir_store_check) {
1832 klass()->print_name_on(out); out->print(" ");
1833 if (fast_check()) out->print("fast_check ");
1834 }
1835 tmp1()->print(out); out->print(" ");
1836 tmp2()->print(out); out->print(" ");
1837 tmp3()->print(out); out->print(" ");
1838 result_opr()->print(out); out->print(" ");
1839 if (info_for_exception() != NULL) out->print(" [bci:%d]", info_for_exception()->bci());
1840 }
1841
1842
1843 // LIR_Op3
1844 void LIR_Op3::print_instr(outputStream* out) const {
1845 in_opr1()->print(out); out->print(" ");
1846 in_opr2()->print(out); out->print(" ");
1847 in_opr3()->print(out); out->print(" ");
1848 result_opr()->print(out);
1849 }
1850
1851
1852 void LIR_OpLock::print_instr(outputStream* out) const {
1853 hdr_opr()->print(out); out->print(" ");
1854 obj_opr()->print(out); out->print(" ");
1855 lock_opr()->print(out); out->print(" ");
1856 if (_scratch->is_valid()) {
1857 _scratch->print(out); out->print(" ");
1858 }
1859 out->print("[lbl:0x%x]", stub()->entry());
1860 }
1861
1862
1863 void LIR_OpDelay::print_instr(outputStream* out) const {
1864 _op->print_on(out);
1865 }
1866
1867
1868 // LIR_OpProfileCall
1869 void LIR_OpProfileCall::print_instr(outputStream* out) const {
1870 profiled_method()->name()->print_symbol_on(out);
1871 out->print(".");
1872 profiled_method()->holder()->name()->print_symbol_on(out);
1873 out->print(" @ %d ", profiled_bci());
1874 mdo()->print(out); out->print(" ");
1875 recv()->print(out); out->print(" ");
1876 tmp1()->print(out); out->print(" ");
1877 }
1878
1879
1880 #endif // PRODUCT
1881
1882 // Implementation of LIR_InsertionBuffer
1883
1884 void LIR_InsertionBuffer::append(int index, LIR_Op* op) {
1885 assert(_index_and_count.length() % 2 == 0, "must have a count for each index");
1886
1887 int i = number_of_insertion_points() - 1;
1888 if (i < 0 || index_at(i) < index) {
1889 append_new(index, 1);
1890 } else {
1891 assert(index_at(i) == index, "can append LIR_Ops in ascending order only");
1892 assert(count_at(i) > 0, "check");
1893 set_count_at(i, count_at(i) + 1);
1894 }
1895 _ops.push(op);
1896
1897 DEBUG_ONLY(verify());
1898 }
1899
1900 #ifdef ASSERT
1901 void LIR_InsertionBuffer::verify() {
1902 int sum = 0;
1903 int prev_idx = -1;
1904
1905 for (int i = 0; i < number_of_insertion_points(); i++) {
1906 assert(prev_idx < index_at(i), "index must be ordered ascending");
1907 sum += count_at(i);
1908 }
1909 assert(sum == number_of_ops(), "wrong total sum");
1910 }
1911 #endif