src/share/vm/c1/c1_LIRAssembler.hpp
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src/share/vm/c1/c1_LIRAssembler.hpp

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  67   bool bailed_out() const                        { return compilation()->bailed_out(); }
  68 
  69   // code emission patterns and accessors
  70   void check_codespace();
  71   bool needs_icache(ciMethod* method) const;
  72 
  73   // returns offset of icache check
  74   int check_icache();
  75 
  76   void jobject2reg(jobject o, Register reg);
  77   void jobject2reg_with_patching(Register reg, CodeEmitInfo* info);
  78 
  79   void emit_stubs(CodeStubList* stub_list);
  80 
  81   // addresses
  82   Address as_Address(LIR_Address* addr);
  83   Address as_Address_lo(LIR_Address* addr);
  84   Address as_Address_hi(LIR_Address* addr);
  85 
  86   // debug information
  87   void add_call_info(int pc_offset, CodeEmitInfo* cinfo, bool is_method_handle_invoke = false);
  88   void add_debug_info_for_branch(CodeEmitInfo* info);
  89   void add_debug_info_for_div0(int pc_offset, CodeEmitInfo* cinfo);
  90   void add_debug_info_for_div0_here(CodeEmitInfo* info);
  91   void add_debug_info_for_null_check(int pc_offset, CodeEmitInfo* cinfo);
  92   void add_debug_info_for_null_check_here(CodeEmitInfo* info);
  93 
  94   void set_24bit_FPU();
  95   void reset_FPU();
  96   void fpop();
  97   void fxch(int i);
  98   void fld(int i);
  99   void ffree(int i);
 100 
 101   void breakpoint();
 102   void push(LIR_Opr opr);
 103   void pop(LIR_Opr opr);
 104 
 105   // patching
 106   void append_patching_stub(PatchingStub* stub);
 107   void patching_epilog(PatchingStub* patch, LIR_PatchCode patch_code, Register obj, CodeEmitInfo* info);


 195   void emit_delay(LIR_OpDelay* op);
 196 
 197   void arith_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dest, CodeEmitInfo* info, bool pop_fpu_stack);
 198   void arithmetic_idiv(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr temp, LIR_Opr result, CodeEmitInfo* info);
 199   void intrinsic_op(LIR_Code code, LIR_Opr value, LIR_Opr unused, LIR_Opr dest, LIR_Op* op);
 200 
 201   void logic_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dest);
 202 
 203   void roundfp_op(LIR_Opr src, LIR_Opr tmp, LIR_Opr dest, bool pop_fpu_stack);
 204   void move_op(LIR_Opr src, LIR_Opr result, BasicType type,
 205                LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool unaligned);
 206   void volatile_move_op(LIR_Opr src, LIR_Opr result, BasicType type, CodeEmitInfo* info);
 207   void comp_mem_op(LIR_Opr src, LIR_Opr result, BasicType type, CodeEmitInfo* info);  // info set for null exceptions
 208   void comp_fl2i(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr result, LIR_Op2* op);
 209   void cmove(LIR_Condition code, LIR_Opr left, LIR_Opr right, LIR_Opr result);
 210 
 211   void call(        LIR_OpJavaCall* op, relocInfo::relocType rtype);
 212   void ic_call(     LIR_OpJavaCall* op);
 213   void vtable_call( LIR_OpJavaCall* op);
 214 
 215   // JSR 292
 216   void preserve_SP(LIR_OpJavaCall* op);
 217   void restore_SP( LIR_OpJavaCall* op);
 218 
 219   void osr_entry();
 220 
 221   void build_frame();
 222 
 223   void throw_op(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info);
 224   void unwind_op(LIR_Opr exceptionOop);
 225   void monitor_address(int monitor_ix, LIR_Opr dst);
 226 
 227   void align_backward_branch_target();
 228   void align_call(LIR_Code code);
 229 
 230   void negate(LIR_Opr left, LIR_Opr dest);
 231   void leal(LIR_Opr left, LIR_Opr dest);
 232 
 233   void rt_call(LIR_Opr result, address dest, const LIR_OprList* args, LIR_Opr tmp, CodeEmitInfo* info);
 234 
 235   void membar();
 236   void membar_acquire();
 237   void membar_release();
 238   void get_thread(LIR_Opr result);


  67   bool bailed_out() const                        { return compilation()->bailed_out(); }
  68 
  69   // code emission patterns and accessors
  70   void check_codespace();
  71   bool needs_icache(ciMethod* method) const;
  72 
  73   // returns offset of icache check
  74   int check_icache();
  75 
  76   void jobject2reg(jobject o, Register reg);
  77   void jobject2reg_with_patching(Register reg, CodeEmitInfo* info);
  78 
  79   void emit_stubs(CodeStubList* stub_list);
  80 
  81   // addresses
  82   Address as_Address(LIR_Address* addr);
  83   Address as_Address_lo(LIR_Address* addr);
  84   Address as_Address_hi(LIR_Address* addr);
  85 
  86   // debug information
  87   void add_call_info(int pc_offset, CodeEmitInfo* cinfo);
  88   void add_debug_info_for_branch(CodeEmitInfo* info);
  89   void add_debug_info_for_div0(int pc_offset, CodeEmitInfo* cinfo);
  90   void add_debug_info_for_div0_here(CodeEmitInfo* info);
  91   void add_debug_info_for_null_check(int pc_offset, CodeEmitInfo* cinfo);
  92   void add_debug_info_for_null_check_here(CodeEmitInfo* info);
  93 
  94   void set_24bit_FPU();
  95   void reset_FPU();
  96   void fpop();
  97   void fxch(int i);
  98   void fld(int i);
  99   void ffree(int i);
 100 
 101   void breakpoint();
 102   void push(LIR_Opr opr);
 103   void pop(LIR_Opr opr);
 104 
 105   // patching
 106   void append_patching_stub(PatchingStub* stub);
 107   void patching_epilog(PatchingStub* patch, LIR_PatchCode patch_code, Register obj, CodeEmitInfo* info);


 195   void emit_delay(LIR_OpDelay* op);
 196 
 197   void arith_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dest, CodeEmitInfo* info, bool pop_fpu_stack);
 198   void arithmetic_idiv(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr temp, LIR_Opr result, CodeEmitInfo* info);
 199   void intrinsic_op(LIR_Code code, LIR_Opr value, LIR_Opr unused, LIR_Opr dest, LIR_Op* op);
 200 
 201   void logic_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dest);
 202 
 203   void roundfp_op(LIR_Opr src, LIR_Opr tmp, LIR_Opr dest, bool pop_fpu_stack);
 204   void move_op(LIR_Opr src, LIR_Opr result, BasicType type,
 205                LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool unaligned);
 206   void volatile_move_op(LIR_Opr src, LIR_Opr result, BasicType type, CodeEmitInfo* info);
 207   void comp_mem_op(LIR_Opr src, LIR_Opr result, BasicType type, CodeEmitInfo* info);  // info set for null exceptions
 208   void comp_fl2i(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr result, LIR_Op2* op);
 209   void cmove(LIR_Condition code, LIR_Opr left, LIR_Opr right, LIR_Opr result);
 210 
 211   void call(        LIR_OpJavaCall* op, relocInfo::relocType rtype);
 212   void ic_call(     LIR_OpJavaCall* op);
 213   void vtable_call( LIR_OpJavaCall* op);
 214 




 215   void osr_entry();
 216 
 217   void build_frame();
 218 
 219   void throw_op(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info);
 220   void unwind_op(LIR_Opr exceptionOop);
 221   void monitor_address(int monitor_ix, LIR_Opr dst);
 222 
 223   void align_backward_branch_target();
 224   void align_call(LIR_Code code);
 225 
 226   void negate(LIR_Opr left, LIR_Opr dest);
 227   void leal(LIR_Opr left, LIR_Opr dest);
 228 
 229   void rt_call(LIR_Opr result, address dest, const LIR_OprList* args, LIR_Opr tmp, CodeEmitInfo* info);
 230 
 231   void membar();
 232   void membar_acquire();
 233   void membar_release();
 234   void get_thread(LIR_Opr result);
src/share/vm/c1/c1_LIRAssembler.hpp
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