src/cpu/sparc/vm/assembler_sparc.hpp
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*** old/src/cpu/sparc/vm/assembler_sparc.hpp	Fri Nov 12 05:56:01 2010
--- new/src/cpu/sparc/vm/assembler_sparc.hpp	Fri Nov 12 05:56:00 2010

*** 1616,1625 **** --- 1616,1629 ---- // pp 230 void sub( Register s1, Register s2, Register d ) { emit_long( op(arith_op) | rd(d) | op3(sub_op3 ) | rs1(s1) | rs2(s2) ); } void sub( Register s1, int simm13a, Register d ) { emit_long( op(arith_op) | rd(d) | op3(sub_op3 ) | rs1(s1) | immed(true) | simm(simm13a, 13) ); } + + // Note: offset is added to s2. + inline void sub(Register s1, RegisterOrConstant s2, Register d, int offset = 0); + void subcc( Register s1, Register s2, Register d ) { emit_long( op(arith_op) | rd(d) | op3(sub_op3 | cc_bit_op3 ) | rs1(s1) | rs2(s2) ); } void subcc( Register s1, int simm13a, Register d ) { emit_long( op(arith_op) | rd(d) | op3(sub_op3 | cc_bit_op3 ) | rs1(s1) | immed(true) | simm(simm13a, 13) ); } void subc( Register s1, Register s2, Register d ) { emit_long( op(arith_op) | rd(d) | op3(subc_op3 ) | rs1(s1) | rs2(s2) ); } void subc( Register s1, int simm13a, Register d ) { emit_long( op(arith_op) | rd(d) | op3(subc_op3 ) | rs1(s1) | immed(true) | simm(simm13a, 13) ); } void subccc( Register s1, Register s2, Register d ) { emit_long( op(arith_op) | rd(d) | op3(subc_op3 | cc_bit_op3) | rs1(s1) | rs2(s2) ); }
*** 1889,1898 **** --- 1893,1905 ---- void set(address addr, Register d, RelocationHolder const& rspec); void patchable_set(const AddressLiteral& addrlit, Register d); void patchable_set(intptr_t value, Register d); void set64(jlong value, Register d, Register tmp); + // Compute size of set64. + static int size_of_set64(jlong value); + // sign-extend 32 to 64 inline void signx( Register s, Register d ) { sra( s, G0, d); } inline void signx( Register d ) { sra( d, G0, d); } inline void not1( Register s, Register d ) { xnor( s, G0, d ); }

src/cpu/sparc/vm/assembler_sparc.hpp
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