src/cpu/x86/vm/x86_64.ad
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src/cpu/x86/vm/x86_64.ad

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rev 1838 : 6961690: load oops from constant table on SPARC
Summary: oops should be loaded from the constant table of an nmethod instead of materializing them with a long code sequence.
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*** 831,840 **** --- 831,864 ---- } } //============================================================================= + const RegMask& MachConstantBaseNode::_out_RegMask = RegMask::Empty; + + void MachConstantBaseNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const { + emit_constant_table(cbuf); + set_table_base_offset(0); + // Empty encoding + } + + uint MachConstantBaseNode::size(PhaseRegAlloc* ra_) const { + // Compute the size (even if it's zero) since + // Compile::Shorten_branches needs the table to be emitted (which + // happens in Compile::scratch_emit_size) to calculate the size for + // MachConstantNodes. + return MachNode::size(ra_); + } + + #ifndef PRODUCT + void MachConstantBaseNode::format(PhaseRegAlloc* ra_, outputStream* st) const { + st->print("# MachConstantBase (empty encoding)"); + } + #endif + + + //============================================================================= #ifndef PRODUCT void MachPrologNode::format(PhaseRegAlloc* ra_, outputStream* st) const { Compile* C = ra_->C;
*** 1920,1951 **** assert(__ offset() - offset <= (int) size_deopt_handler(), "overflow"); __ end_a_stub(); return offset; } - static void emit_double_constant(CodeBuffer& cbuf, double x) { - int mark = cbuf.insts()->mark_off(); - MacroAssembler _masm(&cbuf); - address double_address = __ double_constant(x); - cbuf.insts()->set_mark_off(mark); // preserve mark across masm shift - emit_d32_reloc(cbuf, - (int) (double_address - cbuf.insts_end() - 4), - internal_word_Relocation::spec(double_address), - RELOC_DISP32); - } - - static void emit_float_constant(CodeBuffer& cbuf, float x) { - int mark = cbuf.insts()->mark_off(); - MacroAssembler _masm(&cbuf); - address float_address = __ float_constant(x); - cbuf.insts()->set_mark_off(mark); // preserve mark across masm shift - emit_d32_reloc(cbuf, - (int) (float_address - cbuf.insts_end() - 4), - internal_word_Relocation::spec(float_address), - RELOC_DISP32); - } - const bool Matcher::match_rule_supported(int opcode) { if (!has_match_rule(opcode)) return false; --- 1944,1953 ----
*** 2787,2833 **** } else { emit_d64(cbuf, $src$$constant); } %} - enc_class load_immF(regF dst, immF con) - %{ - // XXX reg_mem doesn't support RIP-relative addressing yet - emit_rm(cbuf, 0x0, $dst$$reg & 7, 0x5); // 00 reg 101 - emit_float_constant(cbuf, $con$$constant); - %} - - enc_class load_immD(regD dst, immD con) - %{ - // XXX reg_mem doesn't support RIP-relative addressing yet - emit_rm(cbuf, 0x0, $dst$$reg & 7, 0x5); // 00 reg 101 - emit_double_constant(cbuf, $con$$constant); - %} - - enc_class load_conF (regF dst, immF con) %{ // Load float constant - emit_opcode(cbuf, 0xF3); - if ($dst$$reg >= 8) { - emit_opcode(cbuf, Assembler::REX_R); - } - emit_opcode(cbuf, 0x0F); - emit_opcode(cbuf, 0x10); - emit_rm(cbuf, 0x0, $dst$$reg & 7, 0x5); // 00 reg 101 - emit_float_constant(cbuf, $con$$constant); - %} - - enc_class load_conD (regD dst, immD con) %{ // Load double constant - // UseXmmLoadAndClearUpper ? movsd(dst, con) : movlpd(dst, con) - emit_opcode(cbuf, UseXmmLoadAndClearUpper ? 0xF2 : 0x66); - if ($dst$$reg >= 8) { - emit_opcode(cbuf, Assembler::REX_R); - } - emit_opcode(cbuf, 0x0F); - emit_opcode(cbuf, UseXmmLoadAndClearUpper ? 0x10 : 0x12); - emit_rm(cbuf, 0x0, $dst$$reg & 7, 0x5); // 00 reg 101 - emit_double_constant(cbuf, $con$$constant); - %} - // Encode a reg-reg copy. If it is useless, then empty encoding. enc_class enc_copy(rRegI dst, rRegI src) %{ encode_copy(cbuf, $dst$$reg, $src$$reg); %} --- 2789,2798 ----
*** 2924,2990 **** // Output immediate memory reference emit_rm(cbuf, 0x00, $t1$$reg, 0x05 ); emit_d32(cbuf, 0x00); %} - enc_class jump_enc(rRegL switch_val, rRegI dest) %{ - MacroAssembler masm(&cbuf); - - Register switch_reg = as_Register($switch_val$$reg); - Register dest_reg = as_Register($dest$$reg); - address table_base = masm.address_table_constant(_index2label); - - // We could use jump(ArrayAddress) except that the macro assembler needs to use r10 - // to do that and the compiler is using that register as one it can allocate. - // So we build it all by hand. - // Address index(noreg, switch_reg, Address::times_1); - // ArrayAddress dispatch(table, index); - - Address dispatch(dest_reg, switch_reg, Address::times_1); - - masm.lea(dest_reg, InternalAddress(table_base)); - masm.jmp(dispatch); - %} - - enc_class jump_enc_addr(rRegL switch_val, immI2 shift, immL32 offset, rRegI dest) %{ - MacroAssembler masm(&cbuf); - - Register switch_reg = as_Register($switch_val$$reg); - Register dest_reg = as_Register($dest$$reg); - address table_base = masm.address_table_constant(_index2label); - - // We could use jump(ArrayAddress) except that the macro assembler needs to use r10 - // to do that and the compiler is using that register as one it can allocate. - // So we build it all by hand. - // Address index(noreg, switch_reg, (Address::ScaleFactor)$shift$$constant, (int)$offset$$constant); - // ArrayAddress dispatch(table, index); - - Address dispatch(dest_reg, switch_reg, (Address::ScaleFactor)$shift$$constant, (int)$offset$$constant); - - masm.lea(dest_reg, InternalAddress(table_base)); - masm.jmp(dispatch); - %} - - enc_class jump_enc_offset(rRegL switch_val, immI2 shift, rRegI dest) %{ - MacroAssembler masm(&cbuf); - - Register switch_reg = as_Register($switch_val$$reg); - Register dest_reg = as_Register($dest$$reg); - address table_base = masm.address_table_constant(_index2label); - - // We could use jump(ArrayAddress) except that the macro assembler needs to use r10 - // to do that and the compiler is using that register as one it can allocate. - // So we build it all by hand. - // Address index(noreg, switch_reg, (Address::ScaleFactor)$shift$$constant); - // ArrayAddress dispatch(table, index); - - Address dispatch(dest_reg, switch_reg, (Address::ScaleFactor)$shift$$constant); - masm.lea(dest_reg, InternalAddress(table_base)); - masm.jmp(dispatch); - - %} - enc_class lock_prefix() %{ if (os::is_MP()) { emit_opcode(cbuf, 0xF0); // lock } --- 2889,2898 ----
*** 6639,6654 **** format %{ "movq $dst, $src\t# long (32-bit)" %} ins_encode(load_immL32(dst, src)); ins_pipe(ialu_reg); %} ! instruct loadConP(rRegP dst, immP src) ! %{ ! match(Set dst src); ! format %{ "movq $dst, $src\t# ptr" %} ! ins_encode(load_immP(dst, src)); ins_pipe(ialu_reg_fat); // XXX %} instruct loadConP0(rRegP dst, immP0 src, rFlagsReg cr) %{ --- 6547,6561 ---- format %{ "movq $dst, $src\t# long (32-bit)" %} ins_encode(load_immL32(dst, src)); ins_pipe(ialu_reg); %} ! instruct loadConP(rRegP dst, immP con) %{ ! match(Set dst con); ! format %{ "movq $dst, $con\t# ptr" %} ! ins_encode(load_immP(dst, con)); ins_pipe(ialu_reg_fat); // XXX %} instruct loadConP0(rRegP dst, immP0 src, rFlagsReg cr) %{
*** 6671,6687 **** format %{ "movl $dst, $src\t# ptr (positive 32-bit)" %} ins_encode(load_immP31(dst, src)); ins_pipe(ialu_reg); %} ! instruct loadConF(regF dst, immF src) ! %{ ! match(Set dst src); ins_cost(125); ! ! format %{ "movss $dst, [$src]" %} ! ins_encode(load_conF(dst, src)); ins_pipe(pipe_slow); %} instruct loadConN0(rRegN dst, immN0 src, rFlagsReg cr) %{ match(Set dst src); --- 6578,6594 ---- format %{ "movl $dst, $src\t# ptr (positive 32-bit)" %} ins_encode(load_immP31(dst, src)); ins_pipe(ialu_reg); %} ! instruct loadConF(regF dst, immF con) %{ ! match(Set dst con); ins_cost(125); ! format %{ "movss $dst, [$constantaddress]\t# load from constant table: float=$con" %} ! ins_encode %{ ! __ movflt($dst$$XMMRegister, $constantaddress($con)); ! %} ins_pipe(pipe_slow); %} instruct loadConN0(rRegN dst, immN0 src, rFlagsReg cr) %{ match(Set dst src);
*** 6719,6735 **** ins_encode(REX_reg_reg(dst, dst), OpcP, OpcS, reg_reg(dst, dst)); ins_pipe(pipe_slow); %} // Use the same format since predicate() can not be used here. ! instruct loadConD(regD dst, immD src) ! %{ ! match(Set dst src); ins_cost(125); ! ! format %{ "movsd $dst, [$src]" %} ! ins_encode(load_conD(dst, src)); ins_pipe(pipe_slow); %} instruct loadConD0(regD dst, immD0 src) %{ --- 6626,6642 ---- ins_encode(REX_reg_reg(dst, dst), OpcP, OpcS, reg_reg(dst, dst)); ins_pipe(pipe_slow); %} // Use the same format since predicate() can not be used here. ! instruct loadConD(regD dst, immD con) %{ ! match(Set dst con); ins_cost(125); ! format %{ "movsd $dst, [$constantaddress]\t# load from constant table: double=$con" %} ! ins_encode %{ ! __ movdbl($dst$$XMMRegister, $constantaddress($con)); ! %} ins_pipe(pipe_slow); %} instruct loadConD0(regD dst, immD0 src) %{
*** 7692,7728 **** match(Jump (LShiftL switch_val shift)); ins_cost(350); predicate(false); effect(TEMP dest); ! format %{ "leaq $dest, table_base\n\t" "jmp [$dest + $switch_val << $shift]\n\t" %} ! ins_encode(jump_enc_offset(switch_val, shift, dest)); ins_pipe(pipe_jmp); ins_pc_relative(1); %} instruct jumpXtnd_addr(rRegL switch_val, immI2 shift, immL32 offset, rRegI dest) %{ match(Jump (AddL (LShiftL switch_val shift) offset)); ins_cost(350); effect(TEMP dest); ! format %{ "leaq $dest, table_base\n\t" "jmp [$dest + $switch_val << $shift + $offset]\n\t" %} ! ins_encode(jump_enc_addr(switch_val, shift, offset, dest)); ins_pipe(pipe_jmp); ins_pc_relative(1); %} instruct jumpXtnd(rRegL switch_val, rRegI dest) %{ match(Jump switch_val); ins_cost(350); effect(TEMP dest); ! format %{ "leaq $dest, table_base\n\t" "jmp [$dest + $switch_val]\n\t" %} ! ins_encode(jump_enc(switch_val, dest)); ins_pipe(pipe_jmp); ins_pc_relative(1); %} // Conditional move --- 7599,7662 ---- match(Jump (LShiftL switch_val shift)); ins_cost(350); predicate(false); effect(TEMP dest); ! format %{ "leaq $dest, [$constantaddress]\n\t" "jmp [$dest + $switch_val << $shift]\n\t" %} ! ins_encode %{ ! // We could use jump(ArrayAddress) except that the macro assembler needs to use r10 ! // to do that and the compiler is using that register as one it can allocate. ! // So we build it all by hand. ! // Address index(noreg, switch_reg, (Address::ScaleFactor)$shift$$constant); ! // ArrayAddress dispatch(table, index); ! Address dispatch($dest$$Register, $switch_val$$Register, (Address::ScaleFactor) $shift$$constant); ! __ lea($dest$$Register, $constantaddress); ! __ jmp(dispatch); ! %} ins_pipe(pipe_jmp); ins_pc_relative(1); %} instruct jumpXtnd_addr(rRegL switch_val, immI2 shift, immL32 offset, rRegI dest) %{ match(Jump (AddL (LShiftL switch_val shift) offset)); ins_cost(350); effect(TEMP dest); ! format %{ "leaq $dest, [$constantaddress]\n\t" "jmp [$dest + $switch_val << $shift + $offset]\n\t" %} ! ins_encode %{ ! // We could use jump(ArrayAddress) except that the macro assembler needs to use r10 ! // to do that and the compiler is using that register as one it can allocate. ! // So we build it all by hand. ! // Address index(noreg, switch_reg, (Address::ScaleFactor) $shift$$constant, (int) $offset$$constant); ! // ArrayAddress dispatch(table, index); ! Address dispatch($dest$$Register, $switch_val$$Register, (Address::ScaleFactor) $shift$$constant, (int) $offset$$constant); ! __ lea($dest$$Register, $constantaddress); ! __ jmp(dispatch); ! %} ins_pipe(pipe_jmp); ins_pc_relative(1); %} instruct jumpXtnd(rRegL switch_val, rRegI dest) %{ match(Jump switch_val); ins_cost(350); effect(TEMP dest); ! format %{ "leaq $dest, [$constantaddress]\n\t" "jmp [$dest + $switch_val]\n\t" %} ! ins_encode %{ ! // We could use jump(ArrayAddress) except that the macro assembler needs to use r10 ! // to do that and the compiler is using that register as one it can allocate. ! // So we build it all by hand. ! // Address index(noreg, switch_reg, Address::times_1); ! // ArrayAddress dispatch(table, index); ! Address dispatch($dest$$Register, $switch_val$$Register, Address::times_1); ! __ lea($dest$$Register, $constantaddress); ! __ jmp(dispatch); ! %} ins_pipe(pipe_jmp); ins_pc_relative(1); %} // Conditional move
*** 10374,10407 **** opcode(0x0F, 0x2E); ins_encode(REX_reg_mem(src1, src2), OpcP, OpcS, reg_mem(src1, src2)); ins_pipe(pipe_slow); %} ! instruct cmpF_cc_imm(rFlagsRegU cr, regF src1, immF src2) ! %{ ! match(Set cr (CmpF src1 src2)); ins_cost(145); ! format %{ "ucomiss $src1, $src2\n\t" "jnp,s exit\n\t" "pushfq\t# saw NaN, set CF\n\t" "andq [rsp], #0xffffff2b\n\t" "popfq\n" "exit: nop\t# avoid branch to branch" %} ! opcode(0x0F, 0x2E); ! ins_encode(REX_reg_mem(src1, src2), OpcP, OpcS, load_immF(src1, src2), ! cmpfp_fixup); ins_pipe(pipe_slow); %} ! instruct cmpF_cc_immCF(rFlagsRegUCF cr, regF src1, immF src2) %{ ! match(Set cr (CmpF src1 src2)); ! ins_cost(100); ! format %{ "ucomiss $src1, $src2" %} ! opcode(0x0F, 0x2E); ! ins_encode(REX_reg_mem(src1, src2), OpcP, OpcS, load_immF(src1, src2)); ins_pipe(pipe_slow); %} instruct cmpD_cc_reg(rFlagsRegU cr, regD src1, regD src2) %{ --- 10308,10347 ---- opcode(0x0F, 0x2E); ins_encode(REX_reg_mem(src1, src2), OpcP, OpcS, reg_mem(src1, src2)); ins_pipe(pipe_slow); %} ! instruct cmpF_cc_imm(rFlagsRegU cr, regF src, immF con) %{ ! match(Set cr (CmpF src con)); ins_cost(145); ! format %{ "ucomiss $src, [$constantaddress]\t# load from constant table: float=$con\n\t" "jnp,s exit\n\t" "pushfq\t# saw NaN, set CF\n\t" "andq [rsp], #0xffffff2b\n\t" "popfq\n" "exit: nop\t# avoid branch to branch" %} ! ins_encode %{ ! Label L_exit; ! __ ucomiss($src$$XMMRegister, $constantaddress($con)); ! __ jcc(Assembler::noParity, L_exit); ! __ pushf(); ! __ andq(rsp, 0xffffff2b); ! __ popf(); ! __ bind(L_exit); ! __ nop(); ! %} ins_pipe(pipe_slow); %} ! instruct cmpF_cc_immCF(rFlagsRegUCF cr, regF src, immF con) %{ ! match(Set cr (CmpF src con)); ins_cost(100); ! format %{ "ucomiss $src, [$constantaddress]\t# load from constant table: float=$con" %} ! ins_encode %{ ! __ ucomiss($src$$XMMRegister, $constantaddress($con)); ! %} ins_pipe(pipe_slow); %} instruct cmpD_cc_reg(rFlagsRegU cr, regD src1, regD src2) %{
*** 10456,10489 **** opcode(0x66, 0x0F, 0x2E); ins_encode(OpcP, REX_reg_mem(src1, src2), OpcS, OpcT, reg_mem(src1, src2)); ins_pipe(pipe_slow); %} ! instruct cmpD_cc_imm(rFlagsRegU cr, regD src1, immD src2) ! %{ ! match(Set cr (CmpD src1 src2)); ins_cost(145); ! format %{ "ucomisd $src1, [$src2]\n\t" "jnp,s exit\n\t" "pushfq\t# saw NaN, set CF\n\t" "andq [rsp], #0xffffff2b\n\t" "popfq\n" "exit: nop\t# avoid branch to branch" %} ! opcode(0x66, 0x0F, 0x2E); ! ins_encode(OpcP, REX_reg_mem(src1, src2), OpcS, OpcT, load_immD(src1, src2), ! cmpfp_fixup); ins_pipe(pipe_slow); %} ! instruct cmpD_cc_immCF(rFlagsRegUCF cr, regD src1, immD src2) %{ ! match(Set cr (CmpD src1 src2)); ! ins_cost(100); ! format %{ "ucomisd $src1, [$src2]" %} ! opcode(0x66, 0x0F, 0x2E); ! ins_encode(OpcP, REX_reg_mem(src1, src2), OpcS, OpcT, load_immD(src1, src2)); ins_pipe(pipe_slow); %} // Compare into -1,0,1 instruct cmpF_reg(rRegI dst, regF src1, regF src2, rFlagsReg cr) --- 10396,10435 ---- opcode(0x66, 0x0F, 0x2E); ins_encode(OpcP, REX_reg_mem(src1, src2), OpcS, OpcT, reg_mem(src1, src2)); ins_pipe(pipe_slow); %} ! instruct cmpD_cc_imm(rFlagsRegU cr, regD src, immD con) %{ ! match(Set cr (CmpD src con)); ins_cost(145); ! format %{ "ucomisd $src, [$constantaddress]\t# load from constant table: double=$con\n\t" "jnp,s exit\n\t" "pushfq\t# saw NaN, set CF\n\t" "andq [rsp], #0xffffff2b\n\t" "popfq\n" "exit: nop\t# avoid branch to branch" %} ! ins_encode %{ ! Label L_exit; ! __ ucomisd($src$$XMMRegister, $constantaddress($con)); ! __ jcc(Assembler::noParity, L_exit); ! __ pushf(); ! __ andq(rsp, 0xffffff2b); ! __ popf(); ! __ bind(L_exit); ! __ nop(); ! %} ins_pipe(pipe_slow); %} ! instruct cmpD_cc_immCF(rFlagsRegUCF cr, regD src, immD con) %{ ! match(Set cr (CmpD src con)); ins_cost(100); ! format %{ "ucomisd $src, [$constantaddress]\t# load from constant table: double=$con" %} ! ins_encode %{ ! __ ucomisd($src$$XMMRegister, $constantaddress($con)); ! %} ins_pipe(pipe_slow); %} // Compare into -1,0,1 instruct cmpF_reg(rRegI dst, regF src1, regF src2, rFlagsReg cr)
*** 10526,10552 **** cmpfp3(dst)); ins_pipe(pipe_slow); %} // Compare into -1,0,1 ! instruct cmpF_imm(rRegI dst, regF src1, immF src2, rFlagsReg cr) ! %{ ! match(Set dst (CmpF3 src1 src2)); effect(KILL cr); ins_cost(275); ! format %{ "ucomiss $src1, [$src2]\n\t" "movl $dst, #-1\n\t" "jp,s done\n\t" "jb,s done\n\t" "setne $dst\n\t" "movzbl $dst, $dst\n" "done:" %} ! ! opcode(0x0F, 0x2E); ! ins_encode(REX_reg_mem(src1, src2), OpcP, OpcS, load_immF(src1, src2), ! cmpfp3(dst)); ins_pipe(pipe_slow); %} // Compare into -1,0,1 instruct cmpD_reg(rRegI dst, regD src1, regD src2, rFlagsReg cr) --- 10472,10504 ---- cmpfp3(dst)); ins_pipe(pipe_slow); %} // Compare into -1,0,1 ! instruct cmpF_imm(rRegI dst, regF src, immF con, rFlagsReg cr) %{ ! match(Set dst (CmpF3 src con)); effect(KILL cr); ins_cost(275); ! format %{ "ucomiss $src, [$constantaddress]\t# load from constant table: float=$con\n\t" "movl $dst, #-1\n\t" "jp,s done\n\t" "jb,s done\n\t" "setne $dst\n\t" "movzbl $dst, $dst\n" "done:" %} ! ins_encode %{ ! Label L_done; ! Register Rdst = $dst$$Register; ! __ ucomiss($src$$XMMRegister, $constantaddress($con)); ! __ movl(Rdst, -1); ! __ jcc(Assembler::parity, L_done); ! __ jcc(Assembler::below, L_done); ! __ setb(Assembler::notEqual, Rdst); ! __ movzbl(Rdst, Rdst); ! __ bind(L_done); ! %} ins_pipe(pipe_slow); %} // Compare into -1,0,1 instruct cmpD_reg(rRegI dst, regD src1, regD src2, rFlagsReg cr)
*** 10589,10615 **** cmpfp3(dst)); ins_pipe(pipe_slow); %} // Compare into -1,0,1 ! instruct cmpD_imm(rRegI dst, regD src1, immD src2, rFlagsReg cr) ! %{ ! match(Set dst (CmpD3 src1 src2)); effect(KILL cr); ins_cost(275); ! format %{ "ucomisd $src1, [$src2]\n\t" "movl $dst, #-1\n\t" "jp,s done\n\t" "jb,s done\n\t" "setne $dst\n\t" "movzbl $dst, $dst\n" "done:" %} ! ! opcode(0x66, 0x0F, 0x2E); ! ins_encode(OpcP, REX_reg_mem(src1, src2), OpcS, OpcT, load_immD(src1, src2), ! cmpfp3(dst)); ins_pipe(pipe_slow); %} instruct addF_reg(regF dst, regF src) %{ --- 10541,10573 ---- cmpfp3(dst)); ins_pipe(pipe_slow); %} // Compare into -1,0,1 ! instruct cmpD_imm(rRegI dst, regD src, immD con, rFlagsReg cr) %{ ! match(Set dst (CmpD3 src con)); effect(KILL cr); ins_cost(275); ! format %{ "ucomisd $src, [$constantaddress]\t# load from constant table: double=$con\n\t" "movl $dst, #-1\n\t" "jp,s done\n\t" "jb,s done\n\t" "setne $dst\n\t" "movzbl $dst, $dst\n" "done:" %} ! ins_encode %{ ! Register Rdst = $dst$$Register; ! Label L_done; ! __ ucomisd($src$$XMMRegister, $constantaddress($con)); ! __ movl(Rdst, -1); ! __ jcc(Assembler::parity, L_done); ! __ jcc(Assembler::below, L_done); ! __ setb(Assembler::notEqual, Rdst); ! __ movzbl(Rdst, Rdst); ! __ bind(L_done); ! %} ins_pipe(pipe_slow); %} instruct addF_reg(regF dst, regF src) %{
*** 10631,10648 **** opcode(0xF3, 0x0F, 0x58); ins_encode(OpcP, REX_reg_mem(dst, src), OpcS, OpcT, reg_mem(dst, src)); ins_pipe(pipe_slow); %} ! instruct addF_imm(regF dst, immF src) ! %{ ! match(Set dst (AddF dst src)); ! ! format %{ "addss $dst, [$src]" %} ins_cost(150); // XXX ! opcode(0xF3, 0x0F, 0x58); ! ins_encode(OpcP, REX_reg_mem(dst, src), OpcS, OpcT, load_immF(dst, src)); ins_pipe(pipe_slow); %} instruct addD_reg(regD dst, regD src) %{ --- 10589,10605 ---- opcode(0xF3, 0x0F, 0x58); ins_encode(OpcP, REX_reg_mem(dst, src), OpcS, OpcT, reg_mem(dst, src)); ins_pipe(pipe_slow); %} ! instruct addF_imm(regF dst, immF con) %{ ! match(Set dst (AddF dst con)); ! format %{ "addss $dst, [$constantaddress]\t# load from constant table: float=$con" %} ins_cost(150); // XXX ! ins_encode %{ ! __ addss($dst$$XMMRegister, $constantaddress($con)); ! %} ins_pipe(pipe_slow); %} instruct addD_reg(regD dst, regD src) %{
*** 10664,10681 **** opcode(0xF2, 0x0F, 0x58); ins_encode(OpcP, REX_reg_mem(dst, src), OpcS, OpcT, reg_mem(dst, src)); ins_pipe(pipe_slow); %} ! instruct addD_imm(regD dst, immD src) ! %{ ! match(Set dst (AddD dst src)); ! ! format %{ "addsd $dst, [$src]" %} ins_cost(150); // XXX ! opcode(0xF2, 0x0F, 0x58); ! ins_encode(OpcP, REX_reg_mem(dst, src), OpcS, OpcT, load_immD(dst, src)); ins_pipe(pipe_slow); %} instruct subF_reg(regF dst, regF src) %{ --- 10621,10637 ---- opcode(0xF2, 0x0F, 0x58); ins_encode(OpcP, REX_reg_mem(dst, src), OpcS, OpcT, reg_mem(dst, src)); ins_pipe(pipe_slow); %} ! instruct addD_imm(regD dst, immD con) %{ ! match(Set dst (AddD dst con)); ! format %{ "addsd $dst, [$constantaddress]\t# load from constant table: double=$con" %} ins_cost(150); // XXX ! ins_encode %{ ! __ addsd($dst$$XMMRegister, $constantaddress($con)); ! %} ins_pipe(pipe_slow); %} instruct subF_reg(regF dst, regF src) %{
*** 10697,10714 **** opcode(0xF3, 0x0F, 0x5C); ins_encode(OpcP, REX_reg_mem(dst, src), OpcS, OpcT, reg_mem(dst, src)); ins_pipe(pipe_slow); %} ! instruct subF_imm(regF dst, immF src) ! %{ ! match(Set dst (SubF dst src)); ! ! format %{ "subss $dst, [$src]" %} ins_cost(150); // XXX ! opcode(0xF3, 0x0F, 0x5C); ! ins_encode(OpcP, REX_reg_mem(dst, src), OpcS, OpcT, load_immF(dst, src)); ins_pipe(pipe_slow); %} instruct subD_reg(regD dst, regD src) %{ --- 10653,10669 ---- opcode(0xF3, 0x0F, 0x5C); ins_encode(OpcP, REX_reg_mem(dst, src), OpcS, OpcT, reg_mem(dst, src)); ins_pipe(pipe_slow); %} ! instruct subF_imm(regF dst, immF con) %{ ! match(Set dst (SubF dst con)); ! format %{ "subss $dst, [$constantaddress]\t# load from constant table: float=$con" %} ins_cost(150); // XXX ! ins_encode %{ ! __ subss($dst$$XMMRegister, $constantaddress($con)); ! %} ins_pipe(pipe_slow); %} instruct subD_reg(regD dst, regD src) %{
*** 10730,10747 **** opcode(0xF2, 0x0F, 0x5C); ins_encode(OpcP, REX_reg_mem(dst, src), OpcS, OpcT, reg_mem(dst, src)); ins_pipe(pipe_slow); %} ! instruct subD_imm(regD dst, immD src) ! %{ ! match(Set dst (SubD dst src)); ! ! format %{ "subsd $dst, [$src]" %} ins_cost(150); // XXX ! opcode(0xF2, 0x0F, 0x5C); ! ins_encode(OpcP, REX_reg_mem(dst, src), OpcS, OpcT, load_immD(dst, src)); ins_pipe(pipe_slow); %} instruct mulF_reg(regF dst, regF src) %{ --- 10685,10701 ---- opcode(0xF2, 0x0F, 0x5C); ins_encode(OpcP, REX_reg_mem(dst, src), OpcS, OpcT, reg_mem(dst, src)); ins_pipe(pipe_slow); %} ! instruct subD_imm(regD dst, immD con) %{ ! match(Set dst (SubD dst con)); ! format %{ "subsd $dst, [$constantaddress]\t# load from constant table: double=$con" %} ins_cost(150); // XXX ! ins_encode %{ ! __ subsd($dst$$XMMRegister, $constantaddress($con)); ! %} ins_pipe(pipe_slow); %} instruct mulF_reg(regF dst, regF src) %{
*** 10763,10780 **** opcode(0xF3, 0x0F, 0x59); ins_encode(OpcP, REX_reg_mem(dst, src), OpcS, OpcT, reg_mem(dst, src)); ins_pipe(pipe_slow); %} ! instruct mulF_imm(regF dst, immF src) ! %{ ! match(Set dst (MulF dst src)); ! ! format %{ "mulss $dst, [$src]" %} ins_cost(150); // XXX ! opcode(0xF3, 0x0F, 0x59); ! ins_encode(OpcP, REX_reg_mem(dst, src), OpcS, OpcT, load_immF(dst, src)); ins_pipe(pipe_slow); %} instruct mulD_reg(regD dst, regD src) %{ --- 10717,10733 ---- opcode(0xF3, 0x0F, 0x59); ins_encode(OpcP, REX_reg_mem(dst, src), OpcS, OpcT, reg_mem(dst, src)); ins_pipe(pipe_slow); %} ! instruct mulF_imm(regF dst, immF con) %{ ! match(Set dst (MulF dst con)); ! format %{ "mulss $dst, [$constantaddress]\t# load from constant table: float=$con" %} ins_cost(150); // XXX ! ins_encode %{ ! __ mulss($dst$$XMMRegister, $constantaddress($con)); ! %} ins_pipe(pipe_slow); %} instruct mulD_reg(regD dst, regD src) %{
*** 10796,10813 **** opcode(0xF2, 0x0F, 0x59); ins_encode(OpcP, REX_reg_mem(dst, src), OpcS, OpcT, reg_mem(dst, src)); ins_pipe(pipe_slow); %} ! instruct mulD_imm(regD dst, immD src) ! %{ ! match(Set dst (MulD dst src)); ! ! format %{ "mulsd $dst, [$src]" %} ins_cost(150); // XXX ! opcode(0xF2, 0x0F, 0x59); ! ins_encode(OpcP, REX_reg_mem(dst, src), OpcS, OpcT, load_immD(dst, src)); ins_pipe(pipe_slow); %} instruct divF_reg(regF dst, regF src) %{ --- 10749,10765 ---- opcode(0xF2, 0x0F, 0x59); ins_encode(OpcP, REX_reg_mem(dst, src), OpcS, OpcT, reg_mem(dst, src)); ins_pipe(pipe_slow); %} ! instruct mulD_imm(regD dst, immD con) %{ ! match(Set dst (MulD dst con)); ! format %{ "mulsd $dst, [$constantaddress]\t# load from constant table: double=$con" %} ins_cost(150); // XXX ! ins_encode %{ ! __ mulsd($dst$$XMMRegister, $constantaddress($con)); ! %} ins_pipe(pipe_slow); %} instruct divF_reg(regF dst, regF src) %{
*** 10829,10846 **** opcode(0xF3, 0x0F, 0x5E); ins_encode(OpcP, REX_reg_mem(dst, src), OpcS, OpcT, reg_mem(dst, src)); ins_pipe(pipe_slow); %} ! instruct divF_imm(regF dst, immF src) ! %{ ! match(Set dst (DivF dst src)); ! ! format %{ "divss $dst, [$src]" %} ins_cost(150); // XXX ! opcode(0xF3, 0x0F, 0x5E); ! ins_encode(OpcP, REX_reg_mem(dst, src), OpcS, OpcT, load_immF(dst, src)); ins_pipe(pipe_slow); %} instruct divD_reg(regD dst, regD src) %{ --- 10781,10797 ---- opcode(0xF3, 0x0F, 0x5E); ins_encode(OpcP, REX_reg_mem(dst, src), OpcS, OpcT, reg_mem(dst, src)); ins_pipe(pipe_slow); %} ! instruct divF_imm(regF dst, immF con) %{ ! match(Set dst (DivF dst con)); ! format %{ "divss $dst, [$constantaddress]\t# load from constant table: float=$con" %} ins_cost(150); // XXX ! ins_encode %{ ! __ divss($dst$$XMMRegister, $constantaddress($con)); ! %} ins_pipe(pipe_slow); %} instruct divD_reg(regD dst, regD src) %{
*** 10862,10879 **** opcode(0xF2, 0x0F, 0x5E); ins_encode(OpcP, REX_reg_mem(dst, src), OpcS, OpcT, reg_mem(dst, src)); ins_pipe(pipe_slow); %} ! instruct divD_imm(regD dst, immD src) ! %{ ! match(Set dst (DivD dst src)); ! ! format %{ "divsd $dst, [$src]" %} ins_cost(150); // XXX ! opcode(0xF2, 0x0F, 0x5E); ! ins_encode(OpcP, REX_reg_mem(dst, src), OpcS, OpcT, load_immD(dst, src)); ins_pipe(pipe_slow); %} instruct sqrtF_reg(regF dst, regF src) %{ --- 10813,10829 ---- opcode(0xF2, 0x0F, 0x5E); ins_encode(OpcP, REX_reg_mem(dst, src), OpcS, OpcT, reg_mem(dst, src)); ins_pipe(pipe_slow); %} ! instruct divD_imm(regD dst, immD con) %{ ! match(Set dst (DivD dst con)); ! format %{ "divsd $dst, [$constantaddress]\t# load from constant table: double=$con" %} ins_cost(150); // XXX ! ins_encode %{ ! __ divsd($dst$$XMMRegister, $constantaddress($con)); ! %} ins_pipe(pipe_slow); %} instruct sqrtF_reg(regF dst, regF src) %{
*** 10895,10912 **** opcode(0xF3, 0x0F, 0x51); ins_encode(OpcP, REX_reg_mem(dst, src), OpcS, OpcT, reg_mem(dst, src)); ins_pipe(pipe_slow); %} ! instruct sqrtF_imm(regF dst, immF src) ! %{ ! match(Set dst (ConvD2F (SqrtD (ConvF2D src)))); ! ! format %{ "sqrtss $dst, [$src]" %} ins_cost(150); // XXX ! opcode(0xF3, 0x0F, 0x51); ! ins_encode(OpcP, REX_reg_mem(dst, src), OpcS, OpcT, load_immF(dst, src)); ins_pipe(pipe_slow); %} instruct sqrtD_reg(regD dst, regD src) %{ --- 10845,10861 ---- opcode(0xF3, 0x0F, 0x51); ins_encode(OpcP, REX_reg_mem(dst, src), OpcS, OpcT, reg_mem(dst, src)); ins_pipe(pipe_slow); %} ! instruct sqrtF_imm(regF dst, immF con) %{ ! match(Set dst (ConvD2F (SqrtD (ConvF2D con)))); ! format %{ "sqrtss $dst, [$constantaddress]\t# load from constant table: float=$con" %} ins_cost(150); // XXX ! ins_encode %{ ! __ sqrtss($dst$$XMMRegister, $constantaddress($con)); ! %} ins_pipe(pipe_slow); %} instruct sqrtD_reg(regD dst, regD src) %{
*** 10928,10945 **** opcode(0xF2, 0x0F, 0x51); ins_encode(OpcP, REX_reg_mem(dst, src), OpcS, OpcT, reg_mem(dst, src)); ins_pipe(pipe_slow); %} ! instruct sqrtD_imm(regD dst, immD src) ! %{ ! match(Set dst (SqrtD src)); ! ! format %{ "sqrtsd $dst, [$src]" %} ins_cost(150); // XXX ! opcode(0xF2, 0x0F, 0x51); ! ins_encode(OpcP, REX_reg_mem(dst, src), OpcS, OpcT, load_immD(dst, src)); ins_pipe(pipe_slow); %} instruct absF_reg(regF dst) %{ --- 10877,10893 ---- opcode(0xF2, 0x0F, 0x51); ins_encode(OpcP, REX_reg_mem(dst, src), OpcS, OpcT, reg_mem(dst, src)); ins_pipe(pipe_slow); %} ! instruct sqrtD_imm(regD dst, immD con) %{ ! match(Set dst (SqrtD con)); ! format %{ "sqrtsd $dst, [$constantaddress]\t# load from constant table: double=$con" %} ins_cost(150); // XXX ! ins_encode %{ ! __ sqrtsd($dst$$XMMRegister, $constantaddress($con)); ! %} ins_pipe(pipe_slow); %} instruct absF_reg(regF dst) %{
src/cpu/x86/vm/x86_64.ad
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