1 /* 2 * Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #include "incls/_precompiled.incl" 26 #include "incls/_output.cpp.incl" 27 28 extern uint size_java_to_interp(); 29 extern uint reloc_java_to_interp(); 30 extern uint size_exception_handler(); 31 extern uint size_deopt_handler(); 32 33 #ifndef PRODUCT 34 #define DEBUG_ARG(x) , x 35 #else 36 #define DEBUG_ARG(x) 37 #endif 38 39 extern int emit_exception_handler(CodeBuffer &cbuf); 40 extern int emit_deopt_handler(CodeBuffer &cbuf); 41 42 //------------------------------Output----------------------------------------- 43 // Convert Nodes to instruction bits and pass off to the VM 44 void Compile::Output() { 45 // RootNode goes 46 assert( _cfg->_broot->_nodes.size() == 0, "" ); 47 48 // Initialize the space for the BufferBlob used to find and verify 49 // instruction size in MachNode::emit_size() 50 init_scratch_buffer_blob(); 51 if (failing()) return; // Out of memory 52 53 // The number of new nodes (mostly MachNop) is proportional to 54 // the number of java calls and inner loops which are aligned. 55 if ( C->check_node_count((NodeLimitFudgeFactor + C->java_calls()*3 + 56 C->inner_loops()*(OptoLoopAlignment-1)), 57 "out of nodes before code generation" ) ) { 58 return; 59 } 60 // Make sure I can find the Start Node 61 Block_Array& bbs = _cfg->_bbs; 62 Block *entry = _cfg->_blocks[1]; 63 Block *broot = _cfg->_broot; 64 65 const StartNode *start = entry->_nodes[0]->as_Start(); 66 67 // Replace StartNode with prolog 68 MachPrologNode *prolog = new (this) MachPrologNode(); 69 entry->_nodes.map( 0, prolog ); 70 bbs.map( prolog->_idx, entry ); 71 bbs.map( start->_idx, NULL ); // start is no longer in any block 72 73 // Virtual methods need an unverified entry point 74 75 if( is_osr_compilation() ) { 76 if( PoisonOSREntry ) { 77 // TODO: Should use a ShouldNotReachHereNode... 78 _cfg->insert( broot, 0, new (this) MachBreakpointNode() ); 79 } 80 } else { 81 if( _method && !_method->flags().is_static() ) { 82 // Insert unvalidated entry point 83 _cfg->insert( broot, 0, new (this) MachUEPNode() ); 84 } 85 86 } 87 88 89 // Break before main entry point 90 if( (_method && _method->break_at_execute()) 91 #ifndef PRODUCT 92 ||(OptoBreakpoint && is_method_compilation()) 93 ||(OptoBreakpointOSR && is_osr_compilation()) 94 ||(OptoBreakpointC2R && !_method) 95 #endif 96 ) { 97 // checking for _method means that OptoBreakpoint does not apply to 98 // runtime stubs or frame converters 99 _cfg->insert( entry, 1, new (this) MachBreakpointNode() ); 100 } 101 102 // Insert epilogs before every return 103 for( uint i=0; i<_cfg->_num_blocks; i++ ) { 104 Block *b = _cfg->_blocks[i]; 105 if( !b->is_connector() && b->non_connector_successor(0) == _cfg->_broot ) { // Found a program exit point? 106 Node *m = b->end(); 107 if( m->is_Mach() && m->as_Mach()->ideal_Opcode() != Op_Halt ) { 108 MachEpilogNode *epilog = new (this) MachEpilogNode(m->as_Mach()->ideal_Opcode() == Op_Return); 109 b->add_inst( epilog ); 110 bbs.map(epilog->_idx, b); 111 //_regalloc->set_bad(epilog->_idx); // Already initialized this way. 112 } 113 } 114 } 115 116 # ifdef ENABLE_ZAP_DEAD_LOCALS 117 if ( ZapDeadCompiledLocals ) Insert_zap_nodes(); 118 # endif 119 120 ScheduleAndBundle(); 121 122 #ifndef PRODUCT 123 if (trace_opto_output()) { 124 tty->print("\n---- After ScheduleAndBundle ----\n"); 125 for (uint i = 0; i < _cfg->_num_blocks; i++) { 126 tty->print("\nBB#%03d:\n", i); 127 Block *bb = _cfg->_blocks[i]; 128 for (uint j = 0; j < bb->_nodes.size(); j++) { 129 Node *n = bb->_nodes[j]; 130 OptoReg::Name reg = _regalloc->get_reg_first(n); 131 tty->print(" %-6s ", reg >= 0 && reg < REG_COUNT ? Matcher::regName[reg] : ""); 132 n->dump(); 133 } 134 } 135 } 136 #endif 137 138 if (failing()) return; 139 140 BuildOopMaps(); 141 142 if (failing()) return; 143 144 Fill_buffer(); 145 } 146 147 bool Compile::need_stack_bang(int frame_size_in_bytes) const { 148 // Determine if we need to generate a stack overflow check. 149 // Do it if the method is not a stub function and 150 // has java calls or has frame size > vm_page_size/8. 151 return (stub_function() == NULL && 152 (has_java_calls() || frame_size_in_bytes > os::vm_page_size()>>3)); 153 } 154 155 bool Compile::need_register_stack_bang() const { 156 // Determine if we need to generate a register stack overflow check. 157 // This is only used on architectures which have split register 158 // and memory stacks (ie. IA64). 159 // Bang if the method is not a stub function and has java calls 160 return (stub_function() == NULL && has_java_calls()); 161 } 162 163 # ifdef ENABLE_ZAP_DEAD_LOCALS 164 165 166 // In order to catch compiler oop-map bugs, we have implemented 167 // a debugging mode called ZapDeadCompilerLocals. 168 // This mode causes the compiler to insert a call to a runtime routine, 169 // "zap_dead_locals", right before each place in compiled code 170 // that could potentially be a gc-point (i.e., a safepoint or oop map point). 171 // The runtime routine checks that locations mapped as oops are really 172 // oops, that locations mapped as values do not look like oops, 173 // and that locations mapped as dead are not used later 174 // (by zapping them to an invalid address). 175 176 int Compile::_CompiledZap_count = 0; 177 178 void Compile::Insert_zap_nodes() { 179 bool skip = false; 180 181 182 // Dink with static counts because code code without the extra 183 // runtime calls is MUCH faster for debugging purposes 184 185 if ( CompileZapFirst == 0 ) ; // nothing special 186 else if ( CompileZapFirst > CompiledZap_count() ) skip = true; 187 else if ( CompileZapFirst == CompiledZap_count() ) 188 warning("starting zap compilation after skipping"); 189 190 if ( CompileZapLast == -1 ) ; // nothing special 191 else if ( CompileZapLast < CompiledZap_count() ) skip = true; 192 else if ( CompileZapLast == CompiledZap_count() ) 193 warning("about to compile last zap"); 194 195 ++_CompiledZap_count; // counts skipped zaps, too 196 197 if ( skip ) return; 198 199 200 if ( _method == NULL ) 201 return; // no safepoints/oopmaps emitted for calls in stubs,so we don't care 202 203 // Insert call to zap runtime stub before every node with an oop map 204 for( uint i=0; i<_cfg->_num_blocks; i++ ) { 205 Block *b = _cfg->_blocks[i]; 206 for ( uint j = 0; j < b->_nodes.size(); ++j ) { 207 Node *n = b->_nodes[j]; 208 209 // Determining if we should insert a zap-a-lot node in output. 210 // We do that for all nodes that has oopmap info, except for calls 211 // to allocation. Calls to allocation passes in the old top-of-eden pointer 212 // and expect the C code to reset it. Hence, there can be no safepoints between 213 // the inlined-allocation and the call to new_Java, etc. 214 // We also cannot zap monitor calls, as they must hold the microlock 215 // during the call to Zap, which also wants to grab the microlock. 216 bool insert = n->is_MachSafePoint() && (n->as_MachSafePoint()->oop_map() != NULL); 217 if ( insert ) { // it is MachSafePoint 218 if ( !n->is_MachCall() ) { 219 insert = false; 220 } else if ( n->is_MachCall() ) { 221 MachCallNode* call = n->as_MachCall(); 222 if (call->entry_point() == OptoRuntime::new_instance_Java() || 223 call->entry_point() == OptoRuntime::new_array_Java() || 224 call->entry_point() == OptoRuntime::multianewarray2_Java() || 225 call->entry_point() == OptoRuntime::multianewarray3_Java() || 226 call->entry_point() == OptoRuntime::multianewarray4_Java() || 227 call->entry_point() == OptoRuntime::multianewarray5_Java() || 228 call->entry_point() == OptoRuntime::slow_arraycopy_Java() || 229 call->entry_point() == OptoRuntime::complete_monitor_locking_Java() 230 ) { 231 insert = false; 232 } 233 } 234 if (insert) { 235 Node *zap = call_zap_node(n->as_MachSafePoint(), i); 236 b->_nodes.insert( j, zap ); 237 _cfg->_bbs.map( zap->_idx, b ); 238 ++j; 239 } 240 } 241 } 242 } 243 } 244 245 246 Node* Compile::call_zap_node(MachSafePointNode* node_to_check, int block_no) { 247 const TypeFunc *tf = OptoRuntime::zap_dead_locals_Type(); 248 CallStaticJavaNode* ideal_node = 249 new (this, tf->domain()->cnt()) CallStaticJavaNode( tf, 250 OptoRuntime::zap_dead_locals_stub(_method->flags().is_native()), 251 "call zap dead locals stub", 0, TypePtr::BOTTOM); 252 // We need to copy the OopMap from the site we're zapping at. 253 // We have to make a copy, because the zap site might not be 254 // a call site, and zap_dead is a call site. 255 OopMap* clone = node_to_check->oop_map()->deep_copy(); 256 257 // Add the cloned OopMap to the zap node 258 ideal_node->set_oop_map(clone); 259 return _matcher->match_sfpt(ideal_node); 260 } 261 262 //------------------------------is_node_getting_a_safepoint-------------------- 263 bool Compile::is_node_getting_a_safepoint( Node* n) { 264 // This code duplicates the logic prior to the call of add_safepoint 265 // below in this file. 266 if( n->is_MachSafePoint() ) return true; 267 return false; 268 } 269 270 # endif // ENABLE_ZAP_DEAD_LOCALS 271 272 //------------------------------compute_loop_first_inst_sizes------------------ 273 // Compute the size of first NumberOfLoopInstrToAlign instructions at the top 274 // of a loop. When aligning a loop we need to provide enough instructions 275 // in cpu's fetch buffer to feed decoders. The loop alignment could be 276 // avoided if we have enough instructions in fetch buffer at the head of a loop. 277 // By default, the size is set to 999999 by Block's constructor so that 278 // a loop will be aligned if the size is not reset here. 279 // 280 // Note: Mach instructions could contain several HW instructions 281 // so the size is estimated only. 282 // 283 void Compile::compute_loop_first_inst_sizes() { 284 // The next condition is used to gate the loop alignment optimization. 285 // Don't aligned a loop if there are enough instructions at the head of a loop 286 // or alignment padding is larger then MaxLoopPad. By default, MaxLoopPad 287 // is equal to OptoLoopAlignment-1 except on new Intel cpus, where it is 288 // equal to 11 bytes which is the largest address NOP instruction. 289 if( MaxLoopPad < OptoLoopAlignment-1 ) { 290 uint last_block = _cfg->_num_blocks-1; 291 for( uint i=1; i <= last_block; i++ ) { 292 Block *b = _cfg->_blocks[i]; 293 // Check the first loop's block which requires an alignment. 294 if( b->loop_alignment() > (uint)relocInfo::addr_unit() ) { 295 uint sum_size = 0; 296 uint inst_cnt = NumberOfLoopInstrToAlign; 297 inst_cnt = b->compute_first_inst_size(sum_size, inst_cnt, _regalloc); 298 299 // Check subsequent fallthrough blocks if the loop's first 300 // block(s) does not have enough instructions. 301 Block *nb = b; 302 while( inst_cnt > 0 && 303 i < last_block && 304 !_cfg->_blocks[i+1]->has_loop_alignment() && 305 !nb->has_successor(b) ) { 306 i++; 307 nb = _cfg->_blocks[i]; 308 inst_cnt = nb->compute_first_inst_size(sum_size, inst_cnt, _regalloc); 309 } // while( inst_cnt > 0 && i < last_block ) 310 311 b->set_first_inst_size(sum_size); 312 } // f( b->head()->is_Loop() ) 313 } // for( i <= last_block ) 314 } // if( MaxLoopPad < OptoLoopAlignment-1 ) 315 } 316 317 //----------------------Shorten_branches--------------------------------------- 318 // The architecture description provides short branch variants for some long 319 // branch instructions. Replace eligible long branches with short branches. 320 void Compile::Shorten_branches(Label *labels, int& code_size, int& reloc_size, int& stub_size, int& const_size) { 321 322 // fill in the nop array for bundling computations 323 MachNode *_nop_list[Bundle::_nop_count]; 324 Bundle::initialize_nops(_nop_list, this); 325 326 // ------------------ 327 // Compute size of each block, method size, and relocation information size 328 uint *jmp_end = NEW_RESOURCE_ARRAY(uint,_cfg->_num_blocks); 329 uint *blk_starts = NEW_RESOURCE_ARRAY(uint,_cfg->_num_blocks+1); 330 DEBUG_ONLY( uint *jmp_target = NEW_RESOURCE_ARRAY(uint,_cfg->_num_blocks); ) 331 DEBUG_ONLY( uint *jmp_rule = NEW_RESOURCE_ARRAY(uint,_cfg->_num_blocks); ) 332 blk_starts[0] = 0; 333 334 // Initialize the sizes to 0 335 code_size = 0; // Size in bytes of generated code 336 stub_size = 0; // Size in bytes of all stub entries 337 // Size in bytes of all relocation entries, including those in local stubs. 338 // Start with 2-bytes of reloc info for the unvalidated entry point 339 reloc_size = 1; // Number of relocation entries 340 const_size = 0; // size of fp constants in words 341 342 // Make three passes. The first computes pessimistic blk_starts, 343 // relative jmp_end, reloc_size and const_size information. 344 // The second performs short branch substitution using the pessimistic 345 // sizing. The third inserts nops where needed. 346 347 Node *nj; // tmp 348 349 // Step one, perform a pessimistic sizing pass. 350 uint i; 351 uint min_offset_from_last_call = 1; // init to a positive value 352 uint nop_size = (new (this) MachNopNode())->size(_regalloc); 353 for( i=0; i<_cfg->_num_blocks; i++ ) { // For all blocks 354 Block *b = _cfg->_blocks[i]; 355 356 // Sum all instruction sizes to compute block size 357 uint last_inst = b->_nodes.size(); 358 uint blk_size = 0; 359 for( uint j = 0; j<last_inst; j++ ) { 360 nj = b->_nodes[j]; 361 uint inst_size = nj->size(_regalloc); 362 blk_size += inst_size; 363 // Handle machine instruction nodes 364 if( nj->is_Mach() ) { 365 MachNode *mach = nj->as_Mach(); 366 blk_size += (mach->alignment_required() - 1) * relocInfo::addr_unit(); // assume worst case padding 367 reloc_size += mach->reloc(); 368 const_size += mach->const_size(); 369 if( mach->is_MachCall() ) { 370 MachCallNode *mcall = mach->as_MachCall(); 371 // This destination address is NOT PC-relative 372 373 mcall->method_set((intptr_t)mcall->entry_point()); 374 375 if( mcall->is_MachCallJava() && mcall->as_MachCallJava()->_method ) { 376 stub_size += size_java_to_interp(); 377 reloc_size += reloc_java_to_interp(); 378 } 379 } else if (mach->is_MachSafePoint()) { 380 // If call/safepoint are adjacent, account for possible 381 // nop to disambiguate the two safepoints. 382 if (min_offset_from_last_call == 0) { 383 blk_size += nop_size; 384 } 385 } else if (mach->ideal_Opcode() == Op_Jump) { 386 const_size += b->_num_succs; // Address table size 387 // The size is valid even for 64 bit since it is 388 // multiplied by 2*jintSize on this method exit. 389 } 390 } 391 min_offset_from_last_call += inst_size; 392 // Remember end of call offset 393 if (nj->is_MachCall() && nj->as_MachCall()->is_safepoint_node()) { 394 min_offset_from_last_call = 0; 395 } 396 } 397 398 // During short branch replacement, we store the relative (to blk_starts) 399 // end of jump in jmp_end, rather than the absolute end of jump. This 400 // is so that we do not need to recompute sizes of all nodes when we compute 401 // correct blk_starts in our next sizing pass. 402 jmp_end[i] = blk_size; 403 DEBUG_ONLY( jmp_target[i] = 0; ) 404 405 // When the next block starts a loop, we may insert pad NOP 406 // instructions. Since we cannot know our future alignment, 407 // assume the worst. 408 if( i<_cfg->_num_blocks-1 ) { 409 Block *nb = _cfg->_blocks[i+1]; 410 int max_loop_pad = nb->code_alignment()-relocInfo::addr_unit(); 411 if( max_loop_pad > 0 ) { 412 assert(is_power_of_2(max_loop_pad+relocInfo::addr_unit()), ""); 413 blk_size += max_loop_pad; 414 } 415 } 416 417 // Save block size; update total method size 418 blk_starts[i+1] = blk_starts[i]+blk_size; 419 } 420 421 // Step two, replace eligible long jumps. 422 423 // Note: this will only get the long branches within short branch 424 // range. Another pass might detect more branches that became 425 // candidates because the shortening in the first pass exposed 426 // more opportunities. Unfortunately, this would require 427 // recomputing the starting and ending positions for the blocks 428 for( i=0; i<_cfg->_num_blocks; i++ ) { 429 Block *b = _cfg->_blocks[i]; 430 431 int j; 432 // Find the branch; ignore trailing NOPs. 433 for( j = b->_nodes.size()-1; j>=0; j-- ) { 434 nj = b->_nodes[j]; 435 if( !nj->is_Mach() || nj->as_Mach()->ideal_Opcode() != Op_Con ) 436 break; 437 } 438 439 if (j >= 0) { 440 if( nj->is_Mach() && nj->as_Mach()->may_be_short_branch() ) { 441 MachNode *mach = nj->as_Mach(); 442 // This requires the TRUE branch target be in succs[0] 443 uint bnum = b->non_connector_successor(0)->_pre_order; 444 uintptr_t target = blk_starts[bnum]; 445 if( mach->is_pc_relative() ) { 446 int offset = target-(blk_starts[i] + jmp_end[i]); 447 if (_matcher->is_short_branch_offset(mach->rule(), offset)) { 448 // We've got a winner. Replace this branch. 449 MachNode* replacement = mach->short_branch_version(this); 450 b->_nodes.map(j, replacement); 451 mach->subsume_by(replacement); 452 453 // Update the jmp_end size to save time in our 454 // next pass. 455 jmp_end[i] -= (mach->size(_regalloc) - replacement->size(_regalloc)); 456 DEBUG_ONLY( jmp_target[i] = bnum; ); 457 DEBUG_ONLY( jmp_rule[i] = mach->rule(); ); 458 } 459 } else { 460 #ifndef PRODUCT 461 mach->dump(3); 462 #endif 463 Unimplemented(); 464 } 465 } 466 } 467 } 468 469 // Compute the size of first NumberOfLoopInstrToAlign instructions at head 470 // of a loop. It is used to determine the padding for loop alignment. 471 compute_loop_first_inst_sizes(); 472 473 // Step 3, compute the offsets of all the labels 474 uint last_call_adr = max_uint; 475 for( i=0; i<_cfg->_num_blocks; i++ ) { // For all blocks 476 // copy the offset of the beginning to the corresponding label 477 assert(labels[i].is_unused(), "cannot patch at this point"); 478 labels[i].bind_loc(blk_starts[i], CodeBuffer::SECT_INSTS); 479 480 // insert padding for any instructions that need it 481 Block *b = _cfg->_blocks[i]; 482 uint last_inst = b->_nodes.size(); 483 uint adr = blk_starts[i]; 484 for( uint j = 0; j<last_inst; j++ ) { 485 nj = b->_nodes[j]; 486 if( nj->is_Mach() ) { 487 int padding = nj->as_Mach()->compute_padding(adr); 488 // If call/safepoint are adjacent insert a nop (5010568) 489 if (padding == 0 && nj->is_MachSafePoint() && !nj->is_MachCall() && 490 adr == last_call_adr ) { 491 padding = nop_size; 492 } 493 if(padding > 0) { 494 assert((padding % nop_size) == 0, "padding is not a multiple of NOP size"); 495 int nops_cnt = padding / nop_size; 496 MachNode *nop = new (this) MachNopNode(nops_cnt); 497 b->_nodes.insert(j++, nop); 498 _cfg->_bbs.map( nop->_idx, b ); 499 adr += padding; 500 last_inst++; 501 } 502 } 503 adr += nj->size(_regalloc); 504 505 // Remember end of call offset 506 if (nj->is_MachCall() && nj->as_MachCall()->is_safepoint_node()) { 507 last_call_adr = adr; 508 } 509 } 510 511 if ( i != _cfg->_num_blocks-1) { 512 // Get the size of the block 513 uint blk_size = adr - blk_starts[i]; 514 515 // When the next block is the top of a loop, we may insert pad NOP 516 // instructions. 517 Block *nb = _cfg->_blocks[i+1]; 518 int current_offset = blk_starts[i] + blk_size; 519 current_offset += nb->alignment_padding(current_offset); 520 // Save block size; update total method size 521 blk_starts[i+1] = current_offset; 522 } 523 } 524 525 #ifdef ASSERT 526 for( i=0; i<_cfg->_num_blocks; i++ ) { // For all blocks 527 if( jmp_target[i] != 0 ) { 528 int offset = blk_starts[jmp_target[i]]-(blk_starts[i] + jmp_end[i]); 529 if (!_matcher->is_short_branch_offset(jmp_rule[i], offset)) { 530 tty->print_cr("target (%d) - jmp_end(%d) = offset (%d), jmp_block B%d, target_block B%d", blk_starts[jmp_target[i]], blk_starts[i] + jmp_end[i], offset, i, jmp_target[i]); 531 } 532 assert(_matcher->is_short_branch_offset(jmp_rule[i], offset), "Displacement too large for short jmp"); 533 } 534 } 535 #endif 536 537 // ------------------ 538 // Compute size for code buffer 539 code_size = blk_starts[i-1] + jmp_end[i-1]; 540 541 // Relocation records 542 reloc_size += 1; // Relo entry for exception handler 543 544 // Adjust reloc_size to number of record of relocation info 545 // Min is 2 bytes, max is probably 6 or 8, with a tax up to 25% for 546 // a relocation index. 547 // The CodeBuffer will expand the locs array if this estimate is too low. 548 reloc_size *= 10 / sizeof(relocInfo); 549 550 // Adjust const_size to number of bytes 551 const_size *= 2*jintSize; // both float and double take two words per entry 552 553 } 554 555 //------------------------------FillLocArray----------------------------------- 556 // Create a bit of debug info and append it to the array. The mapping is from 557 // Java local or expression stack to constant, register or stack-slot. For 558 // doubles, insert 2 mappings and return 1 (to tell the caller that the next 559 // entry has been taken care of and caller should skip it). 560 static LocationValue *new_loc_value( PhaseRegAlloc *ra, OptoReg::Name regnum, Location::Type l_type ) { 561 // This should never have accepted Bad before 562 assert(OptoReg::is_valid(regnum), "location must be valid"); 563 return (OptoReg::is_reg(regnum)) 564 ? new LocationValue(Location::new_reg_loc(l_type, OptoReg::as_VMReg(regnum)) ) 565 : new LocationValue(Location::new_stk_loc(l_type, ra->reg2offset(regnum))); 566 } 567 568 569 ObjectValue* 570 Compile::sv_for_node_id(GrowableArray<ScopeValue*> *objs, int id) { 571 for (int i = 0; i < objs->length(); i++) { 572 assert(objs->at(i)->is_object(), "corrupt object cache"); 573 ObjectValue* sv = (ObjectValue*) objs->at(i); 574 if (sv->id() == id) { 575 return sv; 576 } 577 } 578 // Otherwise.. 579 return NULL; 580 } 581 582 void Compile::set_sv_for_object_node(GrowableArray<ScopeValue*> *objs, 583 ObjectValue* sv ) { 584 assert(sv_for_node_id(objs, sv->id()) == NULL, "Precondition"); 585 objs->append(sv); 586 } 587 588 589 void Compile::FillLocArray( int idx, MachSafePointNode* sfpt, Node *local, 590 GrowableArray<ScopeValue*> *array, 591 GrowableArray<ScopeValue*> *objs ) { 592 assert( local, "use _top instead of null" ); 593 if (array->length() != idx) { 594 assert(array->length() == idx + 1, "Unexpected array count"); 595 // Old functionality: 596 // return 597 // New functionality: 598 // Assert if the local is not top. In product mode let the new node 599 // override the old entry. 600 assert(local == top(), "LocArray collision"); 601 if (local == top()) { 602 return; 603 } 604 array->pop(); 605 } 606 const Type *t = local->bottom_type(); 607 608 // Is it a safepoint scalar object node? 609 if (local->is_SafePointScalarObject()) { 610 SafePointScalarObjectNode* spobj = local->as_SafePointScalarObject(); 611 612 ObjectValue* sv = Compile::sv_for_node_id(objs, spobj->_idx); 613 if (sv == NULL) { 614 ciKlass* cik = t->is_oopptr()->klass(); 615 assert(cik->is_instance_klass() || 616 cik->is_array_klass(), "Not supported allocation."); 617 sv = new ObjectValue(spobj->_idx, 618 new ConstantOopWriteValue(cik->constant_encoding())); 619 Compile::set_sv_for_object_node(objs, sv); 620 621 uint first_ind = spobj->first_index(); 622 for (uint i = 0; i < spobj->n_fields(); i++) { 623 Node* fld_node = sfpt->in(first_ind+i); 624 (void)FillLocArray(sv->field_values()->length(), sfpt, fld_node, sv->field_values(), objs); 625 } 626 } 627 array->append(sv); 628 return; 629 } 630 631 // Grab the register number for the local 632 OptoReg::Name regnum = _regalloc->get_reg_first(local); 633 if( OptoReg::is_valid(regnum) ) {// Got a register/stack? 634 // Record the double as two float registers. 635 // The register mask for such a value always specifies two adjacent 636 // float registers, with the lower register number even. 637 // Normally, the allocation of high and low words to these registers 638 // is irrelevant, because nearly all operations on register pairs 639 // (e.g., StoreD) treat them as a single unit. 640 // Here, we assume in addition that the words in these two registers 641 // stored "naturally" (by operations like StoreD and double stores 642 // within the interpreter) such that the lower-numbered register 643 // is written to the lower memory address. This may seem like 644 // a machine dependency, but it is not--it is a requirement on 645 // the author of the <arch>.ad file to ensure that, for every 646 // even/odd double-register pair to which a double may be allocated, 647 // the word in the even single-register is stored to the first 648 // memory word. (Note that register numbers are completely 649 // arbitrary, and are not tied to any machine-level encodings.) 650 #ifdef _LP64 651 if( t->base() == Type::DoubleBot || t->base() == Type::DoubleCon ) { 652 array->append(new ConstantIntValue(0)); 653 array->append(new_loc_value( _regalloc, regnum, Location::dbl )); 654 } else if ( t->base() == Type::Long ) { 655 array->append(new ConstantIntValue(0)); 656 array->append(new_loc_value( _regalloc, regnum, Location::lng )); 657 } else if ( t->base() == Type::RawPtr ) { 658 // jsr/ret return address which must be restored into a the full 659 // width 64-bit stack slot. 660 array->append(new_loc_value( _regalloc, regnum, Location::lng )); 661 } 662 #else //_LP64 663 #ifdef SPARC 664 if (t->base() == Type::Long && OptoReg::is_reg(regnum)) { 665 // For SPARC we have to swap high and low words for 666 // long values stored in a single-register (g0-g7). 667 array->append(new_loc_value( _regalloc, regnum , Location::normal )); 668 array->append(new_loc_value( _regalloc, OptoReg::add(regnum,1), Location::normal )); 669 } else 670 #endif //SPARC 671 if( t->base() == Type::DoubleBot || t->base() == Type::DoubleCon || t->base() == Type::Long ) { 672 // Repack the double/long as two jints. 673 // The convention the interpreter uses is that the second local 674 // holds the first raw word of the native double representation. 675 // This is actually reasonable, since locals and stack arrays 676 // grow downwards in all implementations. 677 // (If, on some machine, the interpreter's Java locals or stack 678 // were to grow upwards, the embedded doubles would be word-swapped.) 679 array->append(new_loc_value( _regalloc, OptoReg::add(regnum,1), Location::normal )); 680 array->append(new_loc_value( _regalloc, regnum , Location::normal )); 681 } 682 #endif //_LP64 683 else if( (t->base() == Type::FloatBot || t->base() == Type::FloatCon) && 684 OptoReg::is_reg(regnum) ) { 685 array->append(new_loc_value( _regalloc, regnum, Matcher::float_in_double() 686 ? Location::float_in_dbl : Location::normal )); 687 } else if( t->base() == Type::Int && OptoReg::is_reg(regnum) ) { 688 array->append(new_loc_value( _regalloc, regnum, Matcher::int_in_long 689 ? Location::int_in_long : Location::normal )); 690 } else if( t->base() == Type::NarrowOop ) { 691 array->append(new_loc_value( _regalloc, regnum, Location::narrowoop )); 692 } else { 693 array->append(new_loc_value( _regalloc, regnum, _regalloc->is_oop(local) ? Location::oop : Location::normal )); 694 } 695 return; 696 } 697 698 // No register. It must be constant data. 699 switch (t->base()) { 700 case Type::Half: // Second half of a double 701 ShouldNotReachHere(); // Caller should skip 2nd halves 702 break; 703 case Type::AnyPtr: 704 array->append(new ConstantOopWriteValue(NULL)); 705 break; 706 case Type::AryPtr: 707 case Type::InstPtr: 708 case Type::KlassPtr: // fall through 709 array->append(new ConstantOopWriteValue(t->isa_oopptr()->const_oop()->constant_encoding())); 710 break; 711 case Type::NarrowOop: 712 if (t == TypeNarrowOop::NULL_PTR) { 713 array->append(new ConstantOopWriteValue(NULL)); 714 } else { 715 array->append(new ConstantOopWriteValue(t->make_ptr()->isa_oopptr()->const_oop()->constant_encoding())); 716 } 717 break; 718 case Type::Int: 719 array->append(new ConstantIntValue(t->is_int()->get_con())); 720 break; 721 case Type::RawPtr: 722 // A return address (T_ADDRESS). 723 assert((intptr_t)t->is_ptr()->get_con() < (intptr_t)0x10000, "must be a valid BCI"); 724 #ifdef _LP64 725 // Must be restored to the full-width 64-bit stack slot. 726 array->append(new ConstantLongValue(t->is_ptr()->get_con())); 727 #else 728 array->append(new ConstantIntValue(t->is_ptr()->get_con())); 729 #endif 730 break; 731 case Type::FloatCon: { 732 float f = t->is_float_constant()->getf(); 733 array->append(new ConstantIntValue(jint_cast(f))); 734 break; 735 } 736 case Type::DoubleCon: { 737 jdouble d = t->is_double_constant()->getd(); 738 #ifdef _LP64 739 array->append(new ConstantIntValue(0)); 740 array->append(new ConstantDoubleValue(d)); 741 #else 742 // Repack the double as two jints. 743 // The convention the interpreter uses is that the second local 744 // holds the first raw word of the native double representation. 745 // This is actually reasonable, since locals and stack arrays 746 // grow downwards in all implementations. 747 // (If, on some machine, the interpreter's Java locals or stack 748 // were to grow upwards, the embedded doubles would be word-swapped.) 749 jint *dp = (jint*)&d; 750 array->append(new ConstantIntValue(dp[1])); 751 array->append(new ConstantIntValue(dp[0])); 752 #endif 753 break; 754 } 755 case Type::Long: { 756 jlong d = t->is_long()->get_con(); 757 #ifdef _LP64 758 array->append(new ConstantIntValue(0)); 759 array->append(new ConstantLongValue(d)); 760 #else 761 // Repack the long as two jints. 762 // The convention the interpreter uses is that the second local 763 // holds the first raw word of the native double representation. 764 // This is actually reasonable, since locals and stack arrays 765 // grow downwards in all implementations. 766 // (If, on some machine, the interpreter's Java locals or stack 767 // were to grow upwards, the embedded doubles would be word-swapped.) 768 jint *dp = (jint*)&d; 769 array->append(new ConstantIntValue(dp[1])); 770 array->append(new ConstantIntValue(dp[0])); 771 #endif 772 break; 773 } 774 case Type::Top: // Add an illegal value here 775 array->append(new LocationValue(Location())); 776 break; 777 default: 778 ShouldNotReachHere(); 779 break; 780 } 781 } 782 783 // Determine if this node starts a bundle 784 bool Compile::starts_bundle(const Node *n) const { 785 return (_node_bundling_limit > n->_idx && 786 _node_bundling_base[n->_idx].starts_bundle()); 787 } 788 789 //--------------------------Process_OopMap_Node-------------------------------- 790 void Compile::Process_OopMap_Node(MachNode *mach, int current_offset) { 791 792 // Handle special safepoint nodes for synchronization 793 MachSafePointNode *sfn = mach->as_MachSafePoint(); 794 MachCallNode *mcall; 795 796 #ifdef ENABLE_ZAP_DEAD_LOCALS 797 assert( is_node_getting_a_safepoint(mach), "logic does not match; false negative"); 798 #endif 799 800 int safepoint_pc_offset = current_offset; 801 bool is_method_handle_invoke = false; 802 bool return_oop = false; 803 804 // Add the safepoint in the DebugInfoRecorder 805 if( !mach->is_MachCall() ) { 806 mcall = NULL; 807 debug_info()->add_safepoint(safepoint_pc_offset, sfn->_oop_map); 808 } else { 809 mcall = mach->as_MachCall(); 810 811 // Is the call a MethodHandle call? 812 if (mcall->is_MachCallJava()) { 813 if (mcall->as_MachCallJava()->_method_handle_invoke) { 814 assert(has_method_handle_invokes(), "must have been set during call generation"); 815 is_method_handle_invoke = true; 816 } 817 } 818 819 // Check if a call returns an object. 820 if (mcall->return_value_is_used() && 821 mcall->tf()->range()->field_at(TypeFunc::Parms)->isa_ptr()) { 822 return_oop = true; 823 } 824 safepoint_pc_offset += mcall->ret_addr_offset(); 825 debug_info()->add_safepoint(safepoint_pc_offset, mcall->_oop_map); 826 } 827 828 // Loop over the JVMState list to add scope information 829 // Do not skip safepoints with a NULL method, they need monitor info 830 JVMState* youngest_jvms = sfn->jvms(); 831 int max_depth = youngest_jvms->depth(); 832 833 // Allocate the object pool for scalar-replaced objects -- the map from 834 // small-integer keys (which can be recorded in the local and ostack 835 // arrays) to descriptions of the object state. 836 GrowableArray<ScopeValue*> *objs = new GrowableArray<ScopeValue*>(); 837 838 // Visit scopes from oldest to youngest. 839 for (int depth = 1; depth <= max_depth; depth++) { 840 JVMState* jvms = youngest_jvms->of_depth(depth); 841 int idx; 842 ciMethod* method = jvms->has_method() ? jvms->method() : NULL; 843 // Safepoints that do not have method() set only provide oop-map and monitor info 844 // to support GC; these do not support deoptimization. 845 int num_locs = (method == NULL) ? 0 : jvms->loc_size(); 846 int num_exps = (method == NULL) ? 0 : jvms->stk_size(); 847 int num_mon = jvms->nof_monitors(); 848 assert(method == NULL || jvms->bci() < 0 || num_locs == method->max_locals(), 849 "JVMS local count must match that of the method"); 850 851 // Add Local and Expression Stack Information 852 853 // Insert locals into the locarray 854 GrowableArray<ScopeValue*> *locarray = new GrowableArray<ScopeValue*>(num_locs); 855 for( idx = 0; idx < num_locs; idx++ ) { 856 FillLocArray( idx, sfn, sfn->local(jvms, idx), locarray, objs ); 857 } 858 859 // Insert expression stack entries into the exparray 860 GrowableArray<ScopeValue*> *exparray = new GrowableArray<ScopeValue*>(num_exps); 861 for( idx = 0; idx < num_exps; idx++ ) { 862 FillLocArray( idx, sfn, sfn->stack(jvms, idx), exparray, objs ); 863 } 864 865 // Add in mappings of the monitors 866 assert( !method || 867 !method->is_synchronized() || 868 method->is_native() || 869 num_mon > 0 || 870 !GenerateSynchronizationCode, 871 "monitors must always exist for synchronized methods"); 872 873 // Build the growable array of ScopeValues for exp stack 874 GrowableArray<MonitorValue*> *monarray = new GrowableArray<MonitorValue*>(num_mon); 875 876 // Loop over monitors and insert into array 877 for(idx = 0; idx < num_mon; idx++) { 878 // Grab the node that defines this monitor 879 Node* box_node = sfn->monitor_box(jvms, idx); 880 Node* obj_node = sfn->monitor_obj(jvms, idx); 881 882 // Create ScopeValue for object 883 ScopeValue *scval = NULL; 884 885 if( obj_node->is_SafePointScalarObject() ) { 886 SafePointScalarObjectNode* spobj = obj_node->as_SafePointScalarObject(); 887 scval = Compile::sv_for_node_id(objs, spobj->_idx); 888 if (scval == NULL) { 889 const Type *t = obj_node->bottom_type(); 890 ciKlass* cik = t->is_oopptr()->klass(); 891 assert(cik->is_instance_klass() || 892 cik->is_array_klass(), "Not supported allocation."); 893 ObjectValue* sv = new ObjectValue(spobj->_idx, 894 new ConstantOopWriteValue(cik->constant_encoding())); 895 Compile::set_sv_for_object_node(objs, sv); 896 897 uint first_ind = spobj->first_index(); 898 for (uint i = 0; i < spobj->n_fields(); i++) { 899 Node* fld_node = sfn->in(first_ind+i); 900 (void)FillLocArray(sv->field_values()->length(), sfn, fld_node, sv->field_values(), objs); 901 } 902 scval = sv; 903 } 904 } else if( !obj_node->is_Con() ) { 905 OptoReg::Name obj_reg = _regalloc->get_reg_first(obj_node); 906 if( obj_node->bottom_type()->base() == Type::NarrowOop ) { 907 scval = new_loc_value( _regalloc, obj_reg, Location::narrowoop ); 908 } else { 909 scval = new_loc_value( _regalloc, obj_reg, Location::oop ); 910 } 911 } else { 912 const TypePtr *tp = obj_node->bottom_type()->make_ptr(); 913 scval = new ConstantOopWriteValue(tp->is_instptr()->const_oop()->constant_encoding()); 914 } 915 916 OptoReg::Name box_reg = BoxLockNode::stack_slot(box_node); 917 Location basic_lock = Location::new_stk_loc(Location::normal,_regalloc->reg2offset(box_reg)); 918 while( !box_node->is_BoxLock() ) box_node = box_node->in(1); 919 monarray->append(new MonitorValue(scval, basic_lock, box_node->as_BoxLock()->is_eliminated())); 920 } 921 922 // We dump the object pool first, since deoptimization reads it in first. 923 debug_info()->dump_object_pool(objs); 924 925 // Build first class objects to pass to scope 926 DebugToken *locvals = debug_info()->create_scope_values(locarray); 927 DebugToken *expvals = debug_info()->create_scope_values(exparray); 928 DebugToken *monvals = debug_info()->create_monitor_values(monarray); 929 930 // Make method available for all Safepoints 931 ciMethod* scope_method = method ? method : _method; 932 // Describe the scope here 933 assert(jvms->bci() >= InvocationEntryBci && jvms->bci() <= 0x10000, "must be a valid or entry BCI"); 934 assert(!jvms->should_reexecute() || depth == max_depth, "reexecute allowed only for the youngest"); 935 // Now we can describe the scope. 936 debug_info()->describe_scope(safepoint_pc_offset, scope_method, jvms->bci(), jvms->should_reexecute(), is_method_handle_invoke, return_oop, locvals, expvals, monvals); 937 } // End jvms loop 938 939 // Mark the end of the scope set. 940 debug_info()->end_safepoint(safepoint_pc_offset); 941 } 942 943 944 945 // A simplified version of Process_OopMap_Node, to handle non-safepoints. 946 class NonSafepointEmitter { 947 Compile* C; 948 JVMState* _pending_jvms; 949 int _pending_offset; 950 951 void emit_non_safepoint(); 952 953 public: 954 NonSafepointEmitter(Compile* compile) { 955 this->C = compile; 956 _pending_jvms = NULL; 957 _pending_offset = 0; 958 } 959 960 void observe_instruction(Node* n, int pc_offset) { 961 if (!C->debug_info()->recording_non_safepoints()) return; 962 963 Node_Notes* nn = C->node_notes_at(n->_idx); 964 if (nn == NULL || nn->jvms() == NULL) return; 965 if (_pending_jvms != NULL && 966 _pending_jvms->same_calls_as(nn->jvms())) { 967 // Repeated JVMS? Stretch it up here. 968 _pending_offset = pc_offset; 969 } else { 970 if (_pending_jvms != NULL && 971 _pending_offset < pc_offset) { 972 emit_non_safepoint(); 973 } 974 _pending_jvms = NULL; 975 if (pc_offset > C->debug_info()->last_pc_offset()) { 976 // This is the only way _pending_jvms can become non-NULL: 977 _pending_jvms = nn->jvms(); 978 _pending_offset = pc_offset; 979 } 980 } 981 } 982 983 // Stay out of the way of real safepoints: 984 void observe_safepoint(JVMState* jvms, int pc_offset) { 985 if (_pending_jvms != NULL && 986 !_pending_jvms->same_calls_as(jvms) && 987 _pending_offset < pc_offset) { 988 emit_non_safepoint(); 989 } 990 _pending_jvms = NULL; 991 } 992 993 void flush_at_end() { 994 if (_pending_jvms != NULL) { 995 emit_non_safepoint(); 996 } 997 _pending_jvms = NULL; 998 } 999 }; 1000 1001 void NonSafepointEmitter::emit_non_safepoint() { 1002 JVMState* youngest_jvms = _pending_jvms; 1003 int pc_offset = _pending_offset; 1004 1005 // Clear it now: 1006 _pending_jvms = NULL; 1007 1008 DebugInformationRecorder* debug_info = C->debug_info(); 1009 assert(debug_info->recording_non_safepoints(), "sanity"); 1010 1011 debug_info->add_non_safepoint(pc_offset); 1012 int max_depth = youngest_jvms->depth(); 1013 1014 // Visit scopes from oldest to youngest. 1015 for (int depth = 1; depth <= max_depth; depth++) { 1016 JVMState* jvms = youngest_jvms->of_depth(depth); 1017 ciMethod* method = jvms->has_method() ? jvms->method() : NULL; 1018 assert(!jvms->should_reexecute() || depth==max_depth, "reexecute allowed only for the youngest"); 1019 debug_info->describe_scope(pc_offset, method, jvms->bci(), jvms->should_reexecute()); 1020 } 1021 1022 // Mark the end of the scope set. 1023 debug_info->end_non_safepoint(pc_offset); 1024 } 1025 1026 1027 1028 // helper for Fill_buffer bailout logic 1029 static void turn_off_compiler(Compile* C) { 1030 if (CodeCache::unallocated_capacity() >= CodeCacheMinimumFreeSpace*10) { 1031 // Do not turn off compilation if a single giant method has 1032 // blown the code cache size. 1033 C->record_failure("excessive request to CodeCache"); 1034 } else { 1035 // Let CompilerBroker disable further compilations. 1036 C->record_failure("CodeCache is full"); 1037 } 1038 } 1039 1040 1041 //------------------------------Fill_buffer------------------------------------ 1042 void Compile::Fill_buffer() { 1043 1044 // Set the initially allocated size 1045 int code_req = initial_code_capacity; 1046 int locs_req = initial_locs_capacity; 1047 int stub_req = TraceJumps ? initial_stub_capacity * 10 : initial_stub_capacity; 1048 int const_req = initial_const_capacity; 1049 bool labels_not_set = true; 1050 1051 int pad_req = NativeCall::instruction_size; 1052 // The extra spacing after the code is necessary on some platforms. 1053 // Sometimes we need to patch in a jump after the last instruction, 1054 // if the nmethod has been deoptimized. (See 4932387, 4894843.) 1055 1056 uint i; 1057 // Compute the byte offset where we can store the deopt pc. 1058 if (fixed_slots() != 0) { 1059 _orig_pc_slot_offset_in_bytes = _regalloc->reg2offset(OptoReg::stack2reg(_orig_pc_slot)); 1060 } 1061 1062 // Compute prolog code size 1063 _method_size = 0; 1064 _frame_slots = OptoReg::reg2stack(_matcher->_old_SP)+_regalloc->_framesize; 1065 #ifdef IA64 1066 if (save_argument_registers()) { 1067 // 4815101: this is a stub with implicit and unknown precision fp args. 1068 // The usual spill mechanism can only generate stfd's in this case, which 1069 // doesn't work if the fp reg to spill contains a single-precision denorm. 1070 // Instead, we hack around the normal spill mechanism using stfspill's and 1071 // ldffill's in the MachProlog and MachEpilog emit methods. We allocate 1072 // space here for the fp arg regs (f8-f15) we're going to thusly spill. 1073 // 1074 // If we ever implement 16-byte 'registers' == stack slots, we can 1075 // get rid of this hack and have SpillCopy generate stfspill/ldffill 1076 // instead of stfd/stfs/ldfd/ldfs. 1077 _frame_slots += 8*(16/BytesPerInt); 1078 } 1079 #endif 1080 assert( _frame_slots >= 0 && _frame_slots < 1000000, "sanity check" ); 1081 1082 // Create an array of unused labels, one for each basic block 1083 Label *blk_labels = NEW_RESOURCE_ARRAY(Label, _cfg->_num_blocks+1); 1084 1085 for( i=0; i <= _cfg->_num_blocks; i++ ) { 1086 blk_labels[i].init(); 1087 } 1088 1089 // If this machine supports different size branch offsets, then pre-compute 1090 // the length of the blocks 1091 if( _matcher->is_short_branch_offset(-1, 0) ) { 1092 Shorten_branches(blk_labels, code_req, locs_req, stub_req, const_req); 1093 labels_not_set = false; 1094 } 1095 1096 // nmethod and CodeBuffer count stubs & constants as part of method's code. 1097 int exception_handler_req = size_exception_handler(); 1098 int deopt_handler_req = size_deopt_handler(); 1099 exception_handler_req += MAX_stubs_size; // add marginal slop for handler 1100 deopt_handler_req += MAX_stubs_size; // add marginal slop for handler 1101 stub_req += MAX_stubs_size; // ensure per-stub margin 1102 code_req += MAX_inst_size; // ensure per-instruction margin 1103 1104 if (StressCodeBuffers) 1105 code_req = const_req = stub_req = exception_handler_req = deopt_handler_req = 0x10; // force expansion 1106 1107 int total_req = 1108 code_req + 1109 pad_req + 1110 stub_req + 1111 exception_handler_req + 1112 deopt_handler_req + // deopt handler 1113 const_req; 1114 1115 if (has_method_handle_invokes()) 1116 total_req += deopt_handler_req; // deopt MH handler 1117 1118 CodeBuffer* cb = code_buffer(); 1119 cb->initialize(total_req, locs_req); 1120 1121 // Have we run out of code space? 1122 if ((cb->blob() == NULL) || (!CompileBroker::should_compile_new_jobs())) { 1123 turn_off_compiler(this); 1124 return; 1125 } 1126 // Configure the code buffer. 1127 cb->initialize_consts_size(const_req); 1128 cb->initialize_stubs_size(stub_req); 1129 cb->initialize_oop_recorder(env()->oop_recorder()); 1130 1131 // fill in the nop array for bundling computations 1132 MachNode *_nop_list[Bundle::_nop_count]; 1133 Bundle::initialize_nops(_nop_list, this); 1134 1135 // Create oopmap set. 1136 _oop_map_set = new OopMapSet(); 1137 1138 // !!!!! This preserves old handling of oopmaps for now 1139 debug_info()->set_oopmaps(_oop_map_set); 1140 1141 // Count and start of implicit null check instructions 1142 uint inct_cnt = 0; 1143 uint *inct_starts = NEW_RESOURCE_ARRAY(uint, _cfg->_num_blocks+1); 1144 1145 // Count and start of calls 1146 uint *call_returns = NEW_RESOURCE_ARRAY(uint, _cfg->_num_blocks+1); 1147 1148 uint return_offset = 0; 1149 int nop_size = (new (this) MachNopNode())->size(_regalloc); 1150 1151 int previous_offset = 0; 1152 int current_offset = 0; 1153 int last_call_offset = -1; 1154 1155 // Create an array of unused labels, one for each basic block, if printing is enabled 1156 #ifndef PRODUCT 1157 int *node_offsets = NULL; 1158 uint node_offset_limit = unique(); 1159 1160 1161 if ( print_assembly() ) 1162 node_offsets = NEW_RESOURCE_ARRAY(int, node_offset_limit); 1163 #endif 1164 1165 NonSafepointEmitter non_safepoints(this); // emit non-safepoints lazily 1166 1167 // ------------------ 1168 // Now fill in the code buffer 1169 Node *delay_slot = NULL; 1170 1171 for( i=0; i < _cfg->_num_blocks; i++ ) { 1172 Block *b = _cfg->_blocks[i]; 1173 1174 Node *head = b->head(); 1175 1176 // If this block needs to start aligned (i.e, can be reached other 1177 // than by falling-thru from the previous block), then force the 1178 // start of a new bundle. 1179 if( Pipeline::requires_bundling() && starts_bundle(head) ) 1180 cb->flush_bundle(true); 1181 1182 // Define the label at the beginning of the basic block 1183 if( labels_not_set ) 1184 MacroAssembler(cb).bind( blk_labels[b->_pre_order] ); 1185 1186 else 1187 assert( blk_labels[b->_pre_order].loc_pos() == cb->insts_size(), 1188 "label position does not match code offset" ); 1189 1190 uint last_inst = b->_nodes.size(); 1191 1192 // Emit block normally, except for last instruction. 1193 // Emit means "dump code bits into code buffer". 1194 for( uint j = 0; j<last_inst; j++ ) { 1195 1196 // Get the node 1197 Node* n = b->_nodes[j]; 1198 1199 // See if delay slots are supported 1200 if (valid_bundle_info(n) && 1201 node_bundling(n)->used_in_unconditional_delay()) { 1202 assert(delay_slot == NULL, "no use of delay slot node"); 1203 assert(n->size(_regalloc) == Pipeline::instr_unit_size(), "delay slot instruction wrong size"); 1204 1205 delay_slot = n; 1206 continue; 1207 } 1208 1209 // If this starts a new instruction group, then flush the current one 1210 // (but allow split bundles) 1211 if( Pipeline::requires_bundling() && starts_bundle(n) ) 1212 cb->flush_bundle(false); 1213 1214 // The following logic is duplicated in the code ifdeffed for 1215 // ENABLE_ZAP_DEAD_LOCALS which appears above in this file. It 1216 // should be factored out. Or maybe dispersed to the nodes? 1217 1218 // Special handling for SafePoint/Call Nodes 1219 bool is_mcall = false; 1220 if( n->is_Mach() ) { 1221 MachNode *mach = n->as_Mach(); 1222 is_mcall = n->is_MachCall(); 1223 bool is_sfn = n->is_MachSafePoint(); 1224 1225 // If this requires all previous instructions be flushed, then do so 1226 if( is_sfn || is_mcall || mach->alignment_required() != 1) { 1227 cb->flush_bundle(true); 1228 current_offset = cb->insts_size(); 1229 } 1230 1231 // align the instruction if necessary 1232 int padding = mach->compute_padding(current_offset); 1233 // Make sure safepoint node for polling is distinct from a call's 1234 // return by adding a nop if needed. 1235 if (is_sfn && !is_mcall && padding == 0 && current_offset == last_call_offset ) { 1236 padding = nop_size; 1237 } 1238 assert( labels_not_set || padding == 0, "instruction should already be aligned"); 1239 1240 if(padding > 0) { 1241 assert((padding % nop_size) == 0, "padding is not a multiple of NOP size"); 1242 int nops_cnt = padding / nop_size; 1243 MachNode *nop = new (this) MachNopNode(nops_cnt); 1244 b->_nodes.insert(j++, nop); 1245 last_inst++; 1246 _cfg->_bbs.map( nop->_idx, b ); 1247 nop->emit(*cb, _regalloc); 1248 cb->flush_bundle(true); 1249 current_offset = cb->insts_size(); 1250 } 1251 1252 // Remember the start of the last call in a basic block 1253 if (is_mcall) { 1254 MachCallNode *mcall = mach->as_MachCall(); 1255 1256 // This destination address is NOT PC-relative 1257 mcall->method_set((intptr_t)mcall->entry_point()); 1258 1259 // Save the return address 1260 call_returns[b->_pre_order] = current_offset + mcall->ret_addr_offset(); 1261 1262 if (!mcall->is_safepoint_node()) { 1263 is_mcall = false; 1264 is_sfn = false; 1265 } 1266 } 1267 1268 // sfn will be valid whenever mcall is valid now because of inheritance 1269 if( is_sfn || is_mcall ) { 1270 1271 // Handle special safepoint nodes for synchronization 1272 if( !is_mcall ) { 1273 MachSafePointNode *sfn = mach->as_MachSafePoint(); 1274 // !!!!! Stubs only need an oopmap right now, so bail out 1275 if( sfn->jvms()->method() == NULL) { 1276 // Write the oopmap directly to the code blob??!! 1277 # ifdef ENABLE_ZAP_DEAD_LOCALS 1278 assert( !is_node_getting_a_safepoint(sfn), "logic does not match; false positive"); 1279 # endif 1280 continue; 1281 } 1282 } // End synchronization 1283 1284 non_safepoints.observe_safepoint(mach->as_MachSafePoint()->jvms(), 1285 current_offset); 1286 Process_OopMap_Node(mach, current_offset); 1287 } // End if safepoint 1288 1289 // If this is a null check, then add the start of the previous instruction to the list 1290 else if( mach->is_MachNullCheck() ) { 1291 inct_starts[inct_cnt++] = previous_offset; 1292 } 1293 1294 // If this is a branch, then fill in the label with the target BB's label 1295 else if ( mach->is_Branch() ) { 1296 1297 if ( mach->ideal_Opcode() == Op_Jump ) { 1298 for (uint h = 0; h < b->_num_succs; h++ ) { 1299 Block* succs_block = b->_succs[h]; 1300 for (uint j = 1; j < succs_block->num_preds(); j++) { 1301 Node* jpn = succs_block->pred(j); 1302 if ( jpn->is_JumpProj() && jpn->in(0) == mach ) { 1303 uint block_num = succs_block->non_connector()->_pre_order; 1304 Label *blkLabel = &blk_labels[block_num]; 1305 mach->add_case_label(jpn->as_JumpProj()->proj_no(), blkLabel); 1306 } 1307 } 1308 } 1309 } else { 1310 // For Branchs 1311 // This requires the TRUE branch target be in succs[0] 1312 uint block_num = b->non_connector_successor(0)->_pre_order; 1313 mach->label_set( blk_labels[block_num], block_num ); 1314 } 1315 } 1316 1317 #ifdef ASSERT 1318 // Check that oop-store precedes the card-mark 1319 else if( mach->ideal_Opcode() == Op_StoreCM ) { 1320 uint storeCM_idx = j; 1321 Node *oop_store = mach->in(mach->_cnt); // First precedence edge 1322 assert( oop_store != NULL, "storeCM expects a precedence edge"); 1323 uint i4; 1324 for( i4 = 0; i4 < last_inst; ++i4 ) { 1325 if( b->_nodes[i4] == oop_store ) break; 1326 } 1327 // Note: This test can provide a false failure if other precedence 1328 // edges have been added to the storeCMNode. 1329 assert( i4 == last_inst || i4 < storeCM_idx, "CM card-mark executes before oop-store"); 1330 } 1331 #endif 1332 1333 else if( !n->is_Proj() ) { 1334 // Remember the beginning of the previous instruction, in case 1335 // it's followed by a flag-kill and a null-check. Happens on 1336 // Intel all the time, with add-to-memory kind of opcodes. 1337 previous_offset = current_offset; 1338 } 1339 } 1340 1341 // Verify that there is sufficient space remaining 1342 cb->insts()->maybe_expand_to_ensure_remaining(MAX_inst_size); 1343 if ((cb->blob() == NULL) || (!CompileBroker::should_compile_new_jobs())) { 1344 turn_off_compiler(this); 1345 return; 1346 } 1347 1348 // Save the offset for the listing 1349 #ifndef PRODUCT 1350 if( node_offsets && n->_idx < node_offset_limit ) 1351 node_offsets[n->_idx] = cb->insts_size(); 1352 #endif 1353 1354 // "Normal" instruction case 1355 n->emit(*cb, _regalloc); 1356 current_offset = cb->insts_size(); 1357 non_safepoints.observe_instruction(n, current_offset); 1358 1359 // mcall is last "call" that can be a safepoint 1360 // record it so we can see if a poll will directly follow it 1361 // in which case we'll need a pad to make the PcDesc sites unique 1362 // see 5010568. This can be slightly inaccurate but conservative 1363 // in the case that return address is not actually at current_offset. 1364 // This is a small price to pay. 1365 1366 if (is_mcall) { 1367 last_call_offset = current_offset; 1368 } 1369 1370 // See if this instruction has a delay slot 1371 if ( valid_bundle_info(n) && node_bundling(n)->use_unconditional_delay()) { 1372 assert(delay_slot != NULL, "expecting delay slot node"); 1373 1374 // Back up 1 instruction 1375 cb->set_insts_end(cb->insts_end() - Pipeline::instr_unit_size()); 1376 1377 // Save the offset for the listing 1378 #ifndef PRODUCT 1379 if( node_offsets && delay_slot->_idx < node_offset_limit ) 1380 node_offsets[delay_slot->_idx] = cb->insts_size(); 1381 #endif 1382 1383 // Support a SafePoint in the delay slot 1384 if( delay_slot->is_MachSafePoint() ) { 1385 MachNode *mach = delay_slot->as_Mach(); 1386 // !!!!! Stubs only need an oopmap right now, so bail out 1387 if( !mach->is_MachCall() && mach->as_MachSafePoint()->jvms()->method() == NULL ) { 1388 // Write the oopmap directly to the code blob??!! 1389 # ifdef ENABLE_ZAP_DEAD_LOCALS 1390 assert( !is_node_getting_a_safepoint(mach), "logic does not match; false positive"); 1391 # endif 1392 delay_slot = NULL; 1393 continue; 1394 } 1395 1396 int adjusted_offset = current_offset - Pipeline::instr_unit_size(); 1397 non_safepoints.observe_safepoint(mach->as_MachSafePoint()->jvms(), 1398 adjusted_offset); 1399 // Generate an OopMap entry 1400 Process_OopMap_Node(mach, adjusted_offset); 1401 } 1402 1403 // Insert the delay slot instruction 1404 delay_slot->emit(*cb, _regalloc); 1405 1406 // Don't reuse it 1407 delay_slot = NULL; 1408 } 1409 1410 } // End for all instructions in block 1411 1412 // If the next block is the top of a loop, pad this block out to align 1413 // the loop top a little. Helps prevent pipe stalls at loop back branches. 1414 if( i<_cfg->_num_blocks-1 ) { 1415 Block *nb = _cfg->_blocks[i+1]; 1416 uint padding = nb->alignment_padding(current_offset); 1417 if( padding > 0 ) { 1418 MachNode *nop = new (this) MachNopNode(padding / nop_size); 1419 b->_nodes.insert( b->_nodes.size(), nop ); 1420 _cfg->_bbs.map( nop->_idx, b ); 1421 nop->emit(*cb, _regalloc); 1422 current_offset = cb->insts_size(); 1423 } 1424 } 1425 1426 } // End of for all blocks 1427 1428 non_safepoints.flush_at_end(); 1429 1430 // Offset too large? 1431 if (failing()) return; 1432 1433 // Define a pseudo-label at the end of the code 1434 MacroAssembler(cb).bind( blk_labels[_cfg->_num_blocks] ); 1435 1436 // Compute the size of the first block 1437 _first_block_size = blk_labels[1].loc_pos() - blk_labels[0].loc_pos(); 1438 1439 assert(cb->insts_size() < 500000, "method is unreasonably large"); 1440 1441 // ------------------ 1442 1443 #ifndef PRODUCT 1444 // Information on the size of the method, without the extraneous code 1445 Scheduling::increment_method_size(cb->insts_size()); 1446 #endif 1447 1448 // ------------------ 1449 // Fill in exception table entries. 1450 FillExceptionTables(inct_cnt, call_returns, inct_starts, blk_labels); 1451 1452 // Only java methods have exception handlers and deopt handlers 1453 if (_method) { 1454 // Emit the exception handler code. 1455 _code_offsets.set_value(CodeOffsets::Exceptions, emit_exception_handler(*cb)); 1456 // Emit the deopt handler code. 1457 _code_offsets.set_value(CodeOffsets::Deopt, emit_deopt_handler(*cb)); 1458 1459 // Emit the MethodHandle deopt handler code (if required). 1460 if (has_method_handle_invokes()) { 1461 // We can use the same code as for the normal deopt handler, we 1462 // just need a different entry point address. 1463 _code_offsets.set_value(CodeOffsets::DeoptMH, emit_deopt_handler(*cb)); 1464 } 1465 } 1466 1467 // One last check for failed CodeBuffer::expand: 1468 if ((cb->blob() == NULL) || (!CompileBroker::should_compile_new_jobs())) { 1469 turn_off_compiler(this); 1470 return; 1471 } 1472 1473 #ifndef PRODUCT 1474 // Dump the assembly code, including basic-block numbers 1475 if (print_assembly()) { 1476 ttyLocker ttyl; // keep the following output all in one block 1477 if (!VMThread::should_terminate()) { // test this under the tty lock 1478 // This output goes directly to the tty, not the compiler log. 1479 // To enable tools to match it up with the compilation activity, 1480 // be sure to tag this tty output with the compile ID. 1481 if (xtty != NULL) { 1482 xtty->head("opto_assembly compile_id='%d'%s", compile_id(), 1483 is_osr_compilation() ? " compile_kind='osr'" : 1484 ""); 1485 } 1486 if (method() != NULL) { 1487 method()->print_oop(); 1488 print_codes(); 1489 } 1490 dump_asm(node_offsets, node_offset_limit); 1491 if (xtty != NULL) { 1492 xtty->tail("opto_assembly"); 1493 } 1494 } 1495 } 1496 #endif 1497 1498 } 1499 1500 void Compile::FillExceptionTables(uint cnt, uint *call_returns, uint *inct_starts, Label *blk_labels) { 1501 _inc_table.set_size(cnt); 1502 1503 uint inct_cnt = 0; 1504 for( uint i=0; i<_cfg->_num_blocks; i++ ) { 1505 Block *b = _cfg->_blocks[i]; 1506 Node *n = NULL; 1507 int j; 1508 1509 // Find the branch; ignore trailing NOPs. 1510 for( j = b->_nodes.size()-1; j>=0; j-- ) { 1511 n = b->_nodes[j]; 1512 if( !n->is_Mach() || n->as_Mach()->ideal_Opcode() != Op_Con ) 1513 break; 1514 } 1515 1516 // If we didn't find anything, continue 1517 if( j < 0 ) continue; 1518 1519 // Compute ExceptionHandlerTable subtable entry and add it 1520 // (skip empty blocks) 1521 if( n->is_Catch() ) { 1522 1523 // Get the offset of the return from the call 1524 uint call_return = call_returns[b->_pre_order]; 1525 #ifdef ASSERT 1526 assert( call_return > 0, "no call seen for this basic block" ); 1527 while( b->_nodes[--j]->Opcode() == Op_MachProj ) ; 1528 assert( b->_nodes[j]->is_Call(), "CatchProj must follow call" ); 1529 #endif 1530 // last instruction is a CatchNode, find it's CatchProjNodes 1531 int nof_succs = b->_num_succs; 1532 // allocate space 1533 GrowableArray<intptr_t> handler_bcis(nof_succs); 1534 GrowableArray<intptr_t> handler_pcos(nof_succs); 1535 // iterate through all successors 1536 for (int j = 0; j < nof_succs; j++) { 1537 Block* s = b->_succs[j]; 1538 bool found_p = false; 1539 for( uint k = 1; k < s->num_preds(); k++ ) { 1540 Node *pk = s->pred(k); 1541 if( pk->is_CatchProj() && pk->in(0) == n ) { 1542 const CatchProjNode* p = pk->as_CatchProj(); 1543 found_p = true; 1544 // add the corresponding handler bci & pco information 1545 if( p->_con != CatchProjNode::fall_through_index ) { 1546 // p leads to an exception handler (and is not fall through) 1547 assert(s == _cfg->_blocks[s->_pre_order],"bad numbering"); 1548 // no duplicates, please 1549 if( !handler_bcis.contains(p->handler_bci()) ) { 1550 uint block_num = s->non_connector()->_pre_order; 1551 handler_bcis.append(p->handler_bci()); 1552 handler_pcos.append(blk_labels[block_num].loc_pos()); 1553 } 1554 } 1555 } 1556 } 1557 assert(found_p, "no matching predecessor found"); 1558 // Note: Due to empty block removal, one block may have 1559 // several CatchProj inputs, from the same Catch. 1560 } 1561 1562 // Set the offset of the return from the call 1563 _handler_table.add_subtable(call_return, &handler_bcis, NULL, &handler_pcos); 1564 continue; 1565 } 1566 1567 // Handle implicit null exception table updates 1568 if( n->is_MachNullCheck() ) { 1569 uint block_num = b->non_connector_successor(0)->_pre_order; 1570 _inc_table.append( inct_starts[inct_cnt++], blk_labels[block_num].loc_pos() ); 1571 continue; 1572 } 1573 } // End of for all blocks fill in exception table entries 1574 } 1575 1576 // Static Variables 1577 #ifndef PRODUCT 1578 uint Scheduling::_total_nop_size = 0; 1579 uint Scheduling::_total_method_size = 0; 1580 uint Scheduling::_total_branches = 0; 1581 uint Scheduling::_total_unconditional_delays = 0; 1582 uint Scheduling::_total_instructions_per_bundle[Pipeline::_max_instrs_per_cycle+1]; 1583 #endif 1584 1585 // Initializer for class Scheduling 1586 1587 Scheduling::Scheduling(Arena *arena, Compile &compile) 1588 : _arena(arena), 1589 _cfg(compile.cfg()), 1590 _bbs(compile.cfg()->_bbs), 1591 _regalloc(compile.regalloc()), 1592 _reg_node(arena), 1593 _bundle_instr_count(0), 1594 _bundle_cycle_number(0), 1595 _scheduled(arena), 1596 _available(arena), 1597 _next_node(NULL), 1598 _bundle_use(0, 0, resource_count, &_bundle_use_elements[0]), 1599 _pinch_free_list(arena) 1600 #ifndef PRODUCT 1601 , _branches(0) 1602 , _unconditional_delays(0) 1603 #endif 1604 { 1605 // Create a MachNopNode 1606 _nop = new (&compile) MachNopNode(); 1607 1608 // Now that the nops are in the array, save the count 1609 // (but allow entries for the nops) 1610 _node_bundling_limit = compile.unique(); 1611 uint node_max = _regalloc->node_regs_max_index(); 1612 1613 compile.set_node_bundling_limit(_node_bundling_limit); 1614 1615 // This one is persistent within the Compile class 1616 _node_bundling_base = NEW_ARENA_ARRAY(compile.comp_arena(), Bundle, node_max); 1617 1618 // Allocate space for fixed-size arrays 1619 _node_latency = NEW_ARENA_ARRAY(arena, unsigned short, node_max); 1620 _uses = NEW_ARENA_ARRAY(arena, short, node_max); 1621 _current_latency = NEW_ARENA_ARRAY(arena, unsigned short, node_max); 1622 1623 // Clear the arrays 1624 memset(_node_bundling_base, 0, node_max * sizeof(Bundle)); 1625 memset(_node_latency, 0, node_max * sizeof(unsigned short)); 1626 memset(_uses, 0, node_max * sizeof(short)); 1627 memset(_current_latency, 0, node_max * sizeof(unsigned short)); 1628 1629 // Clear the bundling information 1630 memcpy(_bundle_use_elements, 1631 Pipeline_Use::elaborated_elements, 1632 sizeof(Pipeline_Use::elaborated_elements)); 1633 1634 // Get the last node 1635 Block *bb = _cfg->_blocks[_cfg->_blocks.size()-1]; 1636 1637 _next_node = bb->_nodes[bb->_nodes.size()-1]; 1638 } 1639 1640 #ifndef PRODUCT 1641 // Scheduling destructor 1642 Scheduling::~Scheduling() { 1643 _total_branches += _branches; 1644 _total_unconditional_delays += _unconditional_delays; 1645 } 1646 #endif 1647 1648 // Step ahead "i" cycles 1649 void Scheduling::step(uint i) { 1650 1651 Bundle *bundle = node_bundling(_next_node); 1652 bundle->set_starts_bundle(); 1653 1654 // Update the bundle record, but leave the flags information alone 1655 if (_bundle_instr_count > 0) { 1656 bundle->set_instr_count(_bundle_instr_count); 1657 bundle->set_resources_used(_bundle_use.resourcesUsed()); 1658 } 1659 1660 // Update the state information 1661 _bundle_instr_count = 0; 1662 _bundle_cycle_number += i; 1663 _bundle_use.step(i); 1664 } 1665 1666 void Scheduling::step_and_clear() { 1667 Bundle *bundle = node_bundling(_next_node); 1668 bundle->set_starts_bundle(); 1669 1670 // Update the bundle record 1671 if (_bundle_instr_count > 0) { 1672 bundle->set_instr_count(_bundle_instr_count); 1673 bundle->set_resources_used(_bundle_use.resourcesUsed()); 1674 1675 _bundle_cycle_number += 1; 1676 } 1677 1678 // Clear the bundling information 1679 _bundle_instr_count = 0; 1680 _bundle_use.reset(); 1681 1682 memcpy(_bundle_use_elements, 1683 Pipeline_Use::elaborated_elements, 1684 sizeof(Pipeline_Use::elaborated_elements)); 1685 } 1686 1687 //------------------------------ScheduleAndBundle------------------------------ 1688 // Perform instruction scheduling and bundling over the sequence of 1689 // instructions in backwards order. 1690 void Compile::ScheduleAndBundle() { 1691 1692 // Don't optimize this if it isn't a method 1693 if (!_method) 1694 return; 1695 1696 // Don't optimize this if scheduling is disabled 1697 if (!do_scheduling()) 1698 return; 1699 1700 NOT_PRODUCT( TracePhase t2("isched", &_t_instrSched, TimeCompiler); ) 1701 1702 // Create a data structure for all the scheduling information 1703 Scheduling scheduling(Thread::current()->resource_area(), *this); 1704 1705 // Walk backwards over each basic block, computing the needed alignment 1706 // Walk over all the basic blocks 1707 scheduling.DoScheduling(); 1708 } 1709 1710 //------------------------------ComputeLocalLatenciesForward------------------- 1711 // Compute the latency of all the instructions. This is fairly simple, 1712 // because we already have a legal ordering. Walk over the instructions 1713 // from first to last, and compute the latency of the instruction based 1714 // on the latency of the preceding instruction(s). 1715 void Scheduling::ComputeLocalLatenciesForward(const Block *bb) { 1716 #ifndef PRODUCT 1717 if (_cfg->C->trace_opto_output()) 1718 tty->print("# -> ComputeLocalLatenciesForward\n"); 1719 #endif 1720 1721 // Walk over all the schedulable instructions 1722 for( uint j=_bb_start; j < _bb_end; j++ ) { 1723 1724 // This is a kludge, forcing all latency calculations to start at 1. 1725 // Used to allow latency 0 to force an instruction to the beginning 1726 // of the bb 1727 uint latency = 1; 1728 Node *use = bb->_nodes[j]; 1729 uint nlen = use->len(); 1730 1731 // Walk over all the inputs 1732 for ( uint k=0; k < nlen; k++ ) { 1733 Node *def = use->in(k); 1734 if (!def) 1735 continue; 1736 1737 uint l = _node_latency[def->_idx] + use->latency(k); 1738 if (latency < l) 1739 latency = l; 1740 } 1741 1742 _node_latency[use->_idx] = latency; 1743 1744 #ifndef PRODUCT 1745 if (_cfg->C->trace_opto_output()) { 1746 tty->print("# latency %4d: ", latency); 1747 use->dump(); 1748 } 1749 #endif 1750 } 1751 1752 #ifndef PRODUCT 1753 if (_cfg->C->trace_opto_output()) 1754 tty->print("# <- ComputeLocalLatenciesForward\n"); 1755 #endif 1756 1757 } // end ComputeLocalLatenciesForward 1758 1759 // See if this node fits into the present instruction bundle 1760 bool Scheduling::NodeFitsInBundle(Node *n) { 1761 uint n_idx = n->_idx; 1762 1763 // If this is the unconditional delay instruction, then it fits 1764 if (n == _unconditional_delay_slot) { 1765 #ifndef PRODUCT 1766 if (_cfg->C->trace_opto_output()) 1767 tty->print("# NodeFitsInBundle [%4d]: TRUE; is in unconditional delay slot\n", n->_idx); 1768 #endif 1769 return (true); 1770 } 1771 1772 // If the node cannot be scheduled this cycle, skip it 1773 if (_current_latency[n_idx] > _bundle_cycle_number) { 1774 #ifndef PRODUCT 1775 if (_cfg->C->trace_opto_output()) 1776 tty->print("# NodeFitsInBundle [%4d]: FALSE; latency %4d > %d\n", 1777 n->_idx, _current_latency[n_idx], _bundle_cycle_number); 1778 #endif 1779 return (false); 1780 } 1781 1782 const Pipeline *node_pipeline = n->pipeline(); 1783 1784 uint instruction_count = node_pipeline->instructionCount(); 1785 if (node_pipeline->mayHaveNoCode() && n->size(_regalloc) == 0) 1786 instruction_count = 0; 1787 else if (node_pipeline->hasBranchDelay() && !_unconditional_delay_slot) 1788 instruction_count++; 1789 1790 if (_bundle_instr_count + instruction_count > Pipeline::_max_instrs_per_cycle) { 1791 #ifndef PRODUCT 1792 if (_cfg->C->trace_opto_output()) 1793 tty->print("# NodeFitsInBundle [%4d]: FALSE; too many instructions: %d > %d\n", 1794 n->_idx, _bundle_instr_count + instruction_count, Pipeline::_max_instrs_per_cycle); 1795 #endif 1796 return (false); 1797 } 1798 1799 // Don't allow non-machine nodes to be handled this way 1800 if (!n->is_Mach() && instruction_count == 0) 1801 return (false); 1802 1803 // See if there is any overlap 1804 uint delay = _bundle_use.full_latency(0, node_pipeline->resourceUse()); 1805 1806 if (delay > 0) { 1807 #ifndef PRODUCT 1808 if (_cfg->C->trace_opto_output()) 1809 tty->print("# NodeFitsInBundle [%4d]: FALSE; functional units overlap\n", n_idx); 1810 #endif 1811 return false; 1812 } 1813 1814 #ifndef PRODUCT 1815 if (_cfg->C->trace_opto_output()) 1816 tty->print("# NodeFitsInBundle [%4d]: TRUE\n", n_idx); 1817 #endif 1818 1819 return true; 1820 } 1821 1822 Node * Scheduling::ChooseNodeToBundle() { 1823 uint siz = _available.size(); 1824 1825 if (siz == 0) { 1826 1827 #ifndef PRODUCT 1828 if (_cfg->C->trace_opto_output()) 1829 tty->print("# ChooseNodeToBundle: NULL\n"); 1830 #endif 1831 return (NULL); 1832 } 1833 1834 // Fast path, if only 1 instruction in the bundle 1835 if (siz == 1) { 1836 #ifndef PRODUCT 1837 if (_cfg->C->trace_opto_output()) { 1838 tty->print("# ChooseNodeToBundle (only 1): "); 1839 _available[0]->dump(); 1840 } 1841 #endif 1842 return (_available[0]); 1843 } 1844 1845 // Don't bother, if the bundle is already full 1846 if (_bundle_instr_count < Pipeline::_max_instrs_per_cycle) { 1847 for ( uint i = 0; i < siz; i++ ) { 1848 Node *n = _available[i]; 1849 1850 // Skip projections, we'll handle them another way 1851 if (n->is_Proj()) 1852 continue; 1853 1854 // This presupposed that instructions are inserted into the 1855 // available list in a legality order; i.e. instructions that 1856 // must be inserted first are at the head of the list 1857 if (NodeFitsInBundle(n)) { 1858 #ifndef PRODUCT 1859 if (_cfg->C->trace_opto_output()) { 1860 tty->print("# ChooseNodeToBundle: "); 1861 n->dump(); 1862 } 1863 #endif 1864 return (n); 1865 } 1866 } 1867 } 1868 1869 // Nothing fits in this bundle, choose the highest priority 1870 #ifndef PRODUCT 1871 if (_cfg->C->trace_opto_output()) { 1872 tty->print("# ChooseNodeToBundle: "); 1873 _available[0]->dump(); 1874 } 1875 #endif 1876 1877 return _available[0]; 1878 } 1879 1880 //------------------------------AddNodeToAvailableList------------------------- 1881 void Scheduling::AddNodeToAvailableList(Node *n) { 1882 assert( !n->is_Proj(), "projections never directly made available" ); 1883 #ifndef PRODUCT 1884 if (_cfg->C->trace_opto_output()) { 1885 tty->print("# AddNodeToAvailableList: "); 1886 n->dump(); 1887 } 1888 #endif 1889 1890 int latency = _current_latency[n->_idx]; 1891 1892 // Insert in latency order (insertion sort) 1893 uint i; 1894 for ( i=0; i < _available.size(); i++ ) 1895 if (_current_latency[_available[i]->_idx] > latency) 1896 break; 1897 1898 // Special Check for compares following branches 1899 if( n->is_Mach() && _scheduled.size() > 0 ) { 1900 int op = n->as_Mach()->ideal_Opcode(); 1901 Node *last = _scheduled[0]; 1902 if( last->is_MachIf() && last->in(1) == n && 1903 ( op == Op_CmpI || 1904 op == Op_CmpU || 1905 op == Op_CmpP || 1906 op == Op_CmpF || 1907 op == Op_CmpD || 1908 op == Op_CmpL ) ) { 1909 1910 // Recalculate position, moving to front of same latency 1911 for ( i=0 ; i < _available.size(); i++ ) 1912 if (_current_latency[_available[i]->_idx] >= latency) 1913 break; 1914 } 1915 } 1916 1917 // Insert the node in the available list 1918 _available.insert(i, n); 1919 1920 #ifndef PRODUCT 1921 if (_cfg->C->trace_opto_output()) 1922 dump_available(); 1923 #endif 1924 } 1925 1926 //------------------------------DecrementUseCounts----------------------------- 1927 void Scheduling::DecrementUseCounts(Node *n, const Block *bb) { 1928 for ( uint i=0; i < n->len(); i++ ) { 1929 Node *def = n->in(i); 1930 if (!def) continue; 1931 if( def->is_Proj() ) // If this is a machine projection, then 1932 def = def->in(0); // propagate usage thru to the base instruction 1933 1934 if( _bbs[def->_idx] != bb ) // Ignore if not block-local 1935 continue; 1936 1937 // Compute the latency 1938 uint l = _bundle_cycle_number + n->latency(i); 1939 if (_current_latency[def->_idx] < l) 1940 _current_latency[def->_idx] = l; 1941 1942 // If this does not have uses then schedule it 1943 if ((--_uses[def->_idx]) == 0) 1944 AddNodeToAvailableList(def); 1945 } 1946 } 1947 1948 //------------------------------AddNodeToBundle-------------------------------- 1949 void Scheduling::AddNodeToBundle(Node *n, const Block *bb) { 1950 #ifndef PRODUCT 1951 if (_cfg->C->trace_opto_output()) { 1952 tty->print("# AddNodeToBundle: "); 1953 n->dump(); 1954 } 1955 #endif 1956 1957 // Remove this from the available list 1958 uint i; 1959 for (i = 0; i < _available.size(); i++) 1960 if (_available[i] == n) 1961 break; 1962 assert(i < _available.size(), "entry in _available list not found"); 1963 _available.remove(i); 1964 1965 // See if this fits in the current bundle 1966 const Pipeline *node_pipeline = n->pipeline(); 1967 const Pipeline_Use& node_usage = node_pipeline->resourceUse(); 1968 1969 // Check for instructions to be placed in the delay slot. We 1970 // do this before we actually schedule the current instruction, 1971 // because the delay slot follows the current instruction. 1972 if (Pipeline::_branch_has_delay_slot && 1973 node_pipeline->hasBranchDelay() && 1974 !_unconditional_delay_slot) { 1975 1976 uint siz = _available.size(); 1977 1978 // Conditional branches can support an instruction that 1979 // is unconditionally executed and not dependent by the 1980 // branch, OR a conditionally executed instruction if 1981 // the branch is taken. In practice, this means that 1982 // the first instruction at the branch target is 1983 // copied to the delay slot, and the branch goes to 1984 // the instruction after that at the branch target 1985 if ( n->is_Mach() && n->is_Branch() ) { 1986 1987 assert( !n->is_MachNullCheck(), "should not look for delay slot for Null Check" ); 1988 assert( !n->is_Catch(), "should not look for delay slot for Catch" ); 1989 1990 #ifndef PRODUCT 1991 _branches++; 1992 #endif 1993 1994 // At least 1 instruction is on the available list 1995 // that is not dependent on the branch 1996 for (uint i = 0; i < siz; i++) { 1997 Node *d = _available[i]; 1998 const Pipeline *avail_pipeline = d->pipeline(); 1999 2000 // Don't allow safepoints in the branch shadow, that will 2001 // cause a number of difficulties 2002 if ( avail_pipeline->instructionCount() == 1 && 2003 !avail_pipeline->hasMultipleBundles() && 2004 !avail_pipeline->hasBranchDelay() && 2005 Pipeline::instr_has_unit_size() && 2006 d->size(_regalloc) == Pipeline::instr_unit_size() && 2007 NodeFitsInBundle(d) && 2008 !node_bundling(d)->used_in_delay()) { 2009 2010 if (d->is_Mach() && !d->is_MachSafePoint()) { 2011 // A node that fits in the delay slot was found, so we need to 2012 // set the appropriate bits in the bundle pipeline information so 2013 // that it correctly indicates resource usage. Later, when we 2014 // attempt to add this instruction to the bundle, we will skip 2015 // setting the resource usage. 2016 _unconditional_delay_slot = d; 2017 node_bundling(n)->set_use_unconditional_delay(); 2018 node_bundling(d)->set_used_in_unconditional_delay(); 2019 _bundle_use.add_usage(avail_pipeline->resourceUse()); 2020 _current_latency[d->_idx] = _bundle_cycle_number; 2021 _next_node = d; 2022 ++_bundle_instr_count; 2023 #ifndef PRODUCT 2024 _unconditional_delays++; 2025 #endif 2026 break; 2027 } 2028 } 2029 } 2030 } 2031 2032 // No delay slot, add a nop to the usage 2033 if (!_unconditional_delay_slot) { 2034 // See if adding an instruction in the delay slot will overflow 2035 // the bundle. 2036 if (!NodeFitsInBundle(_nop)) { 2037 #ifndef PRODUCT 2038 if (_cfg->C->trace_opto_output()) 2039 tty->print("# *** STEP(1 instruction for delay slot) ***\n"); 2040 #endif 2041 step(1); 2042 } 2043 2044 _bundle_use.add_usage(_nop->pipeline()->resourceUse()); 2045 _next_node = _nop; 2046 ++_bundle_instr_count; 2047 } 2048 2049 // See if the instruction in the delay slot requires a 2050 // step of the bundles 2051 if (!NodeFitsInBundle(n)) { 2052 #ifndef PRODUCT 2053 if (_cfg->C->trace_opto_output()) 2054 tty->print("# *** STEP(branch won't fit) ***\n"); 2055 #endif 2056 // Update the state information 2057 _bundle_instr_count = 0; 2058 _bundle_cycle_number += 1; 2059 _bundle_use.step(1); 2060 } 2061 } 2062 2063 // Get the number of instructions 2064 uint instruction_count = node_pipeline->instructionCount(); 2065 if (node_pipeline->mayHaveNoCode() && n->size(_regalloc) == 0) 2066 instruction_count = 0; 2067 2068 // Compute the latency information 2069 uint delay = 0; 2070 2071 if (instruction_count > 0 || !node_pipeline->mayHaveNoCode()) { 2072 int relative_latency = _current_latency[n->_idx] - _bundle_cycle_number; 2073 if (relative_latency < 0) 2074 relative_latency = 0; 2075 2076 delay = _bundle_use.full_latency(relative_latency, node_usage); 2077 2078 // Does not fit in this bundle, start a new one 2079 if (delay > 0) { 2080 step(delay); 2081 2082 #ifndef PRODUCT 2083 if (_cfg->C->trace_opto_output()) 2084 tty->print("# *** STEP(%d) ***\n", delay); 2085 #endif 2086 } 2087 } 2088 2089 // If this was placed in the delay slot, ignore it 2090 if (n != _unconditional_delay_slot) { 2091 2092 if (delay == 0) { 2093 if (node_pipeline->hasMultipleBundles()) { 2094 #ifndef PRODUCT 2095 if (_cfg->C->trace_opto_output()) 2096 tty->print("# *** STEP(multiple instructions) ***\n"); 2097 #endif 2098 step(1); 2099 } 2100 2101 else if (instruction_count + _bundle_instr_count > Pipeline::_max_instrs_per_cycle) { 2102 #ifndef PRODUCT 2103 if (_cfg->C->trace_opto_output()) 2104 tty->print("# *** STEP(%d >= %d instructions) ***\n", 2105 instruction_count + _bundle_instr_count, 2106 Pipeline::_max_instrs_per_cycle); 2107 #endif 2108 step(1); 2109 } 2110 } 2111 2112 if (node_pipeline->hasBranchDelay() && !_unconditional_delay_slot) 2113 _bundle_instr_count++; 2114 2115 // Set the node's latency 2116 _current_latency[n->_idx] = _bundle_cycle_number; 2117 2118 // Now merge the functional unit information 2119 if (instruction_count > 0 || !node_pipeline->mayHaveNoCode()) 2120 _bundle_use.add_usage(node_usage); 2121 2122 // Increment the number of instructions in this bundle 2123 _bundle_instr_count += instruction_count; 2124 2125 // Remember this node for later 2126 if (n->is_Mach()) 2127 _next_node = n; 2128 } 2129 2130 // It's possible to have a BoxLock in the graph and in the _bbs mapping but 2131 // not in the bb->_nodes array. This happens for debug-info-only BoxLocks. 2132 // 'Schedule' them (basically ignore in the schedule) but do not insert them 2133 // into the block. All other scheduled nodes get put in the schedule here. 2134 int op = n->Opcode(); 2135 if( (op == Op_Node && n->req() == 0) || // anti-dependence node OR 2136 (op != Op_Node && // Not an unused antidepedence node and 2137 // not an unallocated boxlock 2138 (OptoReg::is_valid(_regalloc->get_reg_first(n)) || op != Op_BoxLock)) ) { 2139 2140 // Push any trailing projections 2141 if( bb->_nodes[bb->_nodes.size()-1] != n ) { 2142 for (DUIterator_Fast imax, i = n->fast_outs(imax); i < imax; i++) { 2143 Node *foi = n->fast_out(i); 2144 if( foi->is_Proj() ) 2145 _scheduled.push(foi); 2146 } 2147 } 2148 2149 // Put the instruction in the schedule list 2150 _scheduled.push(n); 2151 } 2152 2153 #ifndef PRODUCT 2154 if (_cfg->C->trace_opto_output()) 2155 dump_available(); 2156 #endif 2157 2158 // Walk all the definitions, decrementing use counts, and 2159 // if a definition has a 0 use count, place it in the available list. 2160 DecrementUseCounts(n,bb); 2161 } 2162 2163 //------------------------------ComputeUseCount-------------------------------- 2164 // This method sets the use count within a basic block. We will ignore all 2165 // uses outside the current basic block. As we are doing a backwards walk, 2166 // any node we reach that has a use count of 0 may be scheduled. This also 2167 // avoids the problem of cyclic references from phi nodes, as long as phi 2168 // nodes are at the front of the basic block. This method also initializes 2169 // the available list to the set of instructions that have no uses within this 2170 // basic block. 2171 void Scheduling::ComputeUseCount(const Block *bb) { 2172 #ifndef PRODUCT 2173 if (_cfg->C->trace_opto_output()) 2174 tty->print("# -> ComputeUseCount\n"); 2175 #endif 2176 2177 // Clear the list of available and scheduled instructions, just in case 2178 _available.clear(); 2179 _scheduled.clear(); 2180 2181 // No delay slot specified 2182 _unconditional_delay_slot = NULL; 2183 2184 #ifdef ASSERT 2185 for( uint i=0; i < bb->_nodes.size(); i++ ) 2186 assert( _uses[bb->_nodes[i]->_idx] == 0, "_use array not clean" ); 2187 #endif 2188 2189 // Force the _uses count to never go to zero for unscheduable pieces 2190 // of the block 2191 for( uint k = 0; k < _bb_start; k++ ) 2192 _uses[bb->_nodes[k]->_idx] = 1; 2193 for( uint l = _bb_end; l < bb->_nodes.size(); l++ ) 2194 _uses[bb->_nodes[l]->_idx] = 1; 2195 2196 // Iterate backwards over the instructions in the block. Don't count the 2197 // branch projections at end or the block header instructions. 2198 for( uint j = _bb_end-1; j >= _bb_start; j-- ) { 2199 Node *n = bb->_nodes[j]; 2200 if( n->is_Proj() ) continue; // Projections handled another way 2201 2202 // Account for all uses 2203 for ( uint k = 0; k < n->len(); k++ ) { 2204 Node *inp = n->in(k); 2205 if (!inp) continue; 2206 assert(inp != n, "no cycles allowed" ); 2207 if( _bbs[inp->_idx] == bb ) { // Block-local use? 2208 if( inp->is_Proj() ) // Skip through Proj's 2209 inp = inp->in(0); 2210 ++_uses[inp->_idx]; // Count 1 block-local use 2211 } 2212 } 2213 2214 // If this instruction has a 0 use count, then it is available 2215 if (!_uses[n->_idx]) { 2216 _current_latency[n->_idx] = _bundle_cycle_number; 2217 AddNodeToAvailableList(n); 2218 } 2219 2220 #ifndef PRODUCT 2221 if (_cfg->C->trace_opto_output()) { 2222 tty->print("# uses: %3d: ", _uses[n->_idx]); 2223 n->dump(); 2224 } 2225 #endif 2226 } 2227 2228 #ifndef PRODUCT 2229 if (_cfg->C->trace_opto_output()) 2230 tty->print("# <- ComputeUseCount\n"); 2231 #endif 2232 } 2233 2234 // This routine performs scheduling on each basic block in reverse order, 2235 // using instruction latencies and taking into account function unit 2236 // availability. 2237 void Scheduling::DoScheduling() { 2238 #ifndef PRODUCT 2239 if (_cfg->C->trace_opto_output()) 2240 tty->print("# -> DoScheduling\n"); 2241 #endif 2242 2243 Block *succ_bb = NULL; 2244 Block *bb; 2245 2246 // Walk over all the basic blocks in reverse order 2247 for( int i=_cfg->_num_blocks-1; i >= 0; succ_bb = bb, i-- ) { 2248 bb = _cfg->_blocks[i]; 2249 2250 #ifndef PRODUCT 2251 if (_cfg->C->trace_opto_output()) { 2252 tty->print("# Schedule BB#%03d (initial)\n", i); 2253 for (uint j = 0; j < bb->_nodes.size(); j++) 2254 bb->_nodes[j]->dump(); 2255 } 2256 #endif 2257 2258 // On the head node, skip processing 2259 if( bb == _cfg->_broot ) 2260 continue; 2261 2262 // Skip empty, connector blocks 2263 if (bb->is_connector()) 2264 continue; 2265 2266 // If the following block is not the sole successor of 2267 // this one, then reset the pipeline information 2268 if (bb->_num_succs != 1 || bb->non_connector_successor(0) != succ_bb) { 2269 #ifndef PRODUCT 2270 if (_cfg->C->trace_opto_output()) { 2271 tty->print("*** bundle start of next BB, node %d, for %d instructions\n", 2272 _next_node->_idx, _bundle_instr_count); 2273 } 2274 #endif 2275 step_and_clear(); 2276 } 2277 2278 // Leave untouched the starting instruction, any Phis, a CreateEx node 2279 // or Top. bb->_nodes[_bb_start] is the first schedulable instruction. 2280 _bb_end = bb->_nodes.size()-1; 2281 for( _bb_start=1; _bb_start <= _bb_end; _bb_start++ ) { 2282 Node *n = bb->_nodes[_bb_start]; 2283 // Things not matched, like Phinodes and ProjNodes don't get scheduled. 2284 // Also, MachIdealNodes do not get scheduled 2285 if( !n->is_Mach() ) continue; // Skip non-machine nodes 2286 MachNode *mach = n->as_Mach(); 2287 int iop = mach->ideal_Opcode(); 2288 if( iop == Op_CreateEx ) continue; // CreateEx is pinned 2289 if( iop == Op_Con ) continue; // Do not schedule Top 2290 if( iop == Op_Node && // Do not schedule PhiNodes, ProjNodes 2291 mach->pipeline() == MachNode::pipeline_class() && 2292 !n->is_SpillCopy() ) // Breakpoints, Prolog, etc 2293 continue; 2294 break; // Funny loop structure to be sure... 2295 } 2296 // Compute last "interesting" instruction in block - last instruction we 2297 // might schedule. _bb_end points just after last schedulable inst. We 2298 // normally schedule conditional branches (despite them being forced last 2299 // in the block), because they have delay slots we can fill. Calls all 2300 // have their delay slots filled in the template expansions, so we don't 2301 // bother scheduling them. 2302 Node *last = bb->_nodes[_bb_end]; 2303 if( last->is_Catch() || 2304 // Exclude unreachable path case when Halt node is in a separate block. 2305 (_bb_end > 1 && last->is_Mach() && last->as_Mach()->ideal_Opcode() == Op_Halt) ) { 2306 // There must be a prior call. Skip it. 2307 while( !bb->_nodes[--_bb_end]->is_Call() ) { 2308 assert( bb->_nodes[_bb_end]->is_Proj(), "skipping projections after expected call" ); 2309 } 2310 } else if( last->is_MachNullCheck() ) { 2311 // Backup so the last null-checked memory instruction is 2312 // outside the schedulable range. Skip over the nullcheck, 2313 // projection, and the memory nodes. 2314 Node *mem = last->in(1); 2315 do { 2316 _bb_end--; 2317 } while (mem != bb->_nodes[_bb_end]); 2318 } else { 2319 // Set _bb_end to point after last schedulable inst. 2320 _bb_end++; 2321 } 2322 2323 assert( _bb_start <= _bb_end, "inverted block ends" ); 2324 2325 // Compute the register antidependencies for the basic block 2326 ComputeRegisterAntidependencies(bb); 2327 if (_cfg->C->failing()) return; // too many D-U pinch points 2328 2329 // Compute intra-bb latencies for the nodes 2330 ComputeLocalLatenciesForward(bb); 2331 2332 // Compute the usage within the block, and set the list of all nodes 2333 // in the block that have no uses within the block. 2334 ComputeUseCount(bb); 2335 2336 // Schedule the remaining instructions in the block 2337 while ( _available.size() > 0 ) { 2338 Node *n = ChooseNodeToBundle(); 2339 AddNodeToBundle(n,bb); 2340 } 2341 2342 assert( _scheduled.size() == _bb_end - _bb_start, "wrong number of instructions" ); 2343 #ifdef ASSERT 2344 for( uint l = _bb_start; l < _bb_end; l++ ) { 2345 Node *n = bb->_nodes[l]; 2346 uint m; 2347 for( m = 0; m < _bb_end-_bb_start; m++ ) 2348 if( _scheduled[m] == n ) 2349 break; 2350 assert( m < _bb_end-_bb_start, "instruction missing in schedule" ); 2351 } 2352 #endif 2353 2354 // Now copy the instructions (in reverse order) back to the block 2355 for ( uint k = _bb_start; k < _bb_end; k++ ) 2356 bb->_nodes.map(k, _scheduled[_bb_end-k-1]); 2357 2358 #ifndef PRODUCT 2359 if (_cfg->C->trace_opto_output()) { 2360 tty->print("# Schedule BB#%03d (final)\n", i); 2361 uint current = 0; 2362 for (uint j = 0; j < bb->_nodes.size(); j++) { 2363 Node *n = bb->_nodes[j]; 2364 if( valid_bundle_info(n) ) { 2365 Bundle *bundle = node_bundling(n); 2366 if (bundle->instr_count() > 0 || bundle->flags() > 0) { 2367 tty->print("*** Bundle: "); 2368 bundle->dump(); 2369 } 2370 n->dump(); 2371 } 2372 } 2373 } 2374 #endif 2375 #ifdef ASSERT 2376 verify_good_schedule(bb,"after block local scheduling"); 2377 #endif 2378 } 2379 2380 #ifndef PRODUCT 2381 if (_cfg->C->trace_opto_output()) 2382 tty->print("# <- DoScheduling\n"); 2383 #endif 2384 2385 // Record final node-bundling array location 2386 _regalloc->C->set_node_bundling_base(_node_bundling_base); 2387 2388 } // end DoScheduling 2389 2390 //------------------------------verify_good_schedule--------------------------- 2391 // Verify that no live-range used in the block is killed in the block by a 2392 // wrong DEF. This doesn't verify live-ranges that span blocks. 2393 2394 // Check for edge existence. Used to avoid adding redundant precedence edges. 2395 static bool edge_from_to( Node *from, Node *to ) { 2396 for( uint i=0; i<from->len(); i++ ) 2397 if( from->in(i) == to ) 2398 return true; 2399 return false; 2400 } 2401 2402 #ifdef ASSERT 2403 //------------------------------verify_do_def---------------------------------- 2404 void Scheduling::verify_do_def( Node *n, OptoReg::Name def, const char *msg ) { 2405 // Check for bad kills 2406 if( OptoReg::is_valid(def) ) { // Ignore stores & control flow 2407 Node *prior_use = _reg_node[def]; 2408 if( prior_use && !edge_from_to(prior_use,n) ) { 2409 tty->print("%s = ",OptoReg::as_VMReg(def)->name()); 2410 n->dump(); 2411 tty->print_cr("..."); 2412 prior_use->dump(); 2413 assert(edge_from_to(prior_use,n),msg); 2414 } 2415 _reg_node.map(def,NULL); // Kill live USEs 2416 } 2417 } 2418 2419 //------------------------------verify_good_schedule--------------------------- 2420 void Scheduling::verify_good_schedule( Block *b, const char *msg ) { 2421 2422 // Zap to something reasonable for the verify code 2423 _reg_node.clear(); 2424 2425 // Walk over the block backwards. Check to make sure each DEF doesn't 2426 // kill a live value (other than the one it's supposed to). Add each 2427 // USE to the live set. 2428 for( uint i = b->_nodes.size()-1; i >= _bb_start; i-- ) { 2429 Node *n = b->_nodes[i]; 2430 int n_op = n->Opcode(); 2431 if( n_op == Op_MachProj && n->ideal_reg() == MachProjNode::fat_proj ) { 2432 // Fat-proj kills a slew of registers 2433 RegMask rm = n->out_RegMask();// Make local copy 2434 while( rm.is_NotEmpty() ) { 2435 OptoReg::Name kill = rm.find_first_elem(); 2436 rm.Remove(kill); 2437 verify_do_def( n, kill, msg ); 2438 } 2439 } else if( n_op != Op_Node ) { // Avoid brand new antidependence nodes 2440 // Get DEF'd registers the normal way 2441 verify_do_def( n, _regalloc->get_reg_first(n), msg ); 2442 verify_do_def( n, _regalloc->get_reg_second(n), msg ); 2443 } 2444 2445 // Now make all USEs live 2446 for( uint i=1; i<n->req(); i++ ) { 2447 Node *def = n->in(i); 2448 assert(def != 0, "input edge required"); 2449 OptoReg::Name reg_lo = _regalloc->get_reg_first(def); 2450 OptoReg::Name reg_hi = _regalloc->get_reg_second(def); 2451 if( OptoReg::is_valid(reg_lo) ) { 2452 assert(!_reg_node[reg_lo] || edge_from_to(_reg_node[reg_lo],def), msg); 2453 _reg_node.map(reg_lo,n); 2454 } 2455 if( OptoReg::is_valid(reg_hi) ) { 2456 assert(!_reg_node[reg_hi] || edge_from_to(_reg_node[reg_hi],def), msg); 2457 _reg_node.map(reg_hi,n); 2458 } 2459 } 2460 2461 } 2462 2463 // Zap to something reasonable for the Antidependence code 2464 _reg_node.clear(); 2465 } 2466 #endif 2467 2468 // Conditionally add precedence edges. Avoid putting edges on Projs. 2469 static void add_prec_edge_from_to( Node *from, Node *to ) { 2470 if( from->is_Proj() ) { // Put precedence edge on Proj's input 2471 assert( from->req() == 1 && (from->len() == 1 || from->in(1)==0), "no precedence edges on projections" ); 2472 from = from->in(0); 2473 } 2474 if( from != to && // No cycles (for things like LD L0,[L0+4] ) 2475 !edge_from_to( from, to ) ) // Avoid duplicate edge 2476 from->add_prec(to); 2477 } 2478 2479 //------------------------------anti_do_def------------------------------------ 2480 void Scheduling::anti_do_def( Block *b, Node *def, OptoReg::Name def_reg, int is_def ) { 2481 if( !OptoReg::is_valid(def_reg) ) // Ignore stores & control flow 2482 return; 2483 2484 Node *pinch = _reg_node[def_reg]; // Get pinch point 2485 if( !pinch || _bbs[pinch->_idx] != b || // No pinch-point yet? 2486 is_def ) { // Check for a true def (not a kill) 2487 _reg_node.map(def_reg,def); // Record def/kill as the optimistic pinch-point 2488 return; 2489 } 2490 2491 Node *kill = def; // Rename 'def' to more descriptive 'kill' 2492 debug_only( def = (Node*)0xdeadbeef; ) 2493 2494 // After some number of kills there _may_ be a later def 2495 Node *later_def = NULL; 2496 2497 // Finding a kill requires a real pinch-point. 2498 // Check for not already having a pinch-point. 2499 // Pinch points are Op_Node's. 2500 if( pinch->Opcode() != Op_Node ) { // Or later-def/kill as pinch-point? 2501 later_def = pinch; // Must be def/kill as optimistic pinch-point 2502 if ( _pinch_free_list.size() > 0) { 2503 pinch = _pinch_free_list.pop(); 2504 } else { 2505 pinch = new (_cfg->C, 1) Node(1); // Pinch point to-be 2506 } 2507 if (pinch->_idx >= _regalloc->node_regs_max_index()) { 2508 _cfg->C->record_method_not_compilable("too many D-U pinch points"); 2509 return; 2510 } 2511 _bbs.map(pinch->_idx,b); // Pretend it's valid in this block (lazy init) 2512 _reg_node.map(def_reg,pinch); // Record pinch-point 2513 //_regalloc->set_bad(pinch->_idx); // Already initialized this way. 2514 if( later_def->outcnt() == 0 || later_def->ideal_reg() == MachProjNode::fat_proj ) { // Distinguish def from kill 2515 pinch->init_req(0, _cfg->C->top()); // set not NULL for the next call 2516 add_prec_edge_from_to(later_def,pinch); // Add edge from kill to pinch 2517 later_def = NULL; // and no later def 2518 } 2519 pinch->set_req(0,later_def); // Hook later def so we can find it 2520 } else { // Else have valid pinch point 2521 if( pinch->in(0) ) // If there is a later-def 2522 later_def = pinch->in(0); // Get it 2523 } 2524 2525 // Add output-dependence edge from later def to kill 2526 if( later_def ) // If there is some original def 2527 add_prec_edge_from_to(later_def,kill); // Add edge from def to kill 2528 2529 // See if current kill is also a use, and so is forced to be the pinch-point. 2530 if( pinch->Opcode() == Op_Node ) { 2531 Node *uses = kill->is_Proj() ? kill->in(0) : kill; 2532 for( uint i=1; i<uses->req(); i++ ) { 2533 if( _regalloc->get_reg_first(uses->in(i)) == def_reg || 2534 _regalloc->get_reg_second(uses->in(i)) == def_reg ) { 2535 // Yes, found a use/kill pinch-point 2536 pinch->set_req(0,NULL); // 2537 pinch->replace_by(kill); // Move anti-dep edges up 2538 pinch = kill; 2539 _reg_node.map(def_reg,pinch); 2540 return; 2541 } 2542 } 2543 } 2544 2545 // Add edge from kill to pinch-point 2546 add_prec_edge_from_to(kill,pinch); 2547 } 2548 2549 //------------------------------anti_do_use------------------------------------ 2550 void Scheduling::anti_do_use( Block *b, Node *use, OptoReg::Name use_reg ) { 2551 if( !OptoReg::is_valid(use_reg) ) // Ignore stores & control flow 2552 return; 2553 Node *pinch = _reg_node[use_reg]; // Get pinch point 2554 // Check for no later def_reg/kill in block 2555 if( pinch && _bbs[pinch->_idx] == b && 2556 // Use has to be block-local as well 2557 _bbs[use->_idx] == b ) { 2558 if( pinch->Opcode() == Op_Node && // Real pinch-point (not optimistic?) 2559 pinch->req() == 1 ) { // pinch not yet in block? 2560 pinch->del_req(0); // yank pointer to later-def, also set flag 2561 // Insert the pinch-point in the block just after the last use 2562 b->_nodes.insert(b->find_node(use)+1,pinch); 2563 _bb_end++; // Increase size scheduled region in block 2564 } 2565 2566 add_prec_edge_from_to(pinch,use); 2567 } 2568 } 2569 2570 //------------------------------ComputeRegisterAntidependences----------------- 2571 // We insert antidependences between the reads and following write of 2572 // allocated registers to prevent illegal code motion. Hopefully, the 2573 // number of added references should be fairly small, especially as we 2574 // are only adding references within the current basic block. 2575 void Scheduling::ComputeRegisterAntidependencies(Block *b) { 2576 2577 #ifdef ASSERT 2578 verify_good_schedule(b,"before block local scheduling"); 2579 #endif 2580 2581 // A valid schedule, for each register independently, is an endless cycle 2582 // of: a def, then some uses (connected to the def by true dependencies), 2583 // then some kills (defs with no uses), finally the cycle repeats with a new 2584 // def. The uses are allowed to float relative to each other, as are the 2585 // kills. No use is allowed to slide past a kill (or def). This requires 2586 // antidependencies between all uses of a single def and all kills that 2587 // follow, up to the next def. More edges are redundant, because later defs 2588 // & kills are already serialized with true or antidependencies. To keep 2589 // the edge count down, we add a 'pinch point' node if there's more than 2590 // one use or more than one kill/def. 2591 2592 // We add dependencies in one bottom-up pass. 2593 2594 // For each instruction we handle it's DEFs/KILLs, then it's USEs. 2595 2596 // For each DEF/KILL, we check to see if there's a prior DEF/KILL for this 2597 // register. If not, we record the DEF/KILL in _reg_node, the 2598 // register-to-def mapping. If there is a prior DEF/KILL, we insert a 2599 // "pinch point", a new Node that's in the graph but not in the block. 2600 // We put edges from the prior and current DEF/KILLs to the pinch point. 2601 // We put the pinch point in _reg_node. If there's already a pinch point 2602 // we merely add an edge from the current DEF/KILL to the pinch point. 2603 2604 // After doing the DEF/KILLs, we handle USEs. For each used register, we 2605 // put an edge from the pinch point to the USE. 2606 2607 // To be expedient, the _reg_node array is pre-allocated for the whole 2608 // compilation. _reg_node is lazily initialized; it either contains a NULL, 2609 // or a valid def/kill/pinch-point, or a leftover node from some prior 2610 // block. Leftover node from some prior block is treated like a NULL (no 2611 // prior def, so no anti-dependence needed). Valid def is distinguished by 2612 // it being in the current block. 2613 bool fat_proj_seen = false; 2614 uint last_safept = _bb_end-1; 2615 Node* end_node = (_bb_end-1 >= _bb_start) ? b->_nodes[last_safept] : NULL; 2616 Node* last_safept_node = end_node; 2617 for( uint i = _bb_end-1; i >= _bb_start; i-- ) { 2618 Node *n = b->_nodes[i]; 2619 int is_def = n->outcnt(); // def if some uses prior to adding precedence edges 2620 if( n->Opcode() == Op_MachProj && n->ideal_reg() == MachProjNode::fat_proj ) { 2621 // Fat-proj kills a slew of registers 2622 // This can add edges to 'n' and obscure whether or not it was a def, 2623 // hence the is_def flag. 2624 fat_proj_seen = true; 2625 RegMask rm = n->out_RegMask();// Make local copy 2626 while( rm.is_NotEmpty() ) { 2627 OptoReg::Name kill = rm.find_first_elem(); 2628 rm.Remove(kill); 2629 anti_do_def( b, n, kill, is_def ); 2630 } 2631 } else { 2632 // Get DEF'd registers the normal way 2633 anti_do_def( b, n, _regalloc->get_reg_first(n), is_def ); 2634 anti_do_def( b, n, _regalloc->get_reg_second(n), is_def ); 2635 } 2636 2637 // Check each register used by this instruction for a following DEF/KILL 2638 // that must occur afterward and requires an anti-dependence edge. 2639 for( uint j=0; j<n->req(); j++ ) { 2640 Node *def = n->in(j); 2641 if( def ) { 2642 assert( def->Opcode() != Op_MachProj || def->ideal_reg() != MachProjNode::fat_proj, "" ); 2643 anti_do_use( b, n, _regalloc->get_reg_first(def) ); 2644 anti_do_use( b, n, _regalloc->get_reg_second(def) ); 2645 } 2646 } 2647 // Do not allow defs of new derived values to float above GC 2648 // points unless the base is definitely available at the GC point. 2649 2650 Node *m = b->_nodes[i]; 2651 2652 // Add precedence edge from following safepoint to use of derived pointer 2653 if( last_safept_node != end_node && 2654 m != last_safept_node) { 2655 for (uint k = 1; k < m->req(); k++) { 2656 const Type *t = m->in(k)->bottom_type(); 2657 if( t->isa_oop_ptr() && 2658 t->is_ptr()->offset() != 0 ) { 2659 last_safept_node->add_prec( m ); 2660 break; 2661 } 2662 } 2663 } 2664 2665 if( n->jvms() ) { // Precedence edge from derived to safept 2666 // Check if last_safept_node was moved by pinch-point insertion in anti_do_use() 2667 if( b->_nodes[last_safept] != last_safept_node ) { 2668 last_safept = b->find_node(last_safept_node); 2669 } 2670 for( uint j=last_safept; j > i; j-- ) { 2671 Node *mach = b->_nodes[j]; 2672 if( mach->is_Mach() && mach->as_Mach()->ideal_Opcode() == Op_AddP ) 2673 mach->add_prec( n ); 2674 } 2675 last_safept = i; 2676 last_safept_node = m; 2677 } 2678 } 2679 2680 if (fat_proj_seen) { 2681 // Garbage collect pinch nodes that were not consumed. 2682 // They are usually created by a fat kill MachProj for a call. 2683 garbage_collect_pinch_nodes(); 2684 } 2685 } 2686 2687 //------------------------------garbage_collect_pinch_nodes------------------------------- 2688 2689 // Garbage collect pinch nodes for reuse by other blocks. 2690 // 2691 // The block scheduler's insertion of anti-dependence 2692 // edges creates many pinch nodes when the block contains 2693 // 2 or more Calls. A pinch node is used to prevent a 2694 // combinatorial explosion of edges. If a set of kills for a 2695 // register is anti-dependent on a set of uses (or defs), rather 2696 // than adding an edge in the graph between each pair of kill 2697 // and use (or def), a pinch is inserted between them: 2698 // 2699 // use1 use2 use3 2700 // \ | / 2701 // \ | / 2702 // pinch 2703 // / | \ 2704 // / | \ 2705 // kill1 kill2 kill3 2706 // 2707 // One pinch node is created per register killed when 2708 // the second call is encountered during a backwards pass 2709 // over the block. Most of these pinch nodes are never 2710 // wired into the graph because the register is never 2711 // used or def'ed in the block. 2712 // 2713 void Scheduling::garbage_collect_pinch_nodes() { 2714 #ifndef PRODUCT 2715 if (_cfg->C->trace_opto_output()) tty->print("Reclaimed pinch nodes:"); 2716 #endif 2717 int trace_cnt = 0; 2718 for (uint k = 0; k < _reg_node.Size(); k++) { 2719 Node* pinch = _reg_node[k]; 2720 if (pinch != NULL && pinch->Opcode() == Op_Node && 2721 // no predecence input edges 2722 (pinch->req() == pinch->len() || pinch->in(pinch->req()) == NULL) ) { 2723 cleanup_pinch(pinch); 2724 _pinch_free_list.push(pinch); 2725 _reg_node.map(k, NULL); 2726 #ifndef PRODUCT 2727 if (_cfg->C->trace_opto_output()) { 2728 trace_cnt++; 2729 if (trace_cnt > 40) { 2730 tty->print("\n"); 2731 trace_cnt = 0; 2732 } 2733 tty->print(" %d", pinch->_idx); 2734 } 2735 #endif 2736 } 2737 } 2738 #ifndef PRODUCT 2739 if (_cfg->C->trace_opto_output()) tty->print("\n"); 2740 #endif 2741 } 2742 2743 // Clean up a pinch node for reuse. 2744 void Scheduling::cleanup_pinch( Node *pinch ) { 2745 assert (pinch && pinch->Opcode() == Op_Node && pinch->req() == 1, "just checking"); 2746 2747 for (DUIterator_Last imin, i = pinch->last_outs(imin); i >= imin; ) { 2748 Node* use = pinch->last_out(i); 2749 uint uses_found = 0; 2750 for (uint j = use->req(); j < use->len(); j++) { 2751 if (use->in(j) == pinch) { 2752 use->rm_prec(j); 2753 uses_found++; 2754 } 2755 } 2756 assert(uses_found > 0, "must be a precedence edge"); 2757 i -= uses_found; // we deleted 1 or more copies of this edge 2758 } 2759 // May have a later_def entry 2760 pinch->set_req(0, NULL); 2761 } 2762 2763 //------------------------------print_statistics------------------------------- 2764 #ifndef PRODUCT 2765 2766 void Scheduling::dump_available() const { 2767 tty->print("#Availist "); 2768 for (uint i = 0; i < _available.size(); i++) 2769 tty->print(" N%d/l%d", _available[i]->_idx,_current_latency[_available[i]->_idx]); 2770 tty->cr(); 2771 } 2772 2773 // Print Scheduling Statistics 2774 void Scheduling::print_statistics() { 2775 // Print the size added by nops for bundling 2776 tty->print("Nops added %d bytes to total of %d bytes", 2777 _total_nop_size, _total_method_size); 2778 if (_total_method_size > 0) 2779 tty->print(", for %.2f%%", 2780 ((double)_total_nop_size) / ((double) _total_method_size) * 100.0); 2781 tty->print("\n"); 2782 2783 // Print the number of branch shadows filled 2784 if (Pipeline::_branch_has_delay_slot) { 2785 tty->print("Of %d branches, %d had unconditional delay slots filled", 2786 _total_branches, _total_unconditional_delays); 2787 if (_total_branches > 0) 2788 tty->print(", for %.2f%%", 2789 ((double)_total_unconditional_delays) / ((double)_total_branches) * 100.0); 2790 tty->print("\n"); 2791 } 2792 2793 uint total_instructions = 0, total_bundles = 0; 2794 2795 for (uint i = 1; i <= Pipeline::_max_instrs_per_cycle; i++) { 2796 uint bundle_count = _total_instructions_per_bundle[i]; 2797 total_instructions += bundle_count * i; 2798 total_bundles += bundle_count; 2799 } 2800 2801 if (total_bundles > 0) 2802 tty->print("Average ILP (excluding nops) is %.2f\n", 2803 ((double)total_instructions) / ((double)total_bundles)); 2804 } 2805 #endif