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rev 1839 : 6961690: load oops from constant table on SPARC
Summary: oops should be loaded from the constant table of an nmethod instead of materializing them with a long code sequence.
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--- old/src/share/vm/opto/machnode.hpp
+++ new/src/share/vm/opto/machnode.hpp
1 1 /*
2 2 * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved.
3 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 4 *
5 5 * This code is free software; you can redistribute it and/or modify it
6 6 * under the terms of the GNU General Public License version 2 only, as
7 7 * published by the Free Software Foundation.
8 8 *
9 9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 12 * version 2 for more details (a copy is included in the LICENSE file that
13 13 * accompanied this code).
14 14 *
15 15 * You should have received a copy of the GNU General Public License version
16 16 * 2 along with this work; if not, write to the Free Software Foundation,
17 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 18 *
19 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 20 * or visit www.oracle.com if you need additional information or have any
21 21 * questions.
22 22 *
23 23 */
24 24
25 25 class BufferBlob;
26 26 class CodeBuffer;
27 27 class JVMState;
28 28 class MachCallDynamicJavaNode;
29 29 class MachCallJavaNode;
30 30 class MachCallLeafNode;
31 31 class MachCallNode;
32 32 class MachCallRuntimeNode;
33 33 class MachCallStaticJavaNode;
34 34 class MachEpilogNode;
35 35 class MachIfNode;
36 36 class MachNullCheckNode;
37 37 class MachOper;
38 38 class MachProjNode;
39 39 class MachPrologNode;
40 40 class MachReturnNode;
41 41 class MachSafePointNode;
42 42 class MachSpillCopyNode;
43 43 class Matcher;
44 44 class PhaseRegAlloc;
45 45 class RegMask;
46 46 class State;
47 47
48 48 //---------------------------MachOper------------------------------------------
49 49 class MachOper : public ResourceObj {
50 50 public:
51 51 // Allocate right next to the MachNodes in the same arena
52 52 void *operator new( size_t x, Compile* C ) { return C->node_arena()->Amalloc_D(x); }
53 53
54 54 // Opcode
55 55 virtual uint opcode() const = 0;
56 56
57 57 // Number of input edges.
58 58 // Generally at least 1
59 59 virtual uint num_edges() const { return 1; }
60 60 // Array of Register masks
61 61 virtual const RegMask *in_RegMask(int index) const;
62 62
63 63 // Methods to output the encoding of the operand
64 64
65 65 // Negate conditional branches. Error for non-branch Nodes
66 66 virtual void negate();
67 67
68 68 // Return the value requested
69 69 // result register lookup, corresponding to int_format
70 70 virtual int reg(PhaseRegAlloc *ra_, const Node *node) const;
71 71 // input register lookup, corresponding to ext_format
72 72 virtual int reg(PhaseRegAlloc *ra_, const Node *node, int idx) const;
73 73
74 74 // helpers for MacroAssembler generation from ADLC
75 75 Register as_Register(PhaseRegAlloc *ra_, const Node *node) const {
76 76 return ::as_Register(reg(ra_, node));
77 77 }
78 78 Register as_Register(PhaseRegAlloc *ra_, const Node *node, int idx) const {
79 79 return ::as_Register(reg(ra_, node, idx));
80 80 }
81 81 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node) const {
82 82 return ::as_FloatRegister(reg(ra_, node));
83 83 }
84 84 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
85 85 return ::as_FloatRegister(reg(ra_, node, idx));
86 86 }
87 87
88 88 #if defined(IA32) || defined(AMD64)
89 89 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node) const {
90 90 return ::as_XMMRegister(reg(ra_, node));
91 91 }
92 92 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
93 93 return ::as_XMMRegister(reg(ra_, node, idx));
94 94 }
95 95 #endif
96 96
97 97 virtual intptr_t constant() const;
98 98 virtual bool constant_is_oop() const;
99 99 virtual jdouble constantD() const;
100 100 virtual jfloat constantF() const;
101 101 virtual jlong constantL() const;
102 102 virtual TypeOopPtr *oop() const;
103 103 virtual int ccode() const;
104 104 // A zero, default, indicates this value is not needed.
105 105 // May need to lookup the base register, as done in int_ and ext_format
106 106 virtual int base (PhaseRegAlloc *ra_, const Node *node, int idx) const;
107 107 virtual int index(PhaseRegAlloc *ra_, const Node *node, int idx) const;
108 108 virtual int scale() const;
109 109 // Parameters needed to support MEMORY_INTERFACE access to stackSlot
110 110 virtual int disp (PhaseRegAlloc *ra_, const Node *node, int idx) const;
111 111 // Check for PC-Relative displacement
112 112 virtual bool disp_is_oop() const;
113 113 virtual int constant_disp() const; // usu. 0, may return Type::OffsetBot
114 114 virtual int base_position() const; // base edge position, or -1
115 115 virtual int index_position() const; // index edge position, or -1
116 116
117 117 // Access the TypeKlassPtr of operands with a base==RegI and disp==RegP
118 118 // Only returns non-null value for i486.ad's indOffset32X
119 119 virtual const TypePtr *disp_as_type() const { return NULL; }
120 120
121 121 // Return the label
122 122 virtual Label *label() const;
123 123
124 124 // Return the method's address
125 125 virtual intptr_t method() const;
126 126
127 127 // Hash and compare over operands are currently identical
128 128 virtual uint hash() const;
129 129 virtual uint cmp( const MachOper &oper ) const;
130 130
131 131 // Virtual clone, since I do not know how big the MachOper is.
132 132 virtual MachOper *clone(Compile* C) const = 0;
133 133
134 134 // Return ideal Type from simple operands. Fail for complex operands.
135 135 virtual const Type *type() const;
136 136
137 137 // Set an integer offset if we have one, or error otherwise
138 138 virtual void set_con( jint c0 ) { ShouldNotReachHere(); }
139 139
140 140 #ifndef PRODUCT
141 141 // Return name of operand
142 142 virtual const char *Name() const { return "???";}
143 143
144 144 // Methods to output the text version of the operand
145 145 virtual void int_format(PhaseRegAlloc *,const MachNode *node, outputStream *st) const = 0;
146 146 virtual void ext_format(PhaseRegAlloc *,const MachNode *node,int idx, outputStream *st) const=0;
147 147
148 148 virtual void dump_spec(outputStream *st) const; // Print per-operand info
149 149 #endif
150 150 };
151 151
152 152 //------------------------------MachNode---------------------------------------
153 153 // Base type for all machine specific nodes. All node classes generated by the
154 154 // ADLC inherit from this class.
155 155 class MachNode : public Node {
156 156 public:
157 157 MachNode() : Node((uint)0), _num_opnds(0), _opnds(NULL) {
158 158 init_class_id(Class_Mach);
159 159 }
160 160 // Required boilerplate
161 161 virtual uint size_of() const { return sizeof(MachNode); }
162 162 virtual int Opcode() const; // Always equal to MachNode
163 163 virtual uint rule() const = 0; // Machine-specific opcode
164 164 // Number of inputs which come before the first operand.
165 165 // Generally at least 1, to skip the Control input
166 166 virtual uint oper_input_base() const { return 1; }
167 167
168 168 // Copy inputs and operands to new node of instruction.
169 169 // Called from cisc_version() and short_branch_version().
170 170 // !!!! The method's body is defined in ad_<arch>.cpp file.
171 171 void fill_new_machnode(MachNode *n, Compile* C) const;
172 172
173 173 // Return an equivalent instruction using memory for cisc_operand position
174 174 virtual MachNode *cisc_version(int offset, Compile* C);
175 175 // Modify this instruction's register mask to use stack version for cisc_operand
176 176 virtual void use_cisc_RegMask();
177 177
178 178 // Support for short branches
179 179 virtual MachNode *short_branch_version(Compile* C) { return NULL; }
180 180 bool may_be_short_branch() const { return (flags() & Flag_may_be_short_branch) != 0; }
181 181
182 182 // First index in _in[] corresponding to operand, or -1 if there is none
183 183 int operand_index(uint operand) const;
184 184
185 185 // Register class input is expected in
186 186 virtual const RegMask &in_RegMask(uint) const;
187 187
188 188 // cisc-spillable instructions redefine for use by in_RegMask
189 189 virtual const RegMask *cisc_RegMask() const { return NULL; }
190 190
191 191 // If this instruction is a 2-address instruction, then return the
192 192 // index of the input which must match the output. Not nessecary
193 193 // for instructions which bind the input and output register to the
194 194 // same singleton regiser (e.g., Intel IDIV which binds AX to be
195 195 // both an input and an output). It is nessecary when the input and
196 196 // output have choices - but they must use the same choice.
197 197 virtual uint two_adr( ) const { return 0; }
198 198
199 199 // Array of complex operand pointers. Each corresponds to zero or
200 200 // more leafs. Must be set by MachNode constructor to point to an
201 201 // internal array of MachOpers. The MachOper array is sized by
202 202 // specific MachNodes described in the ADL.
203 203 uint _num_opnds;
204 204 MachOper **_opnds;
205 205 uint num_opnds() const { return _num_opnds; }
206 206
207 207 // Emit bytes into cbuf
208 208 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
209 209 // Size of instruction in bytes
210 210 virtual uint size(PhaseRegAlloc *ra_) const;
211 211 // Helper function that computes size by emitting code
212 212 virtual uint emit_size(PhaseRegAlloc *ra_) const;
213 213
214 214 // Return the alignment required (in units of relocInfo::addr_unit())
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215 215 // for this instruction (must be a power of 2)
216 216 virtual int alignment_required() const { return 1; }
217 217
218 218 // Return the padding (in bytes) to be emitted before this
219 219 // instruction to properly align it.
220 220 virtual int compute_padding(int current_offset) const { return 0; }
221 221
222 222 // Return number of relocatable values contained in this instruction
223 223 virtual int reloc() const { return 0; }
224 224
225 - // Return number of words used for double constants in this instruction
226 - virtual int const_size() const { return 0; }
227 -
228 225 // Hash and compare over operands. Used to do GVN on machine Nodes.
229 226 virtual uint hash() const;
230 227 virtual uint cmp( const Node &n ) const;
231 228
232 229 // Expand method for MachNode, replaces nodes representing pseudo
233 230 // instructions with a set of nodes which represent real machine
234 231 // instructions and compute the same value.
235 232 virtual MachNode *Expand( State *, Node_List &proj_list, Node* mem ) { return this; }
236 233
237 234 // Bottom_type call; value comes from operand0
238 235 virtual const class Type *bottom_type() const { return _opnds[0]->type(); }
239 236 virtual uint ideal_reg() const { const Type *t = _opnds[0]->type(); return t == TypeInt::CC ? Op_RegFlags : Matcher::base2reg[t->base()]; }
240 237
241 238 // If this is a memory op, return the base pointer and fixed offset.
242 239 // If there are no such, return NULL. If there are multiple addresses
243 240 // or the address is indeterminate (rare cases) then return (Node*)-1,
244 241 // which serves as node bottom.
245 242 // If the offset is not statically determined, set it to Type::OffsetBot.
246 243 // This method is free to ignore stack slots if that helps.
247 244 #define TYPE_PTR_SENTINAL ((const TypePtr*)-1)
248 245 // Passing TYPE_PTR_SENTINAL as adr_type asks for computation of the adr_type if possible
249 246 const Node* get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const;
250 247
251 248 // Helper for get_base_and_disp: find the base and index input nodes.
252 249 // Returns the MachOper as determined by memory_operand(), for use, if
253 250 // needed by the caller. If (MachOper *)-1 is returned, base and index
254 251 // are set to NodeSentinel. If (MachOper *) NULL is returned, base and
255 252 // index are set to NULL.
256 253 const MachOper* memory_inputs(Node* &base, Node* &index) const;
257 254
258 255 // Helper for memory_inputs: Which operand carries the necessary info?
259 256 // By default, returns NULL, which means there is no such operand.
260 257 // If it returns (MachOper*)-1, this means there are multiple memories.
261 258 virtual const MachOper* memory_operand() const { return NULL; }
262 259
263 260 // Call "get_base_and_disp" to decide which category of memory is used here.
264 261 virtual const class TypePtr *adr_type() const;
265 262
266 263 // Negate conditional branches. Error for non-branch Nodes
267 264 virtual void negate();
268 265
269 266 // Apply peephole rule(s) to this instruction
270 267 virtual MachNode *peephole( Block *block, int block_index, PhaseRegAlloc *ra_, int &deleted, Compile* C );
271 268
272 269 // Check for PC-Relative addressing
273 270 bool is_pc_relative() const { return (flags() & Flag_is_pc_relative) != 0; }
274 271
275 272 // Top-level ideal Opcode matched
276 273 virtual int ideal_Opcode() const { return Op_Node; }
277 274
278 275 // Set the branch inside jump MachNodes. Error for non-branch Nodes.
279 276 virtual void label_set( Label& label, uint block_num );
280 277
281 278 // Adds the label for the case
282 279 virtual void add_case_label( int switch_val, Label* blockLabel);
283 280
284 281 // Set the absolute address for methods
285 282 virtual void method_set( intptr_t addr );
286 283
287 284 // Should we clone rather than spill this instruction?
288 285 bool rematerialize() const;
289 286
290 287 // Get the pipeline info
291 288 static const Pipeline *pipeline_class();
292 289 virtual const Pipeline *pipeline() const;
293 290
294 291 #ifndef PRODUCT
295 292 virtual const char *Name() const = 0; // Machine-specific name
296 293 virtual void dump_spec(outputStream *st) const; // Print per-node info
297 294 void dump_format(PhaseRegAlloc *ra, outputStream *st) const; // access to virtual
298 295 #endif
299 296 };
300 297
301 298 //------------------------------MachIdealNode----------------------------
302 299 // Machine specific versions of nodes that must be defined by user.
303 300 // These are not converted by matcher from ideal nodes to machine nodes
304 301 // but are inserted into the code by the compiler.
305 302 class MachIdealNode : public MachNode {
306 303 public:
307 304 MachIdealNode( ) {}
308 305
309 306 // Define the following defaults for non-matched machine nodes
310 307 virtual uint oper_input_base() const { return 0; }
311 308 virtual uint rule() const { return 9999999; }
312 309 virtual const class Type *bottom_type() const { return _opnds == NULL ? Type::CONTROL : MachNode::bottom_type(); }
313 310 };
314 311
315 312 //------------------------------MachTypeNode----------------------------
316 313 // Machine Nodes that need to retain a known Type.
317 314 class MachTypeNode : public MachNode {
318 315 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
319 316 public:
320 317 const Type *_bottom_type;
321 318
322 319 virtual const class Type *bottom_type() const { return _bottom_type; }
323 320 #ifndef PRODUCT
324 321 virtual void dump_spec(outputStream *st) const;
325 322 #endif
326 323 };
327 324
328 325 //------------------------------MachBreakpointNode----------------------------
329 326 // Machine breakpoint or interrupt Node
330 327 class MachBreakpointNode : public MachIdealNode {
331 328 public:
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332 329 MachBreakpointNode( ) {}
333 330 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
334 331 virtual uint size(PhaseRegAlloc *ra_) const;
335 332
336 333 #ifndef PRODUCT
337 334 virtual const char *Name() const { return "Breakpoint"; }
338 335 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
339 336 #endif
340 337 };
341 338
339 +//------------------------------MachConstantBaseNode--------------------------
340 +// Machine node that represents the base address of the constant table.
341 +class MachConstantBaseNode : public MachIdealNode {
342 +public:
343 + static const RegMask& _out_RegMask; // We need the out_RegMask statically in MachConstantNode::in_RegMask().
344 +
345 +public:
346 + MachConstantBaseNode() : MachIdealNode() {
347 + init_class_id(Class_MachConstantBase);
348 + add_req(NULL);
349 + }
350 + virtual const class Type* bottom_type() const { return TypeRawPtr::NOTNULL; }
351 + virtual uint ideal_reg() const { return Op_RegP; }
352 + virtual uint oper_input_base() const { return 1; }
353 +
354 + virtual void emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const;
355 + virtual uint size(PhaseRegAlloc* ra_) const;
356 + virtual bool pinned() const { return UseRDPCForConstantTableBase; }
357 +
358 + static const RegMask& static_out_RegMask() { return _out_RegMask; }
359 + virtual const RegMask& out_RegMask() const { return static_out_RegMask(); }
360 +
361 +#ifndef PRODUCT
362 + virtual const char* Name() const { return "MachConstantBaseNode"; }
363 + virtual void format(PhaseRegAlloc*, outputStream* st) const;
364 +#endif
365 +};
366 +
367 +//------------------------------MachConstantNode-------------------------------
368 +// Machine node that holds a constant which is stored in the constant table.
369 +class MachConstantNode : public MachNode {
370 +protected:
371 + Compile::Constant _constant; // This node's constant.
372 +
373 +public:
374 + MachConstantNode() : MachNode() {
375 + init_class_id(Class_MachConstant);
376 + }
377 +
378 + virtual void eval_constant(Compile* C) {
379 +#ifdef ASSERT
380 + tty->print("missing MachConstantNode eval_constant function: ");
381 + dump();
382 +#endif
383 + ShouldNotCallThis();
384 + }
385 +
386 + virtual const RegMask &in_RegMask(uint idx) const {
387 + if (idx == mach_constant_base_node_input())
388 + return MachConstantBaseNode::static_out_RegMask();
389 + return MachNode::in_RegMask(idx);
390 + }
391 +
392 + // Input edge of MachConstantBaseNode.
393 + uint mach_constant_base_node_input() const { return req() - 1; }
394 +
395 + int constant_offset();
396 + int constant_offset() const { return ((MachConstantNode*) this)->constant_offset(); }
397 +};
398 +
342 399 //------------------------------MachUEPNode-----------------------------------
343 400 // Machine Unvalidated Entry Point Node
344 401 class MachUEPNode : public MachIdealNode {
345 402 public:
346 403 MachUEPNode( ) {}
347 404 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
348 405 virtual uint size(PhaseRegAlloc *ra_) const;
349 406
350 407 #ifndef PRODUCT
351 408 virtual const char *Name() const { return "Unvalidated-Entry-Point"; }
352 409 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
353 410 #endif
354 411 };
355 412
356 413 //------------------------------MachPrologNode--------------------------------
357 414 // Machine function Prolog Node
358 415 class MachPrologNode : public MachIdealNode {
359 416 public:
360 417 MachPrologNode( ) {}
361 418 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
362 419 virtual uint size(PhaseRegAlloc *ra_) const;
363 420 virtual int reloc() const;
364 421
365 422 #ifndef PRODUCT
366 423 virtual const char *Name() const { return "Prolog"; }
367 424 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
368 425 #endif
369 426 };
370 427
371 428 //------------------------------MachEpilogNode--------------------------------
372 429 // Machine function Epilog Node
373 430 class MachEpilogNode : public MachIdealNode {
374 431 public:
375 432 MachEpilogNode(bool do_poll = false) : _do_polling(do_poll) {}
376 433 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
377 434 virtual uint size(PhaseRegAlloc *ra_) const;
378 435 virtual int reloc() const;
379 436 virtual const Pipeline *pipeline() const;
380 437
381 438 private:
382 439 bool _do_polling;
383 440
384 441 public:
385 442 bool do_polling() const { return _do_polling; }
386 443
387 444 // Offset of safepoint from the beginning of the node
388 445 int safepoint_offset() const;
389 446
390 447 #ifndef PRODUCT
391 448 virtual const char *Name() const { return "Epilog"; }
392 449 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
393 450 #endif
394 451 };
395 452
396 453 //------------------------------MachNopNode-----------------------------------
397 454 // Machine function Nop Node
398 455 class MachNopNode : public MachIdealNode {
399 456 private:
400 457 int _count;
401 458 public:
402 459 MachNopNode( ) : _count(1) {}
403 460 MachNopNode( int count ) : _count(count) {}
404 461 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
405 462 virtual uint size(PhaseRegAlloc *ra_) const;
406 463
407 464 virtual const class Type *bottom_type() const { return Type::CONTROL; }
408 465
409 466 virtual int ideal_Opcode() const { return Op_Con; } // bogus; see output.cpp
410 467 virtual const Pipeline *pipeline() const;
411 468 #ifndef PRODUCT
412 469 virtual const char *Name() const { return "Nop"; }
413 470 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
414 471 virtual void dump_spec(outputStream *st) const { } // No per-operand info
415 472 #endif
416 473 };
417 474
418 475 //------------------------------MachSpillCopyNode------------------------------
419 476 // Machine SpillCopy Node. Copies 1 or 2 words from any location to any
420 477 // location (stack or register).
421 478 class MachSpillCopyNode : public MachIdealNode {
422 479 const RegMask *_in; // RegMask for input
423 480 const RegMask *_out; // RegMask for output
424 481 const Type *_type;
425 482 public:
426 483 MachSpillCopyNode( Node *n, const RegMask &in, const RegMask &out ) :
427 484 MachIdealNode(), _in(&in), _out(&out), _type(n->bottom_type()) {
428 485 init_class_id(Class_MachSpillCopy);
429 486 init_flags(Flag_is_Copy);
430 487 add_req(NULL);
431 488 add_req(n);
432 489 }
433 490 virtual uint size_of() const { return sizeof(*this); }
434 491 void set_out_RegMask(const RegMask &out) { _out = &out; }
435 492 void set_in_RegMask(const RegMask &in) { _in = ∈ }
436 493 virtual const RegMask &out_RegMask() const { return *_out; }
437 494 virtual const RegMask &in_RegMask(uint) const { return *_in; }
438 495 virtual const class Type *bottom_type() const { return _type; }
439 496 virtual uint ideal_reg() const { return Matcher::base2reg[_type->base()]; }
440 497 virtual uint oper_input_base() const { return 1; }
441 498 uint implementation( CodeBuffer *cbuf, PhaseRegAlloc *ra_, bool do_size, outputStream* st ) const;
442 499
443 500 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
444 501 virtual uint size(PhaseRegAlloc *ra_) const;
445 502
446 503 #ifndef PRODUCT
447 504 virtual const char *Name() const { return "MachSpillCopy"; }
448 505 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
449 506 #endif
450 507 };
451 508
452 509 //------------------------------MachNullChkNode--------------------------------
453 510 // Machine-dependent null-pointer-check Node. Points a real MachNode that is
454 511 // also some kind of memory op. Turns the indicated MachNode into a
455 512 // conditional branch with good latency on the ptr-not-null path and awful
456 513 // latency on the pointer-is-null path.
457 514
458 515 class MachNullCheckNode : public MachIdealNode {
459 516 public:
460 517 const uint _vidx; // Index of memop being tested
461 518 MachNullCheckNode( Node *ctrl, Node *memop, uint vidx ) : MachIdealNode(), _vidx(vidx) {
462 519 init_class_id(Class_MachNullCheck);
463 520 init_flags(Flag_is_Branch | Flag_is_pc_relative);
464 521 add_req(ctrl);
465 522 add_req(memop);
466 523 }
467 524
468 525 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
469 526 virtual bool pinned() const { return true; };
470 527 virtual void negate() { }
471 528 virtual const class Type *bottom_type() const { return TypeTuple::IFBOTH; }
472 529 virtual uint ideal_reg() const { return NotAMachineReg; }
473 530 virtual const RegMask &in_RegMask(uint) const;
474 531 virtual const RegMask &out_RegMask() const { return RegMask::Empty; }
475 532 #ifndef PRODUCT
476 533 virtual const char *Name() const { return "NullCheck"; }
477 534 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
478 535 #endif
479 536 };
480 537
481 538 //------------------------------MachProjNode----------------------------------
482 539 // Machine-dependent Ideal projections (how is that for an oxymoron). Really
483 540 // just MachNodes made by the Ideal world that replicate simple projections
484 541 // but with machine-dependent input & output register masks. Generally
485 542 // produced as part of calling conventions. Normally I make MachNodes as part
486 543 // of the Matcher process, but the Matcher is ill suited to issues involving
487 544 // frame handling, so frame handling is all done in the Ideal world with
488 545 // occasional callbacks to the machine model for important info.
489 546 class MachProjNode : public ProjNode {
490 547 public:
491 548 MachProjNode( Node *multi, uint con, const RegMask &out, uint ideal_reg ) : ProjNode(multi,con), _rout(out), _ideal_reg(ideal_reg) {}
492 549 RegMask _rout;
493 550 const uint _ideal_reg;
494 551 enum projType {
495 552 unmatched_proj = 0, // Projs for Control, I/O, memory not matched
496 553 fat_proj = 999 // Projs killing many regs, defined by _rout
497 554 };
498 555 virtual int Opcode() const;
499 556 virtual const Type *bottom_type() const;
500 557 virtual const TypePtr *adr_type() const;
501 558 virtual const RegMask &in_RegMask(uint) const { return RegMask::Empty; }
502 559 virtual const RegMask &out_RegMask() const { return _rout; }
503 560 virtual uint ideal_reg() const { return _ideal_reg; }
504 561 // Need size_of() for virtual ProjNode::clone()
505 562 virtual uint size_of() const { return sizeof(MachProjNode); }
506 563 #ifndef PRODUCT
507 564 virtual void dump_spec(outputStream *st) const;
508 565 #endif
509 566 };
510 567
511 568 //------------------------------MachIfNode-------------------------------------
512 569 // Machine-specific versions of IfNodes
513 570 class MachIfNode : public MachNode {
514 571 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
515 572 public:
516 573 float _prob; // Probability branch goes either way
517 574 float _fcnt; // Frequency counter
518 575 MachIfNode() : MachNode() {
519 576 init_class_id(Class_MachIf);
520 577 }
521 578 #ifndef PRODUCT
522 579 virtual void dump_spec(outputStream *st) const;
523 580 #endif
524 581 };
525 582
526 583 //------------------------------MachFastLockNode-------------------------------------
527 584 // Machine-specific versions of FastLockNodes
528 585 class MachFastLockNode : public MachNode {
529 586 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
530 587 public:
531 588 BiasedLockingCounters* _counters;
532 589
533 590 MachFastLockNode() : MachNode() {}
534 591 };
535 592
536 593 //------------------------------MachReturnNode--------------------------------
537 594 // Machine-specific versions of subroutine returns
538 595 class MachReturnNode : public MachNode {
539 596 virtual uint size_of() const; // Size is bigger
540 597 public:
541 598 RegMask *_in_rms; // Input register masks, set during allocation
542 599 ReallocMark _nesting; // assertion check for reallocations
543 600 const TypePtr* _adr_type; // memory effects of call or return
544 601 MachReturnNode() : MachNode() {
545 602 init_class_id(Class_MachReturn);
546 603 _adr_type = TypePtr::BOTTOM; // the default: all of memory
547 604 }
548 605
549 606 void set_adr_type(const TypePtr* atp) { _adr_type = atp; }
550 607
551 608 virtual const RegMask &in_RegMask(uint) const;
552 609 virtual bool pinned() const { return true; };
553 610 virtual const TypePtr *adr_type() const;
554 611 };
555 612
556 613 //------------------------------MachSafePointNode-----------------------------
557 614 // Machine-specific versions of safepoints
558 615 class MachSafePointNode : public MachReturnNode {
559 616 public:
560 617 OopMap* _oop_map; // Array of OopMap info (8-bit char) for GC
561 618 JVMState* _jvms; // Pointer to list of JVM State Objects
562 619 uint _jvmadj; // Extra delta to jvms indexes (mach. args)
563 620 OopMap* oop_map() const { return _oop_map; }
564 621 void set_oop_map(OopMap* om) { _oop_map = om; }
565 622
566 623 MachSafePointNode() : MachReturnNode(), _oop_map(NULL), _jvms(NULL), _jvmadj(0) {
567 624 init_class_id(Class_MachSafePoint);
568 625 init_flags(Flag_is_safepoint_node);
569 626 }
570 627
571 628 virtual JVMState* jvms() const { return _jvms; }
572 629 void set_jvms(JVMState* s) {
573 630 _jvms = s;
574 631 }
575 632 bool is_safepoint_node() const { return (flags() & Flag_is_safepoint_node) != 0; }
576 633 virtual const Type *bottom_type() const;
577 634
578 635 virtual const RegMask &in_RegMask(uint) const;
579 636
580 637 // Functionality from old debug nodes
581 638 Node *returnadr() const { return in(TypeFunc::ReturnAdr); }
582 639 Node *frameptr () const { return in(TypeFunc::FramePtr); }
583 640
584 641 Node *local(const JVMState* jvms, uint idx) const {
585 642 assert(verify_jvms(jvms), "jvms must match");
586 643 return in(_jvmadj + jvms->locoff() + idx);
587 644 }
588 645 Node *stack(const JVMState* jvms, uint idx) const {
589 646 assert(verify_jvms(jvms), "jvms must match");
590 647 return in(_jvmadj + jvms->stkoff() + idx);
591 648 }
592 649 Node *monitor_obj(const JVMState* jvms, uint idx) const {
593 650 assert(verify_jvms(jvms), "jvms must match");
594 651 return in(_jvmadj + jvms->monitor_obj_offset(idx));
595 652 }
596 653 Node *monitor_box(const JVMState* jvms, uint idx) const {
597 654 assert(verify_jvms(jvms), "jvms must match");
598 655 return in(_jvmadj + jvms->monitor_box_offset(idx));
599 656 }
600 657 void set_local(const JVMState* jvms, uint idx, Node *c) {
601 658 assert(verify_jvms(jvms), "jvms must match");
602 659 set_req(_jvmadj + jvms->locoff() + idx, c);
603 660 }
604 661 void set_stack(const JVMState* jvms, uint idx, Node *c) {
605 662 assert(verify_jvms(jvms), "jvms must match");
606 663 set_req(_jvmadj + jvms->stkoff() + idx, c);
607 664 }
608 665 void set_monitor(const JVMState* jvms, uint idx, Node *c) {
609 666 assert(verify_jvms(jvms), "jvms must match");
610 667 set_req(_jvmadj + jvms->monoff() + idx, c);
611 668 }
612 669 };
613 670
614 671 //------------------------------MachCallNode----------------------------------
615 672 // Machine-specific versions of subroutine calls
616 673 class MachCallNode : public MachSafePointNode {
617 674 protected:
618 675 virtual uint hash() const { return NO_HASH; } // CFG nodes do not hash
619 676 virtual uint cmp( const Node &n ) const;
620 677 virtual uint size_of() const = 0; // Size is bigger
621 678 public:
622 679 const TypeFunc *_tf; // Function type
623 680 address _entry_point; // Address of the method being called
624 681 float _cnt; // Estimate of number of times called
625 682 uint _argsize; // Size of argument block on stack
626 683
627 684 const TypeFunc* tf() const { return _tf; }
628 685 const address entry_point() const { return _entry_point; }
629 686 const float cnt() const { return _cnt; }
630 687 uint argsize() const { return _argsize; }
631 688
632 689 void set_tf(const TypeFunc* tf) { _tf = tf; }
633 690 void set_entry_point(address p) { _entry_point = p; }
634 691 void set_cnt(float c) { _cnt = c; }
635 692 void set_argsize(int s) { _argsize = s; }
636 693
637 694 MachCallNode() : MachSafePointNode() {
638 695 init_class_id(Class_MachCall);
639 696 init_flags(Flag_is_Call);
640 697 }
641 698
642 699 virtual const Type *bottom_type() const;
643 700 virtual bool pinned() const { return false; }
644 701 virtual const Type *Value( PhaseTransform *phase ) const;
645 702 virtual const RegMask &in_RegMask(uint) const;
646 703 virtual int ret_addr_offset() { return 0; }
647 704
648 705 bool returns_long() const { return tf()->return_type() == T_LONG; }
649 706 bool return_value_is_used() const;
650 707 #ifndef PRODUCT
651 708 virtual void dump_spec(outputStream *st) const;
652 709 #endif
653 710 };
654 711
655 712 //------------------------------MachCallJavaNode------------------------------
656 713 // "Base" class for machine-specific versions of subroutine calls
657 714 class MachCallJavaNode : public MachCallNode {
658 715 protected:
659 716 virtual uint cmp( const Node &n ) const;
660 717 virtual uint size_of() const; // Size is bigger
661 718 public:
662 719 ciMethod* _method; // Method being direct called
663 720 int _bci; // Byte Code index of call byte code
664 721 bool _optimized_virtual; // Tells if node is a static call or an optimized virtual
665 722 bool _method_handle_invoke; // Tells if the call has to preserve SP
666 723 MachCallJavaNode() : MachCallNode() {
667 724 init_class_id(Class_MachCallJava);
668 725 }
669 726
670 727 virtual const RegMask &in_RegMask(uint) const;
671 728
672 729 #ifndef PRODUCT
673 730 virtual void dump_spec(outputStream *st) const;
674 731 #endif
675 732 };
676 733
677 734 //------------------------------MachCallStaticJavaNode------------------------
678 735 // Machine-specific versions of monomorphic subroutine calls
679 736 class MachCallStaticJavaNode : public MachCallJavaNode {
680 737 virtual uint cmp( const Node &n ) const;
681 738 virtual uint size_of() const; // Size is bigger
682 739 public:
683 740 const char *_name; // Runtime wrapper name
684 741 MachCallStaticJavaNode() : MachCallJavaNode() {
685 742 init_class_id(Class_MachCallStaticJava);
686 743 }
687 744
688 745 // If this is an uncommon trap, return the request code, else zero.
689 746 int uncommon_trap_request() const;
690 747
691 748 virtual int ret_addr_offset();
692 749 #ifndef PRODUCT
693 750 virtual void dump_spec(outputStream *st) const;
694 751 void dump_trap_args(outputStream *st) const;
695 752 #endif
696 753 };
697 754
698 755 //------------------------------MachCallDynamicJavaNode------------------------
699 756 // Machine-specific versions of possibly megamorphic subroutine calls
700 757 class MachCallDynamicJavaNode : public MachCallJavaNode {
701 758 public:
702 759 int _vtable_index;
703 760 MachCallDynamicJavaNode() : MachCallJavaNode() {
704 761 init_class_id(Class_MachCallDynamicJava);
705 762 DEBUG_ONLY(_vtable_index = -99); // throw an assert if uninitialized
706 763 }
707 764 virtual int ret_addr_offset();
708 765 #ifndef PRODUCT
709 766 virtual void dump_spec(outputStream *st) const;
710 767 #endif
711 768 };
712 769
713 770 //------------------------------MachCallRuntimeNode----------------------------
714 771 // Machine-specific versions of subroutine calls
715 772 class MachCallRuntimeNode : public MachCallNode {
716 773 virtual uint cmp( const Node &n ) const;
717 774 virtual uint size_of() const; // Size is bigger
718 775 public:
719 776 const char *_name; // Printable name, if _method is NULL
720 777 MachCallRuntimeNode() : MachCallNode() {
721 778 init_class_id(Class_MachCallRuntime);
722 779 }
723 780 virtual int ret_addr_offset();
724 781 #ifndef PRODUCT
725 782 virtual void dump_spec(outputStream *st) const;
726 783 #endif
727 784 };
728 785
729 786 class MachCallLeafNode: public MachCallRuntimeNode {
730 787 public:
731 788 MachCallLeafNode() : MachCallRuntimeNode() {
732 789 init_class_id(Class_MachCallLeaf);
733 790 }
734 791 };
735 792
736 793 //------------------------------MachHaltNode-----------------------------------
737 794 // Machine-specific versions of halt nodes
738 795 class MachHaltNode : public MachReturnNode {
739 796 public:
740 797 virtual JVMState* jvms() const;
741 798 };
742 799
743 800
744 801 //------------------------------MachTempNode-----------------------------------
745 802 // Node used by the adlc to construct inputs to represent temporary registers
746 803 class MachTempNode : public MachNode {
747 804 private:
748 805 MachOper *_opnd_array[1];
749 806
750 807 public:
751 808 virtual const RegMask &out_RegMask() const { return *_opnds[0]->in_RegMask(0); }
752 809 virtual uint rule() const { return 9999999; }
753 810 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {}
754 811
755 812 MachTempNode(MachOper* oper) {
756 813 init_class_id(Class_MachTemp);
757 814 _num_opnds = 1;
758 815 _opnds = _opnd_array;
759 816 add_req(NULL);
760 817 _opnds[0] = oper;
761 818 }
762 819 virtual uint size_of() const { return sizeof(MachTempNode); }
763 820
764 821 #ifndef PRODUCT
765 822 virtual void format(PhaseRegAlloc *, outputStream *st ) const {}
766 823 virtual const char *Name() const { return "MachTemp";}
767 824 #endif
768 825 };
769 826
770 827
771 828
772 829 //------------------------------labelOper--------------------------------------
773 830 // Machine-independent version of label operand
774 831 class labelOper : public MachOper {
775 832 private:
776 833 virtual uint num_edges() const { return 0; }
777 834 public:
778 835 // Supported for fixed size branches
779 836 Label* _label; // Label for branch(es)
780 837
781 838 uint _block_num;
782 839
783 840 labelOper() : _block_num(0), _label(0) {}
784 841
785 842 labelOper(Label* label, uint block_num) : _label(label), _block_num(block_num) {}
786 843
787 844 labelOper(labelOper* l) : _label(l->_label) , _block_num(l->_block_num) {}
788 845
789 846 virtual MachOper *clone(Compile* C) const;
790 847
791 848 virtual Label *label() const { return _label; }
792 849
793 850 virtual uint opcode() const;
794 851
795 852 virtual uint hash() const;
796 853 virtual uint cmp( const MachOper &oper ) const;
797 854 #ifndef PRODUCT
798 855 virtual const char *Name() const { return "Label";}
799 856
800 857 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
801 858 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
802 859 #endif
803 860 };
804 861
805 862
806 863 //------------------------------methodOper--------------------------------------
807 864 // Machine-independent version of method operand
808 865 class methodOper : public MachOper {
809 866 private:
810 867 virtual uint num_edges() const { return 0; }
811 868 public:
812 869 intptr_t _method; // Address of method
813 870 methodOper() : _method(0) {}
814 871 methodOper(intptr_t method) : _method(method) {}
815 872
816 873 virtual MachOper *clone(Compile* C) const;
817 874
818 875 virtual intptr_t method() const { return _method; }
819 876
820 877 virtual uint opcode() const;
821 878
822 879 virtual uint hash() const;
823 880 virtual uint cmp( const MachOper &oper ) const;
824 881 #ifndef PRODUCT
825 882 virtual const char *Name() const { return "Method";}
826 883
827 884 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
828 885 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
829 886 #endif
830 887 };
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