9511 Register Rsrc = $src$$Register; 9512 Register Rtmp = $tmp$$Register; 9513 __ srl(Rsrc, 1, Rtmp); 9514 __ srl(Rsrc, 0, Rdst); 9515 __ or3(Rdst, Rtmp, Rdst); 9516 __ srl(Rdst, 2, Rtmp); 9517 __ or3(Rdst, Rtmp, Rdst); 9518 __ srl(Rdst, 4, Rtmp); 9519 __ or3(Rdst, Rtmp, Rdst); 9520 __ srl(Rdst, 8, Rtmp); 9521 __ or3(Rdst, Rtmp, Rdst); 9522 __ srl(Rdst, 16, Rtmp); 9523 __ or3(Rdst, Rtmp, Rdst); 9524 __ popc(Rdst, Rdst); 9525 __ mov(BitsPerInt, Rtmp); 9526 __ sub(Rtmp, Rdst, Rdst); 9527 %} 9528 ins_pipe(ialu_reg); 9529 %} 9530 9531 instruct countLeadingZerosL(iRegI dst, iRegL src, iRegL tmp, flagsReg cr) %{ 9532 predicate(UsePopCountInstruction); // See Matcher::match_rule_supported 9533 match(Set dst (CountLeadingZerosL src)); 9534 effect(TEMP dst, TEMP tmp, KILL cr); 9535 9536 // x |= (x >> 1); 9537 // x |= (x >> 2); 9538 // x |= (x >> 4); 9539 // x |= (x >> 8); 9540 // x |= (x >> 16); 9541 // x |= (x >> 32); 9542 // return (WORDBITS - popc(x)); 9543 format %{ "SRLX $src,1,$tmp\t! count leading zeros (long)\n\t" 9544 "OR $src,$tmp,$dst\n\t" 9545 "SRLX $dst,2,$tmp\n\t" 9546 "OR $dst,$tmp,$dst\n\t" 9547 "SRLX $dst,4,$tmp\n\t" 9548 "OR $dst,$tmp,$dst\n\t" 9549 "SRLX $dst,8,$tmp\n\t" 9550 "OR $dst,$tmp,$dst\n\t" 9551 "SRLX $dst,16,$tmp\n\t" 9552 "OR $dst,$tmp,$dst\n\t" 9553 "SRLX $dst,32,$tmp\n\t" 9554 "OR $dst,$tmp,$dst\n\t" 9555 "POPC $dst,$dst\n\t" 9556 "MOV 64,$tmp\n\t" 9557 "SUB $tmp,$dst,$dst" %} 9558 ins_encode %{ 9559 Register Rdst = $dst$$Register; 9560 Register Rsrc = $src$$Register; 9561 Register Rtmp = $tmp$$Register; 9562 __ srlx(Rsrc, 1, Rtmp); 9563 __ or3(Rsrc, Rtmp, Rdst); 9564 __ srlx(Rdst, 2, Rtmp); 9565 __ or3(Rdst, Rtmp, Rdst); 9566 __ srlx(Rdst, 4, Rtmp); 9567 __ or3(Rdst, Rtmp, Rdst); 9568 __ srlx(Rdst, 8, Rtmp); 9569 __ or3(Rdst, Rtmp, Rdst); 9570 __ srlx(Rdst, 16, Rtmp); 9571 __ or3(Rdst, Rtmp, Rdst); 9572 __ srlx(Rdst, 32, Rtmp); 9573 __ or3(Rdst, Rtmp, Rdst); 9574 __ popc(Rdst, Rdst); 9575 __ mov(BitsPerLong, Rtmp); 9576 __ sub(Rtmp, Rdst, Rdst); 9577 %} 9578 ins_pipe(ialu_reg); 9579 %} 9580 9581 instruct countTrailingZerosI(iRegI dst, iRegI src, flagsReg cr) %{ 9582 predicate(UsePopCountInstruction); // See Matcher::match_rule_supported 9583 match(Set dst (CountTrailingZerosI src)); 9584 effect(TEMP dst, KILL cr); 9585 9586 // return popc(~x & (x - 1)); 9587 format %{ "SUB $src,1,$dst\t! count trailing zeros (int)\n\t" 9588 "ANDN $dst,$src,$dst\n\t" 9589 "SRL $dst,R_G0,$dst\n\t" 9590 "POPC $dst,$dst" %} 9591 ins_encode %{ 9592 Register Rdst = $dst$$Register; 9593 Register Rsrc = $src$$Register; 9594 __ sub(Rsrc, 1, Rdst); | 9511 Register Rsrc = $src$$Register; 9512 Register Rtmp = $tmp$$Register; 9513 __ srl(Rsrc, 1, Rtmp); 9514 __ srl(Rsrc, 0, Rdst); 9515 __ or3(Rdst, Rtmp, Rdst); 9516 __ srl(Rdst, 2, Rtmp); 9517 __ or3(Rdst, Rtmp, Rdst); 9518 __ srl(Rdst, 4, Rtmp); 9519 __ or3(Rdst, Rtmp, Rdst); 9520 __ srl(Rdst, 8, Rtmp); 9521 __ or3(Rdst, Rtmp, Rdst); 9522 __ srl(Rdst, 16, Rtmp); 9523 __ or3(Rdst, Rtmp, Rdst); 9524 __ popc(Rdst, Rdst); 9525 __ mov(BitsPerInt, Rtmp); 9526 __ sub(Rtmp, Rdst, Rdst); 9527 %} 9528 ins_pipe(ialu_reg); 9529 %} 9530 9531 instruct countLeadingZerosL(iRegI dst, iRegL src, iRegL tmp, iRegL tmp2, flagsReg cr) %{ 9532 predicate(UsePopCountInstruction); // See Matcher::match_rule_supported 9533 match(Set dst (CountLeadingZerosL src)); 9534 effect(TEMP dst, TEMP tmp, TEMP tmp2, KILL cr); 9535 9536 // x |= (x >> 1); 9537 // x |= (x >> 2); 9538 // x |= (x >> 4); 9539 // x |= (x >> 8); 9540 // x |= (x >> 16); 9541 // x |= (x >> 32); 9542 // return (WORDBITS - popc(x)); 9543 format %{ "SRLX $src,1,$tmp\t! count leading zeros (long)\n\t" 9544 "OR $src,$tmp,$tmp2\n\t" 9545 "SRLX $tmp2,2,$tmp\n\t" 9546 "OR $tmp2,$tmp,$tmp2\n\t" 9547 "SRLX $tmp2,4,$tmp\n\t" 9548 "OR $tmp2,$tmp,$tmp2\n\t" 9549 "SRLX $tmp2,8,$tmp\n\t" 9550 "OR $tmp2,$tmp,$tmp2\n\t" 9551 "SRLX $tmp2,16,$tmp\n\t" 9552 "OR $tmp2,$tmp,$tmp2\n\t" 9553 "SRLX $tmp2,32,$tmp\n\t" 9554 "OR $tmp2,$tmp,$tmp2\n\t" 9555 "POPC $tmp2,$dst\n\t" 9556 "MOV 64,$tmp\n\t" 9557 "SUB $tmp,$dst,$dst" %} 9558 ins_encode %{ 9559 Register Rdst = $dst$$Register; 9560 Register Rsrc = $src$$Register; 9561 Register Rtmp = $tmp$$Register; 9562 Register Rtmp2 = $tmp2$$Register; 9563 __ srlx(Rsrc, 1, Rtmp); 9564 __ or3( Rsrc, Rtmp, Rtmp2); 9565 __ srlx(Rtmp2, 2, Rtmp); 9566 __ or3( Rtmp2, Rtmp, Rtmp2); 9567 __ srlx(Rtmp2, 4, Rtmp); 9568 __ or3( Rtmp2, Rtmp, Rtmp2); 9569 __ srlx(Rtmp2, 8, Rtmp); 9570 __ or3( Rtmp2, Rtmp, Rtmp2); 9571 __ srlx(Rtmp2, 16, Rtmp); 9572 __ or3( Rtmp2, Rtmp, Rtmp2); 9573 __ srlx(Rtmp2, 32, Rtmp); 9574 __ or3( Rtmp2, Rtmp, Rtmp2); 9575 __ popc(Rtmp2, Rdst); 9576 __ mov(BitsPerLong, Rtmp); 9577 __ sub(Rtmp, Rdst, Rdst); 9578 %} 9579 ins_pipe(ialu_reg); 9580 %} 9581 9582 instruct countTrailingZerosI(iRegI dst, iRegI src, flagsReg cr) %{ 9583 predicate(UsePopCountInstruction); // See Matcher::match_rule_supported 9584 match(Set dst (CountTrailingZerosI src)); 9585 effect(TEMP dst, KILL cr); 9586 9587 // return popc(~x & (x - 1)); 9588 format %{ "SUB $src,1,$dst\t! count trailing zeros (int)\n\t" 9589 "ANDN $dst,$src,$dst\n\t" 9590 "SRL $dst,R_G0,$dst\n\t" 9591 "POPC $dst,$dst" %} 9592 ins_encode %{ 9593 Register Rdst = $dst$$Register; 9594 Register Rsrc = $src$$Register; 9595 __ sub(Rsrc, 1, Rdst); |