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--- old/src/cpu/sparc/vm/c1_Runtime1_sparc.cpp
+++ new/src/cpu/sparc/vm/c1_Runtime1_sparc.cpp
1 1 /*
2 2 * Copyright (c) 1999, 2011, Oracle and/or its affiliates. All rights reserved.
3 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 4 *
5 5 * This code is free software; you can redistribute it and/or modify it
6 6 * under the terms of the GNU General Public License version 2 only, as
7 7 * published by the Free Software Foundation.
8 8 *
9 9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 12 * version 2 for more details (a copy is included in the LICENSE file that
13 13 * accompanied this code).
14 14 *
15 15 * You should have received a copy of the GNU General Public License version
16 16 * 2 along with this work; if not, write to the Free Software Foundation,
17 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 18 *
19 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 20 * or visit www.oracle.com if you need additional information or have any
21 21 * questions.
22 22 *
23 23 */
24 24
25 25 #include "precompiled.hpp"
26 26 #include "c1/c1_Defs.hpp"
27 27 #include "c1/c1_MacroAssembler.hpp"
28 28 #include "c1/c1_Runtime1.hpp"
29 29 #include "interpreter/interpreter.hpp"
30 30 #include "nativeInst_sparc.hpp"
31 31 #include "oops/compiledICHolderOop.hpp"
32 32 #include "oops/oop.inline.hpp"
33 33 #include "prims/jvmtiExport.hpp"
34 34 #include "register_sparc.hpp"
35 35 #include "runtime/sharedRuntime.hpp"
36 36 #include "runtime/signature.hpp"
37 37 #include "runtime/vframeArray.hpp"
38 38 #include "vmreg_sparc.inline.hpp"
39 39
40 40 // Implementation of StubAssembler
41 41
42 42 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry_point, int number_of_arguments) {
43 43 // for sparc changing the number of arguments doesn't change
44 44 // anything about the frame size so we'll always lie and claim that
45 45 // we are only passing 1 argument.
46 46 set_num_rt_args(1);
47 47
48 48 assert_not_delayed();
49 49 // bang stack before going to runtime
50 50 set(-os::vm_page_size() + STACK_BIAS, G3_scratch);
51 51 st(G0, SP, G3_scratch);
52 52
53 53 // debugging support
54 54 assert(number_of_arguments >= 0 , "cannot have negative number of arguments");
55 55
56 56 set_last_Java_frame(SP, noreg);
57 57 if (VerifyThread) mov(G2_thread, O0); // about to be smashed; pass early
58 58 save_thread(L7_thread_cache);
59 59 // do the call
60 60 call(entry_point, relocInfo::runtime_call_type);
61 61 if (!VerifyThread) {
62 62 delayed()->mov(G2_thread, O0); // pass thread as first argument
63 63 } else {
64 64 delayed()->nop(); // (thread already passed)
65 65 }
66 66 int call_offset = offset(); // offset of return address
67 67 restore_thread(L7_thread_cache);
68 68 reset_last_Java_frame();
69 69
70 70 // check for pending exceptions
71 71 { Label L;
72 72 Address exception_addr(G2_thread, Thread::pending_exception_offset());
73 73 ld_ptr(exception_addr, Gtemp);
74 74 br_null(Gtemp, false, pt, L);
75 75 delayed()->nop();
76 76 Address vm_result_addr(G2_thread, JavaThread::vm_result_offset());
77 77 st_ptr(G0, vm_result_addr);
78 78 Address vm_result_addr_2(G2_thread, JavaThread::vm_result_2_offset());
79 79 st_ptr(G0, vm_result_addr_2);
80 80
81 81 if (frame_size() == no_frame_size) {
82 82 // we use O7 linkage so that forward_exception_entry has the issuing PC
83 83 call(StubRoutines::forward_exception_entry(), relocInfo::runtime_call_type);
84 84 delayed()->restore();
85 85 } else if (_stub_id == Runtime1::forward_exception_id) {
86 86 should_not_reach_here();
87 87 } else {
88 88 AddressLiteral exc(Runtime1::entry_for(Runtime1::forward_exception_id));
89 89 jump_to(exc, G4);
90 90 delayed()->nop();
91 91 }
92 92 bind(L);
93 93 }
94 94
95 95 // get oop result if there is one and reset the value in the thread
96 96 if (oop_result1->is_valid()) { // get oop result if there is one and reset it in the thread
97 97 get_vm_result (oop_result1);
98 98 } else {
99 99 // be a little paranoid and clear the result
100 100 Address vm_result_addr(G2_thread, JavaThread::vm_result_offset());
101 101 st_ptr(G0, vm_result_addr);
102 102 }
103 103
104 104 if (oop_result2->is_valid()) {
105 105 get_vm_result_2(oop_result2);
106 106 } else {
107 107 // be a little paranoid and clear the result
108 108 Address vm_result_addr_2(G2_thread, JavaThread::vm_result_2_offset());
109 109 st_ptr(G0, vm_result_addr_2);
110 110 }
111 111
112 112 return call_offset;
113 113 }
114 114
115 115
116 116 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1) {
117 117 // O0 is reserved for the thread
118 118 mov(arg1, O1);
119 119 return call_RT(oop_result1, oop_result2, entry, 1);
120 120 }
121 121
122 122
123 123 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1, Register arg2) {
124 124 // O0 is reserved for the thread
125 125 mov(arg1, O1);
126 126 mov(arg2, O2); assert(arg2 != O1, "smashed argument");
127 127 return call_RT(oop_result1, oop_result2, entry, 2);
128 128 }
129 129
130 130
131 131 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1, Register arg2, Register arg3) {
132 132 // O0 is reserved for the thread
133 133 mov(arg1, O1);
134 134 mov(arg2, O2); assert(arg2 != O1, "smashed argument");
135 135 mov(arg3, O3); assert(arg3 != O1 && arg3 != O2, "smashed argument");
136 136 return call_RT(oop_result1, oop_result2, entry, 3);
137 137 }
138 138
139 139
140 140 // Implementation of Runtime1
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141 141
142 142 #define __ sasm->
143 143
144 144 static int cpu_reg_save_offsets[FrameMap::nof_cpu_regs];
145 145 static int fpu_reg_save_offsets[FrameMap::nof_fpu_regs];
146 146 static int reg_save_size_in_words;
147 147 static int frame_size_in_bytes = -1;
148 148
149 149 static OopMap* generate_oop_map(StubAssembler* sasm, bool save_fpu_registers) {
150 150 assert(frame_size_in_bytes == __ total_frame_size_in_bytes(reg_save_size_in_words),
151 - " mismatch in calculation");
151 + "mismatch in calculation");
152 152 sasm->set_frame_size(frame_size_in_bytes / BytesPerWord);
153 153 int frame_size_in_slots = frame_size_in_bytes / sizeof(jint);
154 154 OopMap* oop_map = new OopMap(frame_size_in_slots, 0);
155 155
156 156 int i;
157 157 for (i = 0; i < FrameMap::nof_cpu_regs; i++) {
158 158 Register r = as_Register(i);
159 159 if (r == G1 || r == G3 || r == G4 || r == G5) {
160 160 int sp_offset = cpu_reg_save_offsets[i];
161 161 oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset),
162 162 r->as_VMReg());
163 163 }
164 164 }
165 165
166 166 if (save_fpu_registers) {
167 167 for (i = 0; i < FrameMap::nof_fpu_regs; i++) {
168 168 FloatRegister r = as_FloatRegister(i);
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169 169 int sp_offset = fpu_reg_save_offsets[i];
170 170 oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset),
171 171 r->as_VMReg());
172 172 }
173 173 }
174 174 return oop_map;
175 175 }
176 176
177 177 static OopMap* save_live_registers(StubAssembler* sasm, bool save_fpu_registers = true) {
178 178 assert(frame_size_in_bytes == __ total_frame_size_in_bytes(reg_save_size_in_words),
179 - " mismatch in calculation");
179 + "mismatch in calculation");
180 180 __ save_frame_c1(frame_size_in_bytes);
181 - sasm->set_frame_size(frame_size_in_bytes / BytesPerWord);
182 181
183 182 // Record volatile registers as callee-save values in an OopMap so their save locations will be
184 183 // propagated to the caller frame's RegisterMap during StackFrameStream construction (needed for
185 184 // deoptimization; see compiledVFrame::create_stack_value). The caller's I, L and O registers
186 185 // are saved in register windows - I's and L's in the caller's frame and O's in the stub frame
187 186 // (as the stub's I's) when the runtime routine called by the stub creates its frame.
188 187 // OopMap frame sizes are in c2 stack slot sizes (sizeof(jint))
189 188
190 189 int i;
191 190 for (i = 0; i < FrameMap::nof_cpu_regs; i++) {
192 191 Register r = as_Register(i);
193 192 if (r == G1 || r == G3 || r == G4 || r == G5) {
194 193 int sp_offset = cpu_reg_save_offsets[i];
195 194 __ st_ptr(r, SP, (sp_offset * BytesPerWord) + STACK_BIAS);
196 195 }
197 196 }
198 197
199 198 if (save_fpu_registers) {
200 199 for (i = 0; i < FrameMap::nof_fpu_regs; i++) {
201 200 FloatRegister r = as_FloatRegister(i);
202 201 int sp_offset = fpu_reg_save_offsets[i];
203 202 __ stf(FloatRegisterImpl::S, r, SP, (sp_offset * BytesPerWord) + STACK_BIAS);
204 203 }
205 204 }
206 205
207 206 return generate_oop_map(sasm, save_fpu_registers);
208 207 }
209 208
210 209 static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = true) {
211 210 for (int i = 0; i < FrameMap::nof_cpu_regs; i++) {
212 211 Register r = as_Register(i);
213 212 if (r == G1 || r == G3 || r == G4 || r == G5) {
214 213 __ ld_ptr(SP, (cpu_reg_save_offsets[i] * BytesPerWord) + STACK_BIAS, r);
215 214 }
216 215 }
217 216
218 217 if (restore_fpu_registers) {
219 218 for (int i = 0; i < FrameMap::nof_fpu_regs; i++) {
220 219 FloatRegister r = as_FloatRegister(i);
221 220 __ ldf(FloatRegisterImpl::S, SP, (fpu_reg_save_offsets[i] * BytesPerWord) + STACK_BIAS, r);
222 221 }
223 222 }
224 223 }
225 224
226 225
227 226 void Runtime1::initialize_pd() {
228 227 // compute word offsets from SP at which live (non-windowed) registers are captured by stub routines
229 228 //
230 229 // A stub routine will have a frame that is at least large enough to hold
231 230 // a register window save area (obviously) and the volatile g registers
232 231 // and floating registers. A user of save_live_registers can have a frame
233 232 // that has more scratch area in it (although typically they will use L-regs).
234 233 // in that case the frame will look like this (stack growing down)
235 234 //
236 235 // FP -> | |
237 236 // | scratch mem |
238 237 // | " " |
239 238 // --------------
240 239 // | float regs |
241 240 // | " " |
242 241 // ---------------
243 242 // | G regs |
244 243 // | " " |
245 244 // ---------------
246 245 // | abi reg. |
247 246 // | window save |
248 247 // | area |
249 248 // SP -> ---------------
250 249 //
251 250 int i;
252 251 int sp_offset = round_to(frame::register_save_words, 2); // start doubleword aligned
253 252
254 253 // only G int registers are saved explicitly; others are found in register windows
255 254 for (i = 0; i < FrameMap::nof_cpu_regs; i++) {
256 255 Register r = as_Register(i);
257 256 if (r == G1 || r == G3 || r == G4 || r == G5) {
258 257 cpu_reg_save_offsets[i] = sp_offset;
259 258 sp_offset++;
260 259 }
261 260 }
262 261
263 262 // all float registers are saved explicitly
264 263 assert(FrameMap::nof_fpu_regs == 32, "double registers not handled here");
265 264 for (i = 0; i < FrameMap::nof_fpu_regs; i++) {
266 265 fpu_reg_save_offsets[i] = sp_offset;
267 266 sp_offset++;
268 267 }
269 268 reg_save_size_in_words = sp_offset - frame::memory_parameter_word_sp_offset;
270 269 // this should match assembler::total_frame_size_in_bytes, which
271 270 // isn't callable from this context. It's checked by an assert when
272 271 // it's used though.
273 272 frame_size_in_bytes = align_size_up(sp_offset * wordSize, 8);
274 273 }
275 274
276 275
277 276 OopMapSet* Runtime1::generate_exception_throw(StubAssembler* sasm, address target, bool has_argument) {
278 277 // make a frame and preserve the caller's caller-save registers
279 278 OopMap* oop_map = save_live_registers(sasm);
280 279 int call_offset;
281 280 if (!has_argument) {
282 281 call_offset = __ call_RT(noreg, noreg, target);
283 282 } else {
284 283 call_offset = __ call_RT(noreg, noreg, target, G4);
285 284 }
286 285 OopMapSet* oop_maps = new OopMapSet();
287 286 oop_maps->add_gc_map(call_offset, oop_map);
288 287
289 288 __ should_not_reach_here();
290 289 return oop_maps;
291 290 }
292 291
293 292
294 293 OopMapSet* Runtime1::generate_stub_call(StubAssembler* sasm, Register result, address target,
295 294 Register arg1, Register arg2, Register arg3) {
296 295 // make a frame and preserve the caller's caller-save registers
297 296 OopMap* oop_map = save_live_registers(sasm);
298 297
299 298 int call_offset;
300 299 if (arg1 == noreg) {
301 300 call_offset = __ call_RT(result, noreg, target);
302 301 } else if (arg2 == noreg) {
303 302 call_offset = __ call_RT(result, noreg, target, arg1);
304 303 } else if (arg3 == noreg) {
305 304 call_offset = __ call_RT(result, noreg, target, arg1, arg2);
306 305 } else {
307 306 call_offset = __ call_RT(result, noreg, target, arg1, arg2, arg3);
308 307 }
309 308 OopMapSet* oop_maps = NULL;
310 309
311 310 oop_maps = new OopMapSet();
312 311 oop_maps->add_gc_map(call_offset, oop_map);
313 312 restore_live_registers(sasm);
314 313
315 314 __ ret();
316 315 __ delayed()->restore();
317 316
318 317 return oop_maps;
319 318 }
320 319
321 320
322 321 OopMapSet* Runtime1::generate_patching(StubAssembler* sasm, address target) {
323 322 // make a frame and preserve the caller's caller-save registers
324 323 OopMap* oop_map = save_live_registers(sasm);
325 324
326 325 // call the runtime patching routine, returns non-zero if nmethod got deopted.
327 326 int call_offset = __ call_RT(noreg, noreg, target);
328 327 OopMapSet* oop_maps = new OopMapSet();
329 328 oop_maps->add_gc_map(call_offset, oop_map);
330 329
331 330 // re-execute the patched instruction or, if the nmethod was deoptmized, return to the
332 331 // deoptimization handler entry that will cause re-execution of the current bytecode
333 332 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
334 333 assert(deopt_blob != NULL, "deoptimization blob must have been created");
335 334
336 335 Label no_deopt;
337 336 __ tst(O0);
338 337 __ brx(Assembler::equal, false, Assembler::pt, no_deopt);
339 338 __ delayed()->nop();
340 339
341 340 // return to the deoptimization handler entry for unpacking and rexecute
342 341 // if we simply returned the we'd deopt as if any call we patched had just
343 342 // returned.
344 343
345 344 restore_live_registers(sasm);
346 345
347 346 AddressLiteral dest(deopt_blob->unpack_with_reexecution());
348 347 __ jump_to(dest, O0);
349 348 __ delayed()->restore();
350 349
351 350 __ bind(no_deopt);
352 351 restore_live_registers(sasm);
353 352 __ ret();
354 353 __ delayed()->restore();
355 354
356 355 return oop_maps;
357 356 }
358 357
359 358 OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) {
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360 359
361 360 OopMapSet* oop_maps = NULL;
362 361 // for better readability
363 362 const bool must_gc_arguments = true;
364 363 const bool dont_gc_arguments = false;
365 364
366 365 // stub code & info for the different stubs
367 366 switch (id) {
368 367 case forward_exception_id:
369 368 {
370 - // we're handling an exception in the context of a compiled
371 - // frame. The registers have been saved in the standard
372 - // places. Perform an exception lookup in the caller and
373 - // dispatch to the handler if found. Otherwise unwind and
374 - // dispatch to the callers exception handler.
375 -
376 - oop_maps = new OopMapSet();
377 - OopMap* oop_map = generate_oop_map(sasm, true);
378 -
379 - // transfer the pending exception to the exception_oop
380 - __ ld_ptr(G2_thread, in_bytes(JavaThread::pending_exception_offset()), Oexception);
381 - __ ld_ptr(Oexception, 0, G0);
382 - __ st_ptr(G0, G2_thread, in_bytes(JavaThread::pending_exception_offset()));
383 - __ add(I7, frame::pc_return_offset, Oissuing_pc);
384 -
385 - generate_handle_exception(sasm, oop_maps, oop_map);
386 - __ should_not_reach_here();
369 + oop_maps = generate_handle_exception(id, sasm);
387 370 }
388 371 break;
389 372
390 373 case new_instance_id:
391 374 case fast_new_instance_id:
392 375 case fast_new_instance_init_check_id:
393 376 {
394 377 Register G5_klass = G5; // Incoming
395 378 Register O0_obj = O0; // Outgoing
396 379
397 380 if (id == new_instance_id) {
398 381 __ set_info("new_instance", dont_gc_arguments);
399 382 } else if (id == fast_new_instance_id) {
400 383 __ set_info("fast new_instance", dont_gc_arguments);
401 384 } else {
402 385 assert(id == fast_new_instance_init_check_id, "bad StubID");
403 386 __ set_info("fast new_instance init check", dont_gc_arguments);
404 387 }
405 388
406 389 if ((id == fast_new_instance_id || id == fast_new_instance_init_check_id) &&
407 390 UseTLAB && FastTLABRefill) {
408 391 Label slow_path;
409 392 Register G1_obj_size = G1;
410 393 Register G3_t1 = G3;
411 394 Register G4_t2 = G4;
412 395 assert_different_registers(G5_klass, G1_obj_size, G3_t1, G4_t2);
413 396
414 397 // Push a frame since we may do dtrace notification for the
415 398 // allocation which requires calling out and we don't want
416 399 // to stomp the real return address.
417 400 __ save_frame(0);
418 401
419 402 if (id == fast_new_instance_init_check_id) {
420 403 // make sure the klass is initialized
421 404 __ ld(G5_klass, instanceKlass::init_state_offset_in_bytes() + sizeof(oopDesc), G3_t1);
422 405 __ cmp(G3_t1, instanceKlass::fully_initialized);
423 406 __ br(Assembler::notEqual, false, Assembler::pn, slow_path);
424 407 __ delayed()->nop();
425 408 }
426 409 #ifdef ASSERT
427 410 // assert object can be fast path allocated
428 411 {
429 412 Label ok, not_ok;
430 413 __ ld(G5_klass, Klass::layout_helper_offset_in_bytes() + sizeof(oopDesc), G1_obj_size);
431 414 __ cmp(G1_obj_size, 0); // make sure it's an instance (LH > 0)
432 415 __ br(Assembler::lessEqual, false, Assembler::pn, not_ok);
433 416 __ delayed()->nop();
434 417 __ btst(Klass::_lh_instance_slow_path_bit, G1_obj_size);
435 418 __ br(Assembler::zero, false, Assembler::pn, ok);
436 419 __ delayed()->nop();
437 420 __ bind(not_ok);
438 421 __ stop("assert(can be fast path allocated)");
439 422 __ should_not_reach_here();
440 423 __ bind(ok);
441 424 }
442 425 #endif // ASSERT
443 426 // if we got here then the TLAB allocation failed, so try
444 427 // refilling the TLAB or allocating directly from eden.
445 428 Label retry_tlab, try_eden;
446 429 __ tlab_refill(retry_tlab, try_eden, slow_path); // preserves G5_klass
447 430
448 431 __ bind(retry_tlab);
449 432
450 433 // get the instance size
451 434 __ ld(G5_klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes(), G1_obj_size);
452 435
453 436 __ tlab_allocate(O0_obj, G1_obj_size, 0, G3_t1, slow_path);
454 437
455 438 __ initialize_object(O0_obj, G5_klass, G1_obj_size, 0, G3_t1, G4_t2);
456 439 __ verify_oop(O0_obj);
457 440 __ mov(O0, I0);
458 441 __ ret();
459 442 __ delayed()->restore();
460 443
461 444 __ bind(try_eden);
462 445 // get the instance size
463 446 __ ld(G5_klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes(), G1_obj_size);
464 447 __ eden_allocate(O0_obj, G1_obj_size, 0, G3_t1, G4_t2, slow_path);
465 448 __ incr_allocated_bytes(G1_obj_size, G3_t1, G4_t2);
466 449
467 450 __ initialize_object(O0_obj, G5_klass, G1_obj_size, 0, G3_t1, G4_t2);
468 451 __ verify_oop(O0_obj);
469 452 __ mov(O0, I0);
470 453 __ ret();
471 454 __ delayed()->restore();
472 455
473 456 __ bind(slow_path);
474 457
475 458 // pop this frame so generate_stub_call can push it's own
476 459 __ restore();
477 460 }
478 461
479 462 oop_maps = generate_stub_call(sasm, I0, CAST_FROM_FN_PTR(address, new_instance), G5_klass);
480 463 // I0->O0: new instance
481 464 }
482 465
483 466 break;
484 467
485 468 case counter_overflow_id:
486 469 // G4 contains bci, G5 contains method
487 470 oop_maps = generate_stub_call(sasm, noreg, CAST_FROM_FN_PTR(address, counter_overflow), G4, G5);
488 471 break;
489 472
490 473 case new_type_array_id:
491 474 case new_object_array_id:
492 475 {
493 476 Register G5_klass = G5; // Incoming
494 477 Register G4_length = G4; // Incoming
495 478 Register O0_obj = O0; // Outgoing
496 479
497 480 Address klass_lh(G5_klass, ((klassOopDesc::header_size() * HeapWordSize)
498 481 + Klass::layout_helper_offset_in_bytes()));
499 482 assert(Klass::_lh_header_size_shift % BitsPerByte == 0, "bytewise");
500 483 assert(Klass::_lh_header_size_mask == 0xFF, "bytewise");
501 484 // Use this offset to pick out an individual byte of the layout_helper:
502 485 const int klass_lh_header_size_offset = ((BytesPerInt - 1) // 3 - 2 selects byte {0,1,0,0}
503 486 - Klass::_lh_header_size_shift / BitsPerByte);
504 487
505 488 if (id == new_type_array_id) {
506 489 __ set_info("new_type_array", dont_gc_arguments);
507 490 } else {
508 491 __ set_info("new_object_array", dont_gc_arguments);
509 492 }
510 493
511 494 #ifdef ASSERT
512 495 // assert object type is really an array of the proper kind
513 496 {
514 497 Label ok;
515 498 Register G3_t1 = G3;
516 499 __ ld(klass_lh, G3_t1);
517 500 __ sra(G3_t1, Klass::_lh_array_tag_shift, G3_t1);
518 501 int tag = ((id == new_type_array_id)
519 502 ? Klass::_lh_array_tag_type_value
520 503 : Klass::_lh_array_tag_obj_value);
521 504 __ cmp(G3_t1, tag);
522 505 __ brx(Assembler::equal, false, Assembler::pt, ok);
523 506 __ delayed()->nop();
524 507 __ stop("assert(is an array klass)");
525 508 __ should_not_reach_here();
526 509 __ bind(ok);
527 510 }
528 511 #endif // ASSERT
529 512
530 513 if (UseTLAB && FastTLABRefill) {
531 514 Label slow_path;
532 515 Register G1_arr_size = G1;
533 516 Register G3_t1 = G3;
534 517 Register O1_t2 = O1;
535 518 assert_different_registers(G5_klass, G4_length, G1_arr_size, G3_t1, O1_t2);
536 519
537 520 // check that array length is small enough for fast path
538 521 __ set(C1_MacroAssembler::max_array_allocation_length, G3_t1);
539 522 __ cmp(G4_length, G3_t1);
540 523 __ br(Assembler::greaterUnsigned, false, Assembler::pn, slow_path);
541 524 __ delayed()->nop();
542 525
543 526 // if we got here then the TLAB allocation failed, so try
544 527 // refilling the TLAB or allocating directly from eden.
545 528 Label retry_tlab, try_eden;
546 529 __ tlab_refill(retry_tlab, try_eden, slow_path); // preserves G4_length and G5_klass
547 530
548 531 __ bind(retry_tlab);
549 532
550 533 // get the allocation size: (length << (layout_helper & 0x1F)) + header_size
551 534 __ ld(klass_lh, G3_t1);
552 535 __ sll(G4_length, G3_t1, G1_arr_size);
553 536 __ srl(G3_t1, Klass::_lh_header_size_shift, G3_t1);
554 537 __ and3(G3_t1, Klass::_lh_header_size_mask, G3_t1);
555 538 __ add(G1_arr_size, G3_t1, G1_arr_size);
556 539 __ add(G1_arr_size, MinObjAlignmentInBytesMask, G1_arr_size); // align up
557 540 __ and3(G1_arr_size, ~MinObjAlignmentInBytesMask, G1_arr_size);
558 541
559 542 __ tlab_allocate(O0_obj, G1_arr_size, 0, G3_t1, slow_path); // preserves G1_arr_size
560 543
561 544 __ initialize_header(O0_obj, G5_klass, G4_length, G3_t1, O1_t2);
562 545 __ ldub(klass_lh, G3_t1, klass_lh_header_size_offset);
563 546 __ sub(G1_arr_size, G3_t1, O1_t2); // body length
564 547 __ add(O0_obj, G3_t1, G3_t1); // body start
565 548 __ initialize_body(G3_t1, O1_t2);
566 549 __ verify_oop(O0_obj);
567 550 __ retl();
568 551 __ delayed()->nop();
569 552
570 553 __ bind(try_eden);
571 554 // get the allocation size: (length << (layout_helper & 0x1F)) + header_size
572 555 __ ld(klass_lh, G3_t1);
573 556 __ sll(G4_length, G3_t1, G1_arr_size);
574 557 __ srl(G3_t1, Klass::_lh_header_size_shift, G3_t1);
575 558 __ and3(G3_t1, Klass::_lh_header_size_mask, G3_t1);
576 559 __ add(G1_arr_size, G3_t1, G1_arr_size);
577 560 __ add(G1_arr_size, MinObjAlignmentInBytesMask, G1_arr_size);
578 561 __ and3(G1_arr_size, ~MinObjAlignmentInBytesMask, G1_arr_size);
579 562
580 563 __ eden_allocate(O0_obj, G1_arr_size, 0, G3_t1, O1_t2, slow_path); // preserves G1_arr_size
581 564 __ incr_allocated_bytes(G1_arr_size, G3_t1, O1_t2);
582 565
583 566 __ initialize_header(O0_obj, G5_klass, G4_length, G3_t1, O1_t2);
584 567 __ ldub(klass_lh, G3_t1, klass_lh_header_size_offset);
585 568 __ sub(G1_arr_size, G3_t1, O1_t2); // body length
586 569 __ add(O0_obj, G3_t1, G3_t1); // body start
587 570 __ initialize_body(G3_t1, O1_t2);
588 571 __ verify_oop(O0_obj);
589 572 __ retl();
590 573 __ delayed()->nop();
591 574
592 575 __ bind(slow_path);
593 576 }
594 577
595 578 if (id == new_type_array_id) {
596 579 oop_maps = generate_stub_call(sasm, I0, CAST_FROM_FN_PTR(address, new_type_array), G5_klass, G4_length);
597 580 } else {
598 581 oop_maps = generate_stub_call(sasm, I0, CAST_FROM_FN_PTR(address, new_object_array), G5_klass, G4_length);
599 582 }
600 583 // I0 -> O0: new array
601 584 }
602 585 break;
603 586
604 587 case new_multi_array_id:
605 588 { // O0: klass
606 589 // O1: rank
607 590 // O2: address of 1st dimension
608 591 __ set_info("new_multi_array", dont_gc_arguments);
609 592 oop_maps = generate_stub_call(sasm, I0, CAST_FROM_FN_PTR(address, new_multi_array), I0, I1, I2);
610 593 // I0 -> O0: new multi array
611 594 }
612 595 break;
613 596
614 597 case register_finalizer_id:
615 598 {
616 599 __ set_info("register_finalizer", dont_gc_arguments);
617 600
618 601 // load the klass and check the has finalizer flag
619 602 Label register_finalizer;
620 603 Register t = O1;
621 604 __ load_klass(O0, t);
622 605 __ ld(t, Klass::access_flags_offset_in_bytes() + sizeof(oopDesc), t);
623 606 __ set(JVM_ACC_HAS_FINALIZER, G3);
624 607 __ andcc(G3, t, G0);
625 608 __ br(Assembler::notZero, false, Assembler::pt, register_finalizer);
626 609 __ delayed()->nop();
627 610
628 611 // do a leaf return
629 612 __ retl();
630 613 __ delayed()->nop();
631 614
632 615 __ bind(register_finalizer);
633 616 OopMap* oop_map = save_live_registers(sasm);
634 617 int call_offset = __ call_RT(noreg, noreg,
635 618 CAST_FROM_FN_PTR(address, SharedRuntime::register_finalizer), I0);
636 619 oop_maps = new OopMapSet();
637 620 oop_maps->add_gc_map(call_offset, oop_map);
638 621
639 622 // Now restore all the live registers
640 623 restore_live_registers(sasm);
641 624
642 625 __ ret();
643 626 __ delayed()->restore();
644 627 }
645 628 break;
646 629
647 630 case throw_range_check_failed_id:
648 631 { __ set_info("range_check_failed", dont_gc_arguments); // arguments will be discarded
649 632 // G4: index
650 633 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_range_check_exception), true);
651 634 }
652 635 break;
653 636
654 637 case throw_index_exception_id:
655 638 { __ set_info("index_range_check_failed", dont_gc_arguments); // arguments will be discarded
656 639 // G4: index
657 640 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_index_exception), true);
658 641 }
659 642 break;
660 643
661 644 case throw_div0_exception_id:
662 645 { __ set_info("throw_div0_exception", dont_gc_arguments);
663 646 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_div0_exception), false);
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664 647 }
665 648 break;
666 649
667 650 case throw_null_pointer_exception_id:
668 651 { __ set_info("throw_null_pointer_exception", dont_gc_arguments);
669 652 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_null_pointer_exception), false);
670 653 }
671 654 break;
672 655
673 656 case handle_exception_id:
674 - {
675 - __ set_info("handle_exception", dont_gc_arguments);
676 - // make a frame and preserve the caller's caller-save registers
657 + { __ set_info("handle_exception", dont_gc_arguments);
658 + oop_maps = generate_handle_exception(id, sasm);
659 + }
660 + break;
677 661
678 - oop_maps = new OopMapSet();
679 - OopMap* oop_map = save_live_registers(sasm);
680 - __ mov(Oexception->after_save(), Oexception);
681 - __ mov(Oissuing_pc->after_save(), Oissuing_pc);
682 - generate_handle_exception(sasm, oop_maps, oop_map);
662 + case handle_exception_from_callee_id:
663 + { __ set_info("handle_exception_from_callee", dont_gc_arguments);
664 + oop_maps = generate_handle_exception(id, sasm);
683 665 }
684 666 break;
685 667
686 668 case unwind_exception_id:
687 669 {
688 670 // O0: exception
689 671 // I7: address of call to this method
690 672
691 673 __ set_info("unwind_exception", dont_gc_arguments);
692 674 __ mov(Oexception, Oexception->after_save());
693 675 __ add(I7, frame::pc_return_offset, Oissuing_pc->after_save());
694 676
695 677 __ call_VM_leaf(L7_thread_cache, CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address),
696 678 G2_thread, Oissuing_pc->after_save());
697 679 __ verify_not_null_oop(Oexception->after_save());
698 680
699 - // Restore SP from L7 if the exception PC is a MethodHandle call site.
681 + // Restore SP from L7 if the exception PC is a method handle call site.
700 682 __ mov(O0, G5); // Save the target address.
701 683 __ lduw(Address(G2_thread, JavaThread::is_method_handle_return_offset()), L0);
702 684 __ tst(L0); // Condition codes are preserved over the restore.
703 685 __ restore();
704 686
705 687 __ jmp(G5, 0);
706 688 __ delayed()->movcc(Assembler::notZero, false, Assembler::icc, L7_mh_SP_save, SP); // Restore SP if required.
707 689 }
708 690 break;
709 691
710 692 case throw_array_store_exception_id:
711 693 {
712 694 __ set_info("throw_array_store_exception", dont_gc_arguments);
713 695 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_array_store_exception), true);
714 696 }
715 697 break;
716 698
717 699 case throw_class_cast_exception_id:
718 700 {
719 701 // G4: object
720 702 __ set_info("throw_class_cast_exception", dont_gc_arguments);
721 703 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_class_cast_exception), true);
722 704 }
723 705 break;
724 706
725 707 case throw_incompatible_class_change_error_id:
726 708 {
727 709 __ set_info("throw_incompatible_class_cast_exception", dont_gc_arguments);
728 710 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_incompatible_class_change_error), false);
729 711 }
730 712 break;
731 713
732 714 case slow_subtype_check_id:
733 715 { // Support for uint StubRoutine::partial_subtype_check( Klass sub, Klass super );
734 716 // Arguments :
735 717 //
736 718 // ret : G3
737 719 // sub : G3, argument, destroyed
738 720 // super: G1, argument, not changed
739 721 // raddr: O7, blown by call
740 722 Label miss;
741 723
742 724 __ save_frame(0); // Blow no registers!
743 725
744 726 __ check_klass_subtype_slow_path(G3, G1, L0, L1, L2, L4, NULL, &miss);
745 727
746 728 __ mov(1, G3);
747 729 __ ret(); // Result in G5 is 'true'
748 730 __ delayed()->restore(); // free copy or add can go here
749 731
750 732 __ bind(miss);
751 733 __ mov(0, G3);
752 734 __ ret(); // Result in G5 is 'false'
753 735 __ delayed()->restore(); // free copy or add can go here
754 736 }
755 737
756 738 case monitorenter_nofpu_id:
757 739 case monitorenter_id:
758 740 { // G4: object
759 741 // G5: lock address
760 742 __ set_info("monitorenter", dont_gc_arguments);
761 743
762 744 int save_fpu_registers = (id == monitorenter_id);
763 745 // make a frame and preserve the caller's caller-save registers
764 746 OopMap* oop_map = save_live_registers(sasm, save_fpu_registers);
765 747
766 748 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorenter), G4, G5);
767 749
768 750 oop_maps = new OopMapSet();
769 751 oop_maps->add_gc_map(call_offset, oop_map);
770 752 restore_live_registers(sasm, save_fpu_registers);
771 753
772 754 __ ret();
773 755 __ delayed()->restore();
774 756 }
775 757 break;
776 758
777 759 case monitorexit_nofpu_id:
778 760 case monitorexit_id:
779 761 { // G4: lock address
780 762 // note: really a leaf routine but must setup last java sp
781 763 // => use call_RT for now (speed can be improved by
782 764 // doing last java sp setup manually)
783 765 __ set_info("monitorexit", dont_gc_arguments);
784 766
785 767 int save_fpu_registers = (id == monitorexit_id);
786 768 // make a frame and preserve the caller's caller-save registers
787 769 OopMap* oop_map = save_live_registers(sasm, save_fpu_registers);
788 770
789 771 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorexit), G4);
790 772
791 773 oop_maps = new OopMapSet();
792 774 oop_maps->add_gc_map(call_offset, oop_map);
793 775 restore_live_registers(sasm, save_fpu_registers);
794 776
795 777 __ ret();
796 778 __ delayed()->restore();
797 779
798 780 }
799 781 break;
800 782
801 783 case access_field_patching_id:
802 784 { __ set_info("access_field_patching", dont_gc_arguments);
803 785 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, access_field_patching));
804 786 }
805 787 break;
806 788
807 789 case load_klass_patching_id:
808 790 { __ set_info("load_klass_patching", dont_gc_arguments);
809 791 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_klass_patching));
810 792 }
811 793 break;
812 794
813 795 case jvmti_exception_throw_id:
814 796 { // Oexception : exception
815 797 __ set_info("jvmti_exception_throw", dont_gc_arguments);
816 798 oop_maps = generate_stub_call(sasm, noreg, CAST_FROM_FN_PTR(address, Runtime1::post_jvmti_exception_throw), I0);
817 799 }
818 800 break;
819 801
820 802 case dtrace_object_alloc_id:
821 803 { // O0: object
822 804 __ set_info("dtrace_object_alloc", dont_gc_arguments);
823 805 // we can't gc here so skip the oopmap but make sure that all
824 806 // the live registers get saved.
825 807 save_live_registers(sasm);
826 808
827 809 __ save_thread(L7_thread_cache);
828 810 __ call(CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_object_alloc),
829 811 relocInfo::runtime_call_type);
830 812 __ delayed()->mov(I0, O0);
831 813 __ restore_thread(L7_thread_cache);
832 814
833 815 restore_live_registers(sasm);
834 816 __ ret();
835 817 __ delayed()->restore();
836 818 }
837 819 break;
838 820
839 821 #ifndef SERIALGC
840 822 case g1_pre_barrier_slow_id:
841 823 { // G4: previous value of memory
842 824 BarrierSet* bs = Universe::heap()->barrier_set();
843 825 if (bs->kind() != BarrierSet::G1SATBCTLogging) {
844 826 __ save_frame(0);
845 827 __ set((int)id, O1);
846 828 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), I0);
847 829 __ should_not_reach_here();
848 830 break;
849 831 }
850 832
851 833 __ set_info("g1_pre_barrier_slow_id", dont_gc_arguments);
852 834
853 835 Register pre_val = G4;
854 836 Register tmp = G1_scratch;
855 837 Register tmp2 = G3_scratch;
856 838
857 839 Label refill, restart;
858 840 bool with_frame = false; // I don't know if we can do with-frame.
859 841 int satb_q_index_byte_offset =
860 842 in_bytes(JavaThread::satb_mark_queue_offset() +
861 843 PtrQueue::byte_offset_of_index());
862 844 int satb_q_buf_byte_offset =
863 845 in_bytes(JavaThread::satb_mark_queue_offset() +
864 846 PtrQueue::byte_offset_of_buf());
865 847 __ bind(restart);
866 848 __ ld_ptr(G2_thread, satb_q_index_byte_offset, tmp);
867 849
868 850 __ br_on_reg_cond(Assembler::rc_z, /*annul*/false,
869 851 Assembler::pn, tmp, refill);
870 852
871 853 // If the branch is taken, no harm in executing this in the delay slot.
872 854 __ delayed()->ld_ptr(G2_thread, satb_q_buf_byte_offset, tmp2);
873 855 __ sub(tmp, oopSize, tmp);
874 856
875 857 __ st_ptr(pre_val, tmp2, tmp); // [_buf + index] := <address_of_card>
876 858 // Use return-from-leaf
877 859 __ retl();
878 860 __ delayed()->st_ptr(tmp, G2_thread, satb_q_index_byte_offset);
879 861
880 862 __ bind(refill);
881 863 __ save_frame(0);
882 864
883 865 __ mov(pre_val, L0);
884 866 __ mov(tmp, L1);
885 867 __ mov(tmp2, L2);
886 868
887 869 __ call_VM_leaf(L7_thread_cache,
888 870 CAST_FROM_FN_PTR(address,
889 871 SATBMarkQueueSet::handle_zero_index_for_thread),
890 872 G2_thread);
891 873
892 874 __ mov(L0, pre_val);
893 875 __ mov(L1, tmp);
894 876 __ mov(L2, tmp2);
895 877
896 878 __ br(Assembler::always, /*annul*/false, Assembler::pt, restart);
897 879 __ delayed()->restore();
898 880 }
899 881 break;
900 882
901 883 case g1_post_barrier_slow_id:
902 884 {
903 885 BarrierSet* bs = Universe::heap()->barrier_set();
904 886 if (bs->kind() != BarrierSet::G1SATBCTLogging) {
905 887 __ save_frame(0);
906 888 __ set((int)id, O1);
907 889 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), I0);
908 890 __ should_not_reach_here();
909 891 break;
910 892 }
911 893
912 894 __ set_info("g1_post_barrier_slow_id", dont_gc_arguments);
913 895
914 896 Register addr = G4;
915 897 Register cardtable = G5;
916 898 Register tmp = G1_scratch;
917 899 Register tmp2 = G3_scratch;
918 900 jbyte* byte_map_base = ((CardTableModRefBS*)bs)->byte_map_base;
919 901
920 902 Label not_already_dirty, restart, refill;
921 903
922 904 #ifdef _LP64
923 905 __ srlx(addr, CardTableModRefBS::card_shift, addr);
924 906 #else
925 907 __ srl(addr, CardTableModRefBS::card_shift, addr);
926 908 #endif
927 909
928 910 AddressLiteral rs(byte_map_base);
929 911 __ set(rs, cardtable); // cardtable := <card table base>
930 912 __ ldub(addr, cardtable, tmp); // tmp := [addr + cardtable]
931 913
932 914 __ br_on_reg_cond(Assembler::rc_nz, /*annul*/false, Assembler::pt,
933 915 tmp, not_already_dirty);
934 916 // Get cardtable + tmp into a reg by itself -- useful in the take-the-branch
935 917 // case, harmless if not.
936 918 __ delayed()->add(addr, cardtable, tmp2);
937 919
938 920 // We didn't take the branch, so we're already dirty: return.
939 921 // Use return-from-leaf
940 922 __ retl();
941 923 __ delayed()->nop();
942 924
943 925 // Not dirty.
944 926 __ bind(not_already_dirty);
945 927 // First, dirty it.
946 928 __ stb(G0, tmp2, 0); // [cardPtr] := 0 (i.e., dirty).
947 929
948 930 Register tmp3 = cardtable;
949 931 Register tmp4 = tmp;
950 932
951 933 // these registers are now dead
952 934 addr = cardtable = tmp = noreg;
953 935
954 936 int dirty_card_q_index_byte_offset =
955 937 in_bytes(JavaThread::dirty_card_queue_offset() +
956 938 PtrQueue::byte_offset_of_index());
957 939 int dirty_card_q_buf_byte_offset =
958 940 in_bytes(JavaThread::dirty_card_queue_offset() +
959 941 PtrQueue::byte_offset_of_buf());
960 942 __ bind(restart);
961 943 __ ld_ptr(G2_thread, dirty_card_q_index_byte_offset, tmp3);
962 944
963 945 __ br_on_reg_cond(Assembler::rc_z, /*annul*/false, Assembler::pn,
964 946 tmp3, refill);
965 947 // If the branch is taken, no harm in executing this in the delay slot.
966 948 __ delayed()->ld_ptr(G2_thread, dirty_card_q_buf_byte_offset, tmp4);
967 949 __ sub(tmp3, oopSize, tmp3);
968 950
969 951 __ st_ptr(tmp2, tmp4, tmp3); // [_buf + index] := <address_of_card>
970 952 // Use return-from-leaf
971 953 __ retl();
972 954 __ delayed()->st_ptr(tmp3, G2_thread, dirty_card_q_index_byte_offset);
973 955
974 956 __ bind(refill);
975 957 __ save_frame(0);
976 958
977 959 __ mov(tmp2, L0);
978 960 __ mov(tmp3, L1);
979 961 __ mov(tmp4, L2);
980 962
981 963 __ call_VM_leaf(L7_thread_cache,
982 964 CAST_FROM_FN_PTR(address,
983 965 DirtyCardQueueSet::handle_zero_index_for_thread),
984 966 G2_thread);
985 967
986 968 __ mov(L0, tmp2);
987 969 __ mov(L1, tmp3);
988 970 __ mov(L2, tmp4);
989 971
990 972 __ br(Assembler::always, /*annul*/false, Assembler::pt, restart);
991 973 __ delayed()->restore();
992 974 }
993 975 break;
994 976 #endif // !SERIALGC
995 977
996 978 default:
997 979 { __ set_info("unimplemented entry", dont_gc_arguments);
998 980 __ save_frame(0);
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999 981 __ set((int)id, O1);
1000 982 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), O1);
1001 983 __ should_not_reach_here();
1002 984 }
1003 985 break;
1004 986 }
1005 987 return oop_maps;
1006 988 }
1007 989
1008 990
1009 -void Runtime1::generate_handle_exception(StubAssembler* sasm, OopMapSet* oop_maps, OopMap* oop_map, bool) {
1010 - Label no_deopt;
991 +OopMapSet* Runtime1::generate_handle_exception(StubID id, StubAssembler* sasm) {
992 + __ block_comment("generate_handle_exception");
993 +
994 + // Save registers, if required.
995 + OopMapSet* oop_maps = new OopMapSet();
996 + OopMap* oop_map = NULL;
997 + switch (id) {
998 + case forward_exception_id:
999 + // We're handling an exception in the context of a compiled frame.
1000 + // The registers have been saved in the standard places. Perform
1001 + // an exception lookup in the caller and dispatch to the handler
1002 + // if found. Otherwise unwind and dispatch to the callers
1003 + // exception handler.
1004 + oop_map = generate_oop_map(sasm, true);
1005 +
1006 + // transfer the pending exception to the exception_oop
1007 + __ ld_ptr(G2_thread, in_bytes(JavaThread::pending_exception_offset()), Oexception);
1008 + __ ld_ptr(Oexception, 0, G0);
1009 + __ st_ptr(G0, G2_thread, in_bytes(JavaThread::pending_exception_offset()));
1010 + __ add(I7, frame::pc_return_offset, Oissuing_pc);
1011 + break;
1012 + case handle_exception_id:
1013 + // At this point all registers MAY be live.
1014 + oop_map = save_live_registers(sasm);
1015 + __ mov(Oexception->after_save(), Oexception);
1016 + __ mov(Oissuing_pc->after_save(), Oissuing_pc);
1017 + break;
1018 + case handle_exception_from_callee_id:
1019 + // At this point all registers except exception oop (Oexception)
1020 + // and exception pc (Oissuing_pc) are dead.
1021 + oop_map = new OopMap(frame_size_in_bytes / sizeof(jint), 0);
1022 + sasm->set_frame_size(frame_size_in_bytes / BytesPerWord);
1023 + __ save_frame_c1(frame_size_in_bytes);
1024 + __ mov(Oexception->after_save(), Oexception);
1025 + __ mov(Oissuing_pc->after_save(), Oissuing_pc);
1026 + break;
1027 + default: ShouldNotReachHere();
1028 + }
1011 1029
1012 1030 __ verify_not_null_oop(Oexception);
1013 1031
1014 1032 // save the exception and issuing pc in the thread
1015 - __ st_ptr(Oexception, G2_thread, in_bytes(JavaThread::exception_oop_offset()));
1033 + __ st_ptr(Oexception, G2_thread, in_bytes(JavaThread::exception_oop_offset()));
1016 1034 __ st_ptr(Oissuing_pc, G2_thread, in_bytes(JavaThread::exception_pc_offset()));
1017 1035
1018 - // save the real return address and use the throwing pc as the return address to lookup (has bci & oop map)
1019 - __ mov(I7, L0);
1036 + // use the throwing pc as the return address to lookup (has bci & oop map)
1020 1037 __ mov(Oissuing_pc, I7);
1021 1038 __ sub(I7, frame::pc_return_offset, I7);
1022 1039 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, exception_handler_for_pc));
1040 + oop_maps->add_gc_map(call_offset, oop_map);
1023 1041
1024 1042 // Note: if nmethod has been deoptimized then regardless of
1025 1043 // whether it had a handler or not we will deoptimize
1026 1044 // by entering the deopt blob with a pending exception.
1027 1045
1028 -#ifdef ASSERT
1029 - Label done;
1030 - __ tst(O0);
1031 - __ br(Assembler::notZero, false, Assembler::pn, done);
1032 - __ delayed()->nop();
1033 - __ stop("should have found address");
1034 - __ bind(done);
1035 -#endif
1036 -
1037 - // restore the registers that were saved at the beginning and jump to the exception handler.
1038 - restore_live_registers(sasm);
1039 -
1040 - __ jmp(O0, 0);
1041 - __ delayed()->restore();
1046 + // Restore the registers that were saved at the beginning, remove
1047 + // the frame and jump to the exception handler.
1048 + switch (id) {
1049 + case forward_exception_id:
1050 + case handle_exception_id:
1051 + restore_live_registers(sasm);
1052 + __ jmp(O0, 0);
1053 + __ delayed()->restore();
1054 + break;
1055 + case handle_exception_from_callee_id:
1056 + // Restore SP from L7 if the exception PC is a method handle call site.
1057 + __ mov(O0, G5); // Save the target address.
1058 + __ lduw(Address(G2_thread, JavaThread::is_method_handle_return_offset()), L0);
1059 + __ tst(L0); // Condition codes are preserved over the restore.
1060 + __ restore();
1061 +
1062 + __ jmp(G5, 0); // jump to the exception handler
1063 + __ delayed()->movcc(Assembler::notZero, false, Assembler::icc, L7_mh_SP_save, SP); // Restore SP if required.
1064 + break;
1065 + default: ShouldNotReachHere();
1066 + }
1042 1067
1043 - oop_maps->add_gc_map(call_offset, oop_map);
1068 + return oop_maps;
1044 1069 }
1045 1070
1046 1071
1047 1072 #undef __
1048 1073
1049 -#define __ masm->
1050 -
1051 1074 const char *Runtime1::pd_name_for_address(address entry) {
1052 1075 return "<unknown function>";
1053 1076 }
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