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--- old/src/cpu/x86/vm/sharedRuntime_x86_32.cpp
+++ new/src/cpu/x86/vm/sharedRuntime_x86_32.cpp
1 1 /*
2 2 * Copyright (c) 2003, 2011, Oracle and/or its affiliates. All rights reserved.
3 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 4 *
5 5 * This code is free software; you can redistribute it and/or modify it
6 6 * under the terms of the GNU General Public License version 2 only, as
7 7 * published by the Free Software Foundation.
8 8 *
9 9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 12 * version 2 for more details (a copy is included in the LICENSE file that
13 13 * accompanied this code).
14 14 *
15 15 * You should have received a copy of the GNU General Public License version
16 16 * 2 along with this work; if not, write to the Free Software Foundation,
17 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 18 *
19 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 20 * or visit www.oracle.com if you need additional information or have any
21 21 * questions.
22 22 *
23 23 */
24 24
25 25 #include "precompiled.hpp"
26 26 #include "asm/assembler.hpp"
27 27 #include "assembler_x86.inline.hpp"
28 28 #include "code/debugInfoRec.hpp"
29 29 #include "code/icBuffer.hpp"
30 30 #include "code/vtableStubs.hpp"
31 31 #include "interpreter/interpreter.hpp"
32 32 #include "oops/compiledICHolderOop.hpp"
33 33 #include "prims/jvmtiRedefineClassesTrace.hpp"
34 34 #include "runtime/sharedRuntime.hpp"
35 35 #include "runtime/vframeArray.hpp"
36 36 #include "vmreg_x86.inline.hpp"
37 37 #ifdef COMPILER1
38 38 #include "c1/c1_Runtime1.hpp"
39 39 #endif
40 40 #ifdef COMPILER2
41 41 #include "opto/runtime.hpp"
42 42 #endif
43 43
44 44 #define __ masm->
45 45 #ifdef COMPILER2
46 46 UncommonTrapBlob *SharedRuntime::_uncommon_trap_blob;
47 47 #endif // COMPILER2
48 48
49 49 DeoptimizationBlob *SharedRuntime::_deopt_blob;
50 50 SafepointBlob *SharedRuntime::_polling_page_safepoint_handler_blob;
51 51 SafepointBlob *SharedRuntime::_polling_page_return_handler_blob;
52 52 RuntimeStub* SharedRuntime::_wrong_method_blob;
53 53 RuntimeStub* SharedRuntime::_ic_miss_blob;
54 54 RuntimeStub* SharedRuntime::_resolve_opt_virtual_call_blob;
55 55 RuntimeStub* SharedRuntime::_resolve_virtual_call_blob;
56 56 RuntimeStub* SharedRuntime::_resolve_static_call_blob;
57 57
58 58 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size;
59 59
60 60 class RegisterSaver {
61 61 enum { FPU_regs_live = 8 /*for the FPU stack*/+8/*eight more for XMM registers*/ };
62 62 // Capture info about frame layout
63 63 enum layout {
64 64 fpu_state_off = 0,
65 65 fpu_state_end = fpu_state_off+FPUStateSizeInWords-1,
66 66 st0_off, st0H_off,
67 67 st1_off, st1H_off,
68 68 st2_off, st2H_off,
69 69 st3_off, st3H_off,
70 70 st4_off, st4H_off,
71 71 st5_off, st5H_off,
72 72 st6_off, st6H_off,
73 73 st7_off, st7H_off,
74 74
75 75 xmm0_off, xmm0H_off,
76 76 xmm1_off, xmm1H_off,
77 77 xmm2_off, xmm2H_off,
78 78 xmm3_off, xmm3H_off,
79 79 xmm4_off, xmm4H_off,
80 80 xmm5_off, xmm5H_off,
81 81 xmm6_off, xmm6H_off,
82 82 xmm7_off, xmm7H_off,
83 83 flags_off,
84 84 rdi_off,
85 85 rsi_off,
86 86 ignore_off, // extra copy of rbp,
87 87 rsp_off,
88 88 rbx_off,
89 89 rdx_off,
90 90 rcx_off,
91 91 rax_off,
92 92 // The frame sender code expects that rbp will be in the "natural" place and
93 93 // will override any oopMap setting for it. We must therefore force the layout
94 94 // so that it agrees with the frame sender code.
95 95 rbp_off,
96 96 return_off, // slot for return address
97 97 reg_save_size };
98 98
99 99
100 100 public:
101 101
102 102 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words,
103 103 int* total_frame_words, bool verify_fpu = true);
104 104 static void restore_live_registers(MacroAssembler* masm);
105 105
106 106 static int rax_offset() { return rax_off; }
107 107 static int rbx_offset() { return rbx_off; }
108 108
109 109 // Offsets into the register save area
110 110 // Used by deoptimization when it is managing result register
111 111 // values on its own
112 112
113 113 static int raxOffset(void) { return rax_off; }
114 114 static int rdxOffset(void) { return rdx_off; }
115 115 static int rbxOffset(void) { return rbx_off; }
116 116 static int xmm0Offset(void) { return xmm0_off; }
117 117 // This really returns a slot in the fp save area, which one is not important
118 118 static int fpResultOffset(void) { return st0_off; }
119 119
120 120 // During deoptimization only the result register need to be restored
121 121 // all the other values have already been extracted.
122 122
123 123 static void restore_result_registers(MacroAssembler* masm);
124 124
125 125 };
126 126
127 127 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words,
128 128 int* total_frame_words, bool verify_fpu) {
129 129
130 130 int frame_size_in_bytes = (reg_save_size + additional_frame_words) * wordSize;
131 131 int frame_words = frame_size_in_bytes / wordSize;
132 132 *total_frame_words = frame_words;
133 133
134 134 assert(FPUStateSizeInWords == 27, "update stack layout");
135 135
136 136 // save registers, fpu state, and flags
137 137 // We assume caller has already has return address slot on the stack
138 138 // We push epb twice in this sequence because we want the real rbp,
139 139 // to be under the return like a normal enter and we want to use pusha
140 140 // We push by hand instead of pusing push
141 141 __ enter();
142 142 __ pusha();
143 143 __ pushf();
144 144 __ subptr(rsp,FPU_regs_live*sizeof(jdouble)); // Push FPU registers space
145 145 __ push_FPU_state(); // Save FPU state & init
146 146
147 147 if (verify_fpu) {
148 148 // Some stubs may have non standard FPU control word settings so
149 149 // only check and reset the value when it required to be the
150 150 // standard value. The safepoint blob in particular can be used
151 151 // in methods which are using the 24 bit control word for
152 152 // optimized float math.
153 153
154 154 #ifdef ASSERT
155 155 // Make sure the control word has the expected value
156 156 Label ok;
157 157 __ cmpw(Address(rsp, 0), StubRoutines::fpu_cntrl_wrd_std());
158 158 __ jccb(Assembler::equal, ok);
159 159 __ stop("corrupted control word detected");
160 160 __ bind(ok);
161 161 #endif
162 162
163 163 // Reset the control word to guard against exceptions being unmasked
164 164 // since fstp_d can cause FPU stack underflow exceptions. Write it
165 165 // into the on stack copy and then reload that to make sure that the
166 166 // current and future values are correct.
167 167 __ movw(Address(rsp, 0), StubRoutines::fpu_cntrl_wrd_std());
168 168 }
169 169
170 170 __ frstor(Address(rsp, 0));
171 171 if (!verify_fpu) {
172 172 // Set the control word so that exceptions are masked for the
173 173 // following code.
174 174 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
175 175 }
176 176
177 177 // Save the FPU registers in de-opt-able form
178 178
179 179 __ fstp_d(Address(rsp, st0_off*wordSize)); // st(0)
180 180 __ fstp_d(Address(rsp, st1_off*wordSize)); // st(1)
181 181 __ fstp_d(Address(rsp, st2_off*wordSize)); // st(2)
182 182 __ fstp_d(Address(rsp, st3_off*wordSize)); // st(3)
183 183 __ fstp_d(Address(rsp, st4_off*wordSize)); // st(4)
184 184 __ fstp_d(Address(rsp, st5_off*wordSize)); // st(5)
185 185 __ fstp_d(Address(rsp, st6_off*wordSize)); // st(6)
186 186 __ fstp_d(Address(rsp, st7_off*wordSize)); // st(7)
187 187
188 188 if( UseSSE == 1 ) { // Save the XMM state
189 189 __ movflt(Address(rsp,xmm0_off*wordSize),xmm0);
190 190 __ movflt(Address(rsp,xmm1_off*wordSize),xmm1);
191 191 __ movflt(Address(rsp,xmm2_off*wordSize),xmm2);
192 192 __ movflt(Address(rsp,xmm3_off*wordSize),xmm3);
193 193 __ movflt(Address(rsp,xmm4_off*wordSize),xmm4);
194 194 __ movflt(Address(rsp,xmm5_off*wordSize),xmm5);
195 195 __ movflt(Address(rsp,xmm6_off*wordSize),xmm6);
196 196 __ movflt(Address(rsp,xmm7_off*wordSize),xmm7);
197 197 } else if( UseSSE >= 2 ) {
198 198 __ movdbl(Address(rsp,xmm0_off*wordSize),xmm0);
199 199 __ movdbl(Address(rsp,xmm1_off*wordSize),xmm1);
200 200 __ movdbl(Address(rsp,xmm2_off*wordSize),xmm2);
201 201 __ movdbl(Address(rsp,xmm3_off*wordSize),xmm3);
202 202 __ movdbl(Address(rsp,xmm4_off*wordSize),xmm4);
203 203 __ movdbl(Address(rsp,xmm5_off*wordSize),xmm5);
204 204 __ movdbl(Address(rsp,xmm6_off*wordSize),xmm6);
205 205 __ movdbl(Address(rsp,xmm7_off*wordSize),xmm7);
206 206 }
207 207
208 208 // Set an oopmap for the call site. This oopmap will map all
209 209 // oop-registers and debug-info registers as callee-saved. This
210 210 // will allow deoptimization at this safepoint to find all possible
211 211 // debug-info recordings, as well as let GC find all oops.
212 212
213 213 OopMapSet *oop_maps = new OopMapSet();
214 214 OopMap* map = new OopMap( frame_words, 0 );
215 215
216 216 #define STACK_OFFSET(x) VMRegImpl::stack2reg((x) + additional_frame_words)
217 217
218 218 map->set_callee_saved(STACK_OFFSET( rax_off), rax->as_VMReg());
219 219 map->set_callee_saved(STACK_OFFSET( rcx_off), rcx->as_VMReg());
220 220 map->set_callee_saved(STACK_OFFSET( rdx_off), rdx->as_VMReg());
221 221 map->set_callee_saved(STACK_OFFSET( rbx_off), rbx->as_VMReg());
222 222 // rbp, location is known implicitly, no oopMap
223 223 map->set_callee_saved(STACK_OFFSET( rsi_off), rsi->as_VMReg());
224 224 map->set_callee_saved(STACK_OFFSET( rdi_off), rdi->as_VMReg());
225 225 map->set_callee_saved(STACK_OFFSET(st0_off), as_FloatRegister(0)->as_VMReg());
226 226 map->set_callee_saved(STACK_OFFSET(st1_off), as_FloatRegister(1)->as_VMReg());
227 227 map->set_callee_saved(STACK_OFFSET(st2_off), as_FloatRegister(2)->as_VMReg());
228 228 map->set_callee_saved(STACK_OFFSET(st3_off), as_FloatRegister(3)->as_VMReg());
229 229 map->set_callee_saved(STACK_OFFSET(st4_off), as_FloatRegister(4)->as_VMReg());
230 230 map->set_callee_saved(STACK_OFFSET(st5_off), as_FloatRegister(5)->as_VMReg());
231 231 map->set_callee_saved(STACK_OFFSET(st6_off), as_FloatRegister(6)->as_VMReg());
232 232 map->set_callee_saved(STACK_OFFSET(st7_off), as_FloatRegister(7)->as_VMReg());
233 233 map->set_callee_saved(STACK_OFFSET(xmm0_off), xmm0->as_VMReg());
234 234 map->set_callee_saved(STACK_OFFSET(xmm1_off), xmm1->as_VMReg());
235 235 map->set_callee_saved(STACK_OFFSET(xmm2_off), xmm2->as_VMReg());
236 236 map->set_callee_saved(STACK_OFFSET(xmm3_off), xmm3->as_VMReg());
237 237 map->set_callee_saved(STACK_OFFSET(xmm4_off), xmm4->as_VMReg());
238 238 map->set_callee_saved(STACK_OFFSET(xmm5_off), xmm5->as_VMReg());
239 239 map->set_callee_saved(STACK_OFFSET(xmm6_off), xmm6->as_VMReg());
240 240 map->set_callee_saved(STACK_OFFSET(xmm7_off), xmm7->as_VMReg());
241 241 // %%% This is really a waste but we'll keep things as they were for now
242 242 if (true) {
243 243 #define NEXTREG(x) (x)->as_VMReg()->next()
244 244 map->set_callee_saved(STACK_OFFSET(st0H_off), NEXTREG(as_FloatRegister(0)));
245 245 map->set_callee_saved(STACK_OFFSET(st1H_off), NEXTREG(as_FloatRegister(1)));
246 246 map->set_callee_saved(STACK_OFFSET(st2H_off), NEXTREG(as_FloatRegister(2)));
247 247 map->set_callee_saved(STACK_OFFSET(st3H_off), NEXTREG(as_FloatRegister(3)));
248 248 map->set_callee_saved(STACK_OFFSET(st4H_off), NEXTREG(as_FloatRegister(4)));
249 249 map->set_callee_saved(STACK_OFFSET(st5H_off), NEXTREG(as_FloatRegister(5)));
250 250 map->set_callee_saved(STACK_OFFSET(st6H_off), NEXTREG(as_FloatRegister(6)));
251 251 map->set_callee_saved(STACK_OFFSET(st7H_off), NEXTREG(as_FloatRegister(7)));
252 252 map->set_callee_saved(STACK_OFFSET(xmm0H_off), NEXTREG(xmm0));
253 253 map->set_callee_saved(STACK_OFFSET(xmm1H_off), NEXTREG(xmm1));
254 254 map->set_callee_saved(STACK_OFFSET(xmm2H_off), NEXTREG(xmm2));
255 255 map->set_callee_saved(STACK_OFFSET(xmm3H_off), NEXTREG(xmm3));
256 256 map->set_callee_saved(STACK_OFFSET(xmm4H_off), NEXTREG(xmm4));
257 257 map->set_callee_saved(STACK_OFFSET(xmm5H_off), NEXTREG(xmm5));
258 258 map->set_callee_saved(STACK_OFFSET(xmm6H_off), NEXTREG(xmm6));
259 259 map->set_callee_saved(STACK_OFFSET(xmm7H_off), NEXTREG(xmm7));
260 260 #undef NEXTREG
261 261 #undef STACK_OFFSET
262 262 }
263 263
264 264 return map;
265 265
266 266 }
267 267
268 268 void RegisterSaver::restore_live_registers(MacroAssembler* masm) {
269 269
270 270 // Recover XMM & FPU state
271 271 if( UseSSE == 1 ) {
272 272 __ movflt(xmm0,Address(rsp,xmm0_off*wordSize));
273 273 __ movflt(xmm1,Address(rsp,xmm1_off*wordSize));
274 274 __ movflt(xmm2,Address(rsp,xmm2_off*wordSize));
275 275 __ movflt(xmm3,Address(rsp,xmm3_off*wordSize));
276 276 __ movflt(xmm4,Address(rsp,xmm4_off*wordSize));
277 277 __ movflt(xmm5,Address(rsp,xmm5_off*wordSize));
278 278 __ movflt(xmm6,Address(rsp,xmm6_off*wordSize));
279 279 __ movflt(xmm7,Address(rsp,xmm7_off*wordSize));
280 280 } else if( UseSSE >= 2 ) {
281 281 __ movdbl(xmm0,Address(rsp,xmm0_off*wordSize));
282 282 __ movdbl(xmm1,Address(rsp,xmm1_off*wordSize));
283 283 __ movdbl(xmm2,Address(rsp,xmm2_off*wordSize));
284 284 __ movdbl(xmm3,Address(rsp,xmm3_off*wordSize));
285 285 __ movdbl(xmm4,Address(rsp,xmm4_off*wordSize));
286 286 __ movdbl(xmm5,Address(rsp,xmm5_off*wordSize));
287 287 __ movdbl(xmm6,Address(rsp,xmm6_off*wordSize));
288 288 __ movdbl(xmm7,Address(rsp,xmm7_off*wordSize));
289 289 }
290 290 __ pop_FPU_state();
291 291 __ addptr(rsp, FPU_regs_live*sizeof(jdouble)); // Pop FPU registers
292 292
293 293 __ popf();
294 294 __ popa();
295 295 // Get the rbp, described implicitly by the frame sender code (no oopMap)
296 296 __ pop(rbp);
297 297
298 298 }
299 299
300 300 void RegisterSaver::restore_result_registers(MacroAssembler* masm) {
301 301
302 302 // Just restore result register. Only used by deoptimization. By
303 303 // now any callee save register that needs to be restore to a c2
304 304 // caller of the deoptee has been extracted into the vframeArray
305 305 // and will be stuffed into the c2i adapter we create for later
306 306 // restoration so only result registers need to be restored here.
307 307 //
308 308
309 309 __ frstor(Address(rsp, 0)); // Restore fpu state
310 310
311 311 // Recover XMM & FPU state
312 312 if( UseSSE == 1 ) {
313 313 __ movflt(xmm0, Address(rsp, xmm0_off*wordSize));
314 314 } else if( UseSSE >= 2 ) {
315 315 __ movdbl(xmm0, Address(rsp, xmm0_off*wordSize));
316 316 }
317 317 __ movptr(rax, Address(rsp, rax_off*wordSize));
318 318 __ movptr(rdx, Address(rsp, rdx_off*wordSize));
319 319 // Pop all of the register save are off the stack except the return address
320 320 __ addptr(rsp, return_off * wordSize);
321 321 }
322 322
323 323 // The java_calling_convention describes stack locations as ideal slots on
324 324 // a frame with no abi restrictions. Since we must observe abi restrictions
325 325 // (like the placement of the register window) the slots must be biased by
326 326 // the following value.
327 327 static int reg2offset_in(VMReg r) {
328 328 // Account for saved rbp, and return address
329 329 // This should really be in_preserve_stack_slots
330 330 return (r->reg2stack() + 2) * VMRegImpl::stack_slot_size;
331 331 }
332 332
333 333 static int reg2offset_out(VMReg r) {
334 334 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
335 335 }
336 336
337 337 // ---------------------------------------------------------------------------
338 338 // Read the array of BasicTypes from a signature, and compute where the
339 339 // arguments should go. Values in the VMRegPair regs array refer to 4-byte
340 340 // quantities. Values less than SharedInfo::stack0 are registers, those above
341 341 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer
342 342 // as framesizes are fixed.
343 343 // VMRegImpl::stack0 refers to the first slot 0(sp).
344 344 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register
345 345 // up to RegisterImpl::number_of_registers) are the 32-bit
346 346 // integer registers.
347 347
348 348 // Pass first two oop/int args in registers ECX and EDX.
349 349 // Pass first two float/double args in registers XMM0 and XMM1.
350 350 // Doubles have precedence, so if you pass a mix of floats and doubles
351 351 // the doubles will grab the registers before the floats will.
352 352
353 353 // Note: the INPUTS in sig_bt are in units of Java argument words, which are
354 354 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit
355 355 // units regardless of build. Of course for i486 there is no 64 bit build
356 356
357 357
358 358 // ---------------------------------------------------------------------------
359 359 // The compiled Java calling convention.
360 360 // Pass first two oop/int args in registers ECX and EDX.
361 361 // Pass first two float/double args in registers XMM0 and XMM1.
362 362 // Doubles have precedence, so if you pass a mix of floats and doubles
363 363 // the doubles will grab the registers before the floats will.
364 364 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
365 365 VMRegPair *regs,
366 366 int total_args_passed,
367 367 int is_outgoing) {
368 368 uint stack = 0; // Starting stack position for args on stack
369 369
370 370
371 371 // Pass first two oop/int args in registers ECX and EDX.
372 372 uint reg_arg0 = 9999;
373 373 uint reg_arg1 = 9999;
374 374
375 375 // Pass first two float/double args in registers XMM0 and XMM1.
376 376 // Doubles have precedence, so if you pass a mix of floats and doubles
377 377 // the doubles will grab the registers before the floats will.
378 378 // CNC - TURNED OFF FOR non-SSE.
379 379 // On Intel we have to round all doubles (and most floats) at
380 380 // call sites by storing to the stack in any case.
381 381 // UseSSE=0 ==> Don't Use ==> 9999+0
382 382 // UseSSE=1 ==> Floats only ==> 9999+1
383 383 // UseSSE>=2 ==> Floats or doubles ==> 9999+2
384 384 enum { fltarg_dontuse = 9999+0, fltarg_float_only = 9999+1, fltarg_flt_dbl = 9999+2 };
385 385 uint fargs = (UseSSE>=2) ? 2 : UseSSE;
386 386 uint freg_arg0 = 9999+fargs;
387 387 uint freg_arg1 = 9999+fargs;
388 388
389 389 // Pass doubles & longs aligned on the stack. First count stack slots for doubles
390 390 int i;
391 391 for( i = 0; i < total_args_passed; i++) {
392 392 if( sig_bt[i] == T_DOUBLE ) {
393 393 // first 2 doubles go in registers
394 394 if( freg_arg0 == fltarg_flt_dbl ) freg_arg0 = i;
395 395 else if( freg_arg1 == fltarg_flt_dbl ) freg_arg1 = i;
396 396 else // Else double is passed low on the stack to be aligned.
397 397 stack += 2;
398 398 } else if( sig_bt[i] == T_LONG ) {
399 399 stack += 2;
400 400 }
401 401 }
402 402 int dstack = 0; // Separate counter for placing doubles
403 403
404 404 // Now pick where all else goes.
405 405 for( i = 0; i < total_args_passed; i++) {
406 406 // From the type and the argument number (count) compute the location
407 407 switch( sig_bt[i] ) {
408 408 case T_SHORT:
409 409 case T_CHAR:
410 410 case T_BYTE:
411 411 case T_BOOLEAN:
412 412 case T_INT:
413 413 case T_ARRAY:
414 414 case T_OBJECT:
415 415 case T_ADDRESS:
416 416 if( reg_arg0 == 9999 ) {
417 417 reg_arg0 = i;
418 418 regs[i].set1(rcx->as_VMReg());
419 419 } else if( reg_arg1 == 9999 ) {
420 420 reg_arg1 = i;
421 421 regs[i].set1(rdx->as_VMReg());
422 422 } else {
423 423 regs[i].set1(VMRegImpl::stack2reg(stack++));
424 424 }
425 425 break;
426 426 case T_FLOAT:
427 427 if( freg_arg0 == fltarg_flt_dbl || freg_arg0 == fltarg_float_only ) {
428 428 freg_arg0 = i;
429 429 regs[i].set1(xmm0->as_VMReg());
430 430 } else if( freg_arg1 == fltarg_flt_dbl || freg_arg1 == fltarg_float_only ) {
431 431 freg_arg1 = i;
432 432 regs[i].set1(xmm1->as_VMReg());
433 433 } else {
434 434 regs[i].set1(VMRegImpl::stack2reg(stack++));
435 435 }
436 436 break;
437 437 case T_LONG:
438 438 assert(sig_bt[i+1] == T_VOID, "missing Half" );
439 439 regs[i].set2(VMRegImpl::stack2reg(dstack));
440 440 dstack += 2;
441 441 break;
442 442 case T_DOUBLE:
443 443 assert(sig_bt[i+1] == T_VOID, "missing Half" );
444 444 if( freg_arg0 == (uint)i ) {
445 445 regs[i].set2(xmm0->as_VMReg());
446 446 } else if( freg_arg1 == (uint)i ) {
447 447 regs[i].set2(xmm1->as_VMReg());
448 448 } else {
449 449 regs[i].set2(VMRegImpl::stack2reg(dstack));
450 450 dstack += 2;
451 451 }
452 452 break;
453 453 case T_VOID: regs[i].set_bad(); break;
454 454 break;
455 455 default:
456 456 ShouldNotReachHere();
457 457 break;
458 458 }
459 459 }
460 460
461 461 // return value can be odd number of VMRegImpl stack slots make multiple of 2
462 462 return round_to(stack, 2);
463 463 }
464 464
465 465 // Patch the callers callsite with entry to compiled code if it exists.
466 466 static void patch_callers_callsite(MacroAssembler *masm) {
467 467 Label L;
468 468 __ verify_oop(rbx);
469 469 __ cmpptr(Address(rbx, in_bytes(methodOopDesc::code_offset())), (int32_t)NULL_WORD);
470 470 __ jcc(Assembler::equal, L);
471 471 // Schedule the branch target address early.
472 472 // Call into the VM to patch the caller, then jump to compiled callee
473 473 // rax, isn't live so capture return address while we easily can
474 474 __ movptr(rax, Address(rsp, 0));
475 475 __ pusha();
476 476 __ pushf();
477 477
478 478 if (UseSSE == 1) {
479 479 __ subptr(rsp, 2*wordSize);
480 480 __ movflt(Address(rsp, 0), xmm0);
481 481 __ movflt(Address(rsp, wordSize), xmm1);
482 482 }
483 483 if (UseSSE >= 2) {
484 484 __ subptr(rsp, 4*wordSize);
485 485 __ movdbl(Address(rsp, 0), xmm0);
486 486 __ movdbl(Address(rsp, 2*wordSize), xmm1);
487 487 }
488 488 #ifdef COMPILER2
489 489 // C2 may leave the stack dirty if not in SSE2+ mode
490 490 if (UseSSE >= 2) {
491 491 __ verify_FPU(0, "c2i transition should have clean FPU stack");
492 492 } else {
493 493 __ empty_FPU_stack();
494 494 }
495 495 #endif /* COMPILER2 */
496 496
497 497 // VM needs caller's callsite
498 498 __ push(rax);
499 499 // VM needs target method
500 500 __ push(rbx);
501 501 __ verify_oop(rbx);
502 502 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)));
503 503 __ addptr(rsp, 2*wordSize);
504 504
505 505 if (UseSSE == 1) {
506 506 __ movflt(xmm0, Address(rsp, 0));
507 507 __ movflt(xmm1, Address(rsp, wordSize));
508 508 __ addptr(rsp, 2*wordSize);
509 509 }
510 510 if (UseSSE >= 2) {
511 511 __ movdbl(xmm0, Address(rsp, 0));
512 512 __ movdbl(xmm1, Address(rsp, 2*wordSize));
513 513 __ addptr(rsp, 4*wordSize);
514 514 }
515 515
516 516 __ popf();
517 517 __ popa();
518 518 __ bind(L);
519 519 }
520 520
521 521
522 522 static void move_c2i_double(MacroAssembler *masm, XMMRegister r, int st_off) {
523 523 int next_off = st_off - Interpreter::stackElementSize;
524 524 __ movdbl(Address(rsp, next_off), r);
525 525 }
526 526
527 527 static void gen_c2i_adapter(MacroAssembler *masm,
528 528 int total_args_passed,
529 529 int comp_args_on_stack,
530 530 const BasicType *sig_bt,
531 531 const VMRegPair *regs,
532 532 Label& skip_fixup) {
533 533 // Before we get into the guts of the C2I adapter, see if we should be here
534 534 // at all. We've come from compiled code and are attempting to jump to the
535 535 // interpreter, which means the caller made a static call to get here
536 536 // (vcalls always get a compiled target if there is one). Check for a
537 537 // compiled target. If there is one, we need to patch the caller's call.
538 538 patch_callers_callsite(masm);
539 539
540 540 __ bind(skip_fixup);
541 541
542 542 #ifdef COMPILER2
543 543 // C2 may leave the stack dirty if not in SSE2+ mode
544 544 if (UseSSE >= 2) {
545 545 __ verify_FPU(0, "c2i transition should have clean FPU stack");
546 546 } else {
547 547 __ empty_FPU_stack();
548 548 }
549 549 #endif /* COMPILER2 */
550 550
551 551 // Since all args are passed on the stack, total_args_passed * interpreter_
552 552 // stack_element_size is the
553 553 // space we need.
554 554 int extraspace = total_args_passed * Interpreter::stackElementSize;
555 555
556 556 // Get return address
557 557 __ pop(rax);
558 558
559 559 // set senderSP value
560 560 __ movptr(rsi, rsp);
561 561
562 562 __ subptr(rsp, extraspace);
563 563
564 564 // Now write the args into the outgoing interpreter space
565 565 for (int i = 0; i < total_args_passed; i++) {
566 566 if (sig_bt[i] == T_VOID) {
567 567 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
568 568 continue;
569 569 }
570 570
571 571 // st_off points to lowest address on stack.
572 572 int st_off = ((total_args_passed - 1) - i) * Interpreter::stackElementSize;
573 573 int next_off = st_off - Interpreter::stackElementSize;
574 574
575 575 // Say 4 args:
576 576 // i st_off
577 577 // 0 12 T_LONG
578 578 // 1 8 T_VOID
579 579 // 2 4 T_OBJECT
580 580 // 3 0 T_BOOL
581 581 VMReg r_1 = regs[i].first();
582 582 VMReg r_2 = regs[i].second();
583 583 if (!r_1->is_valid()) {
584 584 assert(!r_2->is_valid(), "");
585 585 continue;
586 586 }
587 587
588 588 if (r_1->is_stack()) {
589 589 // memory to memory use fpu stack top
590 590 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace;
591 591
592 592 if (!r_2->is_valid()) {
593 593 __ movl(rdi, Address(rsp, ld_off));
594 594 __ movptr(Address(rsp, st_off), rdi);
595 595 } else {
596 596
597 597 // ld_off == LSW, ld_off+VMRegImpl::stack_slot_size == MSW
598 598 // st_off == MSW, st_off-wordSize == LSW
599 599
600 600 __ movptr(rdi, Address(rsp, ld_off));
601 601 __ movptr(Address(rsp, next_off), rdi);
602 602 #ifndef _LP64
603 603 __ movptr(rdi, Address(rsp, ld_off + wordSize));
604 604 __ movptr(Address(rsp, st_off), rdi);
605 605 #else
606 606 #ifdef ASSERT
607 607 // Overwrite the unused slot with known junk
608 608 __ mov64(rax, CONST64(0xdeadffffdeadaaaa));
609 609 __ movptr(Address(rsp, st_off), rax);
610 610 #endif /* ASSERT */
611 611 #endif // _LP64
612 612 }
613 613 } else if (r_1->is_Register()) {
614 614 Register r = r_1->as_Register();
615 615 if (!r_2->is_valid()) {
616 616 __ movl(Address(rsp, st_off), r);
617 617 } else {
618 618 // long/double in gpr
619 619 NOT_LP64(ShouldNotReachHere());
620 620 // Two VMRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
621 621 // T_DOUBLE and T_LONG use two slots in the interpreter
622 622 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
623 623 // long/double in gpr
624 624 #ifdef ASSERT
625 625 // Overwrite the unused slot with known junk
626 626 LP64_ONLY(__ mov64(rax, CONST64(0xdeadffffdeadaaab)));
627 627 __ movptr(Address(rsp, st_off), rax);
628 628 #endif /* ASSERT */
629 629 __ movptr(Address(rsp, next_off), r);
630 630 } else {
631 631 __ movptr(Address(rsp, st_off), r);
632 632 }
633 633 }
634 634 } else {
635 635 assert(r_1->is_XMMRegister(), "");
636 636 if (!r_2->is_valid()) {
637 637 __ movflt(Address(rsp, st_off), r_1->as_XMMRegister());
638 638 } else {
639 639 assert(sig_bt[i] == T_DOUBLE || sig_bt[i] == T_LONG, "wrong type");
640 640 move_c2i_double(masm, r_1->as_XMMRegister(), st_off);
641 641 }
642 642 }
643 643 }
644 644
645 645 // Schedule the branch target address early.
646 646 __ movptr(rcx, Address(rbx, in_bytes(methodOopDesc::interpreter_entry_offset())));
647 647 // And repush original return address
648 648 __ push(rax);
649 649 __ jmp(rcx);
650 650 }
651 651
652 652
653 653 static void move_i2c_double(MacroAssembler *masm, XMMRegister r, Register saved_sp, int ld_off) {
654 654 int next_val_off = ld_off - Interpreter::stackElementSize;
655 655 __ movdbl(r, Address(saved_sp, next_val_off));
656 656 }
657 657
658 658 static void gen_i2c_adapter(MacroAssembler *masm,
659 659 int total_args_passed,
660 660 int comp_args_on_stack,
661 661 const BasicType *sig_bt,
662 662 const VMRegPair *regs) {
663 663
664 664 // Note: rsi contains the senderSP on entry. We must preserve it since
665 665 // we may do a i2c -> c2i transition if we lose a race where compiled
666 666 // code goes non-entrant while we get args ready.
667 667
668 668 // Pick up the return address
669 669 __ movptr(rax, Address(rsp, 0));
670 670
671 671 // Must preserve original SP for loading incoming arguments because
672 672 // we need to align the outgoing SP for compiled code.
673 673 __ movptr(rdi, rsp);
674 674
675 675 // Cut-out for having no stack args. Since up to 2 int/oop args are passed
676 676 // in registers, we will occasionally have no stack args.
677 677 int comp_words_on_stack = 0;
678 678 if (comp_args_on_stack) {
679 679 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in
680 680 // registers are below. By subtracting stack0, we either get a negative
681 681 // number (all values in registers) or the maximum stack slot accessed.
682 682 // int comp_args_on_stack = VMRegImpl::reg2stack(max_arg);
683 683 // Convert 4-byte stack slots to words.
684 684 comp_words_on_stack = round_to(comp_args_on_stack*4, wordSize)>>LogBytesPerWord;
685 685 // Round up to miminum stack alignment, in wordSize
686 686 comp_words_on_stack = round_to(comp_words_on_stack, 2);
687 687 __ subptr(rsp, comp_words_on_stack * wordSize);
688 688 }
689 689
690 690 // Align the outgoing SP
691 691 __ andptr(rsp, -(StackAlignmentInBytes));
692 692
693 693 // push the return address on the stack (note that pushing, rather
694 694 // than storing it, yields the correct frame alignment for the callee)
695 695 __ push(rax);
696 696
697 697 // Put saved SP in another register
698 698 const Register saved_sp = rax;
699 699 __ movptr(saved_sp, rdi);
700 700
701 701
702 702 // Will jump to the compiled code just as if compiled code was doing it.
703 703 // Pre-load the register-jump target early, to schedule it better.
704 704 __ movptr(rdi, Address(rbx, in_bytes(methodOopDesc::from_compiled_offset())));
705 705
706 706 // Now generate the shuffle code. Pick up all register args and move the
707 707 // rest through the floating point stack top.
708 708 for (int i = 0; i < total_args_passed; i++) {
709 709 if (sig_bt[i] == T_VOID) {
710 710 // Longs and doubles are passed in native word order, but misaligned
711 711 // in the 32-bit build.
712 712 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
713 713 continue;
714 714 }
715 715
716 716 // Pick up 0, 1 or 2 words from SP+offset.
717 717
718 718 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(),
719 719 "scrambled load targets?");
720 720 // Load in argument order going down.
721 721 int ld_off = (total_args_passed - i) * Interpreter::stackElementSize;
722 722 // Point to interpreter value (vs. tag)
723 723 int next_off = ld_off - Interpreter::stackElementSize;
724 724 //
725 725 //
726 726 //
727 727 VMReg r_1 = regs[i].first();
728 728 VMReg r_2 = regs[i].second();
729 729 if (!r_1->is_valid()) {
730 730 assert(!r_2->is_valid(), "");
731 731 continue;
732 732 }
733 733 if (r_1->is_stack()) {
734 734 // Convert stack slot to an SP offset (+ wordSize to account for return address )
735 735 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize;
736 736
737 737 // We can use rsi as a temp here because compiled code doesn't need rsi as an input
738 738 // and if we end up going thru a c2i because of a miss a reasonable value of rsi
739 739 // we be generated.
740 740 if (!r_2->is_valid()) {
741 741 // __ fld_s(Address(saved_sp, ld_off));
742 742 // __ fstp_s(Address(rsp, st_off));
743 743 __ movl(rsi, Address(saved_sp, ld_off));
744 744 __ movptr(Address(rsp, st_off), rsi);
745 745 } else {
746 746 // Interpreter local[n] == MSW, local[n+1] == LSW however locals
747 747 // are accessed as negative so LSW is at LOW address
748 748
749 749 // ld_off is MSW so get LSW
750 750 // st_off is LSW (i.e. reg.first())
751 751 // __ fld_d(Address(saved_sp, next_off));
752 752 // __ fstp_d(Address(rsp, st_off));
753 753 //
754 754 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
755 755 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
756 756 // So we must adjust where to pick up the data to match the interpreter.
757 757 //
758 758 // Interpreter local[n] == MSW, local[n+1] == LSW however locals
759 759 // are accessed as negative so LSW is at LOW address
760 760
761 761 // ld_off is MSW so get LSW
762 762 const int offset = (NOT_LP64(true ||) sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
763 763 next_off : ld_off;
764 764 __ movptr(rsi, Address(saved_sp, offset));
765 765 __ movptr(Address(rsp, st_off), rsi);
766 766 #ifndef _LP64
767 767 __ movptr(rsi, Address(saved_sp, ld_off));
768 768 __ movptr(Address(rsp, st_off + wordSize), rsi);
769 769 #endif // _LP64
770 770 }
771 771 } else if (r_1->is_Register()) { // Register argument
772 772 Register r = r_1->as_Register();
773 773 assert(r != rax, "must be different");
774 774 if (r_2->is_valid()) {
775 775 //
776 776 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
777 777 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
778 778 // So we must adjust where to pick up the data to match the interpreter.
779 779
780 780 const int offset = (NOT_LP64(true ||) sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
781 781 next_off : ld_off;
782 782
783 783 // this can be a misaligned move
784 784 __ movptr(r, Address(saved_sp, offset));
785 785 #ifndef _LP64
786 786 assert(r_2->as_Register() != rax, "need another temporary register");
787 787 // Remember r_1 is low address (and LSB on x86)
788 788 // So r_2 gets loaded from high address regardless of the platform
789 789 __ movptr(r_2->as_Register(), Address(saved_sp, ld_off));
790 790 #endif // _LP64
791 791 } else {
792 792 __ movl(r, Address(saved_sp, ld_off));
793 793 }
794 794 } else {
795 795 assert(r_1->is_XMMRegister(), "");
796 796 if (!r_2->is_valid()) {
797 797 __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off));
798 798 } else {
799 799 move_i2c_double(masm, r_1->as_XMMRegister(), saved_sp, ld_off);
800 800 }
801 801 }
802 802 }
803 803
804 804 // 6243940 We might end up in handle_wrong_method if
805 805 // the callee is deoptimized as we race thru here. If that
806 806 // happens we don't want to take a safepoint because the
807 807 // caller frame will look interpreted and arguments are now
808 808 // "compiled" so it is much better to make this transition
809 809 // invisible to the stack walking code. Unfortunately if
810 810 // we try and find the callee by normal means a safepoint
811 811 // is possible. So we stash the desired callee in the thread
812 812 // and the vm will find there should this case occur.
813 813
814 814 __ get_thread(rax);
815 815 __ movptr(Address(rax, JavaThread::callee_target_offset()), rbx);
816 816
817 817 // move methodOop to rax, in case we end up in an c2i adapter.
818 818 // the c2i adapters expect methodOop in rax, (c2) because c2's
819 819 // resolve stubs return the result (the method) in rax,.
820 820 // I'd love to fix this.
821 821 __ mov(rax, rbx);
822 822
823 823 __ jmp(rdi);
824 824 }
825 825
826 826 // ---------------------------------------------------------------
827 827 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
828 828 int total_args_passed,
829 829 int comp_args_on_stack,
830 830 const BasicType *sig_bt,
831 831 const VMRegPair *regs,
832 832 AdapterFingerPrint* fingerprint) {
833 833 address i2c_entry = __ pc();
834 834
835 835 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs);
836 836
837 837 // -------------------------------------------------------------------------
838 838 // Generate a C2I adapter. On entry we know rbx, holds the methodOop during calls
839 839 // to the interpreter. The args start out packed in the compiled layout. They
840 840 // need to be unpacked into the interpreter layout. This will almost always
841 841 // require some stack space. We grow the current (compiled) stack, then repack
842 842 // the args. We finally end in a jump to the generic interpreter entry point.
843 843 // On exit from the interpreter, the interpreter will restore our SP (lest the
844 844 // compiled code, which relys solely on SP and not EBP, get sick).
845 845
846 846 address c2i_unverified_entry = __ pc();
847 847 Label skip_fixup;
848 848
849 849 Register holder = rax;
850 850 Register receiver = rcx;
851 851 Register temp = rbx;
852 852
853 853 {
854 854
855 855 Label missed;
856 856
857 857 __ verify_oop(holder);
858 858 __ movptr(temp, Address(receiver, oopDesc::klass_offset_in_bytes()));
859 859 __ verify_oop(temp);
860 860
861 861 __ cmpptr(temp, Address(holder, compiledICHolderOopDesc::holder_klass_offset()));
862 862 __ movptr(rbx, Address(holder, compiledICHolderOopDesc::holder_method_offset()));
863 863 __ jcc(Assembler::notEqual, missed);
864 864 // Method might have been compiled since the call site was patched to
865 865 // interpreted if that is the case treat it as a miss so we can get
866 866 // the call site corrected.
867 867 __ cmpptr(Address(rbx, in_bytes(methodOopDesc::code_offset())), (int32_t)NULL_WORD);
868 868 __ jcc(Assembler::equal, skip_fixup);
869 869
870 870 __ bind(missed);
871 871 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
872 872 }
873 873
874 874 address c2i_entry = __ pc();
875 875
876 876 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup);
877 877
878 878 __ flush();
879 879 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry);
880 880 }
881 881
882 882 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
883 883 VMRegPair *regs,
884 884 int total_args_passed) {
885 885 // We return the amount of VMRegImpl stack slots we need to reserve for all
886 886 // the arguments NOT counting out_preserve_stack_slots.
887 887
888 888 uint stack = 0; // All arguments on stack
889 889
890 890 for( int i = 0; i < total_args_passed; i++) {
891 891 // From the type and the argument number (count) compute the location
892 892 switch( sig_bt[i] ) {
893 893 case T_BOOLEAN:
894 894 case T_CHAR:
895 895 case T_FLOAT:
896 896 case T_BYTE:
897 897 case T_SHORT:
898 898 case T_INT:
899 899 case T_OBJECT:
900 900 case T_ARRAY:
901 901 case T_ADDRESS:
902 902 regs[i].set1(VMRegImpl::stack2reg(stack++));
903 903 break;
904 904 case T_LONG:
905 905 case T_DOUBLE: // The stack numbering is reversed from Java
906 906 // Since C arguments do not get reversed, the ordering for
907 907 // doubles on the stack must be opposite the Java convention
908 908 assert(sig_bt[i+1] == T_VOID, "missing Half" );
909 909 regs[i].set2(VMRegImpl::stack2reg(stack));
910 910 stack += 2;
911 911 break;
912 912 case T_VOID: regs[i].set_bad(); break;
913 913 default:
914 914 ShouldNotReachHere();
915 915 break;
916 916 }
917 917 }
918 918 return stack;
919 919 }
920 920
921 921 // A simple move of integer like type
922 922 static void simple_move32(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
923 923 if (src.first()->is_stack()) {
924 924 if (dst.first()->is_stack()) {
925 925 // stack to stack
926 926 // __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5);
927 927 // __ st(L5, SP, reg2offset(dst.first()) + STACK_BIAS);
928 928 __ movl2ptr(rax, Address(rbp, reg2offset_in(src.first())));
929 929 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
930 930 } else {
931 931 // stack to reg
932 932 __ movl2ptr(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first())));
933 933 }
934 934 } else if (dst.first()->is_stack()) {
935 935 // reg to stack
936 936 // no need to sign extend on 64bit
937 937 __ movptr(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
938 938 } else {
939 939 if (dst.first() != src.first()) {
940 940 __ mov(dst.first()->as_Register(), src.first()->as_Register());
941 941 }
942 942 }
943 943 }
944 944
945 945 // An oop arg. Must pass a handle not the oop itself
946 946 static void object_move(MacroAssembler* masm,
947 947 OopMap* map,
948 948 int oop_handle_offset,
949 949 int framesize_in_slots,
950 950 VMRegPair src,
951 951 VMRegPair dst,
952 952 bool is_receiver,
953 953 int* receiver_offset) {
954 954
955 955 // Because of the calling conventions we know that src can be a
956 956 // register or a stack location. dst can only be a stack location.
957 957
958 958 assert(dst.first()->is_stack(), "must be stack");
959 959 // must pass a handle. First figure out the location we use as a handle
960 960
961 961 if (src.first()->is_stack()) {
962 962 // Oop is already on the stack as an argument
963 963 Register rHandle = rax;
964 964 Label nil;
965 965 __ xorptr(rHandle, rHandle);
966 966 __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD);
967 967 __ jcc(Assembler::equal, nil);
968 968 __ lea(rHandle, Address(rbp, reg2offset_in(src.first())));
969 969 __ bind(nil);
970 970 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
971 971
972 972 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
973 973 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots));
974 974 if (is_receiver) {
975 975 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size;
976 976 }
977 977 } else {
978 978 // Oop is in an a register we must store it to the space we reserve
979 979 // on the stack for oop_handles
980 980 const Register rOop = src.first()->as_Register();
981 981 const Register rHandle = rax;
982 982 int oop_slot = (rOop == rcx ? 0 : 1) * VMRegImpl::slots_per_word + oop_handle_offset;
983 983 int offset = oop_slot*VMRegImpl::stack_slot_size;
984 984 Label skip;
985 985 __ movptr(Address(rsp, offset), rOop);
986 986 map->set_oop(VMRegImpl::stack2reg(oop_slot));
987 987 __ xorptr(rHandle, rHandle);
988 988 __ cmpptr(rOop, (int32_t)NULL_WORD);
989 989 __ jcc(Assembler::equal, skip);
990 990 __ lea(rHandle, Address(rsp, offset));
991 991 __ bind(skip);
992 992 // Store the handle parameter
993 993 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
994 994 if (is_receiver) {
995 995 *receiver_offset = offset;
996 996 }
997 997 }
998 998 }
999 999
1000 1000 // A float arg may have to do float reg int reg conversion
1001 1001 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1002 1002 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move");
1003 1003
1004 1004 // Because of the calling convention we know that src is either a stack location
1005 1005 // or an xmm register. dst can only be a stack location.
1006 1006
1007 1007 assert(dst.first()->is_stack() && ( src.first()->is_stack() || src.first()->is_XMMRegister()), "bad parameters");
1008 1008
1009 1009 if (src.first()->is_stack()) {
1010 1010 __ movl(rax, Address(rbp, reg2offset_in(src.first())));
1011 1011 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1012 1012 } else {
1013 1013 // reg to stack
1014 1014 __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1015 1015 }
1016 1016 }
1017 1017
1018 1018 // A long move
1019 1019 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1020 1020
1021 1021 // The only legal possibility for a long_move VMRegPair is:
1022 1022 // 1: two stack slots (possibly unaligned)
1023 1023 // as neither the java or C calling convention will use registers
1024 1024 // for longs.
1025 1025
1026 1026 if (src.first()->is_stack() && dst.first()->is_stack()) {
1027 1027 assert(src.second()->is_stack() && dst.second()->is_stack(), "must be all stack");
1028 1028 __ movptr(rax, Address(rbp, reg2offset_in(src.first())));
1029 1029 NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second()))));
1030 1030 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1031 1031 NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx));
1032 1032 } else {
1033 1033 ShouldNotReachHere();
1034 1034 }
1035 1035 }
1036 1036
1037 1037 // A double move
1038 1038 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1039 1039
1040 1040 // The only legal possibilities for a double_move VMRegPair are:
1041 1041 // The painful thing here is that like long_move a VMRegPair might be
1042 1042
1043 1043 // Because of the calling convention we know that src is either
1044 1044 // 1: a single physical register (xmm registers only)
1045 1045 // 2: two stack slots (possibly unaligned)
1046 1046 // dst can only be a pair of stack slots.
1047 1047
1048 1048 assert(dst.first()->is_stack() && (src.first()->is_XMMRegister() || src.first()->is_stack()), "bad args");
1049 1049
1050 1050 if (src.first()->is_stack()) {
1051 1051 // source is all stack
1052 1052 __ movptr(rax, Address(rbp, reg2offset_in(src.first())));
1053 1053 NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second()))));
1054 1054 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1055 1055 NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx));
1056 1056 } else {
1057 1057 // reg to stack
1058 1058 // No worries about stack alignment
1059 1059 __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1060 1060 }
1061 1061 }
1062 1062
1063 1063
1064 1064 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1065 1065 // We always ignore the frame_slots arg and just use the space just below frame pointer
1066 1066 // which by this time is free to use
1067 1067 switch (ret_type) {
1068 1068 case T_FLOAT:
1069 1069 __ fstp_s(Address(rbp, -wordSize));
1070 1070 break;
1071 1071 case T_DOUBLE:
1072 1072 __ fstp_d(Address(rbp, -2*wordSize));
1073 1073 break;
1074 1074 case T_VOID: break;
1075 1075 case T_LONG:
1076 1076 __ movptr(Address(rbp, -wordSize), rax);
1077 1077 NOT_LP64(__ movptr(Address(rbp, -2*wordSize), rdx));
1078 1078 break;
1079 1079 default: {
1080 1080 __ movptr(Address(rbp, -wordSize), rax);
1081 1081 }
1082 1082 }
1083 1083 }
1084 1084
1085 1085 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1086 1086 // We always ignore the frame_slots arg and just use the space just below frame pointer
1087 1087 // which by this time is free to use
1088 1088 switch (ret_type) {
1089 1089 case T_FLOAT:
1090 1090 __ fld_s(Address(rbp, -wordSize));
1091 1091 break;
1092 1092 case T_DOUBLE:
1093 1093 __ fld_d(Address(rbp, -2*wordSize));
1094 1094 break;
1095 1095 case T_LONG:
1096 1096 __ movptr(rax, Address(rbp, -wordSize));
1097 1097 NOT_LP64(__ movptr(rdx, Address(rbp, -2*wordSize)));
1098 1098 break;
1099 1099 case T_VOID: break;
1100 1100 default: {
1101 1101 __ movptr(rax, Address(rbp, -wordSize));
1102 1102 }
1103 1103 }
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1103 lines elided |
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1104 1104 }
1105 1105
1106 1106 // ---------------------------------------------------------------------------
1107 1107 // Generate a native wrapper for a given method. The method takes arguments
1108 1108 // in the Java compiled code convention, marshals them to the native
1109 1109 // convention (handlizes oops, etc), transitions to native, makes the call,
1110 1110 // returns to java state (possibly blocking), unhandlizes any result and
1111 1111 // returns.
1112 1112 nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm,
1113 1113 methodHandle method,
1114 + int compile_id,
1114 1115 int total_in_args,
1115 1116 int comp_args_on_stack,
1116 1117 BasicType *in_sig_bt,
1117 1118 VMRegPair *in_regs,
1118 1119 BasicType ret_type) {
1119 1120
1120 1121 // An OopMap for lock (and class if static)
1121 1122 OopMapSet *oop_maps = new OopMapSet();
1122 1123
1123 1124 // We have received a description of where all the java arg are located
1124 1125 // on entry to the wrapper. We need to convert these args to where
1125 1126 // the jni function will expect them. To figure out where they go
1126 1127 // we convert the java signature to a C signature by inserting
1127 1128 // the hidden arguments as arg[0] and possibly arg[1] (static method)
1128 1129
1129 1130 int total_c_args = total_in_args + 1;
1130 1131 if (method->is_static()) {
1131 1132 total_c_args++;
1132 1133 }
1133 1134
1134 1135 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
1135 1136 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
1136 1137
1137 1138 int argc = 0;
1138 1139 out_sig_bt[argc++] = T_ADDRESS;
1139 1140 if (method->is_static()) {
1140 1141 out_sig_bt[argc++] = T_OBJECT;
1141 1142 }
1142 1143
1143 1144 int i;
1144 1145 for (i = 0; i < total_in_args ; i++ ) {
1145 1146 out_sig_bt[argc++] = in_sig_bt[i];
1146 1147 }
1147 1148
1148 1149
1149 1150 // Now figure out where the args must be stored and how much stack space
1150 1151 // they require (neglecting out_preserve_stack_slots but space for storing
1151 1152 // the 1st six register arguments). It's weird see int_stk_helper.
1152 1153 //
1153 1154 int out_arg_slots;
1154 1155 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args);
1155 1156
1156 1157 // Compute framesize for the wrapper. We need to handlize all oops in
1157 1158 // registers a max of 2 on x86.
1158 1159
1159 1160 // Calculate the total number of stack slots we will need.
1160 1161
1161 1162 // First count the abi requirement plus all of the outgoing args
1162 1163 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
1163 1164
1164 1165 // Now the space for the inbound oop handle area
1165 1166
1166 1167 int oop_handle_offset = stack_slots;
1167 1168 stack_slots += 2*VMRegImpl::slots_per_word;
1168 1169
1169 1170 // Now any space we need for handlizing a klass if static method
1170 1171
1171 1172 int klass_slot_offset = 0;
1172 1173 int klass_offset = -1;
1173 1174 int lock_slot_offset = 0;
1174 1175 bool is_static = false;
1175 1176 int oop_temp_slot_offset = 0;
1176 1177
1177 1178 if (method->is_static()) {
1178 1179 klass_slot_offset = stack_slots;
1179 1180 stack_slots += VMRegImpl::slots_per_word;
1180 1181 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size;
1181 1182 is_static = true;
1182 1183 }
1183 1184
1184 1185 // Plus a lock if needed
1185 1186
1186 1187 if (method->is_synchronized()) {
1187 1188 lock_slot_offset = stack_slots;
1188 1189 stack_slots += VMRegImpl::slots_per_word;
1189 1190 }
1190 1191
1191 1192 // Now a place (+2) to save return values or temp during shuffling
1192 1193 // + 2 for return address (which we own) and saved rbp,
1193 1194 stack_slots += 4;
1194 1195
1195 1196 // Ok The space we have allocated will look like:
1196 1197 //
1197 1198 //
1198 1199 // FP-> | |
1199 1200 // |---------------------|
1200 1201 // | 2 slots for moves |
1201 1202 // |---------------------|
1202 1203 // | lock box (if sync) |
1203 1204 // |---------------------| <- lock_slot_offset (-lock_slot_rbp_offset)
1204 1205 // | klass (if static) |
1205 1206 // |---------------------| <- klass_slot_offset
1206 1207 // | oopHandle area |
1207 1208 // |---------------------| <- oop_handle_offset (a max of 2 registers)
1208 1209 // | outbound memory |
1209 1210 // | based arguments |
1210 1211 // | |
1211 1212 // |---------------------|
1212 1213 // | |
1213 1214 // SP-> | out_preserved_slots |
1214 1215 //
1215 1216 //
1216 1217 // ****************************************************************************
1217 1218 // WARNING - on Windows Java Natives use pascal calling convention and pop the
1218 1219 // arguments off of the stack after the jni call. Before the call we can use
1219 1220 // instructions that are SP relative. After the jni call we switch to FP
1220 1221 // relative instructions instead of re-adjusting the stack on windows.
1221 1222 // ****************************************************************************
1222 1223
1223 1224
1224 1225 // Now compute actual number of stack words we need rounding to make
1225 1226 // stack properly aligned.
1226 1227 stack_slots = round_to(stack_slots, StackAlignmentInSlots);
1227 1228
1228 1229 int stack_size = stack_slots * VMRegImpl::stack_slot_size;
1229 1230
1230 1231 intptr_t start = (intptr_t)__ pc();
1231 1232
1232 1233 // First thing make an ic check to see if we should even be here
1233 1234
1234 1235 // We are free to use all registers as temps without saving them and
1235 1236 // restoring them except rbp,. rbp, is the only callee save register
1236 1237 // as far as the interpreter and the compiler(s) are concerned.
1237 1238
1238 1239
1239 1240 const Register ic_reg = rax;
1240 1241 const Register receiver = rcx;
1241 1242 Label hit;
1242 1243 Label exception_pending;
1243 1244
1244 1245
1245 1246 __ verify_oop(receiver);
1246 1247 __ cmpptr(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes()));
1247 1248 __ jcc(Assembler::equal, hit);
1248 1249
1249 1250 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
1250 1251
1251 1252 // verified entry must be aligned for code patching.
1252 1253 // and the first 5 bytes must be in the same cache line
1253 1254 // if we align at 8 then we will be sure 5 bytes are in the same line
1254 1255 __ align(8);
1255 1256
1256 1257 __ bind(hit);
1257 1258
1258 1259 int vep_offset = ((intptr_t)__ pc()) - start;
1259 1260
1260 1261 #ifdef COMPILER1
1261 1262 if (InlineObjectHash && method->intrinsic_id() == vmIntrinsics::_hashCode) {
1262 1263 // Object.hashCode can pull the hashCode from the header word
1263 1264 // instead of doing a full VM transition once it's been computed.
1264 1265 // Since hashCode is usually polymorphic at call sites we can't do
1265 1266 // this optimization at the call site without a lot of work.
1266 1267 Label slowCase;
1267 1268 Register receiver = rcx;
1268 1269 Register result = rax;
1269 1270 __ movptr(result, Address(receiver, oopDesc::mark_offset_in_bytes()));
1270 1271
1271 1272 // check if locked
1272 1273 __ testptr(result, markOopDesc::unlocked_value);
1273 1274 __ jcc (Assembler::zero, slowCase);
1274 1275
1275 1276 if (UseBiasedLocking) {
1276 1277 // Check if biased and fall through to runtime if so
1277 1278 __ testptr(result, markOopDesc::biased_lock_bit_in_place);
1278 1279 __ jcc (Assembler::notZero, slowCase);
1279 1280 }
1280 1281
1281 1282 // get hash
1282 1283 __ andptr(result, markOopDesc::hash_mask_in_place);
1283 1284 // test if hashCode exists
1284 1285 __ jcc (Assembler::zero, slowCase);
1285 1286 __ shrptr(result, markOopDesc::hash_shift);
1286 1287 __ ret(0);
1287 1288 __ bind (slowCase);
1288 1289 }
1289 1290 #endif // COMPILER1
1290 1291
1291 1292 // The instruction at the verified entry point must be 5 bytes or longer
1292 1293 // because it can be patched on the fly by make_non_entrant. The stack bang
1293 1294 // instruction fits that requirement.
1294 1295
1295 1296 // Generate stack overflow check
1296 1297
1297 1298 if (UseStackBanging) {
1298 1299 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size());
1299 1300 } else {
1300 1301 // need a 5 byte instruction to allow MT safe patching to non-entrant
1301 1302 __ fat_nop();
1302 1303 }
1303 1304
1304 1305 // Generate a new frame for the wrapper.
1305 1306 __ enter();
1306 1307 // -2 because return address is already present and so is saved rbp,
1307 1308 __ subptr(rsp, stack_size - 2*wordSize);
1308 1309
1309 1310 // Frame is now completed as far a size and linkage.
1310 1311
1311 1312 int frame_complete = ((intptr_t)__ pc()) - start;
1312 1313
1313 1314 // Calculate the difference between rsp and rbp,. We need to know it
1314 1315 // after the native call because on windows Java Natives will pop
1315 1316 // the arguments and it is painful to do rsp relative addressing
1316 1317 // in a platform independent way. So after the call we switch to
1317 1318 // rbp, relative addressing.
1318 1319
1319 1320 int fp_adjustment = stack_size - 2*wordSize;
1320 1321
1321 1322 #ifdef COMPILER2
1322 1323 // C2 may leave the stack dirty if not in SSE2+ mode
1323 1324 if (UseSSE >= 2) {
1324 1325 __ verify_FPU(0, "c2i transition should have clean FPU stack");
1325 1326 } else {
1326 1327 __ empty_FPU_stack();
1327 1328 }
1328 1329 #endif /* COMPILER2 */
1329 1330
1330 1331 // Compute the rbp, offset for any slots used after the jni call
1331 1332
1332 1333 int lock_slot_rbp_offset = (lock_slot_offset*VMRegImpl::stack_slot_size) - fp_adjustment;
1333 1334 int oop_temp_slot_rbp_offset = (oop_temp_slot_offset*VMRegImpl::stack_slot_size) - fp_adjustment;
1334 1335
1335 1336 // We use rdi as a thread pointer because it is callee save and
1336 1337 // if we load it once it is usable thru the entire wrapper
1337 1338 const Register thread = rdi;
1338 1339
1339 1340 // We use rsi as the oop handle for the receiver/klass
1340 1341 // It is callee save so it survives the call to native
1341 1342
1342 1343 const Register oop_handle_reg = rsi;
1343 1344
1344 1345 __ get_thread(thread);
1345 1346
1346 1347
1347 1348 //
1348 1349 // We immediately shuffle the arguments so that any vm call we have to
1349 1350 // make from here on out (sync slow path, jvmti, etc.) we will have
1350 1351 // captured the oops from our caller and have a valid oopMap for
1351 1352 // them.
1352 1353
1353 1354 // -----------------
1354 1355 // The Grand Shuffle
1355 1356 //
1356 1357 // Natives require 1 or 2 extra arguments over the normal ones: the JNIEnv*
1357 1358 // and, if static, the class mirror instead of a receiver. This pretty much
1358 1359 // guarantees that register layout will not match (and x86 doesn't use reg
1359 1360 // parms though amd does). Since the native abi doesn't use register args
1360 1361 // and the java conventions does we don't have to worry about collisions.
1361 1362 // All of our moved are reg->stack or stack->stack.
1362 1363 // We ignore the extra arguments during the shuffle and handle them at the
1363 1364 // last moment. The shuffle is described by the two calling convention
1364 1365 // vectors we have in our possession. We simply walk the java vector to
1365 1366 // get the source locations and the c vector to get the destinations.
1366 1367
1367 1368 int c_arg = method->is_static() ? 2 : 1 ;
1368 1369
1369 1370 // Record rsp-based slot for receiver on stack for non-static methods
1370 1371 int receiver_offset = -1;
1371 1372
1372 1373 // This is a trick. We double the stack slots so we can claim
1373 1374 // the oops in the caller's frame. Since we are sure to have
1374 1375 // more args than the caller doubling is enough to make
1375 1376 // sure we can capture all the incoming oop args from the
1376 1377 // caller.
1377 1378 //
1378 1379 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1379 1380
1380 1381 // Mark location of rbp,
1381 1382 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, rbp->as_VMReg());
1382 1383
1383 1384 // We know that we only have args in at most two integer registers (rcx, rdx). So rax, rbx
1384 1385 // Are free to temporaries if we have to do stack to steck moves.
1385 1386 // All inbound args are referenced based on rbp, and all outbound args via rsp.
1386 1387
1387 1388 for (i = 0; i < total_in_args ; i++, c_arg++ ) {
1388 1389 switch (in_sig_bt[i]) {
1389 1390 case T_ARRAY:
1390 1391 case T_OBJECT:
1391 1392 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg],
1392 1393 ((i == 0) && (!is_static)),
1393 1394 &receiver_offset);
1394 1395 break;
1395 1396 case T_VOID:
1396 1397 break;
1397 1398
1398 1399 case T_FLOAT:
1399 1400 float_move(masm, in_regs[i], out_regs[c_arg]);
1400 1401 break;
1401 1402
1402 1403 case T_DOUBLE:
1403 1404 assert( i + 1 < total_in_args &&
1404 1405 in_sig_bt[i + 1] == T_VOID &&
1405 1406 out_sig_bt[c_arg+1] == T_VOID, "bad arg list");
1406 1407 double_move(masm, in_regs[i], out_regs[c_arg]);
1407 1408 break;
1408 1409
1409 1410 case T_LONG :
1410 1411 long_move(masm, in_regs[i], out_regs[c_arg]);
1411 1412 break;
1412 1413
1413 1414 case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
1414 1415
1415 1416 default:
1416 1417 simple_move32(masm, in_regs[i], out_regs[c_arg]);
1417 1418 }
1418 1419 }
1419 1420
1420 1421 // Pre-load a static method's oop into rsi. Used both by locking code and
1421 1422 // the normal JNI call code.
1422 1423 if (method->is_static()) {
1423 1424
1424 1425 // load opp into a register
1425 1426 __ movoop(oop_handle_reg, JNIHandles::make_local(Klass::cast(method->method_holder())->java_mirror()));
1426 1427
1427 1428 // Now handlize the static class mirror it's known not-null.
1428 1429 __ movptr(Address(rsp, klass_offset), oop_handle_reg);
1429 1430 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
1430 1431
1431 1432 // Now get the handle
1432 1433 __ lea(oop_handle_reg, Address(rsp, klass_offset));
1433 1434 // store the klass handle as second argument
1434 1435 __ movptr(Address(rsp, wordSize), oop_handle_reg);
1435 1436 }
1436 1437
1437 1438 // Change state to native (we save the return address in the thread, since it might not
1438 1439 // be pushed on the stack when we do a a stack traversal). It is enough that the pc()
1439 1440 // points into the right code segment. It does not have to be the correct return pc.
1440 1441 // We use the same pc/oopMap repeatedly when we call out
1441 1442
1442 1443 intptr_t the_pc = (intptr_t) __ pc();
1443 1444 oop_maps->add_gc_map(the_pc - start, map);
1444 1445
1445 1446 __ set_last_Java_frame(thread, rsp, noreg, (address)the_pc);
1446 1447
1447 1448
1448 1449 // We have all of the arguments setup at this point. We must not touch any register
1449 1450 // argument registers at this point (what if we save/restore them there are no oop?
1450 1451
1451 1452 {
1452 1453 SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0);
1453 1454 __ movoop(rax, JNIHandles::make_local(method()));
1454 1455 __ call_VM_leaf(
1455 1456 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
1456 1457 thread, rax);
1457 1458 }
1458 1459
1459 1460 // RedefineClasses() tracing support for obsolete method entry
1460 1461 if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) {
1461 1462 __ movoop(rax, JNIHandles::make_local(method()));
1462 1463 __ call_VM_leaf(
1463 1464 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry),
1464 1465 thread, rax);
1465 1466 }
1466 1467
1467 1468 // These are register definitions we need for locking/unlocking
1468 1469 const Register swap_reg = rax; // Must use rax, for cmpxchg instruction
1469 1470 const Register obj_reg = rcx; // Will contain the oop
1470 1471 const Register lock_reg = rdx; // Address of compiler lock object (BasicLock)
1471 1472
1472 1473 Label slow_path_lock;
1473 1474 Label lock_done;
1474 1475
1475 1476 // Lock a synchronized method
1476 1477 if (method->is_synchronized()) {
1477 1478
1478 1479
1479 1480 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes();
1480 1481
1481 1482 // Get the handle (the 2nd argument)
1482 1483 __ movptr(oop_handle_reg, Address(rsp, wordSize));
1483 1484
1484 1485 // Get address of the box
1485 1486
1486 1487 __ lea(lock_reg, Address(rbp, lock_slot_rbp_offset));
1487 1488
1488 1489 // Load the oop from the handle
1489 1490 __ movptr(obj_reg, Address(oop_handle_reg, 0));
1490 1491
1491 1492 if (UseBiasedLocking) {
1492 1493 // Note that oop_handle_reg is trashed during this call
1493 1494 __ biased_locking_enter(lock_reg, obj_reg, swap_reg, oop_handle_reg, false, lock_done, &slow_path_lock);
1494 1495 }
1495 1496
1496 1497 // Load immediate 1 into swap_reg %rax,
1497 1498 __ movptr(swap_reg, 1);
1498 1499
1499 1500 // Load (object->mark() | 1) into swap_reg %rax,
1500 1501 __ orptr(swap_reg, Address(obj_reg, 0));
1501 1502
1502 1503 // Save (object->mark() | 1) into BasicLock's displaced header
1503 1504 __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
1504 1505
1505 1506 if (os::is_MP()) {
1506 1507 __ lock();
1507 1508 }
1508 1509
1509 1510 // src -> dest iff dest == rax, else rax, <- dest
1510 1511 // *obj_reg = lock_reg iff *obj_reg == rax, else rax, = *(obj_reg)
1511 1512 __ cmpxchgptr(lock_reg, Address(obj_reg, 0));
1512 1513 __ jcc(Assembler::equal, lock_done);
1513 1514
1514 1515 // Test if the oopMark is an obvious stack pointer, i.e.,
1515 1516 // 1) (mark & 3) == 0, and
1516 1517 // 2) rsp <= mark < mark + os::pagesize()
1517 1518 // These 3 tests can be done by evaluating the following
1518 1519 // expression: ((mark - rsp) & (3 - os::vm_page_size())),
1519 1520 // assuming both stack pointer and pagesize have their
1520 1521 // least significant 2 bits clear.
1521 1522 // NOTE: the oopMark is in swap_reg %rax, as the result of cmpxchg
1522 1523
1523 1524 __ subptr(swap_reg, rsp);
1524 1525 __ andptr(swap_reg, 3 - os::vm_page_size());
1525 1526
1526 1527 // Save the test result, for recursive case, the result is zero
1527 1528 __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
1528 1529 __ jcc(Assembler::notEqual, slow_path_lock);
1529 1530 // Slow path will re-enter here
1530 1531 __ bind(lock_done);
1531 1532
1532 1533 if (UseBiasedLocking) {
1533 1534 // Re-fetch oop_handle_reg as we trashed it above
1534 1535 __ movptr(oop_handle_reg, Address(rsp, wordSize));
1535 1536 }
1536 1537 }
1537 1538
1538 1539
1539 1540 // Finally just about ready to make the JNI call
1540 1541
1541 1542
1542 1543 // get JNIEnv* which is first argument to native
1543 1544
1544 1545 __ lea(rdx, Address(thread, in_bytes(JavaThread::jni_environment_offset())));
1545 1546 __ movptr(Address(rsp, 0), rdx);
1546 1547
1547 1548 // Now set thread in native
1548 1549 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native);
1549 1550
1550 1551 __ call(RuntimeAddress(method->native_function()));
1551 1552
1552 1553 // WARNING - on Windows Java Natives use pascal calling convention and pop the
1553 1554 // arguments off of the stack. We could just re-adjust the stack pointer here
1554 1555 // and continue to do SP relative addressing but we instead switch to FP
1555 1556 // relative addressing.
1556 1557
1557 1558 // Unpack native results.
1558 1559 switch (ret_type) {
1559 1560 case T_BOOLEAN: __ c2bool(rax); break;
1560 1561 case T_CHAR : __ andptr(rax, 0xFFFF); break;
1561 1562 case T_BYTE : __ sign_extend_byte (rax); break;
1562 1563 case T_SHORT : __ sign_extend_short(rax); break;
1563 1564 case T_INT : /* nothing to do */ break;
1564 1565 case T_DOUBLE :
1565 1566 case T_FLOAT :
1566 1567 // Result is in st0 we'll save as needed
1567 1568 break;
1568 1569 case T_ARRAY: // Really a handle
1569 1570 case T_OBJECT: // Really a handle
1570 1571 break; // can't de-handlize until after safepoint check
1571 1572 case T_VOID: break;
1572 1573 case T_LONG: break;
1573 1574 default : ShouldNotReachHere();
1574 1575 }
1575 1576
1576 1577 // Switch thread to "native transition" state before reading the synchronization state.
1577 1578 // This additional state is necessary because reading and testing the synchronization
1578 1579 // state is not atomic w.r.t. GC, as this scenario demonstrates:
1579 1580 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted.
1580 1581 // VM thread changes sync state to synchronizing and suspends threads for GC.
1581 1582 // Thread A is resumed to finish this native method, but doesn't block here since it
1582 1583 // didn't see any synchronization is progress, and escapes.
1583 1584 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native_trans);
1584 1585
1585 1586 if(os::is_MP()) {
1586 1587 if (UseMembar) {
1587 1588 // Force this write out before the read below
1588 1589 __ membar(Assembler::Membar_mask_bits(
1589 1590 Assembler::LoadLoad | Assembler::LoadStore |
1590 1591 Assembler::StoreLoad | Assembler::StoreStore));
1591 1592 } else {
1592 1593 // Write serialization page so VM thread can do a pseudo remote membar.
1593 1594 // We use the current thread pointer to calculate a thread specific
1594 1595 // offset to write to within the page. This minimizes bus traffic
1595 1596 // due to cache line collision.
1596 1597 __ serialize_memory(thread, rcx);
1597 1598 }
1598 1599 }
1599 1600
1600 1601 if (AlwaysRestoreFPU) {
1601 1602 // Make sure the control word is correct.
1602 1603 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
1603 1604 }
1604 1605
1605 1606 // check for safepoint operation in progress and/or pending suspend requests
1606 1607 { Label Continue;
1607 1608
1608 1609 __ cmp32(ExternalAddress((address)SafepointSynchronize::address_of_state()),
1609 1610 SafepointSynchronize::_not_synchronized);
1610 1611
1611 1612 Label L;
1612 1613 __ jcc(Assembler::notEqual, L);
1613 1614 __ cmpl(Address(thread, JavaThread::suspend_flags_offset()), 0);
1614 1615 __ jcc(Assembler::equal, Continue);
1615 1616 __ bind(L);
1616 1617
1617 1618 // Don't use call_VM as it will see a possible pending exception and forward it
1618 1619 // and never return here preventing us from clearing _last_native_pc down below.
1619 1620 // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are
1620 1621 // preserved and correspond to the bcp/locals pointers. So we do a runtime call
1621 1622 // by hand.
1622 1623 //
1623 1624 save_native_result(masm, ret_type, stack_slots);
1624 1625 __ push(thread);
1625 1626 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address,
1626 1627 JavaThread::check_special_condition_for_native_trans)));
1627 1628 __ increment(rsp, wordSize);
1628 1629 // Restore any method result value
1629 1630 restore_native_result(masm, ret_type, stack_slots);
1630 1631
1631 1632 __ bind(Continue);
1632 1633 }
1633 1634
1634 1635 // change thread state
1635 1636 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_Java);
1636 1637
1637 1638 Label reguard;
1638 1639 Label reguard_done;
1639 1640 __ cmpl(Address(thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_disabled);
1640 1641 __ jcc(Assembler::equal, reguard);
1641 1642
1642 1643 // slow path reguard re-enters here
1643 1644 __ bind(reguard_done);
1644 1645
1645 1646 // Handle possible exception (will unlock if necessary)
1646 1647
1647 1648 // native result if any is live
1648 1649
1649 1650 // Unlock
1650 1651 Label slow_path_unlock;
1651 1652 Label unlock_done;
1652 1653 if (method->is_synchronized()) {
1653 1654
1654 1655 Label done;
1655 1656
1656 1657 // Get locked oop from the handle we passed to jni
1657 1658 __ movptr(obj_reg, Address(oop_handle_reg, 0));
1658 1659
1659 1660 if (UseBiasedLocking) {
1660 1661 __ biased_locking_exit(obj_reg, rbx, done);
1661 1662 }
1662 1663
1663 1664 // Simple recursive lock?
1664 1665
1665 1666 __ cmpptr(Address(rbp, lock_slot_rbp_offset), (int32_t)NULL_WORD);
1666 1667 __ jcc(Assembler::equal, done);
1667 1668
1668 1669 // Must save rax, if if it is live now because cmpxchg must use it
1669 1670 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
1670 1671 save_native_result(masm, ret_type, stack_slots);
1671 1672 }
1672 1673
1673 1674 // get old displaced header
1674 1675 __ movptr(rbx, Address(rbp, lock_slot_rbp_offset));
1675 1676
1676 1677 // get address of the stack lock
1677 1678 __ lea(rax, Address(rbp, lock_slot_rbp_offset));
1678 1679
1679 1680 // Atomic swap old header if oop still contains the stack lock
1680 1681 if (os::is_MP()) {
1681 1682 __ lock();
1682 1683 }
1683 1684
1684 1685 // src -> dest iff dest == rax, else rax, <- dest
1685 1686 // *obj_reg = rbx, iff *obj_reg == rax, else rax, = *(obj_reg)
1686 1687 __ cmpxchgptr(rbx, Address(obj_reg, 0));
1687 1688 __ jcc(Assembler::notEqual, slow_path_unlock);
1688 1689
1689 1690 // slow path re-enters here
1690 1691 __ bind(unlock_done);
1691 1692 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
1692 1693 restore_native_result(masm, ret_type, stack_slots);
1693 1694 }
1694 1695
1695 1696 __ bind(done);
1696 1697
1697 1698 }
1698 1699
1699 1700 {
1700 1701 SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0);
1701 1702 // Tell dtrace about this method exit
1702 1703 save_native_result(masm, ret_type, stack_slots);
1703 1704 __ movoop(rax, JNIHandles::make_local(method()));
1704 1705 __ call_VM_leaf(
1705 1706 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
1706 1707 thread, rax);
1707 1708 restore_native_result(masm, ret_type, stack_slots);
1708 1709 }
1709 1710
1710 1711 // We can finally stop using that last_Java_frame we setup ages ago
1711 1712
1712 1713 __ reset_last_Java_frame(thread, false, true);
1713 1714
1714 1715 // Unpack oop result
1715 1716 if (ret_type == T_OBJECT || ret_type == T_ARRAY) {
1716 1717 Label L;
1717 1718 __ cmpptr(rax, (int32_t)NULL_WORD);
1718 1719 __ jcc(Assembler::equal, L);
1719 1720 __ movptr(rax, Address(rax, 0));
1720 1721 __ bind(L);
1721 1722 __ verify_oop(rax);
1722 1723 }
1723 1724
1724 1725 // reset handle block
1725 1726 __ movptr(rcx, Address(thread, JavaThread::active_handles_offset()));
1726 1727
1727 1728 __ movptr(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), NULL_WORD);
1728 1729
1729 1730 // Any exception pending?
1730 1731 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
1731 1732 __ jcc(Assembler::notEqual, exception_pending);
1732 1733
1733 1734
1734 1735 // no exception, we're almost done
1735 1736
1736 1737 // check that only result value is on FPU stack
1737 1738 __ verify_FPU(ret_type == T_FLOAT || ret_type == T_DOUBLE ? 1 : 0, "native_wrapper normal exit");
1738 1739
1739 1740 // Fixup floating pointer results so that result looks like a return from a compiled method
1740 1741 if (ret_type == T_FLOAT) {
1741 1742 if (UseSSE >= 1) {
1742 1743 // Pop st0 and store as float and reload into xmm register
1743 1744 __ fstp_s(Address(rbp, -4));
1744 1745 __ movflt(xmm0, Address(rbp, -4));
1745 1746 }
1746 1747 } else if (ret_type == T_DOUBLE) {
1747 1748 if (UseSSE >= 2) {
1748 1749 // Pop st0 and store as double and reload into xmm register
1749 1750 __ fstp_d(Address(rbp, -8));
1750 1751 __ movdbl(xmm0, Address(rbp, -8));
1751 1752 }
1752 1753 }
1753 1754
1754 1755 // Return
1755 1756
1756 1757 __ leave();
1757 1758 __ ret(0);
1758 1759
1759 1760 // Unexpected paths are out of line and go here
1760 1761
1761 1762 // Slow path locking & unlocking
1762 1763 if (method->is_synchronized()) {
1763 1764
1764 1765 // BEGIN Slow path lock
1765 1766
1766 1767 __ bind(slow_path_lock);
1767 1768
1768 1769 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM
1769 1770 // args are (oop obj, BasicLock* lock, JavaThread* thread)
1770 1771 __ push(thread);
1771 1772 __ push(lock_reg);
1772 1773 __ push(obj_reg);
1773 1774 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C)));
1774 1775 __ addptr(rsp, 3*wordSize);
1775 1776
1776 1777 #ifdef ASSERT
1777 1778 { Label L;
1778 1779 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD);
1779 1780 __ jcc(Assembler::equal, L);
1780 1781 __ stop("no pending exception allowed on exit from monitorenter");
1781 1782 __ bind(L);
1782 1783 }
1783 1784 #endif
1784 1785 __ jmp(lock_done);
1785 1786
1786 1787 // END Slow path lock
1787 1788
1788 1789 // BEGIN Slow path unlock
1789 1790 __ bind(slow_path_unlock);
1790 1791
1791 1792 // Slow path unlock
1792 1793
1793 1794 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
1794 1795 save_native_result(masm, ret_type, stack_slots);
1795 1796 }
1796 1797 // Save pending exception around call to VM (which contains an EXCEPTION_MARK)
1797 1798
1798 1799 __ pushptr(Address(thread, in_bytes(Thread::pending_exception_offset())));
1799 1800 __ movptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD);
1800 1801
1801 1802
1802 1803 // should be a peal
1803 1804 // +wordSize because of the push above
1804 1805 __ lea(rax, Address(rbp, lock_slot_rbp_offset));
1805 1806 __ push(rax);
1806 1807
1807 1808 __ push(obj_reg);
1808 1809 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C)));
1809 1810 __ addptr(rsp, 2*wordSize);
1810 1811 #ifdef ASSERT
1811 1812 {
1812 1813 Label L;
1813 1814 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
1814 1815 __ jcc(Assembler::equal, L);
1815 1816 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C");
1816 1817 __ bind(L);
1817 1818 }
1818 1819 #endif /* ASSERT */
1819 1820
1820 1821 __ popptr(Address(thread, in_bytes(Thread::pending_exception_offset())));
1821 1822
1822 1823 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
1823 1824 restore_native_result(masm, ret_type, stack_slots);
1824 1825 }
1825 1826 __ jmp(unlock_done);
1826 1827 // END Slow path unlock
1827 1828
1828 1829 }
1829 1830
1830 1831 // SLOW PATH Reguard the stack if needed
1831 1832
1832 1833 __ bind(reguard);
1833 1834 save_native_result(masm, ret_type, stack_slots);
1834 1835 {
1835 1836 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages)));
1836 1837 }
1837 1838 restore_native_result(masm, ret_type, stack_slots);
1838 1839 __ jmp(reguard_done);
1839 1840
1840 1841
1841 1842 // BEGIN EXCEPTION PROCESSING
1842 1843
1843 1844 // Forward the exception
1844 1845 __ bind(exception_pending);
1845 1846
1846 1847 // remove possible return value from FPU register stack
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1847 1848 __ empty_FPU_stack();
1848 1849
1849 1850 // pop our frame
1850 1851 __ leave();
1851 1852 // and forward the exception
1852 1853 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
1853 1854
1854 1855 __ flush();
1855 1856
1856 1857 nmethod *nm = nmethod::new_native_nmethod(method,
1858 + compile_id,
1857 1859 masm->code(),
1858 1860 vep_offset,
1859 1861 frame_complete,
1860 1862 stack_slots / VMRegImpl::slots_per_word,
1861 1863 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
1862 1864 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size),
1863 1865 oop_maps);
1864 1866 return nm;
1865 1867
1866 1868 }
1867 1869
1868 1870 #ifdef HAVE_DTRACE_H
1869 1871 // ---------------------------------------------------------------------------
1870 1872 // Generate a dtrace nmethod for a given signature. The method takes arguments
1871 1873 // in the Java compiled code convention, marshals them to the native
1872 1874 // abi and then leaves nops at the position you would expect to call a native
1873 1875 // function. When the probe is enabled the nops are replaced with a trap
1874 1876 // instruction that dtrace inserts and the trace will cause a notification
1875 1877 // to dtrace.
1876 1878 //
1877 1879 // The probes are only able to take primitive types and java/lang/String as
1878 1880 // arguments. No other java types are allowed. Strings are converted to utf8
1879 1881 // strings so that from dtrace point of view java strings are converted to C
1880 1882 // strings. There is an arbitrary fixed limit on the total space that a method
1881 1883 // can use for converting the strings. (256 chars per string in the signature).
1882 1884 // So any java string larger then this is truncated.
1883 1885
1884 1886 nmethod *SharedRuntime::generate_dtrace_nmethod(
1885 1887 MacroAssembler *masm, methodHandle method) {
1886 1888
1887 1889 // generate_dtrace_nmethod is guarded by a mutex so we are sure to
1888 1890 // be single threaded in this method.
1889 1891 assert(AdapterHandlerLibrary_lock->owned_by_self(), "must be");
1890 1892
1891 1893 // Fill in the signature array, for the calling-convention call.
1892 1894 int total_args_passed = method->size_of_parameters();
1893 1895
1894 1896 BasicType* in_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed);
1895 1897 VMRegPair *in_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed);
1896 1898
1897 1899 // The signature we are going to use for the trap that dtrace will see
1898 1900 // java/lang/String is converted. We drop "this" and any other object
1899 1901 // is converted to NULL. (A one-slot java/lang/Long object reference
1900 1902 // is converted to a two-slot long, which is why we double the allocation).
1901 1903 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed * 2);
1902 1904 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed * 2);
1903 1905
1904 1906 int i=0;
1905 1907 int total_strings = 0;
1906 1908 int first_arg_to_pass = 0;
1907 1909 int total_c_args = 0;
1908 1910
1909 1911 if( !method->is_static() ) { // Pass in receiver first
1910 1912 in_sig_bt[i++] = T_OBJECT;
1911 1913 first_arg_to_pass = 1;
1912 1914 }
1913 1915
1914 1916 // We need to convert the java args to where a native (non-jni) function
1915 1917 // would expect them. To figure out where they go we convert the java
1916 1918 // signature to a C signature.
1917 1919
1918 1920 SignatureStream ss(method->signature());
1919 1921 for ( ; !ss.at_return_type(); ss.next()) {
1920 1922 BasicType bt = ss.type();
1921 1923 in_sig_bt[i++] = bt; // Collect remaining bits of signature
1922 1924 out_sig_bt[total_c_args++] = bt;
1923 1925 if( bt == T_OBJECT) {
1924 1926 Symbol* s = ss.as_symbol_or_null(); // symbol is created
1925 1927 if (s == vmSymbols::java_lang_String()) {
1926 1928 total_strings++;
1927 1929 out_sig_bt[total_c_args-1] = T_ADDRESS;
1928 1930 } else if (s == vmSymbols::java_lang_Boolean() ||
1929 1931 s == vmSymbols::java_lang_Character() ||
1930 1932 s == vmSymbols::java_lang_Byte() ||
1931 1933 s == vmSymbols::java_lang_Short() ||
1932 1934 s == vmSymbols::java_lang_Integer() ||
1933 1935 s == vmSymbols::java_lang_Float()) {
1934 1936 out_sig_bt[total_c_args-1] = T_INT;
1935 1937 } else if (s == vmSymbols::java_lang_Long() ||
1936 1938 s == vmSymbols::java_lang_Double()) {
1937 1939 out_sig_bt[total_c_args-1] = T_LONG;
1938 1940 out_sig_bt[total_c_args++] = T_VOID;
1939 1941 }
1940 1942 } else if ( bt == T_LONG || bt == T_DOUBLE ) {
1941 1943 in_sig_bt[i++] = T_VOID; // Longs & doubles take 2 Java slots
1942 1944 out_sig_bt[total_c_args++] = T_VOID;
1943 1945 }
1944 1946 }
1945 1947
1946 1948 assert(i==total_args_passed, "validly parsed signature");
1947 1949
1948 1950 // Now get the compiled-Java layout as input arguments
1949 1951 int comp_args_on_stack;
1950 1952 comp_args_on_stack = SharedRuntime::java_calling_convention(
1951 1953 in_sig_bt, in_regs, total_args_passed, false);
1952 1954
1953 1955 // Now figure out where the args must be stored and how much stack space
1954 1956 // they require (neglecting out_preserve_stack_slots).
1955 1957
1956 1958 int out_arg_slots;
1957 1959 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args);
1958 1960
1959 1961 // Calculate the total number of stack slots we will need.
1960 1962
1961 1963 // First count the abi requirement plus all of the outgoing args
1962 1964 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
1963 1965
1964 1966 // Now space for the string(s) we must convert
1965 1967
1966 1968 int* string_locs = NEW_RESOURCE_ARRAY(int, total_strings + 1);
1967 1969 for (i = 0; i < total_strings ; i++) {
1968 1970 string_locs[i] = stack_slots;
1969 1971 stack_slots += max_dtrace_string_size / VMRegImpl::stack_slot_size;
1970 1972 }
1971 1973
1972 1974 // + 2 for return address (which we own) and saved rbp,
1973 1975
1974 1976 stack_slots += 2;
1975 1977
1976 1978 // Ok The space we have allocated will look like:
1977 1979 //
1978 1980 //
1979 1981 // FP-> | |
1980 1982 // |---------------------|
1981 1983 // | string[n] |
1982 1984 // |---------------------| <- string_locs[n]
1983 1985 // | string[n-1] |
1984 1986 // |---------------------| <- string_locs[n-1]
1985 1987 // | ... |
1986 1988 // | ... |
1987 1989 // |---------------------| <- string_locs[1]
1988 1990 // | string[0] |
1989 1991 // |---------------------| <- string_locs[0]
1990 1992 // | outbound memory |
1991 1993 // | based arguments |
1992 1994 // | |
1993 1995 // |---------------------|
1994 1996 // | |
1995 1997 // SP-> | out_preserved_slots |
1996 1998 //
1997 1999 //
1998 2000
1999 2001 // Now compute actual number of stack words we need rounding to make
2000 2002 // stack properly aligned.
2001 2003 stack_slots = round_to(stack_slots, 2 * VMRegImpl::slots_per_word);
2002 2004
2003 2005 int stack_size = stack_slots * VMRegImpl::stack_slot_size;
2004 2006
2005 2007 intptr_t start = (intptr_t)__ pc();
2006 2008
2007 2009 // First thing make an ic check to see if we should even be here
2008 2010
2009 2011 // We are free to use all registers as temps without saving them and
2010 2012 // restoring them except rbp. rbp, is the only callee save register
2011 2013 // as far as the interpreter and the compiler(s) are concerned.
2012 2014
2013 2015 const Register ic_reg = rax;
2014 2016 const Register receiver = rcx;
2015 2017 Label hit;
2016 2018 Label exception_pending;
2017 2019
2018 2020
2019 2021 __ verify_oop(receiver);
2020 2022 __ cmpl(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes()));
2021 2023 __ jcc(Assembler::equal, hit);
2022 2024
2023 2025 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
2024 2026
2025 2027 // verified entry must be aligned for code patching.
2026 2028 // and the first 5 bytes must be in the same cache line
2027 2029 // if we align at 8 then we will be sure 5 bytes are in the same line
2028 2030 __ align(8);
2029 2031
2030 2032 __ bind(hit);
2031 2033
2032 2034 int vep_offset = ((intptr_t)__ pc()) - start;
2033 2035
2034 2036
2035 2037 // The instruction at the verified entry point must be 5 bytes or longer
2036 2038 // because it can be patched on the fly by make_non_entrant. The stack bang
2037 2039 // instruction fits that requirement.
2038 2040
2039 2041 // Generate stack overflow check
2040 2042
2041 2043
2042 2044 if (UseStackBanging) {
2043 2045 if (stack_size <= StackShadowPages*os::vm_page_size()) {
2044 2046 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size());
2045 2047 } else {
2046 2048 __ movl(rax, stack_size);
2047 2049 __ bang_stack_size(rax, rbx);
2048 2050 }
2049 2051 } else {
2050 2052 // need a 5 byte instruction to allow MT safe patching to non-entrant
2051 2053 __ fat_nop();
2052 2054 }
2053 2055
2054 2056 assert(((int)__ pc() - start - vep_offset) >= 5,
2055 2057 "valid size for make_non_entrant");
2056 2058
2057 2059 // Generate a new frame for the wrapper.
2058 2060 __ enter();
2059 2061
2060 2062 // -2 because return address is already present and so is saved rbp,
2061 2063 if (stack_size - 2*wordSize != 0) {
2062 2064 __ subl(rsp, stack_size - 2*wordSize);
2063 2065 }
2064 2066
2065 2067 // Frame is now completed as far a size and linkage.
2066 2068
2067 2069 int frame_complete = ((intptr_t)__ pc()) - start;
2068 2070
2069 2071 // First thing we do store all the args as if we are doing the call.
2070 2072 // Since the C calling convention is stack based that ensures that
2071 2073 // all the Java register args are stored before we need to convert any
2072 2074 // string we might have.
2073 2075
2074 2076 int sid = 0;
2075 2077 int c_arg, j_arg;
2076 2078 int string_reg = 0;
2077 2079
2078 2080 for (j_arg = first_arg_to_pass, c_arg = 0 ;
2079 2081 j_arg < total_args_passed ; j_arg++, c_arg++ ) {
2080 2082
2081 2083 VMRegPair src = in_regs[j_arg];
2082 2084 VMRegPair dst = out_regs[c_arg];
2083 2085 assert(dst.first()->is_stack() || in_sig_bt[j_arg] == T_VOID,
2084 2086 "stack based abi assumed");
2085 2087
2086 2088 switch (in_sig_bt[j_arg]) {
2087 2089
2088 2090 case T_ARRAY:
2089 2091 case T_OBJECT:
2090 2092 if (out_sig_bt[c_arg] == T_ADDRESS) {
2091 2093 // Any register based arg for a java string after the first
2092 2094 // will be destroyed by the call to get_utf so we store
2093 2095 // the original value in the location the utf string address
2094 2096 // will eventually be stored.
2095 2097 if (src.first()->is_reg()) {
2096 2098 if (string_reg++ != 0) {
2097 2099 simple_move32(masm, src, dst);
2098 2100 }
2099 2101 }
2100 2102 } else if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) {
2101 2103 // need to unbox a one-word value
2102 2104 Register in_reg = rax;
2103 2105 if ( src.first()->is_reg() ) {
2104 2106 in_reg = src.first()->as_Register();
2105 2107 } else {
2106 2108 simple_move32(masm, src, in_reg->as_VMReg());
2107 2109 }
2108 2110 Label skipUnbox;
2109 2111 __ movl(Address(rsp, reg2offset_out(dst.first())), NULL_WORD);
2110 2112 if ( out_sig_bt[c_arg] == T_LONG ) {
2111 2113 __ movl(Address(rsp, reg2offset_out(dst.second())), NULL_WORD);
2112 2114 }
2113 2115 __ testl(in_reg, in_reg);
2114 2116 __ jcc(Assembler::zero, skipUnbox);
2115 2117 assert(dst.first()->is_stack() &&
2116 2118 (!dst.second()->is_valid() || dst.second()->is_stack()),
2117 2119 "value(s) must go into stack slots");
2118 2120
2119 2121 BasicType bt = out_sig_bt[c_arg];
2120 2122 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt);
2121 2123 if ( bt == T_LONG ) {
2122 2124 __ movl(rbx, Address(in_reg,
2123 2125 box_offset + VMRegImpl::stack_slot_size));
2124 2126 __ movl(Address(rsp, reg2offset_out(dst.second())), rbx);
2125 2127 }
2126 2128 __ movl(in_reg, Address(in_reg, box_offset));
2127 2129 __ movl(Address(rsp, reg2offset_out(dst.first())), in_reg);
2128 2130 __ bind(skipUnbox);
2129 2131 } else {
2130 2132 // Convert the arg to NULL
2131 2133 __ movl(Address(rsp, reg2offset_out(dst.first())), NULL_WORD);
2132 2134 }
2133 2135 if (out_sig_bt[c_arg] == T_LONG) {
2134 2136 assert(out_sig_bt[c_arg+1] == T_VOID, "must be");
2135 2137 ++c_arg; // Move over the T_VOID To keep the loop indices in sync
2136 2138 }
2137 2139 break;
2138 2140
2139 2141 case T_VOID:
2140 2142 break;
2141 2143
2142 2144 case T_FLOAT:
2143 2145 float_move(masm, src, dst);
2144 2146 break;
2145 2147
2146 2148 case T_DOUBLE:
2147 2149 assert( j_arg + 1 < total_args_passed &&
2148 2150 in_sig_bt[j_arg + 1] == T_VOID, "bad arg list");
2149 2151 double_move(masm, src, dst);
2150 2152 break;
2151 2153
2152 2154 case T_LONG :
2153 2155 long_move(masm, src, dst);
2154 2156 break;
2155 2157
2156 2158 case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
2157 2159
2158 2160 default:
2159 2161 simple_move32(masm, src, dst);
2160 2162 }
2161 2163 }
2162 2164
2163 2165 // Now we must convert any string we have to utf8
2164 2166 //
2165 2167
2166 2168 for (sid = 0, j_arg = first_arg_to_pass, c_arg = 0 ;
2167 2169 sid < total_strings ; j_arg++, c_arg++ ) {
2168 2170
2169 2171 if (out_sig_bt[c_arg] == T_ADDRESS) {
2170 2172
2171 2173 Address utf8_addr = Address(
2172 2174 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size);
2173 2175 __ leal(rax, utf8_addr);
2174 2176
2175 2177 // The first string we find might still be in the original java arg
2176 2178 // register
2177 2179 VMReg orig_loc = in_regs[j_arg].first();
2178 2180 Register string_oop;
2179 2181
2180 2182 // This is where the argument will eventually reside
2181 2183 Address dest = Address(rsp, reg2offset_out(out_regs[c_arg].first()));
2182 2184
2183 2185 if (sid == 1 && orig_loc->is_reg()) {
2184 2186 string_oop = orig_loc->as_Register();
2185 2187 assert(string_oop != rax, "smashed arg");
2186 2188 } else {
2187 2189
2188 2190 if (orig_loc->is_reg()) {
2189 2191 // Get the copy of the jls object
2190 2192 __ movl(rcx, dest);
2191 2193 } else {
2192 2194 // arg is still in the original location
2193 2195 __ movl(rcx, Address(rbp, reg2offset_in(orig_loc)));
2194 2196 }
2195 2197 string_oop = rcx;
2196 2198
2197 2199 }
2198 2200 Label nullString;
2199 2201 __ movl(dest, NULL_WORD);
2200 2202 __ testl(string_oop, string_oop);
2201 2203 __ jcc(Assembler::zero, nullString);
2202 2204
2203 2205 // Now we can store the address of the utf string as the argument
2204 2206 __ movl(dest, rax);
2205 2207
2206 2208 // And do the conversion
2207 2209 __ call_VM_leaf(CAST_FROM_FN_PTR(
2208 2210 address, SharedRuntime::get_utf), string_oop, rax);
2209 2211 __ bind(nullString);
2210 2212 }
2211 2213
2212 2214 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) {
2213 2215 assert(out_sig_bt[c_arg+1] == T_VOID, "must be");
2214 2216 ++c_arg; // Move over the T_VOID To keep the loop indices in sync
2215 2217 }
2216 2218 }
2217 2219
2218 2220
2219 2221 // Ok now we are done. Need to place the nop that dtrace wants in order to
2220 2222 // patch in the trap
2221 2223
2222 2224 int patch_offset = ((intptr_t)__ pc()) - start;
2223 2225
2224 2226 __ nop();
2225 2227
2226 2228
2227 2229 // Return
2228 2230
2229 2231 __ leave();
2230 2232 __ ret(0);
2231 2233
2232 2234 __ flush();
2233 2235
2234 2236 nmethod *nm = nmethod::new_dtrace_nmethod(
2235 2237 method, masm->code(), vep_offset, patch_offset, frame_complete,
2236 2238 stack_slots / VMRegImpl::slots_per_word);
2237 2239 return nm;
2238 2240
2239 2241 }
2240 2242
2241 2243 #endif // HAVE_DTRACE_H
2242 2244
2243 2245 // this function returns the adjust size (in number of words) to a c2i adapter
2244 2246 // activation for use during deoptimization
2245 2247 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) {
2246 2248 return (callee_locals - callee_parameters) * Interpreter::stackElementWords;
2247 2249 }
2248 2250
2249 2251
2250 2252 uint SharedRuntime::out_preserve_stack_slots() {
2251 2253 return 0;
2252 2254 }
2253 2255
2254 2256
2255 2257 //------------------------------generate_deopt_blob----------------------------
2256 2258 void SharedRuntime::generate_deopt_blob() {
2257 2259 // allocate space for the code
2258 2260 ResourceMark rm;
2259 2261 // setup code generation tools
2260 2262 CodeBuffer buffer("deopt_blob", 1024, 1024);
2261 2263 MacroAssembler* masm = new MacroAssembler(&buffer);
2262 2264 int frame_size_in_words;
2263 2265 OopMap* map = NULL;
2264 2266 // Account for the extra args we place on the stack
2265 2267 // by the time we call fetch_unroll_info
2266 2268 const int additional_words = 2; // deopt kind, thread
2267 2269
2268 2270 OopMapSet *oop_maps = new OopMapSet();
2269 2271
2270 2272 // -------------
2271 2273 // This code enters when returning to a de-optimized nmethod. A return
2272 2274 // address has been pushed on the the stack, and return values are in
2273 2275 // registers.
2274 2276 // If we are doing a normal deopt then we were called from the patched
2275 2277 // nmethod from the point we returned to the nmethod. So the return
2276 2278 // address on the stack is wrong by NativeCall::instruction_size
2277 2279 // We will adjust the value to it looks like we have the original return
2278 2280 // address on the stack (like when we eagerly deoptimized).
2279 2281 // In the case of an exception pending with deoptimized then we enter
2280 2282 // with a return address on the stack that points after the call we patched
2281 2283 // into the exception handler. We have the following register state:
2282 2284 // rax,: exception
2283 2285 // rbx,: exception handler
2284 2286 // rdx: throwing pc
2285 2287 // So in this case we simply jam rdx into the useless return address and
2286 2288 // the stack looks just like we want.
2287 2289 //
2288 2290 // At this point we need to de-opt. We save the argument return
2289 2291 // registers. We call the first C routine, fetch_unroll_info(). This
2290 2292 // routine captures the return values and returns a structure which
2291 2293 // describes the current frame size and the sizes of all replacement frames.
2292 2294 // The current frame is compiled code and may contain many inlined
2293 2295 // functions, each with their own JVM state. We pop the current frame, then
2294 2296 // push all the new frames. Then we call the C routine unpack_frames() to
2295 2297 // populate these frames. Finally unpack_frames() returns us the new target
2296 2298 // address. Notice that callee-save registers are BLOWN here; they have
2297 2299 // already been captured in the vframeArray at the time the return PC was
2298 2300 // patched.
2299 2301 address start = __ pc();
2300 2302 Label cont;
2301 2303
2302 2304 // Prolog for non exception case!
2303 2305
2304 2306 // Save everything in sight.
2305 2307
2306 2308 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2307 2309 // Normal deoptimization
2308 2310 __ push(Deoptimization::Unpack_deopt);
2309 2311 __ jmp(cont);
2310 2312
2311 2313 int reexecute_offset = __ pc() - start;
2312 2314
2313 2315 // Reexecute case
2314 2316 // return address is the pc describes what bci to do re-execute at
2315 2317
2316 2318 // No need to update map as each call to save_live_registers will produce identical oopmap
2317 2319 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2318 2320
2319 2321 __ push(Deoptimization::Unpack_reexecute);
2320 2322 __ jmp(cont);
2321 2323
2322 2324 int exception_offset = __ pc() - start;
2323 2325
2324 2326 // Prolog for exception case
2325 2327
2326 2328 // all registers are dead at this entry point, except for rax, and
2327 2329 // rdx which contain the exception oop and exception pc
2328 2330 // respectively. Set them in TLS and fall thru to the
2329 2331 // unpack_with_exception_in_tls entry point.
2330 2332
2331 2333 __ get_thread(rdi);
2332 2334 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), rdx);
2333 2335 __ movptr(Address(rdi, JavaThread::exception_oop_offset()), rax);
2334 2336
2335 2337 int exception_in_tls_offset = __ pc() - start;
2336 2338
2337 2339 // new implementation because exception oop is now passed in JavaThread
2338 2340
2339 2341 // Prolog for exception case
2340 2342 // All registers must be preserved because they might be used by LinearScan
2341 2343 // Exceptiop oop and throwing PC are passed in JavaThread
2342 2344 // tos: stack at point of call to method that threw the exception (i.e. only
2343 2345 // args are on the stack, no return address)
2344 2346
2345 2347 // make room on stack for the return address
2346 2348 // It will be patched later with the throwing pc. The correct value is not
2347 2349 // available now because loading it from memory would destroy registers.
2348 2350 __ push(0);
2349 2351
2350 2352 // Save everything in sight.
2351 2353
2352 2354 // No need to update map as each call to save_live_registers will produce identical oopmap
2353 2355 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2354 2356
2355 2357 // Now it is safe to overwrite any register
2356 2358
2357 2359 // store the correct deoptimization type
2358 2360 __ push(Deoptimization::Unpack_exception);
2359 2361
2360 2362 // load throwing pc from JavaThread and patch it as the return address
2361 2363 // of the current frame. Then clear the field in JavaThread
2362 2364 __ get_thread(rdi);
2363 2365 __ movptr(rdx, Address(rdi, JavaThread::exception_pc_offset()));
2364 2366 __ movptr(Address(rbp, wordSize), rdx);
2365 2367 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), NULL_WORD);
2366 2368
2367 2369 #ifdef ASSERT
2368 2370 // verify that there is really an exception oop in JavaThread
2369 2371 __ movptr(rax, Address(rdi, JavaThread::exception_oop_offset()));
2370 2372 __ verify_oop(rax);
2371 2373
2372 2374 // verify that there is no pending exception
2373 2375 Label no_pending_exception;
2374 2376 __ movptr(rax, Address(rdi, Thread::pending_exception_offset()));
2375 2377 __ testptr(rax, rax);
2376 2378 __ jcc(Assembler::zero, no_pending_exception);
2377 2379 __ stop("must not have pending exception here");
2378 2380 __ bind(no_pending_exception);
2379 2381 #endif
2380 2382
2381 2383 __ bind(cont);
2382 2384
2383 2385 // Compiled code leaves the floating point stack dirty, empty it.
2384 2386 __ empty_FPU_stack();
2385 2387
2386 2388
2387 2389 // Call C code. Need thread and this frame, but NOT official VM entry
2388 2390 // crud. We cannot block on this call, no GC can happen.
2389 2391 __ get_thread(rcx);
2390 2392 __ push(rcx);
2391 2393 // fetch_unroll_info needs to call last_java_frame()
2392 2394 __ set_last_Java_frame(rcx, noreg, noreg, NULL);
2393 2395
2394 2396 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info)));
2395 2397
2396 2398 // Need to have an oopmap that tells fetch_unroll_info where to
2397 2399 // find any register it might need.
2398 2400
2399 2401 oop_maps->add_gc_map( __ pc()-start, map);
2400 2402
2401 2403 // Discard arg to fetch_unroll_info
2402 2404 __ pop(rcx);
2403 2405
2404 2406 __ get_thread(rcx);
2405 2407 __ reset_last_Java_frame(rcx, false, false);
2406 2408
2407 2409 // Load UnrollBlock into EDI
2408 2410 __ mov(rdi, rax);
2409 2411
2410 2412 // Move the unpack kind to a safe place in the UnrollBlock because
2411 2413 // we are very short of registers
2412 2414
2413 2415 Address unpack_kind(rdi, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes());
2414 2416 // retrieve the deopt kind from where we left it.
2415 2417 __ pop(rax);
2416 2418 __ movl(unpack_kind, rax); // save the unpack_kind value
2417 2419
2418 2420 Label noException;
2419 2421 __ cmpl(rax, Deoptimization::Unpack_exception); // Was exception pending?
2420 2422 __ jcc(Assembler::notEqual, noException);
2421 2423 __ movptr(rax, Address(rcx, JavaThread::exception_oop_offset()));
2422 2424 __ movptr(rdx, Address(rcx, JavaThread::exception_pc_offset()));
2423 2425 __ movptr(Address(rcx, JavaThread::exception_oop_offset()), NULL_WORD);
2424 2426 __ movptr(Address(rcx, JavaThread::exception_pc_offset()), NULL_WORD);
2425 2427
2426 2428 __ verify_oop(rax);
2427 2429
2428 2430 // Overwrite the result registers with the exception results.
2429 2431 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax);
2430 2432 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx);
2431 2433
2432 2434 __ bind(noException);
2433 2435
2434 2436 // Stack is back to only having register save data on the stack.
2435 2437 // Now restore the result registers. Everything else is either dead or captured
2436 2438 // in the vframeArray.
2437 2439
2438 2440 RegisterSaver::restore_result_registers(masm);
2439 2441
2440 2442 // Non standard control word may be leaked out through a safepoint blob, and we can
2441 2443 // deopt at a poll point with the non standard control word. However, we should make
2442 2444 // sure the control word is correct after restore_result_registers.
2443 2445 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
2444 2446
2445 2447 // All of the register save area has been popped of the stack. Only the
2446 2448 // return address remains.
2447 2449
2448 2450 // Pop all the frames we must move/replace.
2449 2451 //
2450 2452 // Frame picture (youngest to oldest)
2451 2453 // 1: self-frame (no frame link)
2452 2454 // 2: deopting frame (no frame link)
2453 2455 // 3: caller of deopting frame (could be compiled/interpreted).
2454 2456 //
2455 2457 // Note: by leaving the return address of self-frame on the stack
2456 2458 // and using the size of frame 2 to adjust the stack
2457 2459 // when we are done the return to frame 3 will still be on the stack.
2458 2460
2459 2461 // Pop deoptimized frame
2460 2462 __ addptr(rsp, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
2461 2463
2462 2464 // sp should be pointing at the return address to the caller (3)
2463 2465
2464 2466 // Stack bang to make sure there's enough room for these interpreter frames.
2465 2467 if (UseStackBanging) {
2466 2468 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
2467 2469 __ bang_stack_size(rbx, rcx);
2468 2470 }
2469 2471
2470 2472 // Load array of frame pcs into ECX
2471 2473 __ movptr(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
2472 2474
2473 2475 __ pop(rsi); // trash the old pc
2474 2476
2475 2477 // Load array of frame sizes into ESI
2476 2478 __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
2477 2479
2478 2480 Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes());
2479 2481
2480 2482 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
2481 2483 __ movl(counter, rbx);
2482 2484
2483 2485 // Pick up the initial fp we should save
2484 2486 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_fp_offset_in_bytes()));
2485 2487
2486 2488 // Now adjust the caller's stack to make up for the extra locals
2487 2489 // but record the original sp so that we can save it in the skeletal interpreter
2488 2490 // frame and the stack walking of interpreter_sender will get the unextended sp
2489 2491 // value and not the "real" sp value.
2490 2492
2491 2493 Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes());
2492 2494 __ movptr(sp_temp, rsp);
2493 2495 __ movl2ptr(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes()));
2494 2496 __ subptr(rsp, rbx);
2495 2497
2496 2498 // Push interpreter frames in a loop
2497 2499 Label loop;
2498 2500 __ bind(loop);
2499 2501 __ movptr(rbx, Address(rsi, 0)); // Load frame size
2500 2502 #ifdef CC_INTERP
2501 2503 __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and
2502 2504 #ifdef ASSERT
2503 2505 __ push(0xDEADDEAD); // Make a recognizable pattern
2504 2506 __ push(0xDEADDEAD);
2505 2507 #else /* ASSERT */
2506 2508 __ subptr(rsp, 2*wordSize); // skip the "static long no_param"
2507 2509 #endif /* ASSERT */
2508 2510 #else /* CC_INTERP */
2509 2511 __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand
2510 2512 #endif /* CC_INTERP */
2511 2513 __ pushptr(Address(rcx, 0)); // save return address
2512 2514 __ enter(); // save old & set new rbp,
2513 2515 __ subptr(rsp, rbx); // Prolog!
2514 2516 __ movptr(rbx, sp_temp); // sender's sp
2515 2517 #ifdef CC_INTERP
2516 2518 __ movptr(Address(rbp,
2517 2519 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))),
2518 2520 rbx); // Make it walkable
2519 2521 #else /* CC_INTERP */
2520 2522 // This value is corrected by layout_activation_impl
2521 2523 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD);
2522 2524 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable
2523 2525 #endif /* CC_INTERP */
2524 2526 __ movptr(sp_temp, rsp); // pass to next frame
2525 2527 __ addptr(rsi, wordSize); // Bump array pointer (sizes)
2526 2528 __ addptr(rcx, wordSize); // Bump array pointer (pcs)
2527 2529 __ decrementl(counter); // decrement counter
2528 2530 __ jcc(Assembler::notZero, loop);
2529 2531 __ pushptr(Address(rcx, 0)); // save final return address
2530 2532
2531 2533 // Re-push self-frame
2532 2534 __ enter(); // save old & set new rbp,
2533 2535
2534 2536 // Return address and rbp, are in place
2535 2537 // We'll push additional args later. Just allocate a full sized
2536 2538 // register save area
2537 2539 __ subptr(rsp, (frame_size_in_words-additional_words - 2) * wordSize);
2538 2540
2539 2541 // Restore frame locals after moving the frame
2540 2542 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax);
2541 2543 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx);
2542 2544 __ fstp_d(Address(rsp, RegisterSaver::fpResultOffset()*wordSize)); // Pop float stack and store in local
2543 2545 if( UseSSE>=2 ) __ movdbl(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0);
2544 2546 if( UseSSE==1 ) __ movflt(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0);
2545 2547
2546 2548 // Set up the args to unpack_frame
2547 2549
2548 2550 __ pushl(unpack_kind); // get the unpack_kind value
2549 2551 __ get_thread(rcx);
2550 2552 __ push(rcx);
2551 2553
2552 2554 // set last_Java_sp, last_Java_fp
2553 2555 __ set_last_Java_frame(rcx, noreg, rbp, NULL);
2554 2556
2555 2557 // Call C code. Need thread but NOT official VM entry
2556 2558 // crud. We cannot block on this call, no GC can happen. Call should
2557 2559 // restore return values to their stack-slots with the new SP.
2558 2560 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2559 2561 // Set an oopmap for the call site
2560 2562 oop_maps->add_gc_map( __ pc()-start, new OopMap( frame_size_in_words, 0 ));
2561 2563
2562 2564 // rax, contains the return result type
2563 2565 __ push(rax);
2564 2566
2565 2567 __ get_thread(rcx);
2566 2568 __ reset_last_Java_frame(rcx, false, false);
2567 2569
2568 2570 // Collect return values
2569 2571 __ movptr(rax,Address(rsp, (RegisterSaver::raxOffset() + additional_words + 1)*wordSize));
2570 2572 __ movptr(rdx,Address(rsp, (RegisterSaver::rdxOffset() + additional_words + 1)*wordSize));
2571 2573
2572 2574 // Clear floating point stack before returning to interpreter
2573 2575 __ empty_FPU_stack();
2574 2576
2575 2577 // Check if we should push the float or double return value.
2576 2578 Label results_done, yes_double_value;
2577 2579 __ cmpl(Address(rsp, 0), T_DOUBLE);
2578 2580 __ jcc (Assembler::zero, yes_double_value);
2579 2581 __ cmpl(Address(rsp, 0), T_FLOAT);
2580 2582 __ jcc (Assembler::notZero, results_done);
2581 2583
2582 2584 // return float value as expected by interpreter
2583 2585 if( UseSSE>=1 ) __ movflt(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize));
2584 2586 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize));
2585 2587 __ jmp(results_done);
2586 2588
2587 2589 // return double value as expected by interpreter
2588 2590 __ bind(yes_double_value);
2589 2591 if( UseSSE>=2 ) __ movdbl(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize));
2590 2592 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize));
2591 2593
2592 2594 __ bind(results_done);
2593 2595
2594 2596 // Pop self-frame.
2595 2597 __ leave(); // Epilog!
2596 2598
2597 2599 // Jump to interpreter
2598 2600 __ ret(0);
2599 2601
2600 2602 // -------------
2601 2603 // make sure all code is generated
2602 2604 masm->flush();
2603 2605
2604 2606 _deopt_blob = DeoptimizationBlob::create( &buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words);
2605 2607 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset);
2606 2608 }
2607 2609
2608 2610
2609 2611 #ifdef COMPILER2
2610 2612 //------------------------------generate_uncommon_trap_blob--------------------
2611 2613 void SharedRuntime::generate_uncommon_trap_blob() {
2612 2614 // allocate space for the code
2613 2615 ResourceMark rm;
2614 2616 // setup code generation tools
2615 2617 CodeBuffer buffer("uncommon_trap_blob", 512, 512);
2616 2618 MacroAssembler* masm = new MacroAssembler(&buffer);
2617 2619
2618 2620 enum frame_layout {
2619 2621 arg0_off, // thread sp + 0 // Arg location for
2620 2622 arg1_off, // unloaded_class_index sp + 1 // calling C
2621 2623 // The frame sender code expects that rbp will be in the "natural" place and
2622 2624 // will override any oopMap setting for it. We must therefore force the layout
2623 2625 // so that it agrees with the frame sender code.
2624 2626 rbp_off, // callee saved register sp + 2
2625 2627 return_off, // slot for return address sp + 3
2626 2628 framesize
2627 2629 };
2628 2630
2629 2631 address start = __ pc();
2630 2632 // Push self-frame.
2631 2633 __ subptr(rsp, return_off*wordSize); // Epilog!
2632 2634
2633 2635 // rbp, is an implicitly saved callee saved register (i.e. the calling
2634 2636 // convention will save restore it in prolog/epilog) Other than that
2635 2637 // there are no callee save registers no that adapter frames are gone.
2636 2638 __ movptr(Address(rsp, rbp_off*wordSize), rbp);
2637 2639
2638 2640 // Clear the floating point exception stack
2639 2641 __ empty_FPU_stack();
2640 2642
2641 2643 // set last_Java_sp
2642 2644 __ get_thread(rdx);
2643 2645 __ set_last_Java_frame(rdx, noreg, noreg, NULL);
2644 2646
2645 2647 // Call C code. Need thread but NOT official VM entry
2646 2648 // crud. We cannot block on this call, no GC can happen. Call should
2647 2649 // capture callee-saved registers as well as return values.
2648 2650 __ movptr(Address(rsp, arg0_off*wordSize), rdx);
2649 2651 // argument already in ECX
2650 2652 __ movl(Address(rsp, arg1_off*wordSize),rcx);
2651 2653 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap)));
2652 2654
2653 2655 // Set an oopmap for the call site
2654 2656 OopMapSet *oop_maps = new OopMapSet();
2655 2657 OopMap* map = new OopMap( framesize, 0 );
2656 2658 // No oopMap for rbp, it is known implicitly
2657 2659
2658 2660 oop_maps->add_gc_map( __ pc()-start, map);
2659 2661
2660 2662 __ get_thread(rcx);
2661 2663
2662 2664 __ reset_last_Java_frame(rcx, false, false);
2663 2665
2664 2666 // Load UnrollBlock into EDI
2665 2667 __ movptr(rdi, rax);
2666 2668
2667 2669 // Pop all the frames we must move/replace.
2668 2670 //
2669 2671 // Frame picture (youngest to oldest)
2670 2672 // 1: self-frame (no frame link)
2671 2673 // 2: deopting frame (no frame link)
2672 2674 // 3: caller of deopting frame (could be compiled/interpreted).
2673 2675
2674 2676 // Pop self-frame. We have no frame, and must rely only on EAX and ESP.
2675 2677 __ addptr(rsp,(framesize-1)*wordSize); // Epilog!
2676 2678
2677 2679 // Pop deoptimized frame
2678 2680 __ movl2ptr(rcx, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
2679 2681 __ addptr(rsp, rcx);
2680 2682
2681 2683 // sp should be pointing at the return address to the caller (3)
2682 2684
2683 2685 // Stack bang to make sure there's enough room for these interpreter frames.
2684 2686 if (UseStackBanging) {
2685 2687 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
2686 2688 __ bang_stack_size(rbx, rcx);
2687 2689 }
2688 2690
2689 2691
2690 2692 // Load array of frame pcs into ECX
2691 2693 __ movl(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
2692 2694
2693 2695 __ pop(rsi); // trash the pc
2694 2696
2695 2697 // Load array of frame sizes into ESI
2696 2698 __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
2697 2699
2698 2700 Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes());
2699 2701
2700 2702 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
2701 2703 __ movl(counter, rbx);
2702 2704
2703 2705 // Pick up the initial fp we should save
2704 2706 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_fp_offset_in_bytes()));
2705 2707
2706 2708 // Now adjust the caller's stack to make up for the extra locals
2707 2709 // but record the original sp so that we can save it in the skeletal interpreter
2708 2710 // frame and the stack walking of interpreter_sender will get the unextended sp
2709 2711 // value and not the "real" sp value.
2710 2712
2711 2713 Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes());
2712 2714 __ movptr(sp_temp, rsp);
2713 2715 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes()));
2714 2716 __ subptr(rsp, rbx);
2715 2717
2716 2718 // Push interpreter frames in a loop
2717 2719 Label loop;
2718 2720 __ bind(loop);
2719 2721 __ movptr(rbx, Address(rsi, 0)); // Load frame size
2720 2722 #ifdef CC_INTERP
2721 2723 __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and
2722 2724 #ifdef ASSERT
2723 2725 __ push(0xDEADDEAD); // Make a recognizable pattern
2724 2726 __ push(0xDEADDEAD); // (parm to RecursiveInterpreter...)
2725 2727 #else /* ASSERT */
2726 2728 __ subptr(rsp, 2*wordSize); // skip the "static long no_param"
2727 2729 #endif /* ASSERT */
2728 2730 #else /* CC_INTERP */
2729 2731 __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand
2730 2732 #endif /* CC_INTERP */
2731 2733 __ pushptr(Address(rcx, 0)); // save return address
2732 2734 __ enter(); // save old & set new rbp,
2733 2735 __ subptr(rsp, rbx); // Prolog!
2734 2736 __ movptr(rbx, sp_temp); // sender's sp
2735 2737 #ifdef CC_INTERP
2736 2738 __ movptr(Address(rbp,
2737 2739 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))),
2738 2740 rbx); // Make it walkable
2739 2741 #else /* CC_INTERP */
2740 2742 // This value is corrected by layout_activation_impl
2741 2743 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD );
2742 2744 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable
2743 2745 #endif /* CC_INTERP */
2744 2746 __ movptr(sp_temp, rsp); // pass to next frame
2745 2747 __ addptr(rsi, wordSize); // Bump array pointer (sizes)
2746 2748 __ addptr(rcx, wordSize); // Bump array pointer (pcs)
2747 2749 __ decrementl(counter); // decrement counter
2748 2750 __ jcc(Assembler::notZero, loop);
2749 2751 __ pushptr(Address(rcx, 0)); // save final return address
2750 2752
2751 2753 // Re-push self-frame
2752 2754 __ enter(); // save old & set new rbp,
2753 2755 __ subptr(rsp, (framesize-2) * wordSize); // Prolog!
2754 2756
2755 2757
2756 2758 // set last_Java_sp, last_Java_fp
2757 2759 __ get_thread(rdi);
2758 2760 __ set_last_Java_frame(rdi, noreg, rbp, NULL);
2759 2761
2760 2762 // Call C code. Need thread but NOT official VM entry
2761 2763 // crud. We cannot block on this call, no GC can happen. Call should
2762 2764 // restore return values to their stack-slots with the new SP.
2763 2765 __ movptr(Address(rsp,arg0_off*wordSize),rdi);
2764 2766 __ movl(Address(rsp,arg1_off*wordSize), Deoptimization::Unpack_uncommon_trap);
2765 2767 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2766 2768 // Set an oopmap for the call site
2767 2769 oop_maps->add_gc_map( __ pc()-start, new OopMap( framesize, 0 ) );
2768 2770
2769 2771 __ get_thread(rdi);
2770 2772 __ reset_last_Java_frame(rdi, true, false);
2771 2773
2772 2774 // Pop self-frame.
2773 2775 __ leave(); // Epilog!
2774 2776
2775 2777 // Jump to interpreter
2776 2778 __ ret(0);
2777 2779
2778 2780 // -------------
2779 2781 // make sure all code is generated
2780 2782 masm->flush();
2781 2783
2782 2784 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, framesize);
2783 2785 }
2784 2786 #endif // COMPILER2
2785 2787
2786 2788 //------------------------------generate_handler_blob------
2787 2789 //
2788 2790 // Generate a special Compile2Runtime blob that saves all registers,
2789 2791 // setup oopmap, and calls safepoint code to stop the compiled code for
2790 2792 // a safepoint.
2791 2793 //
2792 2794 static SafepointBlob* generate_handler_blob(address call_ptr, bool cause_return) {
2793 2795
2794 2796 // Account for thread arg in our frame
2795 2797 const int additional_words = 1;
2796 2798 int frame_size_in_words;
2797 2799
2798 2800 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
2799 2801
2800 2802 ResourceMark rm;
2801 2803 OopMapSet *oop_maps = new OopMapSet();
2802 2804 OopMap* map;
2803 2805
2804 2806 // allocate space for the code
2805 2807 // setup code generation tools
2806 2808 CodeBuffer buffer("handler_blob", 1024, 512);
2807 2809 MacroAssembler* masm = new MacroAssembler(&buffer);
2808 2810
2809 2811 const Register java_thread = rdi; // callee-saved for VC++
2810 2812 address start = __ pc();
2811 2813 address call_pc = NULL;
2812 2814
2813 2815 // If cause_return is true we are at a poll_return and there is
2814 2816 // the return address on the stack to the caller on the nmethod
2815 2817 // that is safepoint. We can leave this return on the stack and
2816 2818 // effectively complete the return and safepoint in the caller.
2817 2819 // Otherwise we push space for a return address that the safepoint
2818 2820 // handler will install later to make the stack walking sensible.
2819 2821 if( !cause_return )
2820 2822 __ push(rbx); // Make room for return address (or push it again)
2821 2823
2822 2824 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2823 2825
2824 2826 // The following is basically a call_VM. However, we need the precise
2825 2827 // address of the call in order to generate an oopmap. Hence, we do all the
2826 2828 // work ourselves.
2827 2829
2828 2830 // Push thread argument and setup last_Java_sp
2829 2831 __ get_thread(java_thread);
2830 2832 __ push(java_thread);
2831 2833 __ set_last_Java_frame(java_thread, noreg, noreg, NULL);
2832 2834
2833 2835 // if this was not a poll_return then we need to correct the return address now.
2834 2836 if( !cause_return ) {
2835 2837 __ movptr(rax, Address(java_thread, JavaThread::saved_exception_pc_offset()));
2836 2838 __ movptr(Address(rbp, wordSize), rax);
2837 2839 }
2838 2840
2839 2841 // do the call
2840 2842 __ call(RuntimeAddress(call_ptr));
2841 2843
2842 2844 // Set an oopmap for the call site. This oopmap will map all
2843 2845 // oop-registers and debug-info registers as callee-saved. This
2844 2846 // will allow deoptimization at this safepoint to find all possible
2845 2847 // debug-info recordings, as well as let GC find all oops.
2846 2848
2847 2849 oop_maps->add_gc_map( __ pc() - start, map);
2848 2850
2849 2851 // Discard arg
2850 2852 __ pop(rcx);
2851 2853
2852 2854 Label noException;
2853 2855
2854 2856 // Clear last_Java_sp again
2855 2857 __ get_thread(java_thread);
2856 2858 __ reset_last_Java_frame(java_thread, false, false);
2857 2859
2858 2860 __ cmpptr(Address(java_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
2859 2861 __ jcc(Assembler::equal, noException);
2860 2862
2861 2863 // Exception pending
2862 2864
2863 2865 RegisterSaver::restore_live_registers(masm);
2864 2866
2865 2867 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2866 2868
2867 2869 __ bind(noException);
2868 2870
2869 2871 // Normal exit, register restoring and exit
2870 2872 RegisterSaver::restore_live_registers(masm);
2871 2873
2872 2874 __ ret(0);
2873 2875
2874 2876 // make sure all code is generated
2875 2877 masm->flush();
2876 2878
2877 2879 // Fill-out other meta info
2878 2880 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words);
2879 2881 }
2880 2882
2881 2883 //
2882 2884 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss
2883 2885 //
2884 2886 // Generate a stub that calls into vm to find out the proper destination
2885 2887 // of a java call. All the argument registers are live at this point
2886 2888 // but since this is generic code we don't know what they are and the caller
2887 2889 // must do any gc of the args.
2888 2890 //
2889 2891 static RuntimeStub* generate_resolve_blob(address destination, const char* name) {
2890 2892 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
2891 2893
2892 2894 // allocate space for the code
2893 2895 ResourceMark rm;
2894 2896
2895 2897 CodeBuffer buffer(name, 1000, 512);
2896 2898 MacroAssembler* masm = new MacroAssembler(&buffer);
2897 2899
2898 2900 int frame_size_words;
2899 2901 enum frame_layout {
2900 2902 thread_off,
2901 2903 extra_words };
2902 2904
2903 2905 OopMapSet *oop_maps = new OopMapSet();
2904 2906 OopMap* map = NULL;
2905 2907
2906 2908 int start = __ offset();
2907 2909
2908 2910 map = RegisterSaver::save_live_registers(masm, extra_words, &frame_size_words);
2909 2911
2910 2912 int frame_complete = __ offset();
2911 2913
2912 2914 const Register thread = rdi;
2913 2915 __ get_thread(rdi);
2914 2916
2915 2917 __ push(thread);
2916 2918 __ set_last_Java_frame(thread, noreg, rbp, NULL);
2917 2919
2918 2920 __ call(RuntimeAddress(destination));
2919 2921
2920 2922
2921 2923 // Set an oopmap for the call site.
2922 2924 // We need this not only for callee-saved registers, but also for volatile
2923 2925 // registers that the compiler might be keeping live across a safepoint.
2924 2926
2925 2927 oop_maps->add_gc_map( __ offset() - start, map);
2926 2928
2927 2929 // rax, contains the address we are going to jump to assuming no exception got installed
2928 2930
2929 2931 __ addptr(rsp, wordSize);
2930 2932
2931 2933 // clear last_Java_sp
2932 2934 __ reset_last_Java_frame(thread, true, false);
2933 2935 // check for pending exceptions
2934 2936 Label pending;
2935 2937 __ cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
2936 2938 __ jcc(Assembler::notEqual, pending);
2937 2939
2938 2940 // get the returned methodOop
2939 2941 __ movptr(rbx, Address(thread, JavaThread::vm_result_offset()));
2940 2942 __ movptr(Address(rsp, RegisterSaver::rbx_offset() * wordSize), rbx);
2941 2943
2942 2944 __ movptr(Address(rsp, RegisterSaver::rax_offset() * wordSize), rax);
2943 2945
2944 2946 RegisterSaver::restore_live_registers(masm);
2945 2947
2946 2948 // We are back the the original state on entry and ready to go.
2947 2949
2948 2950 __ jmp(rax);
2949 2951
2950 2952 // Pending exception after the safepoint
2951 2953
2952 2954 __ bind(pending);
2953 2955
2954 2956 RegisterSaver::restore_live_registers(masm);
2955 2957
2956 2958 // exception pending => remove activation and forward to exception handler
2957 2959
2958 2960 __ get_thread(thread);
2959 2961 __ movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD);
2960 2962 __ movptr(rax, Address(thread, Thread::pending_exception_offset()));
2961 2963 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2962 2964
2963 2965 // -------------
2964 2966 // make sure all code is generated
2965 2967 masm->flush();
2966 2968
2967 2969 // return the blob
2968 2970 // frame_size_words or bytes??
2969 2971 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_words, oop_maps, true);
2970 2972 }
2971 2973
2972 2974 void SharedRuntime::generate_stubs() {
2973 2975
2974 2976 _wrong_method_blob = generate_resolve_blob(CAST_FROM_FN_PTR(address, SharedRuntime::handle_wrong_method),
2975 2977 "wrong_method_stub");
2976 2978
2977 2979 _ic_miss_blob = generate_resolve_blob(CAST_FROM_FN_PTR(address, SharedRuntime::handle_wrong_method_ic_miss),
2978 2980 "ic_miss_stub");
2979 2981
2980 2982 _resolve_opt_virtual_call_blob = generate_resolve_blob(CAST_FROM_FN_PTR(address, SharedRuntime::resolve_opt_virtual_call_C),
2981 2983 "resolve_opt_virtual_call");
2982 2984
2983 2985 _resolve_virtual_call_blob = generate_resolve_blob(CAST_FROM_FN_PTR(address, SharedRuntime::resolve_virtual_call_C),
2984 2986 "resolve_virtual_call");
2985 2987
2986 2988 _resolve_static_call_blob = generate_resolve_blob(CAST_FROM_FN_PTR(address, SharedRuntime::resolve_static_call_C),
2987 2989 "resolve_static_call");
2988 2990
2989 2991 _polling_page_safepoint_handler_blob =
2990 2992 generate_handler_blob(CAST_FROM_FN_PTR(address,
2991 2993 SafepointSynchronize::handle_polling_page_exception), false);
2992 2994
2993 2995 _polling_page_return_handler_blob =
2994 2996 generate_handler_blob(CAST_FROM_FN_PTR(address,
2995 2997 SafepointSynchronize::handle_polling_page_exception), true);
2996 2998
2997 2999 generate_deopt_blob();
2998 3000 #ifdef COMPILER2
2999 3001 generate_uncommon_trap_blob();
3000 3002 #endif // COMPILER2
3001 3003 }
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