1 /*
2 * Copyright (c) 2003, 2011, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "asm/assembler.hpp"
27 #include "assembler_x86.inline.hpp"
28 #include "code/debugInfoRec.hpp"
29 #include "code/icBuffer.hpp"
30 #include "code/vtableStubs.hpp"
31 #include "interpreter/interpreter.hpp"
32 #include "oops/compiledICHolderOop.hpp"
33 #include "prims/jvmtiRedefineClassesTrace.hpp"
34 #include "runtime/sharedRuntime.hpp"
35 #include "runtime/vframeArray.hpp"
36 #include "vmreg_x86.inline.hpp"
37 #ifdef COMPILER1
38 #include "c1/c1_Runtime1.hpp"
39 #endif
40 #ifdef COMPILER2
41 #include "opto/runtime.hpp"
42 #endif
43
44 DeoptimizationBlob *SharedRuntime::_deopt_blob;
45 #ifdef COMPILER2
46 UncommonTrapBlob *SharedRuntime::_uncommon_trap_blob;
47 ExceptionBlob *OptoRuntime::_exception_blob;
48 #endif // COMPILER2
49
50 SafepointBlob *SharedRuntime::_polling_page_safepoint_handler_blob;
51 SafepointBlob *SharedRuntime::_polling_page_return_handler_blob;
52 RuntimeStub* SharedRuntime::_wrong_method_blob;
53 RuntimeStub* SharedRuntime::_ic_miss_blob;
54 RuntimeStub* SharedRuntime::_resolve_opt_virtual_call_blob;
55 RuntimeStub* SharedRuntime::_resolve_virtual_call_blob;
56 RuntimeStub* SharedRuntime::_resolve_static_call_blob;
57
58 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size;
59
60 #define __ masm->
61
62 class SimpleRuntimeFrame {
63
64 public:
65
66 // Most of the runtime stubs have this simple frame layout.
67 // This class exists to make the layout shared in one place.
68 // Offsets are for compiler stack slots, which are jints.
69 enum layout {
70 // The frame sender code expects that rbp will be in the "natural" place and
71 // will override any oopMap setting for it. We must therefore force the layout
72 // so that it agrees with the frame sender code.
73 rbp_off = frame::arg_reg_save_area_bytes/BytesPerInt,
74 rbp_off2,
75 return_off, return_off2,
76 framesize
77 };
78 };
79
80 class RegisterSaver {
81 // Capture info about frame layout. Layout offsets are in jint
82 // units because compiler frame slots are jints.
83 #define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off
84 enum layout {
85 fpu_state_off = frame::arg_reg_save_area_bytes/BytesPerInt, // fxsave save area
86 xmm_off = fpu_state_off + 160/BytesPerInt, // offset in fxsave save area
87 DEF_XMM_OFFS(0),
88 DEF_XMM_OFFS(1),
89 DEF_XMM_OFFS(2),
90 DEF_XMM_OFFS(3),
91 DEF_XMM_OFFS(4),
92 DEF_XMM_OFFS(5),
93 DEF_XMM_OFFS(6),
94 DEF_XMM_OFFS(7),
95 DEF_XMM_OFFS(8),
96 DEF_XMM_OFFS(9),
97 DEF_XMM_OFFS(10),
98 DEF_XMM_OFFS(11),
99 DEF_XMM_OFFS(12),
100 DEF_XMM_OFFS(13),
101 DEF_XMM_OFFS(14),
102 DEF_XMM_OFFS(15),
103 fpu_state_end = fpu_state_off + ((FPUStateSizeInWords-1)*wordSize / BytesPerInt),
104 fpu_stateH_end,
105 r15_off, r15H_off,
106 r14_off, r14H_off,
107 r13_off, r13H_off,
108 r12_off, r12H_off,
109 r11_off, r11H_off,
110 r10_off, r10H_off,
111 r9_off, r9H_off,
112 r8_off, r8H_off,
113 rdi_off, rdiH_off,
114 rsi_off, rsiH_off,
115 ignore_off, ignoreH_off, // extra copy of rbp
116 rsp_off, rspH_off,
117 rbx_off, rbxH_off,
118 rdx_off, rdxH_off,
119 rcx_off, rcxH_off,
120 rax_off, raxH_off,
121 // 16-byte stack alignment fill word: see MacroAssembler::push/pop_IU_state
122 align_off, alignH_off,
123 flags_off, flagsH_off,
124 // The frame sender code expects that rbp will be in the "natural" place and
125 // will override any oopMap setting for it. We must therefore force the layout
126 // so that it agrees with the frame sender code.
127 rbp_off, rbpH_off, // copy of rbp we will restore
128 return_off, returnH_off, // slot for return address
129 reg_save_size // size in compiler stack slots
130 };
131
132 public:
133 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words);
134 static void restore_live_registers(MacroAssembler* masm);
135
136 // Offsets into the register save area
137 // Used by deoptimization when it is managing result register
138 // values on its own
139
140 static int rax_offset_in_bytes(void) { return BytesPerInt * rax_off; }
141 static int rdx_offset_in_bytes(void) { return BytesPerInt * rdx_off; }
142 static int rbx_offset_in_bytes(void) { return BytesPerInt * rbx_off; }
143 static int xmm0_offset_in_bytes(void) { return BytesPerInt * xmm0_off; }
144 static int return_offset_in_bytes(void) { return BytesPerInt * return_off; }
145
146 // During deoptimization only the result registers need to be restored,
147 // all the other values have already been extracted.
148 static void restore_result_registers(MacroAssembler* masm);
149 };
150
151 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words) {
152
153 // Always make the frame size 16-byte aligned
154 int frame_size_in_bytes = round_to(additional_frame_words*wordSize +
155 reg_save_size*BytesPerInt, 16);
156 // OopMap frame size is in compiler stack slots (jint's) not bytes or words
157 int frame_size_in_slots = frame_size_in_bytes / BytesPerInt;
158 // The caller will allocate additional_frame_words
159 int additional_frame_slots = additional_frame_words*wordSize / BytesPerInt;
160 // CodeBlob frame size is in words.
161 int frame_size_in_words = frame_size_in_bytes / wordSize;
162 *total_frame_words = frame_size_in_words;
163
164 // Save registers, fpu state, and flags.
165 // We assume caller has already pushed the return address onto the
166 // stack, so rsp is 8-byte aligned here.
167 // We push rpb twice in this sequence because we want the real rbp
168 // to be under the return like a normal enter.
169
170 __ enter(); // rsp becomes 16-byte aligned here
171 __ push_CPU_state(); // Push a multiple of 16 bytes
172 if (frame::arg_reg_save_area_bytes != 0) {
173 // Allocate argument register save area
174 __ subptr(rsp, frame::arg_reg_save_area_bytes);
175 }
176
177 // Set an oopmap for the call site. This oopmap will map all
178 // oop-registers and debug-info registers as callee-saved. This
179 // will allow deoptimization at this safepoint to find all possible
180 // debug-info recordings, as well as let GC find all oops.
181
182 OopMapSet *oop_maps = new OopMapSet();
183 OopMap* map = new OopMap(frame_size_in_slots, 0);
184 map->set_callee_saved(VMRegImpl::stack2reg( rax_off + additional_frame_slots), rax->as_VMReg());
185 map->set_callee_saved(VMRegImpl::stack2reg( rcx_off + additional_frame_slots), rcx->as_VMReg());
186 map->set_callee_saved(VMRegImpl::stack2reg( rdx_off + additional_frame_slots), rdx->as_VMReg());
187 map->set_callee_saved(VMRegImpl::stack2reg( rbx_off + additional_frame_slots), rbx->as_VMReg());
188 // rbp location is known implicitly by the frame sender code, needs no oopmap
189 // and the location where rbp was saved by is ignored
190 map->set_callee_saved(VMRegImpl::stack2reg( rsi_off + additional_frame_slots), rsi->as_VMReg());
191 map->set_callee_saved(VMRegImpl::stack2reg( rdi_off + additional_frame_slots), rdi->as_VMReg());
192 map->set_callee_saved(VMRegImpl::stack2reg( r8_off + additional_frame_slots), r8->as_VMReg());
193 map->set_callee_saved(VMRegImpl::stack2reg( r9_off + additional_frame_slots), r9->as_VMReg());
194 map->set_callee_saved(VMRegImpl::stack2reg( r10_off + additional_frame_slots), r10->as_VMReg());
195 map->set_callee_saved(VMRegImpl::stack2reg( r11_off + additional_frame_slots), r11->as_VMReg());
196 map->set_callee_saved(VMRegImpl::stack2reg( r12_off + additional_frame_slots), r12->as_VMReg());
197 map->set_callee_saved(VMRegImpl::stack2reg( r13_off + additional_frame_slots), r13->as_VMReg());
198 map->set_callee_saved(VMRegImpl::stack2reg( r14_off + additional_frame_slots), r14->as_VMReg());
199 map->set_callee_saved(VMRegImpl::stack2reg( r15_off + additional_frame_slots), r15->as_VMReg());
200 map->set_callee_saved(VMRegImpl::stack2reg(xmm0_off + additional_frame_slots), xmm0->as_VMReg());
201 map->set_callee_saved(VMRegImpl::stack2reg(xmm1_off + additional_frame_slots), xmm1->as_VMReg());
202 map->set_callee_saved(VMRegImpl::stack2reg(xmm2_off + additional_frame_slots), xmm2->as_VMReg());
203 map->set_callee_saved(VMRegImpl::stack2reg(xmm3_off + additional_frame_slots), xmm3->as_VMReg());
204 map->set_callee_saved(VMRegImpl::stack2reg(xmm4_off + additional_frame_slots), xmm4->as_VMReg());
205 map->set_callee_saved(VMRegImpl::stack2reg(xmm5_off + additional_frame_slots), xmm5->as_VMReg());
206 map->set_callee_saved(VMRegImpl::stack2reg(xmm6_off + additional_frame_slots), xmm6->as_VMReg());
207 map->set_callee_saved(VMRegImpl::stack2reg(xmm7_off + additional_frame_slots), xmm7->as_VMReg());
208 map->set_callee_saved(VMRegImpl::stack2reg(xmm8_off + additional_frame_slots), xmm8->as_VMReg());
209 map->set_callee_saved(VMRegImpl::stack2reg(xmm9_off + additional_frame_slots), xmm9->as_VMReg());
210 map->set_callee_saved(VMRegImpl::stack2reg(xmm10_off + additional_frame_slots), xmm10->as_VMReg());
211 map->set_callee_saved(VMRegImpl::stack2reg(xmm11_off + additional_frame_slots), xmm11->as_VMReg());
212 map->set_callee_saved(VMRegImpl::stack2reg(xmm12_off + additional_frame_slots), xmm12->as_VMReg());
213 map->set_callee_saved(VMRegImpl::stack2reg(xmm13_off + additional_frame_slots), xmm13->as_VMReg());
214 map->set_callee_saved(VMRegImpl::stack2reg(xmm14_off + additional_frame_slots), xmm14->as_VMReg());
215 map->set_callee_saved(VMRegImpl::stack2reg(xmm15_off + additional_frame_slots), xmm15->as_VMReg());
216
217 // %%% These should all be a waste but we'll keep things as they were for now
218 if (true) {
219 map->set_callee_saved(VMRegImpl::stack2reg( raxH_off + additional_frame_slots),
220 rax->as_VMReg()->next());
221 map->set_callee_saved(VMRegImpl::stack2reg( rcxH_off + additional_frame_slots),
222 rcx->as_VMReg()->next());
223 map->set_callee_saved(VMRegImpl::stack2reg( rdxH_off + additional_frame_slots),
224 rdx->as_VMReg()->next());
225 map->set_callee_saved(VMRegImpl::stack2reg( rbxH_off + additional_frame_slots),
226 rbx->as_VMReg()->next());
227 // rbp location is known implicitly by the frame sender code, needs no oopmap
228 map->set_callee_saved(VMRegImpl::stack2reg( rsiH_off + additional_frame_slots),
229 rsi->as_VMReg()->next());
230 map->set_callee_saved(VMRegImpl::stack2reg( rdiH_off + additional_frame_slots),
231 rdi->as_VMReg()->next());
232 map->set_callee_saved(VMRegImpl::stack2reg( r8H_off + additional_frame_slots),
233 r8->as_VMReg()->next());
234 map->set_callee_saved(VMRegImpl::stack2reg( r9H_off + additional_frame_slots),
235 r9->as_VMReg()->next());
236 map->set_callee_saved(VMRegImpl::stack2reg( r10H_off + additional_frame_slots),
237 r10->as_VMReg()->next());
238 map->set_callee_saved(VMRegImpl::stack2reg( r11H_off + additional_frame_slots),
239 r11->as_VMReg()->next());
240 map->set_callee_saved(VMRegImpl::stack2reg( r12H_off + additional_frame_slots),
241 r12->as_VMReg()->next());
242 map->set_callee_saved(VMRegImpl::stack2reg( r13H_off + additional_frame_slots),
243 r13->as_VMReg()->next());
244 map->set_callee_saved(VMRegImpl::stack2reg( r14H_off + additional_frame_slots),
245 r14->as_VMReg()->next());
246 map->set_callee_saved(VMRegImpl::stack2reg( r15H_off + additional_frame_slots),
247 r15->as_VMReg()->next());
248 map->set_callee_saved(VMRegImpl::stack2reg(xmm0H_off + additional_frame_slots),
249 xmm0->as_VMReg()->next());
250 map->set_callee_saved(VMRegImpl::stack2reg(xmm1H_off + additional_frame_slots),
251 xmm1->as_VMReg()->next());
252 map->set_callee_saved(VMRegImpl::stack2reg(xmm2H_off + additional_frame_slots),
253 xmm2->as_VMReg()->next());
254 map->set_callee_saved(VMRegImpl::stack2reg(xmm3H_off + additional_frame_slots),
255 xmm3->as_VMReg()->next());
256 map->set_callee_saved(VMRegImpl::stack2reg(xmm4H_off + additional_frame_slots),
257 xmm4->as_VMReg()->next());
258 map->set_callee_saved(VMRegImpl::stack2reg(xmm5H_off + additional_frame_slots),
259 xmm5->as_VMReg()->next());
260 map->set_callee_saved(VMRegImpl::stack2reg(xmm6H_off + additional_frame_slots),
261 xmm6->as_VMReg()->next());
262 map->set_callee_saved(VMRegImpl::stack2reg(xmm7H_off + additional_frame_slots),
263 xmm7->as_VMReg()->next());
264 map->set_callee_saved(VMRegImpl::stack2reg(xmm8H_off + additional_frame_slots),
265 xmm8->as_VMReg()->next());
266 map->set_callee_saved(VMRegImpl::stack2reg(xmm9H_off + additional_frame_slots),
267 xmm9->as_VMReg()->next());
268 map->set_callee_saved(VMRegImpl::stack2reg(xmm10H_off + additional_frame_slots),
269 xmm10->as_VMReg()->next());
270 map->set_callee_saved(VMRegImpl::stack2reg(xmm11H_off + additional_frame_slots),
271 xmm11->as_VMReg()->next());
272 map->set_callee_saved(VMRegImpl::stack2reg(xmm12H_off + additional_frame_slots),
273 xmm12->as_VMReg()->next());
274 map->set_callee_saved(VMRegImpl::stack2reg(xmm13H_off + additional_frame_slots),
275 xmm13->as_VMReg()->next());
276 map->set_callee_saved(VMRegImpl::stack2reg(xmm14H_off + additional_frame_slots),
277 xmm14->as_VMReg()->next());
278 map->set_callee_saved(VMRegImpl::stack2reg(xmm15H_off + additional_frame_slots),
279 xmm15->as_VMReg()->next());
280 }
281
282 return map;
283 }
284
285 void RegisterSaver::restore_live_registers(MacroAssembler* masm) {
286 if (frame::arg_reg_save_area_bytes != 0) {
287 // Pop arg register save area
288 __ addptr(rsp, frame::arg_reg_save_area_bytes);
289 }
290 // Recover CPU state
291 __ pop_CPU_state();
292 // Get the rbp described implicitly by the calling convention (no oopMap)
293 __ pop(rbp);
294 }
295
296 void RegisterSaver::restore_result_registers(MacroAssembler* masm) {
297
298 // Just restore result register. Only used by deoptimization. By
299 // now any callee save register that needs to be restored to a c2
300 // caller of the deoptee has been extracted into the vframeArray
301 // and will be stuffed into the c2i adapter we create for later
302 // restoration so only result registers need to be restored here.
303
304 // Restore fp result register
305 __ movdbl(xmm0, Address(rsp, xmm0_offset_in_bytes()));
306 // Restore integer result register
307 __ movptr(rax, Address(rsp, rax_offset_in_bytes()));
308 __ movptr(rdx, Address(rsp, rdx_offset_in_bytes()));
309
310 // Pop all of the register save are off the stack except the return address
311 __ addptr(rsp, return_offset_in_bytes());
312 }
313
314 // The java_calling_convention describes stack locations as ideal slots on
315 // a frame with no abi restrictions. Since we must observe abi restrictions
316 // (like the placement of the register window) the slots must be biased by
317 // the following value.
318 static int reg2offset_in(VMReg r) {
319 // Account for saved rbp and return address
320 // This should really be in_preserve_stack_slots
321 return (r->reg2stack() + 4) * VMRegImpl::stack_slot_size;
322 }
323
324 static int reg2offset_out(VMReg r) {
325 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
326 }
327
328 // ---------------------------------------------------------------------------
329 // Read the array of BasicTypes from a signature, and compute where the
330 // arguments should go. Values in the VMRegPair regs array refer to 4-byte
331 // quantities. Values less than VMRegImpl::stack0 are registers, those above
332 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer
333 // as framesizes are fixed.
334 // VMRegImpl::stack0 refers to the first slot 0(sp).
335 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register
336 // up to RegisterImpl::number_of_registers) are the 64-bit
337 // integer registers.
338
339 // Note: the INPUTS in sig_bt are in units of Java argument words, which are
340 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit
341 // units regardless of build. Of course for i486 there is no 64 bit build
342
343 // The Java calling convention is a "shifted" version of the C ABI.
344 // By skipping the first C ABI register we can call non-static jni methods
345 // with small numbers of arguments without having to shuffle the arguments
346 // at all. Since we control the java ABI we ought to at least get some
347 // advantage out of it.
348
349 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
350 VMRegPair *regs,
351 int total_args_passed,
352 int is_outgoing) {
353
354 // Create the mapping between argument positions and
355 // registers.
356 static const Register INT_ArgReg[Argument::n_int_register_parameters_j] = {
357 j_rarg0, j_rarg1, j_rarg2, j_rarg3, j_rarg4, j_rarg5
358 };
359 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_j] = {
360 j_farg0, j_farg1, j_farg2, j_farg3,
361 j_farg4, j_farg5, j_farg6, j_farg7
362 };
363
364
365 uint int_args = 0;
366 uint fp_args = 0;
367 uint stk_args = 0; // inc by 2 each time
368
369 for (int i = 0; i < total_args_passed; i++) {
370 switch (sig_bt[i]) {
371 case T_BOOLEAN:
372 case T_CHAR:
373 case T_BYTE:
374 case T_SHORT:
375 case T_INT:
376 if (int_args < Argument::n_int_register_parameters_j) {
377 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
378 } else {
379 regs[i].set1(VMRegImpl::stack2reg(stk_args));
380 stk_args += 2;
381 }
382 break;
383 case T_VOID:
384 // halves of T_LONG or T_DOUBLE
385 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
386 regs[i].set_bad();
387 break;
388 case T_LONG:
389 assert(sig_bt[i + 1] == T_VOID, "expecting half");
390 // fall through
391 case T_OBJECT:
392 case T_ARRAY:
393 case T_ADDRESS:
394 if (int_args < Argument::n_int_register_parameters_j) {
395 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
396 } else {
397 regs[i].set2(VMRegImpl::stack2reg(stk_args));
398 stk_args += 2;
399 }
400 break;
401 case T_FLOAT:
402 if (fp_args < Argument::n_float_register_parameters_j) {
403 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg());
404 } else {
405 regs[i].set1(VMRegImpl::stack2reg(stk_args));
406 stk_args += 2;
407 }
408 break;
409 case T_DOUBLE:
410 assert(sig_bt[i + 1] == T_VOID, "expecting half");
411 if (fp_args < Argument::n_float_register_parameters_j) {
412 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg());
413 } else {
414 regs[i].set2(VMRegImpl::stack2reg(stk_args));
415 stk_args += 2;
416 }
417 break;
418 default:
419 ShouldNotReachHere();
420 break;
421 }
422 }
423
424 return round_to(stk_args, 2);
425 }
426
427 // Patch the callers callsite with entry to compiled code if it exists.
428 static void patch_callers_callsite(MacroAssembler *masm) {
429 Label L;
430 __ verify_oop(rbx);
431 __ cmpptr(Address(rbx, in_bytes(methodOopDesc::code_offset())), (int32_t)NULL_WORD);
432 __ jcc(Assembler::equal, L);
433
434 // Save the current stack pointer
435 __ mov(r13, rsp);
436 // Schedule the branch target address early.
437 // Call into the VM to patch the caller, then jump to compiled callee
438 // rax isn't live so capture return address while we easily can
439 __ movptr(rax, Address(rsp, 0));
440
441 // align stack so push_CPU_state doesn't fault
442 __ andptr(rsp, -(StackAlignmentInBytes));
443 __ push_CPU_state();
444
445
446 __ verify_oop(rbx);
447 // VM needs caller's callsite
448 // VM needs target method
449 // This needs to be a long call since we will relocate this adapter to
450 // the codeBuffer and it may not reach
451
452 // Allocate argument register save area
453 if (frame::arg_reg_save_area_bytes != 0) {
454 __ subptr(rsp, frame::arg_reg_save_area_bytes);
455 }
456 __ mov(c_rarg0, rbx);
457 __ mov(c_rarg1, rax);
458 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)));
459
460 // De-allocate argument register save area
461 if (frame::arg_reg_save_area_bytes != 0) {
462 __ addptr(rsp, frame::arg_reg_save_area_bytes);
463 }
464
465 __ pop_CPU_state();
466 // restore sp
467 __ mov(rsp, r13);
468 __ bind(L);
469 }
470
471
472 static void gen_c2i_adapter(MacroAssembler *masm,
473 int total_args_passed,
474 int comp_args_on_stack,
475 const BasicType *sig_bt,
476 const VMRegPair *regs,
477 Label& skip_fixup) {
478 // Before we get into the guts of the C2I adapter, see if we should be here
479 // at all. We've come from compiled code and are attempting to jump to the
480 // interpreter, which means the caller made a static call to get here
481 // (vcalls always get a compiled target if there is one). Check for a
482 // compiled target. If there is one, we need to patch the caller's call.
483 patch_callers_callsite(masm);
484
485 __ bind(skip_fixup);
486
487 // Since all args are passed on the stack, total_args_passed *
488 // Interpreter::stackElementSize is the space we need. Plus 1 because
489 // we also account for the return address location since
490 // we store it first rather than hold it in rax across all the shuffling
491
492 int extraspace = (total_args_passed * Interpreter::stackElementSize) + wordSize;
493
494 // stack is aligned, keep it that way
495 extraspace = round_to(extraspace, 2*wordSize);
496
497 // Get return address
498 __ pop(rax);
499
500 // set senderSP value
501 __ mov(r13, rsp);
502
503 __ subptr(rsp, extraspace);
504
505 // Store the return address in the expected location
506 __ movptr(Address(rsp, 0), rax);
507
508 // Now write the args into the outgoing interpreter space
509 for (int i = 0; i < total_args_passed; i++) {
510 if (sig_bt[i] == T_VOID) {
511 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
512 continue;
513 }
514
515 // offset to start parameters
516 int st_off = (total_args_passed - i) * Interpreter::stackElementSize;
517 int next_off = st_off - Interpreter::stackElementSize;
518
519 // Say 4 args:
520 // i st_off
521 // 0 32 T_LONG
522 // 1 24 T_VOID
523 // 2 16 T_OBJECT
524 // 3 8 T_BOOL
525 // - 0 return address
526 //
527 // However to make thing extra confusing. Because we can fit a long/double in
528 // a single slot on a 64 bt vm and it would be silly to break them up, the interpreter
529 // leaves one slot empty and only stores to a single slot. In this case the
530 // slot that is occupied is the T_VOID slot. See I said it was confusing.
531
532 VMReg r_1 = regs[i].first();
533 VMReg r_2 = regs[i].second();
534 if (!r_1->is_valid()) {
535 assert(!r_2->is_valid(), "");
536 continue;
537 }
538 if (r_1->is_stack()) {
539 // memory to memory use rax
540 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace;
541 if (!r_2->is_valid()) {
542 // sign extend??
543 __ movl(rax, Address(rsp, ld_off));
544 __ movptr(Address(rsp, st_off), rax);
545
546 } else {
547
548 __ movq(rax, Address(rsp, ld_off));
549
550 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
551 // T_DOUBLE and T_LONG use two slots in the interpreter
552 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
553 // ld_off == LSW, ld_off+wordSize == MSW
554 // st_off == MSW, next_off == LSW
555 __ movq(Address(rsp, next_off), rax);
556 #ifdef ASSERT
557 // Overwrite the unused slot with known junk
558 __ mov64(rax, CONST64(0xdeadffffdeadaaaa));
559 __ movptr(Address(rsp, st_off), rax);
560 #endif /* ASSERT */
561 } else {
562 __ movq(Address(rsp, st_off), rax);
563 }
564 }
565 } else if (r_1->is_Register()) {
566 Register r = r_1->as_Register();
567 if (!r_2->is_valid()) {
568 // must be only an int (or less ) so move only 32bits to slot
569 // why not sign extend??
570 __ movl(Address(rsp, st_off), r);
571 } else {
572 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
573 // T_DOUBLE and T_LONG use two slots in the interpreter
574 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
575 // long/double in gpr
576 #ifdef ASSERT
577 // Overwrite the unused slot with known junk
578 __ mov64(rax, CONST64(0xdeadffffdeadaaab));
579 __ movptr(Address(rsp, st_off), rax);
580 #endif /* ASSERT */
581 __ movq(Address(rsp, next_off), r);
582 } else {
583 __ movptr(Address(rsp, st_off), r);
584 }
585 }
586 } else {
587 assert(r_1->is_XMMRegister(), "");
588 if (!r_2->is_valid()) {
589 // only a float use just part of the slot
590 __ movflt(Address(rsp, st_off), r_1->as_XMMRegister());
591 } else {
592 #ifdef ASSERT
593 // Overwrite the unused slot with known junk
594 __ mov64(rax, CONST64(0xdeadffffdeadaaac));
595 __ movptr(Address(rsp, st_off), rax);
596 #endif /* ASSERT */
597 __ movdbl(Address(rsp, next_off), r_1->as_XMMRegister());
598 }
599 }
600 }
601
602 // Schedule the branch target address early.
603 __ movptr(rcx, Address(rbx, in_bytes(methodOopDesc::interpreter_entry_offset())));
604 __ jmp(rcx);
605 }
606
607 static void gen_i2c_adapter(MacroAssembler *masm,
608 int total_args_passed,
609 int comp_args_on_stack,
610 const BasicType *sig_bt,
611 const VMRegPair *regs) {
612
613 // Note: r13 contains the senderSP on entry. We must preserve it since
614 // we may do a i2c -> c2i transition if we lose a race where compiled
615 // code goes non-entrant while we get args ready.
616 // In addition we use r13 to locate all the interpreter args as
617 // we must align the stack to 16 bytes on an i2c entry else we
618 // lose alignment we expect in all compiled code and register
619 // save code can segv when fxsave instructions find improperly
620 // aligned stack pointer.
621
622 // Pick up the return address
623 __ movptr(rax, Address(rsp, 0));
624
625 // Must preserve original SP for loading incoming arguments because
626 // we need to align the outgoing SP for compiled code.
627 __ movptr(r11, rsp);
628
629 // Cut-out for having no stack args. Since up to 2 int/oop args are passed
630 // in registers, we will occasionally have no stack args.
631 int comp_words_on_stack = 0;
632 if (comp_args_on_stack) {
633 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in
634 // registers are below. By subtracting stack0, we either get a negative
635 // number (all values in registers) or the maximum stack slot accessed.
636
637 // Convert 4-byte c2 stack slots to words.
638 comp_words_on_stack = round_to(comp_args_on_stack*VMRegImpl::stack_slot_size, wordSize)>>LogBytesPerWord;
639 // Round up to miminum stack alignment, in wordSize
640 comp_words_on_stack = round_to(comp_words_on_stack, 2);
641 __ subptr(rsp, comp_words_on_stack * wordSize);
642 }
643
644
645 // Ensure compiled code always sees stack at proper alignment
646 __ andptr(rsp, -16);
647
648 // push the return address and misalign the stack that youngest frame always sees
649 // as far as the placement of the call instruction
650 __ push(rax);
651
652 // Put saved SP in another register
653 const Register saved_sp = rax;
654 __ movptr(saved_sp, r11);
655
656 // Will jump to the compiled code just as if compiled code was doing it.
657 // Pre-load the register-jump target early, to schedule it better.
658 __ movptr(r11, Address(rbx, in_bytes(methodOopDesc::from_compiled_offset())));
659
660 // Now generate the shuffle code. Pick up all register args and move the
661 // rest through the floating point stack top.
662 for (int i = 0; i < total_args_passed; i++) {
663 if (sig_bt[i] == T_VOID) {
664 // Longs and doubles are passed in native word order, but misaligned
665 // in the 32-bit build.
666 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
667 continue;
668 }
669
670 // Pick up 0, 1 or 2 words from SP+offset.
671
672 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(),
673 "scrambled load targets?");
674 // Load in argument order going down.
675 int ld_off = (total_args_passed - i)*Interpreter::stackElementSize;
676 // Point to interpreter value (vs. tag)
677 int next_off = ld_off - Interpreter::stackElementSize;
678 //
679 //
680 //
681 VMReg r_1 = regs[i].first();
682 VMReg r_2 = regs[i].second();
683 if (!r_1->is_valid()) {
684 assert(!r_2->is_valid(), "");
685 continue;
686 }
687 if (r_1->is_stack()) {
688 // Convert stack slot to an SP offset (+ wordSize to account for return address )
689 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize;
690
691 // We can use r13 as a temp here because compiled code doesn't need r13 as an input
692 // and if we end up going thru a c2i because of a miss a reasonable value of r13
693 // will be generated.
694 if (!r_2->is_valid()) {
695 // sign extend???
696 __ movl(r13, Address(saved_sp, ld_off));
697 __ movptr(Address(rsp, st_off), r13);
698 } else {
699 //
700 // We are using two optoregs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
701 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
702 // So we must adjust where to pick up the data to match the interpreter.
703 //
704 // Interpreter local[n] == MSW, local[n+1] == LSW however locals
705 // are accessed as negative so LSW is at LOW address
706
707 // ld_off is MSW so get LSW
708 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
709 next_off : ld_off;
710 __ movq(r13, Address(saved_sp, offset));
711 // st_off is LSW (i.e. reg.first())
712 __ movq(Address(rsp, st_off), r13);
713 }
714 } else if (r_1->is_Register()) { // Register argument
715 Register r = r_1->as_Register();
716 assert(r != rax, "must be different");
717 if (r_2->is_valid()) {
718 //
719 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
720 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
721 // So we must adjust where to pick up the data to match the interpreter.
722
723 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
724 next_off : ld_off;
725
726 // this can be a misaligned move
727 __ movq(r, Address(saved_sp, offset));
728 } else {
729 // sign extend and use a full word?
730 __ movl(r, Address(saved_sp, ld_off));
731 }
732 } else {
733 if (!r_2->is_valid()) {
734 __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off));
735 } else {
736 __ movdbl(r_1->as_XMMRegister(), Address(saved_sp, next_off));
737 }
738 }
739 }
740
741 // 6243940 We might end up in handle_wrong_method if
742 // the callee is deoptimized as we race thru here. If that
743 // happens we don't want to take a safepoint because the
744 // caller frame will look interpreted and arguments are now
745 // "compiled" so it is much better to make this transition
746 // invisible to the stack walking code. Unfortunately if
747 // we try and find the callee by normal means a safepoint
748 // is possible. So we stash the desired callee in the thread
749 // and the vm will find there should this case occur.
750
751 __ movptr(Address(r15_thread, JavaThread::callee_target_offset()), rbx);
752
753 // put methodOop where a c2i would expect should we end up there
754 // only needed becaus eof c2 resolve stubs return methodOop as a result in
755 // rax
756 __ mov(rax, rbx);
757 __ jmp(r11);
758 }
759
760 // ---------------------------------------------------------------
761 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
762 int total_args_passed,
763 int comp_args_on_stack,
764 const BasicType *sig_bt,
765 const VMRegPair *regs,
766 AdapterFingerPrint* fingerprint) {
767 address i2c_entry = __ pc();
768
769 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs);
770
771 // -------------------------------------------------------------------------
772 // Generate a C2I adapter. On entry we know rbx holds the methodOop during calls
773 // to the interpreter. The args start out packed in the compiled layout. They
774 // need to be unpacked into the interpreter layout. This will almost always
775 // require some stack space. We grow the current (compiled) stack, then repack
776 // the args. We finally end in a jump to the generic interpreter entry point.
777 // On exit from the interpreter, the interpreter will restore our SP (lest the
778 // compiled code, which relys solely on SP and not RBP, get sick).
779
780 address c2i_unverified_entry = __ pc();
781 Label skip_fixup;
782 Label ok;
783
784 Register holder = rax;
785 Register receiver = j_rarg0;
786 Register temp = rbx;
787
788 {
789 __ verify_oop(holder);
790 __ load_klass(temp, receiver);
791 __ verify_oop(temp);
792
793 __ cmpptr(temp, Address(holder, compiledICHolderOopDesc::holder_klass_offset()));
794 __ movptr(rbx, Address(holder, compiledICHolderOopDesc::holder_method_offset()));
795 __ jcc(Assembler::equal, ok);
796 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
797
798 __ bind(ok);
799 // Method might have been compiled since the call site was patched to
800 // interpreted if that is the case treat it as a miss so we can get
801 // the call site corrected.
802 __ cmpptr(Address(rbx, in_bytes(methodOopDesc::code_offset())), (int32_t)NULL_WORD);
803 __ jcc(Assembler::equal, skip_fixup);
804 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
805 }
806
807 address c2i_entry = __ pc();
808
809 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup);
810
811 __ flush();
812 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry);
813 }
814
815 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
816 VMRegPair *regs,
817 int total_args_passed) {
818 // We return the amount of VMRegImpl stack slots we need to reserve for all
819 // the arguments NOT counting out_preserve_stack_slots.
820
821 // NOTE: These arrays will have to change when c1 is ported
822 #ifdef _WIN64
823 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = {
824 c_rarg0, c_rarg1, c_rarg2, c_rarg3
825 };
826 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = {
827 c_farg0, c_farg1, c_farg2, c_farg3
828 };
829 #else
830 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = {
831 c_rarg0, c_rarg1, c_rarg2, c_rarg3, c_rarg4, c_rarg5
832 };
833 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = {
834 c_farg0, c_farg1, c_farg2, c_farg3,
835 c_farg4, c_farg5, c_farg6, c_farg7
836 };
837 #endif // _WIN64
838
839
840 uint int_args = 0;
841 uint fp_args = 0;
842 uint stk_args = 0; // inc by 2 each time
843
844 for (int i = 0; i < total_args_passed; i++) {
845 switch (sig_bt[i]) {
846 case T_BOOLEAN:
847 case T_CHAR:
848 case T_BYTE:
849 case T_SHORT:
850 case T_INT:
851 if (int_args < Argument::n_int_register_parameters_c) {
852 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
853 #ifdef _WIN64
854 fp_args++;
855 // Allocate slots for callee to stuff register args the stack.
856 stk_args += 2;
857 #endif
858 } else {
859 regs[i].set1(VMRegImpl::stack2reg(stk_args));
860 stk_args += 2;
861 }
862 break;
863 case T_LONG:
864 assert(sig_bt[i + 1] == T_VOID, "expecting half");
865 // fall through
866 case T_OBJECT:
867 case T_ARRAY:
868 case T_ADDRESS:
869 if (int_args < Argument::n_int_register_parameters_c) {
870 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
871 #ifdef _WIN64
872 fp_args++;
873 stk_args += 2;
874 #endif
875 } else {
876 regs[i].set2(VMRegImpl::stack2reg(stk_args));
877 stk_args += 2;
878 }
879 break;
880 case T_FLOAT:
881 if (fp_args < Argument::n_float_register_parameters_c) {
882 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg());
883 #ifdef _WIN64
884 int_args++;
885 // Allocate slots for callee to stuff register args the stack.
886 stk_args += 2;
887 #endif
888 } else {
889 regs[i].set1(VMRegImpl::stack2reg(stk_args));
890 stk_args += 2;
891 }
892 break;
893 case T_DOUBLE:
894 assert(sig_bt[i + 1] == T_VOID, "expecting half");
895 if (fp_args < Argument::n_float_register_parameters_c) {
896 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg());
897 #ifdef _WIN64
898 int_args++;
899 // Allocate slots for callee to stuff register args the stack.
900 stk_args += 2;
901 #endif
902 } else {
903 regs[i].set2(VMRegImpl::stack2reg(stk_args));
904 stk_args += 2;
905 }
906 break;
907 case T_VOID: // Halves of longs and doubles
908 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
909 regs[i].set_bad();
910 break;
911 default:
912 ShouldNotReachHere();
913 break;
914 }
915 }
916 #ifdef _WIN64
917 // windows abi requires that we always allocate enough stack space
918 // for 4 64bit registers to be stored down.
919 if (stk_args < 8) {
920 stk_args = 8;
921 }
922 #endif // _WIN64
923
924 return stk_args;
925 }
926
927 // On 64 bit we will store integer like items to the stack as
928 // 64 bits items (sparc abi) even though java would only store
929 // 32bits for a parameter. On 32bit it will simply be 32 bits
930 // So this routine will do 32->32 on 32bit and 32->64 on 64bit
931 static void move32_64(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
932 if (src.first()->is_stack()) {
933 if (dst.first()->is_stack()) {
934 // stack to stack
935 __ movslq(rax, Address(rbp, reg2offset_in(src.first())));
936 __ movq(Address(rsp, reg2offset_out(dst.first())), rax);
937 } else {
938 // stack to reg
939 __ movslq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first())));
940 }
941 } else if (dst.first()->is_stack()) {
942 // reg to stack
943 // Do we really have to sign extend???
944 // __ movslq(src.first()->as_Register(), src.first()->as_Register());
945 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
946 } else {
947 // Do we really have to sign extend???
948 // __ movslq(dst.first()->as_Register(), src.first()->as_Register());
949 if (dst.first() != src.first()) {
950 __ movq(dst.first()->as_Register(), src.first()->as_Register());
951 }
952 }
953 }
954
955
956 // An oop arg. Must pass a handle not the oop itself
957 static void object_move(MacroAssembler* masm,
958 OopMap* map,
959 int oop_handle_offset,
960 int framesize_in_slots,
961 VMRegPair src,
962 VMRegPair dst,
963 bool is_receiver,
964 int* receiver_offset) {
965
966 // must pass a handle. First figure out the location we use as a handle
967
968 Register rHandle = dst.first()->is_stack() ? rax : dst.first()->as_Register();
969
970 // See if oop is NULL if it is we need no handle
971
972 if (src.first()->is_stack()) {
973
974 // Oop is already on the stack as an argument
975 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
976 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots));
977 if (is_receiver) {
978 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size;
979 }
980
981 __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD);
982 __ lea(rHandle, Address(rbp, reg2offset_in(src.first())));
983 // conditionally move a NULL
984 __ cmovptr(Assembler::equal, rHandle, Address(rbp, reg2offset_in(src.first())));
985 } else {
986
987 // Oop is in an a register we must store it to the space we reserve
988 // on the stack for oop_handles and pass a handle if oop is non-NULL
989
990 const Register rOop = src.first()->as_Register();
991 int oop_slot;
992 if (rOop == j_rarg0)
993 oop_slot = 0;
994 else if (rOop == j_rarg1)
995 oop_slot = 1;
996 else if (rOop == j_rarg2)
997 oop_slot = 2;
998 else if (rOop == j_rarg3)
999 oop_slot = 3;
1000 else if (rOop == j_rarg4)
1001 oop_slot = 4;
1002 else {
1003 assert(rOop == j_rarg5, "wrong register");
1004 oop_slot = 5;
1005 }
1006
1007 oop_slot = oop_slot * VMRegImpl::slots_per_word + oop_handle_offset;
1008 int offset = oop_slot*VMRegImpl::stack_slot_size;
1009
1010 map->set_oop(VMRegImpl::stack2reg(oop_slot));
1011 // Store oop in handle area, may be NULL
1012 __ movptr(Address(rsp, offset), rOop);
1013 if (is_receiver) {
1014 *receiver_offset = offset;
1015 }
1016
1017 __ cmpptr(rOop, (int32_t)NULL_WORD);
1018 __ lea(rHandle, Address(rsp, offset));
1019 // conditionally move a NULL from the handle area where it was just stored
1020 __ cmovptr(Assembler::equal, rHandle, Address(rsp, offset));
1021 }
1022
1023 // If arg is on the stack then place it otherwise it is already in correct reg.
1024 if (dst.first()->is_stack()) {
1025 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
1026 }
1027 }
1028
1029 // A float arg may have to do float reg int reg conversion
1030 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1031 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move");
1032
1033 // The calling conventions assures us that each VMregpair is either
1034 // all really one physical register or adjacent stack slots.
1035 // This greatly simplifies the cases here compared to sparc.
1036
1037 if (src.first()->is_stack()) {
1038 if (dst.first()->is_stack()) {
1039 __ movl(rax, Address(rbp, reg2offset_in(src.first())));
1040 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1041 } else {
1042 // stack to reg
1043 assert(dst.first()->is_XMMRegister(), "only expect xmm registers as parameters");
1044 __ movflt(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_in(src.first())));
1045 }
1046 } else if (dst.first()->is_stack()) {
1047 // reg to stack
1048 assert(src.first()->is_XMMRegister(), "only expect xmm registers as parameters");
1049 __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1050 } else {
1051 // reg to reg
1052 // In theory these overlap but the ordering is such that this is likely a nop
1053 if ( src.first() != dst.first()) {
1054 __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister());
1055 }
1056 }
1057 }
1058
1059 // A long move
1060 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1061
1062 // The calling conventions assures us that each VMregpair is either
1063 // all really one physical register or adjacent stack slots.
1064 // This greatly simplifies the cases here compared to sparc.
1065
1066 if (src.is_single_phys_reg() ) {
1067 if (dst.is_single_phys_reg()) {
1068 if (dst.first() != src.first()) {
1069 __ mov(dst.first()->as_Register(), src.first()->as_Register());
1070 }
1071 } else {
1072 assert(dst.is_single_reg(), "not a stack pair");
1073 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
1074 }
1075 } else if (dst.is_single_phys_reg()) {
1076 assert(src.is_single_reg(), "not a stack pair");
1077 __ movq(dst.first()->as_Register(), Address(rbp, reg2offset_out(src.first())));
1078 } else {
1079 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs");
1080 __ movq(rax, Address(rbp, reg2offset_in(src.first())));
1081 __ movq(Address(rsp, reg2offset_out(dst.first())), rax);
1082 }
1083 }
1084
1085 // A double move
1086 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1087
1088 // The calling conventions assures us that each VMregpair is either
1089 // all really one physical register or adjacent stack slots.
1090 // This greatly simplifies the cases here compared to sparc.
1091
1092 if (src.is_single_phys_reg() ) {
1093 if (dst.is_single_phys_reg()) {
1094 // In theory these overlap but the ordering is such that this is likely a nop
1095 if ( src.first() != dst.first()) {
1096 __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister());
1097 }
1098 } else {
1099 assert(dst.is_single_reg(), "not a stack pair");
1100 __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1101 }
1102 } else if (dst.is_single_phys_reg()) {
1103 assert(src.is_single_reg(), "not a stack pair");
1104 __ movdbl(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_out(src.first())));
1105 } else {
1106 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs");
1107 __ movq(rax, Address(rbp, reg2offset_in(src.first())));
1108 __ movq(Address(rsp, reg2offset_out(dst.first())), rax);
1109 }
1110 }
1111
1112
1113 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1114 // We always ignore the frame_slots arg and just use the space just below frame pointer
1115 // which by this time is free to use
1116 switch (ret_type) {
1117 case T_FLOAT:
1118 __ movflt(Address(rbp, -wordSize), xmm0);
1119 break;
1120 case T_DOUBLE:
1121 __ movdbl(Address(rbp, -wordSize), xmm0);
1122 break;
1123 case T_VOID: break;
1124 default: {
1125 __ movptr(Address(rbp, -wordSize), rax);
1126 }
1127 }
1128 }
1129
1130 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1131 // We always ignore the frame_slots arg and just use the space just below frame pointer
1132 // which by this time is free to use
1133 switch (ret_type) {
1134 case T_FLOAT:
1135 __ movflt(xmm0, Address(rbp, -wordSize));
1136 break;
1137 case T_DOUBLE:
1138 __ movdbl(xmm0, Address(rbp, -wordSize));
1139 break;
1140 case T_VOID: break;
1141 default: {
1142 __ movptr(rax, Address(rbp, -wordSize));
1143 }
1144 }
1145 }
1146
1147 static void save_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) {
1148 for ( int i = first_arg ; i < arg_count ; i++ ) {
1149 if (args[i].first()->is_Register()) {
1150 __ push(args[i].first()->as_Register());
1151 } else if (args[i].first()->is_XMMRegister()) {
1152 __ subptr(rsp, 2*wordSize);
1153 __ movdbl(Address(rsp, 0), args[i].first()->as_XMMRegister());
1154 }
1155 }
1156 }
1157
1158 static void restore_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) {
1159 for ( int i = arg_count - 1 ; i >= first_arg ; i-- ) {
1160 if (args[i].first()->is_Register()) {
1161 __ pop(args[i].first()->as_Register());
1162 } else if (args[i].first()->is_XMMRegister()) {
1163 __ movdbl(args[i].first()->as_XMMRegister(), Address(rsp, 0));
1164 __ addptr(rsp, 2*wordSize);
1165 }
1166 }
1167 }
1168
1169 // ---------------------------------------------------------------------------
1170 // Generate a native wrapper for a given method. The method takes arguments
1171 // in the Java compiled code convention, marshals them to the native
1172 // convention (handlizes oops, etc), transitions to native, makes the call,
1173 // returns to java state (possibly blocking), unhandlizes any result and
1174 // returns.
1175 nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm,
1176 methodHandle method,
1177 int total_in_args,
1178 int comp_args_on_stack,
1179 BasicType *in_sig_bt,
1180 VMRegPair *in_regs,
1181 BasicType ret_type) {
1182 // Native nmethod wrappers never take possesion of the oop arguments.
1183 // So the caller will gc the arguments. The only thing we need an
1184 // oopMap for is if the call is static
1185 //
1186 // An OopMap for lock (and class if static)
1187 OopMapSet *oop_maps = new OopMapSet();
1188 intptr_t start = (intptr_t)__ pc();
1189
1190 // We have received a description of where all the java arg are located
1191 // on entry to the wrapper. We need to convert these args to where
1192 // the jni function will expect them. To figure out where they go
1193 // we convert the java signature to a C signature by inserting
1194 // the hidden arguments as arg[0] and possibly arg[1] (static method)
1195
1196 int total_c_args = total_in_args + 1;
1197 if (method->is_static()) {
1198 total_c_args++;
1199 }
1200
1201 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
1202 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
1203
1204 int argc = 0;
1205 out_sig_bt[argc++] = T_ADDRESS;
1206 if (method->is_static()) {
1207 out_sig_bt[argc++] = T_OBJECT;
1208 }
1209
1210 for (int i = 0; i < total_in_args ; i++ ) {
1211 out_sig_bt[argc++] = in_sig_bt[i];
1212 }
1213
1214 // Now figure out where the args must be stored and how much stack space
1215 // they require.
1216 //
1217 int out_arg_slots;
1218 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args);
1219
1220 // Compute framesize for the wrapper. We need to handlize all oops in
1221 // incoming registers
1222
1223 // Calculate the total number of stack slots we will need.
1224
1225 // First count the abi requirement plus all of the outgoing args
1226 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
1227
1228 // Now the space for the inbound oop handle area
1229
1230 int oop_handle_offset = stack_slots;
1231 stack_slots += 6*VMRegImpl::slots_per_word;
1232
1233 // Now any space we need for handlizing a klass if static method
1234
1235 int oop_temp_slot_offset = 0;
1236 int klass_slot_offset = 0;
1237 int klass_offset = -1;
1238 int lock_slot_offset = 0;
1239 bool is_static = false;
1240
1241 if (method->is_static()) {
1242 klass_slot_offset = stack_slots;
1243 stack_slots += VMRegImpl::slots_per_word;
1244 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size;
1245 is_static = true;
1246 }
1247
1248 // Plus a lock if needed
1249
1250 if (method->is_synchronized()) {
1251 lock_slot_offset = stack_slots;
1252 stack_slots += VMRegImpl::slots_per_word;
1253 }
1254
1255 // Now a place (+2) to save return values or temp during shuffling
1256 // + 4 for return address (which we own) and saved rbp
1257 stack_slots += 6;
1258
1259 // Ok The space we have allocated will look like:
1260 //
1261 //
1262 // FP-> | |
1263 // |---------------------|
1264 // | 2 slots for moves |
1265 // |---------------------|
1266 // | lock box (if sync) |
1267 // |---------------------| <- lock_slot_offset
1268 // | klass (if static) |
1269 // |---------------------| <- klass_slot_offset
1270 // | oopHandle area |
1271 // |---------------------| <- oop_handle_offset (6 java arg registers)
1272 // | outbound memory |
1273 // | based arguments |
1274 // | |
1275 // |---------------------|
1276 // | |
1277 // SP-> | out_preserved_slots |
1278 //
1279 //
1280
1281
1282 // Now compute actual number of stack words we need rounding to make
1283 // stack properly aligned.
1284 stack_slots = round_to(stack_slots, StackAlignmentInSlots);
1285
1286 int stack_size = stack_slots * VMRegImpl::stack_slot_size;
1287
1288
1289 // First thing make an ic check to see if we should even be here
1290
1291 // We are free to use all registers as temps without saving them and
1292 // restoring them except rbp. rbp is the only callee save register
1293 // as far as the interpreter and the compiler(s) are concerned.
1294
1295
1296 const Register ic_reg = rax;
1297 const Register receiver = j_rarg0;
1298
1299 Label ok;
1300 Label exception_pending;
1301
1302 assert_different_registers(ic_reg, receiver, rscratch1);
1303 __ verify_oop(receiver);
1304 __ load_klass(rscratch1, receiver);
1305 __ cmpq(ic_reg, rscratch1);
1306 __ jcc(Assembler::equal, ok);
1307
1308 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
1309
1310 __ bind(ok);
1311
1312 // Verified entry point must be aligned
1313 __ align(8);
1314
1315 int vep_offset = ((intptr_t)__ pc()) - start;
1316
1317 // The instruction at the verified entry point must be 5 bytes or longer
1318 // because it can be patched on the fly by make_non_entrant. The stack bang
1319 // instruction fits that requirement.
1320
1321 // Generate stack overflow check
1322
1323 if (UseStackBanging) {
1324 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size());
1325 } else {
1326 // need a 5 byte instruction to allow MT safe patching to non-entrant
1327 __ fat_nop();
1328 }
1329
1330 // Generate a new frame for the wrapper.
1331 __ enter();
1332 // -2 because return address is already present and so is saved rbp
1333 __ subptr(rsp, stack_size - 2*wordSize);
1334
1335 // Frame is now completed as far as size and linkage.
1336
1337 int frame_complete = ((intptr_t)__ pc()) - start;
1338
1339 #ifdef ASSERT
1340 {
1341 Label L;
1342 __ mov(rax, rsp);
1343 __ andptr(rax, -16); // must be 16 byte boundary (see amd64 ABI)
1344 __ cmpptr(rax, rsp);
1345 __ jcc(Assembler::equal, L);
1346 __ stop("improperly aligned stack");
1347 __ bind(L);
1348 }
1349 #endif /* ASSERT */
1350
1351
1352 // We use r14 as the oop handle for the receiver/klass
1353 // It is callee save so it survives the call to native
1354
1355 const Register oop_handle_reg = r14;
1356
1357
1358
1359 //
1360 // We immediately shuffle the arguments so that any vm call we have to
1361 // make from here on out (sync slow path, jvmti, etc.) we will have
1362 // captured the oops from our caller and have a valid oopMap for
1363 // them.
1364
1365 // -----------------
1366 // The Grand Shuffle
1367
1368 // The Java calling convention is either equal (linux) or denser (win64) than the
1369 // c calling convention. However the because of the jni_env argument the c calling
1370 // convention always has at least one more (and two for static) arguments than Java.
1371 // Therefore if we move the args from java -> c backwards then we will never have
1372 // a register->register conflict and we don't have to build a dependency graph
1373 // and figure out how to break any cycles.
1374 //
1375
1376 // Record esp-based slot for receiver on stack for non-static methods
1377 int receiver_offset = -1;
1378
1379 // This is a trick. We double the stack slots so we can claim
1380 // the oops in the caller's frame. Since we are sure to have
1381 // more args than the caller doubling is enough to make
1382 // sure we can capture all the incoming oop args from the
1383 // caller.
1384 //
1385 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1386
1387 // Mark location of rbp (someday)
1388 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, vmreg(rbp));
1389
1390 // Use eax, ebx as temporaries during any memory-memory moves we have to do
1391 // All inbound args are referenced based on rbp and all outbound args via rsp.
1392
1393
1394 #ifdef ASSERT
1395 bool reg_destroyed[RegisterImpl::number_of_registers];
1396 bool freg_destroyed[XMMRegisterImpl::number_of_registers];
1397 for ( int r = 0 ; r < RegisterImpl::number_of_registers ; r++ ) {
1398 reg_destroyed[r] = false;
1399 }
1400 for ( int f = 0 ; f < XMMRegisterImpl::number_of_registers ; f++ ) {
1401 freg_destroyed[f] = false;
1402 }
1403
1404 #endif /* ASSERT */
1405
1406
1407 int c_arg = total_c_args - 1;
1408 for ( int i = total_in_args - 1; i >= 0 ; i--, c_arg-- ) {
1409 #ifdef ASSERT
1410 if (in_regs[i].first()->is_Register()) {
1411 assert(!reg_destroyed[in_regs[i].first()->as_Register()->encoding()], "destroyed reg!");
1412 } else if (in_regs[i].first()->is_XMMRegister()) {
1413 assert(!freg_destroyed[in_regs[i].first()->as_XMMRegister()->encoding()], "destroyed reg!");
1414 }
1415 if (out_regs[c_arg].first()->is_Register()) {
1416 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true;
1417 } else if (out_regs[c_arg].first()->is_XMMRegister()) {
1418 freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true;
1419 }
1420 #endif /* ASSERT */
1421 switch (in_sig_bt[i]) {
1422 case T_ARRAY:
1423 case T_OBJECT:
1424 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg],
1425 ((i == 0) && (!is_static)),
1426 &receiver_offset);
1427 break;
1428 case T_VOID:
1429 break;
1430
1431 case T_FLOAT:
1432 float_move(masm, in_regs[i], out_regs[c_arg]);
1433 break;
1434
1435 case T_DOUBLE:
1436 assert( i + 1 < total_in_args &&
1437 in_sig_bt[i + 1] == T_VOID &&
1438 out_sig_bt[c_arg+1] == T_VOID, "bad arg list");
1439 double_move(masm, in_regs[i], out_regs[c_arg]);
1440 break;
1441
1442 case T_LONG :
1443 long_move(masm, in_regs[i], out_regs[c_arg]);
1444 break;
1445
1446 case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
1447
1448 default:
1449 move32_64(masm, in_regs[i], out_regs[c_arg]);
1450 }
1451 }
1452
1453 // point c_arg at the first arg that is already loaded in case we
1454 // need to spill before we call out
1455 c_arg++;
1456
1457 // Pre-load a static method's oop into r14. Used both by locking code and
1458 // the normal JNI call code.
1459 if (method->is_static()) {
1460
1461 // load oop into a register
1462 __ movoop(oop_handle_reg, JNIHandles::make_local(Klass::cast(method->method_holder())->java_mirror()));
1463
1464 // Now handlize the static class mirror it's known not-null.
1465 __ movptr(Address(rsp, klass_offset), oop_handle_reg);
1466 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
1467
1468 // Now get the handle
1469 __ lea(oop_handle_reg, Address(rsp, klass_offset));
1470 // store the klass handle as second argument
1471 __ movptr(c_rarg1, oop_handle_reg);
1472 // and protect the arg if we must spill
1473 c_arg--;
1474 }
1475
1476 // Change state to native (we save the return address in the thread, since it might not
1477 // be pushed on the stack when we do a a stack traversal). It is enough that the pc()
1478 // points into the right code segment. It does not have to be the correct return pc.
1479 // We use the same pc/oopMap repeatedly when we call out
1480
1481 intptr_t the_pc = (intptr_t) __ pc();
1482 oop_maps->add_gc_map(the_pc - start, map);
1483
1484 __ set_last_Java_frame(rsp, noreg, (address)the_pc);
1485
1486
1487 // We have all of the arguments setup at this point. We must not touch any register
1488 // argument registers at this point (what if we save/restore them there are no oop?
1489
1490 {
1491 SkipIfEqual skip(masm, &DTraceMethodProbes, false);
1492 // protect the args we've loaded
1493 save_args(masm, total_c_args, c_arg, out_regs);
1494 __ movoop(c_rarg1, JNIHandles::make_local(method()));
1495 __ call_VM_leaf(
1496 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
1497 r15_thread, c_rarg1);
1498 restore_args(masm, total_c_args, c_arg, out_regs);
1499 }
1500
1501 // RedefineClasses() tracing support for obsolete method entry
1502 if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) {
1503 // protect the args we've loaded
1504 save_args(masm, total_c_args, c_arg, out_regs);
1505 __ movoop(c_rarg1, JNIHandles::make_local(method()));
1506 __ call_VM_leaf(
1507 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry),
1508 r15_thread, c_rarg1);
1509 restore_args(masm, total_c_args, c_arg, out_regs);
1510 }
1511
1512 // Lock a synchronized method
1513
1514 // Register definitions used by locking and unlocking
1515
1516 const Register swap_reg = rax; // Must use rax for cmpxchg instruction
1517 const Register obj_reg = rbx; // Will contain the oop
1518 const Register lock_reg = r13; // Address of compiler lock object (BasicLock)
1519 const Register old_hdr = r13; // value of old header at unlock time
1520
1521 Label slow_path_lock;
1522 Label lock_done;
1523
1524 if (method->is_synchronized()) {
1525
1526
1527 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes();
1528
1529 // Get the handle (the 2nd argument)
1530 __ mov(oop_handle_reg, c_rarg1);
1531
1532 // Get address of the box
1533
1534 __ lea(lock_reg, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size));
1535
1536 // Load the oop from the handle
1537 __ movptr(obj_reg, Address(oop_handle_reg, 0));
1538
1539 if (UseBiasedLocking) {
1540 __ biased_locking_enter(lock_reg, obj_reg, swap_reg, rscratch1, false, lock_done, &slow_path_lock);
1541 }
1542
1543 // Load immediate 1 into swap_reg %rax
1544 __ movl(swap_reg, 1);
1545
1546 // Load (object->mark() | 1) into swap_reg %rax
1547 __ orptr(swap_reg, Address(obj_reg, 0));
1548
1549 // Save (object->mark() | 1) into BasicLock's displaced header
1550 __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
1551
1552 if (os::is_MP()) {
1553 __ lock();
1554 }
1555
1556 // src -> dest iff dest == rax else rax <- dest
1557 __ cmpxchgptr(lock_reg, Address(obj_reg, 0));
1558 __ jcc(Assembler::equal, lock_done);
1559
1560 // Hmm should this move to the slow path code area???
1561
1562 // Test if the oopMark is an obvious stack pointer, i.e.,
1563 // 1) (mark & 3) == 0, and
1564 // 2) rsp <= mark < mark + os::pagesize()
1565 // These 3 tests can be done by evaluating the following
1566 // expression: ((mark - rsp) & (3 - os::vm_page_size())),
1567 // assuming both stack pointer and pagesize have their
1568 // least significant 2 bits clear.
1569 // NOTE: the oopMark is in swap_reg %rax as the result of cmpxchg
1570
1571 __ subptr(swap_reg, rsp);
1572 __ andptr(swap_reg, 3 - os::vm_page_size());
1573
1574 // Save the test result, for recursive case, the result is zero
1575 __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
1576 __ jcc(Assembler::notEqual, slow_path_lock);
1577
1578 // Slow path will re-enter here
1579
1580 __ bind(lock_done);
1581 }
1582
1583
1584 // Finally just about ready to make the JNI call
1585
1586
1587 // get JNIEnv* which is first argument to native
1588
1589 __ lea(c_rarg0, Address(r15_thread, in_bytes(JavaThread::jni_environment_offset())));
1590
1591 // Now set thread in native
1592 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native);
1593
1594 __ call(RuntimeAddress(method->native_function()));
1595
1596 // Either restore the MXCSR register after returning from the JNI Call
1597 // or verify that it wasn't changed.
1598 if (RestoreMXCSROnJNICalls) {
1599 __ ldmxcsr(ExternalAddress(StubRoutines::x86::mxcsr_std()));
1600
1601 }
1602 else if (CheckJNICalls ) {
1603 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, StubRoutines::x86::verify_mxcsr_entry())));
1604 }
1605
1606
1607 // Unpack native results.
1608 switch (ret_type) {
1609 case T_BOOLEAN: __ c2bool(rax); break;
1610 case T_CHAR : __ movzwl(rax, rax); break;
1611 case T_BYTE : __ sign_extend_byte (rax); break;
1612 case T_SHORT : __ sign_extend_short(rax); break;
1613 case T_INT : /* nothing to do */ break;
1614 case T_DOUBLE :
1615 case T_FLOAT :
1616 // Result is in xmm0 we'll save as needed
1617 break;
1618 case T_ARRAY: // Really a handle
1619 case T_OBJECT: // Really a handle
1620 break; // can't de-handlize until after safepoint check
1621 case T_VOID: break;
1622 case T_LONG: break;
1623 default : ShouldNotReachHere();
1624 }
1625
1626 // Switch thread to "native transition" state before reading the synchronization state.
1627 // This additional state is necessary because reading and testing the synchronization
1628 // state is not atomic w.r.t. GC, as this scenario demonstrates:
1629 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted.
1630 // VM thread changes sync state to synchronizing and suspends threads for GC.
1631 // Thread A is resumed to finish this native method, but doesn't block here since it
1632 // didn't see any synchronization is progress, and escapes.
1633 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native_trans);
1634
1635 if(os::is_MP()) {
1636 if (UseMembar) {
1637 // Force this write out before the read below
1638 __ membar(Assembler::Membar_mask_bits(
1639 Assembler::LoadLoad | Assembler::LoadStore |
1640 Assembler::StoreLoad | Assembler::StoreStore));
1641 } else {
1642 // Write serialization page so VM thread can do a pseudo remote membar.
1643 // We use the current thread pointer to calculate a thread specific
1644 // offset to write to within the page. This minimizes bus traffic
1645 // due to cache line collision.
1646 __ serialize_memory(r15_thread, rcx);
1647 }
1648 }
1649
1650
1651 // check for safepoint operation in progress and/or pending suspend requests
1652 {
1653 Label Continue;
1654
1655 __ cmp32(ExternalAddress((address)SafepointSynchronize::address_of_state()),
1656 SafepointSynchronize::_not_synchronized);
1657
1658 Label L;
1659 __ jcc(Assembler::notEqual, L);
1660 __ cmpl(Address(r15_thread, JavaThread::suspend_flags_offset()), 0);
1661 __ jcc(Assembler::equal, Continue);
1662 __ bind(L);
1663
1664 // Don't use call_VM as it will see a possible pending exception and forward it
1665 // and never return here preventing us from clearing _last_native_pc down below.
1666 // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are
1667 // preserved and correspond to the bcp/locals pointers. So we do a runtime call
1668 // by hand.
1669 //
1670 save_native_result(masm, ret_type, stack_slots);
1671 __ mov(c_rarg0, r15_thread);
1672 __ mov(r12, rsp); // remember sp
1673 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows
1674 __ andptr(rsp, -16); // align stack as required by ABI
1675 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans)));
1676 __ mov(rsp, r12); // restore sp
1677 __ reinit_heapbase();
1678 // Restore any method result value
1679 restore_native_result(masm, ret_type, stack_slots);
1680 __ bind(Continue);
1681 }
1682
1683 // change thread state
1684 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_Java);
1685
1686 Label reguard;
1687 Label reguard_done;
1688 __ cmpl(Address(r15_thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_disabled);
1689 __ jcc(Assembler::equal, reguard);
1690 __ bind(reguard_done);
1691
1692 // native result if any is live
1693
1694 // Unlock
1695 Label unlock_done;
1696 Label slow_path_unlock;
1697 if (method->is_synchronized()) {
1698
1699 // Get locked oop from the handle we passed to jni
1700 __ movptr(obj_reg, Address(oop_handle_reg, 0));
1701
1702 Label done;
1703
1704 if (UseBiasedLocking) {
1705 __ biased_locking_exit(obj_reg, old_hdr, done);
1706 }
1707
1708 // Simple recursive lock?
1709
1710 __ cmpptr(Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size), (int32_t)NULL_WORD);
1711 __ jcc(Assembler::equal, done);
1712
1713 // Must save rax if if it is live now because cmpxchg must use it
1714 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
1715 save_native_result(masm, ret_type, stack_slots);
1716 }
1717
1718
1719 // get address of the stack lock
1720 __ lea(rax, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size));
1721 // get old displaced header
1722 __ movptr(old_hdr, Address(rax, 0));
1723
1724 // Atomic swap old header if oop still contains the stack lock
1725 if (os::is_MP()) {
1726 __ lock();
1727 }
1728 __ cmpxchgptr(old_hdr, Address(obj_reg, 0));
1729 __ jcc(Assembler::notEqual, slow_path_unlock);
1730
1731 // slow path re-enters here
1732 __ bind(unlock_done);
1733 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
1734 restore_native_result(masm, ret_type, stack_slots);
1735 }
1736
1737 __ bind(done);
1738
1739 }
1740 {
1741 SkipIfEqual skip(masm, &DTraceMethodProbes, false);
1742 save_native_result(masm, ret_type, stack_slots);
1743 __ movoop(c_rarg1, JNIHandles::make_local(method()));
1744 __ call_VM_leaf(
1745 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
1746 r15_thread, c_rarg1);
1747 restore_native_result(masm, ret_type, stack_slots);
1748 }
1749
1750 __ reset_last_Java_frame(false, true);
1751
1752 // Unpack oop result
1753 if (ret_type == T_OBJECT || ret_type == T_ARRAY) {
1754 Label L;
1755 __ testptr(rax, rax);
1756 __ jcc(Assembler::zero, L);
1757 __ movptr(rax, Address(rax, 0));
1758 __ bind(L);
1759 __ verify_oop(rax);
1760 }
1761
1762 // reset handle block
1763 __ movptr(rcx, Address(r15_thread, JavaThread::active_handles_offset()));
1764 __ movptr(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), (int32_t)NULL_WORD);
1765
1766 // pop our frame
1767
1768 __ leave();
1769
1770 // Any exception pending?
1771 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
1772 __ jcc(Assembler::notEqual, exception_pending);
1773
1774 // Return
1775
1776 __ ret(0);
1777
1778 // Unexpected paths are out of line and go here
1779
1780 // forward the exception
1781 __ bind(exception_pending);
1782
1783 // and forward the exception
1784 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
1785
1786
1787 // Slow path locking & unlocking
1788 if (method->is_synchronized()) {
1789
1790 // BEGIN Slow path lock
1791 __ bind(slow_path_lock);
1792
1793 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM
1794 // args are (oop obj, BasicLock* lock, JavaThread* thread)
1795
1796 // protect the args we've loaded
1797 save_args(masm, total_c_args, c_arg, out_regs);
1798
1799 __ mov(c_rarg0, obj_reg);
1800 __ mov(c_rarg1, lock_reg);
1801 __ mov(c_rarg2, r15_thread);
1802
1803 // Not a leaf but we have last_Java_frame setup as we want
1804 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), 3);
1805 restore_args(masm, total_c_args, c_arg, out_regs);
1806
1807 #ifdef ASSERT
1808 { Label L;
1809 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
1810 __ jcc(Assembler::equal, L);
1811 __ stop("no pending exception allowed on exit from monitorenter");
1812 __ bind(L);
1813 }
1814 #endif
1815 __ jmp(lock_done);
1816
1817 // END Slow path lock
1818
1819 // BEGIN Slow path unlock
1820 __ bind(slow_path_unlock);
1821
1822 // If we haven't already saved the native result we must save it now as xmm registers
1823 // are still exposed.
1824
1825 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
1826 save_native_result(masm, ret_type, stack_slots);
1827 }
1828
1829 __ lea(c_rarg1, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size));
1830
1831 __ mov(c_rarg0, obj_reg);
1832 __ mov(r12, rsp); // remember sp
1833 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows
1834 __ andptr(rsp, -16); // align stack as required by ABI
1835
1836 // Save pending exception around call to VM (which contains an EXCEPTION_MARK)
1837 // NOTE that obj_reg == rbx currently
1838 __ movptr(rbx, Address(r15_thread, in_bytes(Thread::pending_exception_offset())));
1839 __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
1840
1841 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C)));
1842 __ mov(rsp, r12); // restore sp
1843 __ reinit_heapbase();
1844 #ifdef ASSERT
1845 {
1846 Label L;
1847 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD);
1848 __ jcc(Assembler::equal, L);
1849 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C");
1850 __ bind(L);
1851 }
1852 #endif /* ASSERT */
1853
1854 __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), rbx);
1855
1856 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
1857 restore_native_result(masm, ret_type, stack_slots);
1858 }
1859 __ jmp(unlock_done);
1860
1861 // END Slow path unlock
1862
1863 } // synchronized
1864
1865 // SLOW PATH Reguard the stack if needed
1866
1867 __ bind(reguard);
1868 save_native_result(masm, ret_type, stack_slots);
1869 __ mov(r12, rsp); // remember sp
1870 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows
1871 __ andptr(rsp, -16); // align stack as required by ABI
1872 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages)));
1873 __ mov(rsp, r12); // restore sp
1874 __ reinit_heapbase();
1875 restore_native_result(masm, ret_type, stack_slots);
1876 // and continue
1877 __ jmp(reguard_done);
1878
1879
1880
1881 __ flush();
1882
1883 nmethod *nm = nmethod::new_native_nmethod(method,
1884 masm->code(),
1885 vep_offset,
1886 frame_complete,
1887 stack_slots / VMRegImpl::slots_per_word,
1888 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
1889 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size),
1890 oop_maps);
1891 return nm;
1892
1893 }
1894
1895 #ifdef HAVE_DTRACE_H
1896 // ---------------------------------------------------------------------------
1897 // Generate a dtrace nmethod for a given signature. The method takes arguments
1898 // in the Java compiled code convention, marshals them to the native
1899 // abi and then leaves nops at the position you would expect to call a native
1900 // function. When the probe is enabled the nops are replaced with a trap
1901 // instruction that dtrace inserts and the trace will cause a notification
1902 // to dtrace.
1903 //
1904 // The probes are only able to take primitive types and java/lang/String as
1905 // arguments. No other java types are allowed. Strings are converted to utf8
1906 // strings so that from dtrace point of view java strings are converted to C
1907 // strings. There is an arbitrary fixed limit on the total space that a method
1908 // can use for converting the strings. (256 chars per string in the signature).
1909 // So any java string larger then this is truncated.
1910
1911 static int fp_offset[ConcreteRegisterImpl::number_of_registers] = { 0 };
1912 static bool offsets_initialized = false;
1913
1914
1915 nmethod *SharedRuntime::generate_dtrace_nmethod(MacroAssembler *masm,
1916 methodHandle method) {
1917
1918
1919 // generate_dtrace_nmethod is guarded by a mutex so we are sure to
1920 // be single threaded in this method.
1921 assert(AdapterHandlerLibrary_lock->owned_by_self(), "must be");
1922
1923 if (!offsets_initialized) {
1924 fp_offset[c_rarg0->as_VMReg()->value()] = -1 * wordSize;
1925 fp_offset[c_rarg1->as_VMReg()->value()] = -2 * wordSize;
1926 fp_offset[c_rarg2->as_VMReg()->value()] = -3 * wordSize;
1927 fp_offset[c_rarg3->as_VMReg()->value()] = -4 * wordSize;
1928 fp_offset[c_rarg4->as_VMReg()->value()] = -5 * wordSize;
1929 fp_offset[c_rarg5->as_VMReg()->value()] = -6 * wordSize;
1930
1931 fp_offset[c_farg0->as_VMReg()->value()] = -7 * wordSize;
1932 fp_offset[c_farg1->as_VMReg()->value()] = -8 * wordSize;
1933 fp_offset[c_farg2->as_VMReg()->value()] = -9 * wordSize;
1934 fp_offset[c_farg3->as_VMReg()->value()] = -10 * wordSize;
1935 fp_offset[c_farg4->as_VMReg()->value()] = -11 * wordSize;
1936 fp_offset[c_farg5->as_VMReg()->value()] = -12 * wordSize;
1937 fp_offset[c_farg6->as_VMReg()->value()] = -13 * wordSize;
1938 fp_offset[c_farg7->as_VMReg()->value()] = -14 * wordSize;
1939
1940 offsets_initialized = true;
1941 }
1942 // Fill in the signature array, for the calling-convention call.
1943 int total_args_passed = method->size_of_parameters();
1944
1945 BasicType* in_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed);
1946 VMRegPair *in_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed);
1947
1948 // The signature we are going to use for the trap that dtrace will see
1949 // java/lang/String is converted. We drop "this" and any other object
1950 // is converted to NULL. (A one-slot java/lang/Long object reference
1951 // is converted to a two-slot long, which is why we double the allocation).
1952 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed * 2);
1953 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed * 2);
1954
1955 int i=0;
1956 int total_strings = 0;
1957 int first_arg_to_pass = 0;
1958 int total_c_args = 0;
1959
1960 // Skip the receiver as dtrace doesn't want to see it
1961 if( !method->is_static() ) {
1962 in_sig_bt[i++] = T_OBJECT;
1963 first_arg_to_pass = 1;
1964 }
1965
1966 // We need to convert the java args to where a native (non-jni) function
1967 // would expect them. To figure out where they go we convert the java
1968 // signature to a C signature.
1969
1970 SignatureStream ss(method->signature());
1971 for ( ; !ss.at_return_type(); ss.next()) {
1972 BasicType bt = ss.type();
1973 in_sig_bt[i++] = bt; // Collect remaining bits of signature
1974 out_sig_bt[total_c_args++] = bt;
1975 if( bt == T_OBJECT) {
1976 Symbol* s = ss.as_symbol_or_null(); // symbol is created
1977 if (s == vmSymbols::java_lang_String()) {
1978 total_strings++;
1979 out_sig_bt[total_c_args-1] = T_ADDRESS;
1980 } else if (s == vmSymbols::java_lang_Boolean() ||
1981 s == vmSymbols::java_lang_Character() ||
1982 s == vmSymbols::java_lang_Byte() ||
1983 s == vmSymbols::java_lang_Short() ||
1984 s == vmSymbols::java_lang_Integer() ||
1985 s == vmSymbols::java_lang_Float()) {
1986 out_sig_bt[total_c_args-1] = T_INT;
1987 } else if (s == vmSymbols::java_lang_Long() ||
1988 s == vmSymbols::java_lang_Double()) {
1989 out_sig_bt[total_c_args-1] = T_LONG;
1990 out_sig_bt[total_c_args++] = T_VOID;
1991 }
1992 } else if ( bt == T_LONG || bt == T_DOUBLE ) {
1993 in_sig_bt[i++] = T_VOID; // Longs & doubles take 2 Java slots
1994 // We convert double to long
1995 out_sig_bt[total_c_args-1] = T_LONG;
1996 out_sig_bt[total_c_args++] = T_VOID;
1997 } else if ( bt == T_FLOAT) {
1998 // We convert float to int
1999 out_sig_bt[total_c_args-1] = T_INT;
2000 }
2001 }
2002
2003 assert(i==total_args_passed, "validly parsed signature");
2004
2005 // Now get the compiled-Java layout as input arguments
2006 int comp_args_on_stack;
2007 comp_args_on_stack = SharedRuntime::java_calling_convention(
2008 in_sig_bt, in_regs, total_args_passed, false);
2009
2010 // Now figure out where the args must be stored and how much stack space
2011 // they require (neglecting out_preserve_stack_slots but space for storing
2012 // the 1st six register arguments). It's weird see int_stk_helper.
2013
2014 int out_arg_slots;
2015 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args);
2016
2017 // Calculate the total number of stack slots we will need.
2018
2019 // First count the abi requirement plus all of the outgoing args
2020 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
2021
2022 // Now space for the string(s) we must convert
2023 int* string_locs = NEW_RESOURCE_ARRAY(int, total_strings + 1);
2024 for (i = 0; i < total_strings ; i++) {
2025 string_locs[i] = stack_slots;
2026 stack_slots += max_dtrace_string_size / VMRegImpl::stack_slot_size;
2027 }
2028
2029 // Plus the temps we might need to juggle register args
2030 // regs take two slots each
2031 stack_slots += (Argument::n_int_register_parameters_c +
2032 Argument::n_float_register_parameters_c) * 2;
2033
2034
2035 // + 4 for return address (which we own) and saved rbp,
2036
2037 stack_slots += 4;
2038
2039 // Ok The space we have allocated will look like:
2040 //
2041 //
2042 // FP-> | |
2043 // |---------------------|
2044 // | string[n] |
2045 // |---------------------| <- string_locs[n]
2046 // | string[n-1] |
2047 // |---------------------| <- string_locs[n-1]
2048 // | ... |
2049 // | ... |
2050 // |---------------------| <- string_locs[1]
2051 // | string[0] |
2052 // |---------------------| <- string_locs[0]
2053 // | outbound memory |
2054 // | based arguments |
2055 // | |
2056 // |---------------------|
2057 // | |
2058 // SP-> | out_preserved_slots |
2059 //
2060 //
2061
2062 // Now compute actual number of stack words we need rounding to make
2063 // stack properly aligned.
2064 stack_slots = round_to(stack_slots, 4 * VMRegImpl::slots_per_word);
2065
2066 int stack_size = stack_slots * VMRegImpl::stack_slot_size;
2067
2068 intptr_t start = (intptr_t)__ pc();
2069
2070 // First thing make an ic check to see if we should even be here
2071
2072 // We are free to use all registers as temps without saving them and
2073 // restoring them except rbp. rbp, is the only callee save register
2074 // as far as the interpreter and the compiler(s) are concerned.
2075
2076 const Register ic_reg = rax;
2077 const Register receiver = rcx;
2078 Label hit;
2079 Label exception_pending;
2080
2081
2082 __ verify_oop(receiver);
2083 __ cmpl(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes()));
2084 __ jcc(Assembler::equal, hit);
2085
2086 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
2087
2088 // verified entry must be aligned for code patching.
2089 // and the first 5 bytes must be in the same cache line
2090 // if we align at 8 then we will be sure 5 bytes are in the same line
2091 __ align(8);
2092
2093 __ bind(hit);
2094
2095 int vep_offset = ((intptr_t)__ pc()) - start;
2096
2097
2098 // The instruction at the verified entry point must be 5 bytes or longer
2099 // because it can be patched on the fly by make_non_entrant. The stack bang
2100 // instruction fits that requirement.
2101
2102 // Generate stack overflow check
2103
2104 if (UseStackBanging) {
2105 if (stack_size <= StackShadowPages*os::vm_page_size()) {
2106 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size());
2107 } else {
2108 __ movl(rax, stack_size);
2109 __ bang_stack_size(rax, rbx);
2110 }
2111 } else {
2112 // need a 5 byte instruction to allow MT safe patching to non-entrant
2113 __ fat_nop();
2114 }
2115
2116 assert(((uintptr_t)__ pc() - start - vep_offset) >= 5,
2117 "valid size for make_non_entrant");
2118
2119 // Generate a new frame for the wrapper.
2120 __ enter();
2121
2122 // -4 because return address is already present and so is saved rbp,
2123 if (stack_size - 2*wordSize != 0) {
2124 __ subq(rsp, stack_size - 2*wordSize);
2125 }
2126
2127 // Frame is now completed as far a size and linkage.
2128
2129 int frame_complete = ((intptr_t)__ pc()) - start;
2130
2131 int c_arg, j_arg;
2132
2133 // State of input register args
2134
2135 bool live[ConcreteRegisterImpl::number_of_registers];
2136
2137 live[j_rarg0->as_VMReg()->value()] = false;
2138 live[j_rarg1->as_VMReg()->value()] = false;
2139 live[j_rarg2->as_VMReg()->value()] = false;
2140 live[j_rarg3->as_VMReg()->value()] = false;
2141 live[j_rarg4->as_VMReg()->value()] = false;
2142 live[j_rarg5->as_VMReg()->value()] = false;
2143
2144 live[j_farg0->as_VMReg()->value()] = false;
2145 live[j_farg1->as_VMReg()->value()] = false;
2146 live[j_farg2->as_VMReg()->value()] = false;
2147 live[j_farg3->as_VMReg()->value()] = false;
2148 live[j_farg4->as_VMReg()->value()] = false;
2149 live[j_farg5->as_VMReg()->value()] = false;
2150 live[j_farg6->as_VMReg()->value()] = false;
2151 live[j_farg7->as_VMReg()->value()] = false;
2152
2153
2154 bool rax_is_zero = false;
2155
2156 // All args (except strings) destined for the stack are moved first
2157 for (j_arg = first_arg_to_pass, c_arg = 0 ;
2158 j_arg < total_args_passed ; j_arg++, c_arg++ ) {
2159 VMRegPair src = in_regs[j_arg];
2160 VMRegPair dst = out_regs[c_arg];
2161
2162 // Get the real reg value or a dummy (rsp)
2163
2164 int src_reg = src.first()->is_reg() ?
2165 src.first()->value() :
2166 rsp->as_VMReg()->value();
2167
2168 bool useless = in_sig_bt[j_arg] == T_ARRAY ||
2169 (in_sig_bt[j_arg] == T_OBJECT &&
2170 out_sig_bt[c_arg] != T_INT &&
2171 out_sig_bt[c_arg] != T_ADDRESS &&
2172 out_sig_bt[c_arg] != T_LONG);
2173
2174 live[src_reg] = !useless;
2175
2176 if (dst.first()->is_stack()) {
2177
2178 // Even though a string arg in a register is still live after this loop
2179 // after the string conversion loop (next) it will be dead so we take
2180 // advantage of that now for simpler code to manage live.
2181
2182 live[src_reg] = false;
2183 switch (in_sig_bt[j_arg]) {
2184
2185 case T_ARRAY:
2186 case T_OBJECT:
2187 {
2188 Address stack_dst(rsp, reg2offset_out(dst.first()));
2189
2190 if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) {
2191 // need to unbox a one-word value
2192 Register in_reg = rax;
2193 if ( src.first()->is_reg() ) {
2194 in_reg = src.first()->as_Register();
2195 } else {
2196 __ movq(rax, Address(rbp, reg2offset_in(src.first())));
2197 rax_is_zero = false;
2198 }
2199 Label skipUnbox;
2200 __ movptr(Address(rsp, reg2offset_out(dst.first())),
2201 (int32_t)NULL_WORD);
2202 __ testq(in_reg, in_reg);
2203 __ jcc(Assembler::zero, skipUnbox);
2204
2205 BasicType bt = out_sig_bt[c_arg];
2206 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt);
2207 Address src1(in_reg, box_offset);
2208 if ( bt == T_LONG ) {
2209 __ movq(in_reg, src1);
2210 __ movq(stack_dst, in_reg);
2211 assert(out_sig_bt[c_arg+1] == T_VOID, "must be");
2212 ++c_arg; // skip over T_VOID to keep the loop indices in sync
2213 } else {
2214 __ movl(in_reg, src1);
2215 __ movl(stack_dst, in_reg);
2216 }
2217
2218 __ bind(skipUnbox);
2219 } else if (out_sig_bt[c_arg] != T_ADDRESS) {
2220 // Convert the arg to NULL
2221 if (!rax_is_zero) {
2222 __ xorq(rax, rax);
2223 rax_is_zero = true;
2224 }
2225 __ movq(stack_dst, rax);
2226 }
2227 }
2228 break;
2229
2230 case T_VOID:
2231 break;
2232
2233 case T_FLOAT:
2234 // This does the right thing since we know it is destined for the
2235 // stack
2236 float_move(masm, src, dst);
2237 break;
2238
2239 case T_DOUBLE:
2240 // This does the right thing since we know it is destined for the
2241 // stack
2242 double_move(masm, src, dst);
2243 break;
2244
2245 case T_LONG :
2246 long_move(masm, src, dst);
2247 break;
2248
2249 case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
2250
2251 default:
2252 move32_64(masm, src, dst);
2253 }
2254 }
2255
2256 }
2257
2258 // If we have any strings we must store any register based arg to the stack
2259 // This includes any still live xmm registers too.
2260
2261 int sid = 0;
2262
2263 if (total_strings > 0 ) {
2264 for (j_arg = first_arg_to_pass, c_arg = 0 ;
2265 j_arg < total_args_passed ; j_arg++, c_arg++ ) {
2266 VMRegPair src = in_regs[j_arg];
2267 VMRegPair dst = out_regs[c_arg];
2268
2269 if (src.first()->is_reg()) {
2270 Address src_tmp(rbp, fp_offset[src.first()->value()]);
2271
2272 // string oops were left untouched by the previous loop even if the
2273 // eventual (converted) arg is destined for the stack so park them
2274 // away now (except for first)
2275
2276 if (out_sig_bt[c_arg] == T_ADDRESS) {
2277 Address utf8_addr = Address(
2278 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size);
2279 if (sid != 1) {
2280 // The first string arg won't be killed until after the utf8
2281 // conversion
2282 __ movq(utf8_addr, src.first()->as_Register());
2283 }
2284 } else if (dst.first()->is_reg()) {
2285 if (in_sig_bt[j_arg] == T_FLOAT || in_sig_bt[j_arg] == T_DOUBLE) {
2286
2287 // Convert the xmm register to an int and store it in the reserved
2288 // location for the eventual c register arg
2289 XMMRegister f = src.first()->as_XMMRegister();
2290 if (in_sig_bt[j_arg] == T_FLOAT) {
2291 __ movflt(src_tmp, f);
2292 } else {
2293 __ movdbl(src_tmp, f);
2294 }
2295 } else {
2296 // If the arg is an oop type we don't support don't bother to store
2297 // it remember string was handled above.
2298 bool useless = in_sig_bt[j_arg] == T_ARRAY ||
2299 (in_sig_bt[j_arg] == T_OBJECT &&
2300 out_sig_bt[c_arg] != T_INT &&
2301 out_sig_bt[c_arg] != T_LONG);
2302
2303 if (!useless) {
2304 __ movq(src_tmp, src.first()->as_Register());
2305 }
2306 }
2307 }
2308 }
2309 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) {
2310 assert(out_sig_bt[c_arg+1] == T_VOID, "must be");
2311 ++c_arg; // skip over T_VOID to keep the loop indices in sync
2312 }
2313 }
2314
2315 // Now that the volatile registers are safe, convert all the strings
2316 sid = 0;
2317
2318 for (j_arg = first_arg_to_pass, c_arg = 0 ;
2319 j_arg < total_args_passed ; j_arg++, c_arg++ ) {
2320 if (out_sig_bt[c_arg] == T_ADDRESS) {
2321 // It's a string
2322 Address utf8_addr = Address(
2323 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size);
2324 // The first string we find might still be in the original java arg
2325 // register
2326
2327 VMReg src = in_regs[j_arg].first();
2328
2329 // We will need to eventually save the final argument to the trap
2330 // in the von-volatile location dedicated to src. This is the offset
2331 // from fp we will use.
2332 int src_off = src->is_reg() ?
2333 fp_offset[src->value()] : reg2offset_in(src);
2334
2335 // This is where the argument will eventually reside
2336 VMRegPair dst = out_regs[c_arg];
2337
2338 if (src->is_reg()) {
2339 if (sid == 1) {
2340 __ movq(c_rarg0, src->as_Register());
2341 } else {
2342 __ movq(c_rarg0, utf8_addr);
2343 }
2344 } else {
2345 // arg is still in the original location
2346 __ movq(c_rarg0, Address(rbp, reg2offset_in(src)));
2347 }
2348 Label done, convert;
2349
2350 // see if the oop is NULL
2351 __ testq(c_rarg0, c_rarg0);
2352 __ jcc(Assembler::notEqual, convert);
2353
2354 if (dst.first()->is_reg()) {
2355 // Save the ptr to utf string in the origina src loc or the tmp
2356 // dedicated to it
2357 __ movq(Address(rbp, src_off), c_rarg0);
2358 } else {
2359 __ movq(Address(rsp, reg2offset_out(dst.first())), c_rarg0);
2360 }
2361 __ jmp(done);
2362
2363 __ bind(convert);
2364
2365 __ lea(c_rarg1, utf8_addr);
2366 if (dst.first()->is_reg()) {
2367 __ movq(Address(rbp, src_off), c_rarg1);
2368 } else {
2369 __ movq(Address(rsp, reg2offset_out(dst.first())), c_rarg1);
2370 }
2371 // And do the conversion
2372 __ call(RuntimeAddress(
2373 CAST_FROM_FN_PTR(address, SharedRuntime::get_utf)));
2374
2375 __ bind(done);
2376 }
2377 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) {
2378 assert(out_sig_bt[c_arg+1] == T_VOID, "must be");
2379 ++c_arg; // skip over T_VOID to keep the loop indices in sync
2380 }
2381 }
2382 // The get_utf call killed all the c_arg registers
2383 live[c_rarg0->as_VMReg()->value()] = false;
2384 live[c_rarg1->as_VMReg()->value()] = false;
2385 live[c_rarg2->as_VMReg()->value()] = false;
2386 live[c_rarg3->as_VMReg()->value()] = false;
2387 live[c_rarg4->as_VMReg()->value()] = false;
2388 live[c_rarg5->as_VMReg()->value()] = false;
2389
2390 live[c_farg0->as_VMReg()->value()] = false;
2391 live[c_farg1->as_VMReg()->value()] = false;
2392 live[c_farg2->as_VMReg()->value()] = false;
2393 live[c_farg3->as_VMReg()->value()] = false;
2394 live[c_farg4->as_VMReg()->value()] = false;
2395 live[c_farg5->as_VMReg()->value()] = false;
2396 live[c_farg6->as_VMReg()->value()] = false;
2397 live[c_farg7->as_VMReg()->value()] = false;
2398 }
2399
2400 // Now we can finally move the register args to their desired locations
2401
2402 rax_is_zero = false;
2403
2404 for (j_arg = first_arg_to_pass, c_arg = 0 ;
2405 j_arg < total_args_passed ; j_arg++, c_arg++ ) {
2406
2407 VMRegPair src = in_regs[j_arg];
2408 VMRegPair dst = out_regs[c_arg];
2409
2410 // Only need to look for args destined for the interger registers (since we
2411 // convert float/double args to look like int/long outbound)
2412 if (dst.first()->is_reg()) {
2413 Register r = dst.first()->as_Register();
2414
2415 // Check if the java arg is unsupported and thereofre useless
2416 bool useless = in_sig_bt[j_arg] == T_ARRAY ||
2417 (in_sig_bt[j_arg] == T_OBJECT &&
2418 out_sig_bt[c_arg] != T_INT &&
2419 out_sig_bt[c_arg] != T_ADDRESS &&
2420 out_sig_bt[c_arg] != T_LONG);
2421
2422
2423 // If we're going to kill an existing arg save it first
2424 if (live[dst.first()->value()]) {
2425 // you can't kill yourself
2426 if (src.first() != dst.first()) {
2427 __ movq(Address(rbp, fp_offset[dst.first()->value()]), r);
2428 }
2429 }
2430 if (src.first()->is_reg()) {
2431 if (live[src.first()->value()] ) {
2432 if (in_sig_bt[j_arg] == T_FLOAT) {
2433 __ movdl(r, src.first()->as_XMMRegister());
2434 } else if (in_sig_bt[j_arg] == T_DOUBLE) {
2435 __ movdq(r, src.first()->as_XMMRegister());
2436 } else if (r != src.first()->as_Register()) {
2437 if (!useless) {
2438 __ movq(r, src.first()->as_Register());
2439 }
2440 }
2441 } else {
2442 // If the arg is an oop type we don't support don't bother to store
2443 // it
2444 if (!useless) {
2445 if (in_sig_bt[j_arg] == T_DOUBLE ||
2446 in_sig_bt[j_arg] == T_LONG ||
2447 in_sig_bt[j_arg] == T_OBJECT ) {
2448 __ movq(r, Address(rbp, fp_offset[src.first()->value()]));
2449 } else {
2450 __ movl(r, Address(rbp, fp_offset[src.first()->value()]));
2451 }
2452 }
2453 }
2454 live[src.first()->value()] = false;
2455 } else if (!useless) {
2456 // full sized move even for int should be ok
2457 __ movq(r, Address(rbp, reg2offset_in(src.first())));
2458 }
2459
2460 // At this point r has the original java arg in the final location
2461 // (assuming it wasn't useless). If the java arg was an oop
2462 // we have a bit more to do
2463
2464 if (in_sig_bt[j_arg] == T_ARRAY || in_sig_bt[j_arg] == T_OBJECT ) {
2465 if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) {
2466 // need to unbox a one-word value
2467 Label skip;
2468 __ testq(r, r);
2469 __ jcc(Assembler::equal, skip);
2470 BasicType bt = out_sig_bt[c_arg];
2471 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt);
2472 Address src1(r, box_offset);
2473 if ( bt == T_LONG ) {
2474 __ movq(r, src1);
2475 } else {
2476 __ movl(r, src1);
2477 }
2478 __ bind(skip);
2479
2480 } else if (out_sig_bt[c_arg] != T_ADDRESS) {
2481 // Convert the arg to NULL
2482 __ xorq(r, r);
2483 }
2484 }
2485
2486 // dst can longer be holding an input value
2487 live[dst.first()->value()] = false;
2488 }
2489 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) {
2490 assert(out_sig_bt[c_arg+1] == T_VOID, "must be");
2491 ++c_arg; // skip over T_VOID to keep the loop indices in sync
2492 }
2493 }
2494
2495
2496 // Ok now we are done. Need to place the nop that dtrace wants in order to
2497 // patch in the trap
2498 int patch_offset = ((intptr_t)__ pc()) - start;
2499
2500 __ nop();
2501
2502
2503 // Return
2504
2505 __ leave();
2506 __ ret(0);
2507
2508 __ flush();
2509
2510 nmethod *nm = nmethod::new_dtrace_nmethod(
2511 method, masm->code(), vep_offset, patch_offset, frame_complete,
2512 stack_slots / VMRegImpl::slots_per_word);
2513 return nm;
2514
2515 }
2516
2517 #endif // HAVE_DTRACE_H
2518
2519 // this function returns the adjust size (in number of words) to a c2i adapter
2520 // activation for use during deoptimization
2521 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) {
2522 return (callee_locals - callee_parameters) * Interpreter::stackElementWords;
2523 }
2524
2525
2526 uint SharedRuntime::out_preserve_stack_slots() {
2527 return 0;
2528 }
2529
2530
2531 //------------------------------generate_deopt_blob----------------------------
2532 void SharedRuntime::generate_deopt_blob() {
2533 // Allocate space for the code
2534 ResourceMark rm;
2535 // Setup code generation tools
2536 CodeBuffer buffer("deopt_blob", 2048, 1024);
2537 MacroAssembler* masm = new MacroAssembler(&buffer);
2538 int frame_size_in_words;
2539 OopMap* map = NULL;
2540 OopMapSet *oop_maps = new OopMapSet();
2541
2542 // -------------
2543 // This code enters when returning to a de-optimized nmethod. A return
2544 // address has been pushed on the the stack, and return values are in
2545 // registers.
2546 // If we are doing a normal deopt then we were called from the patched
2547 // nmethod from the point we returned to the nmethod. So the return
2548 // address on the stack is wrong by NativeCall::instruction_size
2549 // We will adjust the value so it looks like we have the original return
2550 // address on the stack (like when we eagerly deoptimized).
2551 // In the case of an exception pending when deoptimizing, we enter
2552 // with a return address on the stack that points after the call we patched
2553 // into the exception handler. We have the following register state from,
2554 // e.g., the forward exception stub (see stubGenerator_x86_64.cpp).
2555 // rax: exception oop
2556 // rbx: exception handler
2557 // rdx: throwing pc
2558 // So in this case we simply jam rdx into the useless return address and
2559 // the stack looks just like we want.
2560 //
2561 // At this point we need to de-opt. We save the argument return
2562 // registers. We call the first C routine, fetch_unroll_info(). This
2563 // routine captures the return values and returns a structure which
2564 // describes the current frame size and the sizes of all replacement frames.
2565 // The current frame is compiled code and may contain many inlined
2566 // functions, each with their own JVM state. We pop the current frame, then
2567 // push all the new frames. Then we call the C routine unpack_frames() to
2568 // populate these frames. Finally unpack_frames() returns us the new target
2569 // address. Notice that callee-save registers are BLOWN here; they have
2570 // already been captured in the vframeArray at the time the return PC was
2571 // patched.
2572 address start = __ pc();
2573 Label cont;
2574
2575 // Prolog for non exception case!
2576
2577 // Save everything in sight.
2578 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
2579
2580 // Normal deoptimization. Save exec mode for unpack_frames.
2581 __ movl(r14, Deoptimization::Unpack_deopt); // callee-saved
2582 __ jmp(cont);
2583
2584 int reexecute_offset = __ pc() - start;
2585
2586 // Reexecute case
2587 // return address is the pc describes what bci to do re-execute at
2588
2589 // No need to update map as each call to save_live_registers will produce identical oopmap
2590 (void) RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
2591
2592 __ movl(r14, Deoptimization::Unpack_reexecute); // callee-saved
2593 __ jmp(cont);
2594
2595 int exception_offset = __ pc() - start;
2596
2597 // Prolog for exception case
2598
2599 // all registers are dead at this entry point, except for rax, and
2600 // rdx which contain the exception oop and exception pc
2601 // respectively. Set them in TLS and fall thru to the
2602 // unpack_with_exception_in_tls entry point.
2603
2604 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx);
2605 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), rax);
2606
2607 int exception_in_tls_offset = __ pc() - start;
2608
2609 // new implementation because exception oop is now passed in JavaThread
2610
2611 // Prolog for exception case
2612 // All registers must be preserved because they might be used by LinearScan
2613 // Exceptiop oop and throwing PC are passed in JavaThread
2614 // tos: stack at point of call to method that threw the exception (i.e. only
2615 // args are on the stack, no return address)
2616
2617 // make room on stack for the return address
2618 // It will be patched later with the throwing pc. The correct value is not
2619 // available now because loading it from memory would destroy registers.
2620 __ push(0);
2621
2622 // Save everything in sight.
2623 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
2624
2625 // Now it is safe to overwrite any register
2626
2627 // Deopt during an exception. Save exec mode for unpack_frames.
2628 __ movl(r14, Deoptimization::Unpack_exception); // callee-saved
2629
2630 // load throwing pc from JavaThread and patch it as the return address
2631 // of the current frame. Then clear the field in JavaThread
2632
2633 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset()));
2634 __ movptr(Address(rbp, wordSize), rdx);
2635 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD);
2636
2637 #ifdef ASSERT
2638 // verify that there is really an exception oop in JavaThread
2639 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset()));
2640 __ verify_oop(rax);
2641
2642 // verify that there is no pending exception
2643 Label no_pending_exception;
2644 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset()));
2645 __ testptr(rax, rax);
2646 __ jcc(Assembler::zero, no_pending_exception);
2647 __ stop("must not have pending exception here");
2648 __ bind(no_pending_exception);
2649 #endif
2650
2651 __ bind(cont);
2652
2653 // Call C code. Need thread and this frame, but NOT official VM entry
2654 // crud. We cannot block on this call, no GC can happen.
2655 //
2656 // UnrollBlock* fetch_unroll_info(JavaThread* thread)
2657
2658 // fetch_unroll_info needs to call last_java_frame().
2659
2660 __ set_last_Java_frame(noreg, noreg, NULL);
2661 #ifdef ASSERT
2662 { Label L;
2663 __ cmpptr(Address(r15_thread,
2664 JavaThread::last_Java_fp_offset()),
2665 (int32_t)0);
2666 __ jcc(Assembler::equal, L);
2667 __ stop("SharedRuntime::generate_deopt_blob: last_Java_fp not cleared");
2668 __ bind(L);
2669 }
2670 #endif // ASSERT
2671 __ mov(c_rarg0, r15_thread);
2672 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info)));
2673
2674 // Need to have an oopmap that tells fetch_unroll_info where to
2675 // find any register it might need.
2676 oop_maps->add_gc_map(__ pc() - start, map);
2677
2678 __ reset_last_Java_frame(false, false);
2679
2680 // Load UnrollBlock* into rdi
2681 __ mov(rdi, rax);
2682
2683 Label noException;
2684 __ cmpl(r14, Deoptimization::Unpack_exception); // Was exception pending?
2685 __ jcc(Assembler::notEqual, noException);
2686 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset()));
2687 // QQQ this is useless it was NULL above
2688 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset()));
2689 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int32_t)NULL_WORD);
2690 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD);
2691
2692 __ verify_oop(rax);
2693
2694 // Overwrite the result registers with the exception results.
2695 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax);
2696 // I think this is useless
2697 __ movptr(Address(rsp, RegisterSaver::rdx_offset_in_bytes()), rdx);
2698
2699 __ bind(noException);
2700
2701 // Only register save data is on the stack.
2702 // Now restore the result registers. Everything else is either dead
2703 // or captured in the vframeArray.
2704 RegisterSaver::restore_result_registers(masm);
2705
2706 // All of the register save area has been popped of the stack. Only the
2707 // return address remains.
2708
2709 // Pop all the frames we must move/replace.
2710 //
2711 // Frame picture (youngest to oldest)
2712 // 1: self-frame (no frame link)
2713 // 2: deopting frame (no frame link)
2714 // 3: caller of deopting frame (could be compiled/interpreted).
2715 //
2716 // Note: by leaving the return address of self-frame on the stack
2717 // and using the size of frame 2 to adjust the stack
2718 // when we are done the return to frame 3 will still be on the stack.
2719
2720 // Pop deoptimized frame
2721 __ movl(rcx, Address(rdi, Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
2722 __ addptr(rsp, rcx);
2723
2724 // rsp should be pointing at the return address to the caller (3)
2725
2726 // Stack bang to make sure there's enough room for these interpreter frames.
2727 if (UseStackBanging) {
2728 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
2729 __ bang_stack_size(rbx, rcx);
2730 }
2731
2732 // Load address of array of frame pcs into rcx
2733 __ movptr(rcx, Address(rdi, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
2734
2735 // Trash the old pc
2736 __ addptr(rsp, wordSize);
2737
2738 // Load address of array of frame sizes into rsi
2739 __ movptr(rsi, Address(rdi, Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
2740
2741 // Load counter into rdx
2742 __ movl(rdx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
2743
2744 // Pick up the initial fp we should save
2745 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_fp_offset_in_bytes()));
2746
2747 // Now adjust the caller's stack to make up for the extra locals
2748 // but record the original sp so that we can save it in the skeletal interpreter
2749 // frame and the stack walking of interpreter_sender will get the unextended sp
2750 // value and not the "real" sp value.
2751
2752 const Register sender_sp = r8;
2753
2754 __ mov(sender_sp, rsp);
2755 __ movl(rbx, Address(rdi,
2756 Deoptimization::UnrollBlock::
2757 caller_adjustment_offset_in_bytes()));
2758 __ subptr(rsp, rbx);
2759
2760 // Push interpreter frames in a loop
2761 Label loop;
2762 __ bind(loop);
2763 __ movptr(rbx, Address(rsi, 0)); // Load frame size
2764 #ifdef CC_INTERP
2765 __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and
2766 #ifdef ASSERT
2767 __ push(0xDEADDEAD); // Make a recognizable pattern
2768 __ push(0xDEADDEAD);
2769 #else /* ASSERT */
2770 __ subptr(rsp, 2*wordSize); // skip the "static long no_param"
2771 #endif /* ASSERT */
2772 #else
2773 __ subptr(rbx, 2*wordSize); // We'll push pc and ebp by hand
2774 #endif // CC_INTERP
2775 __ pushptr(Address(rcx, 0)); // Save return address
2776 __ enter(); // Save old & set new ebp
2777 __ subptr(rsp, rbx); // Prolog
2778 #ifdef CC_INTERP
2779 __ movptr(Address(rbp,
2780 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))),
2781 sender_sp); // Make it walkable
2782 #else /* CC_INTERP */
2783 // This value is corrected by layout_activation_impl
2784 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD );
2785 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), sender_sp); // Make it walkable
2786 #endif /* CC_INTERP */
2787 __ mov(sender_sp, rsp); // Pass sender_sp to next frame
2788 __ addptr(rsi, wordSize); // Bump array pointer (sizes)
2789 __ addptr(rcx, wordSize); // Bump array pointer (pcs)
2790 __ decrementl(rdx); // Decrement counter
2791 __ jcc(Assembler::notZero, loop);
2792 __ pushptr(Address(rcx, 0)); // Save final return address
2793
2794 // Re-push self-frame
2795 __ enter(); // Save old & set new ebp
2796
2797 // Allocate a full sized register save area.
2798 // Return address and rbp are in place, so we allocate two less words.
2799 __ subptr(rsp, (frame_size_in_words - 2) * wordSize);
2800
2801 // Restore frame locals after moving the frame
2802 __ movdbl(Address(rsp, RegisterSaver::xmm0_offset_in_bytes()), xmm0);
2803 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax);
2804
2805 // Call C code. Need thread but NOT official VM entry
2806 // crud. We cannot block on this call, no GC can happen. Call should
2807 // restore return values to their stack-slots with the new SP.
2808 //
2809 // void Deoptimization::unpack_frames(JavaThread* thread, int exec_mode)
2810
2811 // Use rbp because the frames look interpreted now
2812 __ set_last_Java_frame(noreg, rbp, NULL);
2813
2814 __ mov(c_rarg0, r15_thread);
2815 __ movl(c_rarg1, r14); // second arg: exec_mode
2816 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2817
2818 // Set an oopmap for the call site
2819 oop_maps->add_gc_map(__ pc() - start,
2820 new OopMap( frame_size_in_words, 0 ));
2821
2822 __ reset_last_Java_frame(true, false);
2823
2824 // Collect return values
2825 __ movdbl(xmm0, Address(rsp, RegisterSaver::xmm0_offset_in_bytes()));
2826 __ movptr(rax, Address(rsp, RegisterSaver::rax_offset_in_bytes()));
2827 // I think this is useless (throwing pc?)
2828 __ movptr(rdx, Address(rsp, RegisterSaver::rdx_offset_in_bytes()));
2829
2830 // Pop self-frame.
2831 __ leave(); // Epilog
2832
2833 // Jump to interpreter
2834 __ ret(0);
2835
2836 // Make sure all code is generated
2837 masm->flush();
2838
2839 _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words);
2840 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset);
2841 }
2842
2843 #ifdef COMPILER2
2844 //------------------------------generate_uncommon_trap_blob--------------------
2845 void SharedRuntime::generate_uncommon_trap_blob() {
2846 // Allocate space for the code
2847 ResourceMark rm;
2848 // Setup code generation tools
2849 CodeBuffer buffer("uncommon_trap_blob", 2048, 1024);
2850 MacroAssembler* masm = new MacroAssembler(&buffer);
2851
2852 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned");
2853
2854 address start = __ pc();
2855
2856 // Push self-frame. We get here with a return address on the
2857 // stack, so rsp is 8-byte aligned until we allocate our frame.
2858 __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog!
2859
2860 // No callee saved registers. rbp is assumed implicitly saved
2861 __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp);
2862
2863 // compiler left unloaded_class_index in j_rarg0 move to where the
2864 // runtime expects it.
2865 __ movl(c_rarg1, j_rarg0);
2866
2867 __ set_last_Java_frame(noreg, noreg, NULL);
2868
2869 // Call C code. Need thread but NOT official VM entry
2870 // crud. We cannot block on this call, no GC can happen. Call should
2871 // capture callee-saved registers as well as return values.
2872 // Thread is in rdi already.
2873 //
2874 // UnrollBlock* uncommon_trap(JavaThread* thread, jint unloaded_class_index);
2875
2876 __ mov(c_rarg0, r15_thread);
2877 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap)));
2878
2879 // Set an oopmap for the call site
2880 OopMapSet* oop_maps = new OopMapSet();
2881 OopMap* map = new OopMap(SimpleRuntimeFrame::framesize, 0);
2882
2883 // location of rbp is known implicitly by the frame sender code
2884
2885 oop_maps->add_gc_map(__ pc() - start, map);
2886
2887 __ reset_last_Java_frame(false, false);
2888
2889 // Load UnrollBlock* into rdi
2890 __ mov(rdi, rax);
2891
2892 // Pop all the frames we must move/replace.
2893 //
2894 // Frame picture (youngest to oldest)
2895 // 1: self-frame (no frame link)
2896 // 2: deopting frame (no frame link)
2897 // 3: caller of deopting frame (could be compiled/interpreted).
2898
2899 // Pop self-frame. We have no frame, and must rely only on rax and rsp.
2900 __ addptr(rsp, (SimpleRuntimeFrame::framesize - 2) << LogBytesPerInt); // Epilog!
2901
2902 // Pop deoptimized frame (int)
2903 __ movl(rcx, Address(rdi,
2904 Deoptimization::UnrollBlock::
2905 size_of_deoptimized_frame_offset_in_bytes()));
2906 __ addptr(rsp, rcx);
2907
2908 // rsp should be pointing at the return address to the caller (3)
2909
2910 // Stack bang to make sure there's enough room for these interpreter frames.
2911 if (UseStackBanging) {
2912 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
2913 __ bang_stack_size(rbx, rcx);
2914 }
2915
2916 // Load address of array of frame pcs into rcx (address*)
2917 __ movptr(rcx,
2918 Address(rdi,
2919 Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
2920
2921 // Trash the return pc
2922 __ addptr(rsp, wordSize);
2923
2924 // Load address of array of frame sizes into rsi (intptr_t*)
2925 __ movptr(rsi, Address(rdi,
2926 Deoptimization::UnrollBlock::
2927 frame_sizes_offset_in_bytes()));
2928
2929 // Counter
2930 __ movl(rdx, Address(rdi,
2931 Deoptimization::UnrollBlock::
2932 number_of_frames_offset_in_bytes())); // (int)
2933
2934 // Pick up the initial fp we should save
2935 __ movptr(rbp,
2936 Address(rdi,
2937 Deoptimization::UnrollBlock::initial_fp_offset_in_bytes()));
2938
2939 // Now adjust the caller's stack to make up for the extra locals but
2940 // record the original sp so that we can save it in the skeletal
2941 // interpreter frame and the stack walking of interpreter_sender
2942 // will get the unextended sp value and not the "real" sp value.
2943
2944 const Register sender_sp = r8;
2945
2946 __ mov(sender_sp, rsp);
2947 __ movl(rbx, Address(rdi,
2948 Deoptimization::UnrollBlock::
2949 caller_adjustment_offset_in_bytes())); // (int)
2950 __ subptr(rsp, rbx);
2951
2952 // Push interpreter frames in a loop
2953 Label loop;
2954 __ bind(loop);
2955 __ movptr(rbx, Address(rsi, 0)); // Load frame size
2956 __ subptr(rbx, 2 * wordSize); // We'll push pc and rbp by hand
2957 __ pushptr(Address(rcx, 0)); // Save return address
2958 __ enter(); // Save old & set new rbp
2959 __ subptr(rsp, rbx); // Prolog
2960 #ifdef CC_INTERP
2961 __ movptr(Address(rbp,
2962 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))),
2963 sender_sp); // Make it walkable
2964 #else // CC_INTERP
2965 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize),
2966 sender_sp); // Make it walkable
2967 // This value is corrected by layout_activation_impl
2968 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD );
2969 #endif // CC_INTERP
2970 __ mov(sender_sp, rsp); // Pass sender_sp to next frame
2971 __ addptr(rsi, wordSize); // Bump array pointer (sizes)
2972 __ addptr(rcx, wordSize); // Bump array pointer (pcs)
2973 __ decrementl(rdx); // Decrement counter
2974 __ jcc(Assembler::notZero, loop);
2975 __ pushptr(Address(rcx, 0)); // Save final return address
2976
2977 // Re-push self-frame
2978 __ enter(); // Save old & set new rbp
2979 __ subptr(rsp, (SimpleRuntimeFrame::framesize - 4) << LogBytesPerInt);
2980 // Prolog
2981
2982 // Use rbp because the frames look interpreted now
2983 __ set_last_Java_frame(noreg, rbp, NULL);
2984
2985 // Call C code. Need thread but NOT official VM entry
2986 // crud. We cannot block on this call, no GC can happen. Call should
2987 // restore return values to their stack-slots with the new SP.
2988 // Thread is in rdi already.
2989 //
2990 // BasicType unpack_frames(JavaThread* thread, int exec_mode);
2991
2992 __ mov(c_rarg0, r15_thread);
2993 __ movl(c_rarg1, Deoptimization::Unpack_uncommon_trap);
2994 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2995
2996 // Set an oopmap for the call site
2997 oop_maps->add_gc_map(__ pc() - start, new OopMap(SimpleRuntimeFrame::framesize, 0));
2998
2999 __ reset_last_Java_frame(true, false);
3000
3001 // Pop self-frame.
3002 __ leave(); // Epilog
3003
3004 // Jump to interpreter
3005 __ ret(0);
3006
3007 // Make sure all code is generated
3008 masm->flush();
3009
3010 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps,
3011 SimpleRuntimeFrame::framesize >> 1);
3012 }
3013 #endif // COMPILER2
3014
3015
3016 //------------------------------generate_handler_blob------
3017 //
3018 // Generate a special Compile2Runtime blob that saves all registers,
3019 // and setup oopmap.
3020 //
3021 static SafepointBlob* generate_handler_blob(address call_ptr, bool cause_return) {
3022 assert(StubRoutines::forward_exception_entry() != NULL,
3023 "must be generated before");
3024
3025 ResourceMark rm;
3026 OopMapSet *oop_maps = new OopMapSet();
3027 OopMap* map;
3028
3029 // Allocate space for the code. Setup code generation tools.
3030 CodeBuffer buffer("handler_blob", 2048, 1024);
3031 MacroAssembler* masm = new MacroAssembler(&buffer);
3032
3033 address start = __ pc();
3034 address call_pc = NULL;
3035 int frame_size_in_words;
3036
3037 // Make room for return address (or push it again)
3038 if (!cause_return) {
3039 __ push(rbx);
3040 }
3041
3042 // Save registers, fpu state, and flags
3043 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
3044
3045 // The following is basically a call_VM. However, we need the precise
3046 // address of the call in order to generate an oopmap. Hence, we do all the
3047 // work outselves.
3048
3049 __ set_last_Java_frame(noreg, noreg, NULL);
3050
3051 // The return address must always be correct so that frame constructor never
3052 // sees an invalid pc.
3053
3054 if (!cause_return) {
3055 // overwrite the dummy value we pushed on entry
3056 __ movptr(c_rarg0, Address(r15_thread, JavaThread::saved_exception_pc_offset()));
3057 __ movptr(Address(rbp, wordSize), c_rarg0);
3058 }
3059
3060 // Do the call
3061 __ mov(c_rarg0, r15_thread);
3062 __ call(RuntimeAddress(call_ptr));
3063
3064 // Set an oopmap for the call site. This oopmap will map all
3065 // oop-registers and debug-info registers as callee-saved. This
3066 // will allow deoptimization at this safepoint to find all possible
3067 // debug-info recordings, as well as let GC find all oops.
3068
3069 oop_maps->add_gc_map( __ pc() - start, map);
3070
3071 Label noException;
3072
3073 __ reset_last_Java_frame(false, false);
3074
3075 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
3076 __ jcc(Assembler::equal, noException);
3077
3078 // Exception pending
3079
3080 RegisterSaver::restore_live_registers(masm);
3081
3082 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3083
3084 // No exception case
3085 __ bind(noException);
3086
3087 // Normal exit, restore registers and exit.
3088 RegisterSaver::restore_live_registers(masm);
3089
3090 __ ret(0);
3091
3092 // Make sure all code is generated
3093 masm->flush();
3094
3095 // Fill-out other meta info
3096 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words);
3097 }
3098
3099 //
3100 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss
3101 //
3102 // Generate a stub that calls into vm to find out the proper destination
3103 // of a java call. All the argument registers are live at this point
3104 // but since this is generic code we don't know what they are and the caller
3105 // must do any gc of the args.
3106 //
3107 static RuntimeStub* generate_resolve_blob(address destination, const char* name) {
3108 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
3109
3110 // allocate space for the code
3111 ResourceMark rm;
3112
3113 CodeBuffer buffer(name, 1000, 512);
3114 MacroAssembler* masm = new MacroAssembler(&buffer);
3115
3116 int frame_size_in_words;
3117
3118 OopMapSet *oop_maps = new OopMapSet();
3119 OopMap* map = NULL;
3120
3121 int start = __ offset();
3122
3123 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
3124
3125 int frame_complete = __ offset();
3126
3127 __ set_last_Java_frame(noreg, noreg, NULL);
3128
3129 __ mov(c_rarg0, r15_thread);
3130
3131 __ call(RuntimeAddress(destination));
3132
3133
3134 // Set an oopmap for the call site.
3135 // We need this not only for callee-saved registers, but also for volatile
3136 // registers that the compiler might be keeping live across a safepoint.
3137
3138 oop_maps->add_gc_map( __ offset() - start, map);
3139
3140 // rax contains the address we are going to jump to assuming no exception got installed
3141
3142 // clear last_Java_sp
3143 __ reset_last_Java_frame(false, false);
3144 // check for pending exceptions
3145 Label pending;
3146 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
3147 __ jcc(Assembler::notEqual, pending);
3148
3149 // get the returned methodOop
3150 __ movptr(rbx, Address(r15_thread, JavaThread::vm_result_offset()));
3151 __ movptr(Address(rsp, RegisterSaver::rbx_offset_in_bytes()), rbx);
3152
3153 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax);
3154
3155 RegisterSaver::restore_live_registers(masm);
3156
3157 // We are back the the original state on entry and ready to go.
3158
3159 __ jmp(rax);
3160
3161 // Pending exception after the safepoint
3162
3163 __ bind(pending);
3164
3165 RegisterSaver::restore_live_registers(masm);
3166
3167 // exception pending => remove activation and forward to exception handler
3168
3169 __ movptr(Address(r15_thread, JavaThread::vm_result_offset()), (int)NULL_WORD);
3170
3171 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset()));
3172 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3173
3174 // -------------
3175 // make sure all code is generated
3176 masm->flush();
3177
3178 // return the blob
3179 // frame_size_words or bytes??
3180 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_in_words, oop_maps, true);
3181 }
3182
3183
3184 void SharedRuntime::generate_stubs() {
3185
3186 _wrong_method_blob = generate_resolve_blob(CAST_FROM_FN_PTR(address, SharedRuntime::handle_wrong_method),
3187 "wrong_method_stub");
3188 _ic_miss_blob = generate_resolve_blob(CAST_FROM_FN_PTR(address, SharedRuntime::handle_wrong_method_ic_miss),
3189 "ic_miss_stub");
3190 _resolve_opt_virtual_call_blob = generate_resolve_blob(CAST_FROM_FN_PTR(address, SharedRuntime::resolve_opt_virtual_call_C),
3191 "resolve_opt_virtual_call");
3192
3193 _resolve_virtual_call_blob = generate_resolve_blob(CAST_FROM_FN_PTR(address, SharedRuntime::resolve_virtual_call_C),
3194 "resolve_virtual_call");
3195
3196 _resolve_static_call_blob = generate_resolve_blob(CAST_FROM_FN_PTR(address, SharedRuntime::resolve_static_call_C),
3197 "resolve_static_call");
3198 _polling_page_safepoint_handler_blob =
3199 generate_handler_blob(CAST_FROM_FN_PTR(address,
3200 SafepointSynchronize::handle_polling_page_exception), false);
3201
3202 _polling_page_return_handler_blob =
3203 generate_handler_blob(CAST_FROM_FN_PTR(address,
3204 SafepointSynchronize::handle_polling_page_exception), true);
3205
3206 generate_deopt_blob();
3207
3208 #ifdef COMPILER2
3209 generate_uncommon_trap_blob();
3210 #endif // COMPILER2
3211 }
3212
3213
3214 #ifdef COMPILER2
3215 // This is here instead of runtime_x86_64.cpp because it uses SimpleRuntimeFrame
3216 //
3217 //------------------------------generate_exception_blob---------------------------
3218 // creates exception blob at the end
3219 // Using exception blob, this code is jumped from a compiled method.
3220 // (see emit_exception_handler in x86_64.ad file)
3221 //
3222 // Given an exception pc at a call we call into the runtime for the
3223 // handler in this method. This handler might merely restore state
3224 // (i.e. callee save registers) unwind the frame and jump to the
3225 // exception handler for the nmethod if there is no Java level handler
3226 // for the nmethod.
3227 //
3228 // This code is entered with a jmp.
3229 //
3230 // Arguments:
3231 // rax: exception oop
3232 // rdx: exception pc
3233 //
3234 // Results:
3235 // rax: exception oop
3236 // rdx: exception pc in caller or ???
3237 // destination: exception handler of caller
3238 //
3239 // Note: the exception pc MUST be at a call (precise debug information)
3240 // Registers rax, rdx, rcx, rsi, rdi, r8-r11 are not callee saved.
3241 //
3242
3243 void OptoRuntime::generate_exception_blob() {
3244 assert(!OptoRuntime::is_callee_saved_register(RDX_num), "");
3245 assert(!OptoRuntime::is_callee_saved_register(RAX_num), "");
3246 assert(!OptoRuntime::is_callee_saved_register(RCX_num), "");
3247
3248 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned");
3249
3250 // Allocate space for the code
3251 ResourceMark rm;
3252 // Setup code generation tools
3253 CodeBuffer buffer("exception_blob", 2048, 1024);
3254 MacroAssembler* masm = new MacroAssembler(&buffer);
3255
3256
3257 address start = __ pc();
3258
3259 // Exception pc is 'return address' for stack walker
3260 __ push(rdx);
3261 __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Prolog
3262
3263 // Save callee-saved registers. See x86_64.ad.
3264
3265 // rbp is an implicitly saved callee saved register (i.e. the calling
3266 // convention will save restore it in prolog/epilog) Other than that
3267 // there are no callee save registers now that adapter frames are gone.
3268
3269 __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp);
3270
3271 // Store exception in Thread object. We cannot pass any arguments to the
3272 // handle_exception call, since we do not want to make any assumption
3273 // about the size of the frame where the exception happened in.
3274 // c_rarg0 is either rdi (Linux) or rcx (Windows).
3275 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()),rax);
3276 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx);
3277
3278 // This call does all the hard work. It checks if an exception handler
3279 // exists in the method.
3280 // If so, it returns the handler address.
3281 // If not, it prepares for stack-unwinding, restoring the callee-save
3282 // registers of the frame being removed.
3283 //
3284 // address OptoRuntime::handle_exception_C(JavaThread* thread)
3285
3286 __ set_last_Java_frame(noreg, noreg, NULL);
3287 __ mov(c_rarg0, r15_thread);
3288 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, OptoRuntime::handle_exception_C)));
3289
3290 // Set an oopmap for the call site. This oopmap will only be used if we
3291 // are unwinding the stack. Hence, all locations will be dead.
3292 // Callee-saved registers will be the same as the frame above (i.e.,
3293 // handle_exception_stub), since they were restored when we got the
3294 // exception.
3295
3296 OopMapSet* oop_maps = new OopMapSet();
3297
3298 oop_maps->add_gc_map( __ pc()-start, new OopMap(SimpleRuntimeFrame::framesize, 0));
3299
3300 __ reset_last_Java_frame(false, false);
3301
3302 // Restore callee-saved registers
3303
3304 // rbp is an implicitly saved callee saved register (i.e. the calling
3305 // convention will save restore it in prolog/epilog) Other than that
3306 // there are no callee save registers no that adapter frames are gone.
3307
3308 __ movptr(rbp, Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt));
3309
3310 __ addptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog
3311 __ pop(rdx); // No need for exception pc anymore
3312
3313 // rax: exception handler
3314
3315 // Restore SP from BP if the exception PC is a MethodHandle call site.
3316 __ cmpl(Address(r15_thread, JavaThread::is_method_handle_return_offset()), 0);
3317 __ cmovptr(Assembler::notEqual, rsp, rbp_mh_SP_save);
3318
3319 // We have a handler in rax (could be deopt blob).
3320 __ mov(r8, rax);
3321
3322 // Get the exception oop
3323 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset()));
3324 // Get the exception pc in case we are deoptimized
3325 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset()));
3326 #ifdef ASSERT
3327 __ movptr(Address(r15_thread, JavaThread::exception_handler_pc_offset()), (int)NULL_WORD);
3328 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int)NULL_WORD);
3329 #endif
3330 // Clear the exception oop so GC no longer processes it as a root.
3331 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int)NULL_WORD);
3332
3333 // rax: exception oop
3334 // r8: exception handler
3335 // rdx: exception pc
3336 // Jump to handler
3337
3338 __ jmp(r8);
3339
3340 // Make sure all code is generated
3341 masm->flush();
3342
3343 // Set exception blob
3344 _exception_blob = ExceptionBlob::create(&buffer, oop_maps, SimpleRuntimeFrame::framesize >> 1);
3345 }
3346 #endif // COMPILER2