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--- old/src/cpu/x86/vm/sharedRuntime_x86_64.cpp
+++ new/src/cpu/x86/vm/sharedRuntime_x86_64.cpp
1 1 /*
2 2 * Copyright (c) 2003, 2011, Oracle and/or its affiliates. All rights reserved.
3 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 4 *
5 5 * This code is free software; you can redistribute it and/or modify it
6 6 * under the terms of the GNU General Public License version 2 only, as
7 7 * published by the Free Software Foundation.
8 8 *
9 9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 12 * version 2 for more details (a copy is included in the LICENSE file that
13 13 * accompanied this code).
14 14 *
15 15 * You should have received a copy of the GNU General Public License version
16 16 * 2 along with this work; if not, write to the Free Software Foundation,
17 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 18 *
19 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 20 * or visit www.oracle.com if you need additional information or have any
21 21 * questions.
22 22 *
23 23 */
24 24
25 25 #include "precompiled.hpp"
26 26 #include "asm/assembler.hpp"
27 27 #include "assembler_x86.inline.hpp"
28 28 #include "code/debugInfoRec.hpp"
29 29 #include "code/icBuffer.hpp"
30 30 #include "code/vtableStubs.hpp"
31 31 #include "interpreter/interpreter.hpp"
32 32 #include "oops/compiledICHolderOop.hpp"
33 33 #include "prims/jvmtiRedefineClassesTrace.hpp"
34 34 #include "runtime/sharedRuntime.hpp"
35 35 #include "runtime/vframeArray.hpp"
36 36 #include "vmreg_x86.inline.hpp"
37 37 #ifdef COMPILER1
38 38 #include "c1/c1_Runtime1.hpp"
39 39 #endif
40 40 #ifdef COMPILER2
41 41 #include "opto/runtime.hpp"
42 42 #endif
43 43
44 44 DeoptimizationBlob *SharedRuntime::_deopt_blob;
45 45 #ifdef COMPILER2
46 46 UncommonTrapBlob *SharedRuntime::_uncommon_trap_blob;
47 47 ExceptionBlob *OptoRuntime::_exception_blob;
48 48 #endif // COMPILER2
49 49
50 50 SafepointBlob *SharedRuntime::_polling_page_safepoint_handler_blob;
51 51 SafepointBlob *SharedRuntime::_polling_page_return_handler_blob;
52 52 RuntimeStub* SharedRuntime::_wrong_method_blob;
53 53 RuntimeStub* SharedRuntime::_ic_miss_blob;
54 54 RuntimeStub* SharedRuntime::_resolve_opt_virtual_call_blob;
55 55 RuntimeStub* SharedRuntime::_resolve_virtual_call_blob;
56 56 RuntimeStub* SharedRuntime::_resolve_static_call_blob;
57 57
58 58 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size;
59 59
60 60 #define __ masm->
61 61
62 62 class SimpleRuntimeFrame {
63 63
64 64 public:
65 65
66 66 // Most of the runtime stubs have this simple frame layout.
67 67 // This class exists to make the layout shared in one place.
68 68 // Offsets are for compiler stack slots, which are jints.
69 69 enum layout {
70 70 // The frame sender code expects that rbp will be in the "natural" place and
71 71 // will override any oopMap setting for it. We must therefore force the layout
72 72 // so that it agrees with the frame sender code.
73 73 rbp_off = frame::arg_reg_save_area_bytes/BytesPerInt,
74 74 rbp_off2,
75 75 return_off, return_off2,
76 76 framesize
77 77 };
78 78 };
79 79
80 80 class RegisterSaver {
81 81 // Capture info about frame layout. Layout offsets are in jint
82 82 // units because compiler frame slots are jints.
83 83 #define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off
84 84 enum layout {
85 85 fpu_state_off = frame::arg_reg_save_area_bytes/BytesPerInt, // fxsave save area
86 86 xmm_off = fpu_state_off + 160/BytesPerInt, // offset in fxsave save area
87 87 DEF_XMM_OFFS(0),
88 88 DEF_XMM_OFFS(1),
89 89 DEF_XMM_OFFS(2),
90 90 DEF_XMM_OFFS(3),
91 91 DEF_XMM_OFFS(4),
92 92 DEF_XMM_OFFS(5),
93 93 DEF_XMM_OFFS(6),
94 94 DEF_XMM_OFFS(7),
95 95 DEF_XMM_OFFS(8),
96 96 DEF_XMM_OFFS(9),
97 97 DEF_XMM_OFFS(10),
98 98 DEF_XMM_OFFS(11),
99 99 DEF_XMM_OFFS(12),
100 100 DEF_XMM_OFFS(13),
101 101 DEF_XMM_OFFS(14),
102 102 DEF_XMM_OFFS(15),
103 103 fpu_state_end = fpu_state_off + ((FPUStateSizeInWords-1)*wordSize / BytesPerInt),
104 104 fpu_stateH_end,
105 105 r15_off, r15H_off,
106 106 r14_off, r14H_off,
107 107 r13_off, r13H_off,
108 108 r12_off, r12H_off,
109 109 r11_off, r11H_off,
110 110 r10_off, r10H_off,
111 111 r9_off, r9H_off,
112 112 r8_off, r8H_off,
113 113 rdi_off, rdiH_off,
114 114 rsi_off, rsiH_off,
115 115 ignore_off, ignoreH_off, // extra copy of rbp
116 116 rsp_off, rspH_off,
117 117 rbx_off, rbxH_off,
118 118 rdx_off, rdxH_off,
119 119 rcx_off, rcxH_off,
120 120 rax_off, raxH_off,
121 121 // 16-byte stack alignment fill word: see MacroAssembler::push/pop_IU_state
122 122 align_off, alignH_off,
123 123 flags_off, flagsH_off,
124 124 // The frame sender code expects that rbp will be in the "natural" place and
125 125 // will override any oopMap setting for it. We must therefore force the layout
126 126 // so that it agrees with the frame sender code.
127 127 rbp_off, rbpH_off, // copy of rbp we will restore
128 128 return_off, returnH_off, // slot for return address
129 129 reg_save_size // size in compiler stack slots
130 130 };
131 131
132 132 public:
133 133 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words);
134 134 static void restore_live_registers(MacroAssembler* masm);
135 135
136 136 // Offsets into the register save area
137 137 // Used by deoptimization when it is managing result register
138 138 // values on its own
139 139
140 140 static int rax_offset_in_bytes(void) { return BytesPerInt * rax_off; }
141 141 static int rdx_offset_in_bytes(void) { return BytesPerInt * rdx_off; }
142 142 static int rbx_offset_in_bytes(void) { return BytesPerInt * rbx_off; }
143 143 static int xmm0_offset_in_bytes(void) { return BytesPerInt * xmm0_off; }
144 144 static int return_offset_in_bytes(void) { return BytesPerInt * return_off; }
145 145
146 146 // During deoptimization only the result registers need to be restored,
147 147 // all the other values have already been extracted.
148 148 static void restore_result_registers(MacroAssembler* masm);
149 149 };
150 150
151 151 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words) {
152 152
153 153 // Always make the frame size 16-byte aligned
154 154 int frame_size_in_bytes = round_to(additional_frame_words*wordSize +
155 155 reg_save_size*BytesPerInt, 16);
156 156 // OopMap frame size is in compiler stack slots (jint's) not bytes or words
157 157 int frame_size_in_slots = frame_size_in_bytes / BytesPerInt;
158 158 // The caller will allocate additional_frame_words
159 159 int additional_frame_slots = additional_frame_words*wordSize / BytesPerInt;
160 160 // CodeBlob frame size is in words.
161 161 int frame_size_in_words = frame_size_in_bytes / wordSize;
162 162 *total_frame_words = frame_size_in_words;
163 163
164 164 // Save registers, fpu state, and flags.
165 165 // We assume caller has already pushed the return address onto the
166 166 // stack, so rsp is 8-byte aligned here.
167 167 // We push rpb twice in this sequence because we want the real rbp
168 168 // to be under the return like a normal enter.
169 169
170 170 __ enter(); // rsp becomes 16-byte aligned here
171 171 __ push_CPU_state(); // Push a multiple of 16 bytes
172 172 if (frame::arg_reg_save_area_bytes != 0) {
173 173 // Allocate argument register save area
174 174 __ subptr(rsp, frame::arg_reg_save_area_bytes);
175 175 }
176 176
177 177 // Set an oopmap for the call site. This oopmap will map all
178 178 // oop-registers and debug-info registers as callee-saved. This
179 179 // will allow deoptimization at this safepoint to find all possible
180 180 // debug-info recordings, as well as let GC find all oops.
181 181
182 182 OopMapSet *oop_maps = new OopMapSet();
183 183 OopMap* map = new OopMap(frame_size_in_slots, 0);
184 184 map->set_callee_saved(VMRegImpl::stack2reg( rax_off + additional_frame_slots), rax->as_VMReg());
185 185 map->set_callee_saved(VMRegImpl::stack2reg( rcx_off + additional_frame_slots), rcx->as_VMReg());
186 186 map->set_callee_saved(VMRegImpl::stack2reg( rdx_off + additional_frame_slots), rdx->as_VMReg());
187 187 map->set_callee_saved(VMRegImpl::stack2reg( rbx_off + additional_frame_slots), rbx->as_VMReg());
188 188 // rbp location is known implicitly by the frame sender code, needs no oopmap
189 189 // and the location where rbp was saved by is ignored
190 190 map->set_callee_saved(VMRegImpl::stack2reg( rsi_off + additional_frame_slots), rsi->as_VMReg());
191 191 map->set_callee_saved(VMRegImpl::stack2reg( rdi_off + additional_frame_slots), rdi->as_VMReg());
192 192 map->set_callee_saved(VMRegImpl::stack2reg( r8_off + additional_frame_slots), r8->as_VMReg());
193 193 map->set_callee_saved(VMRegImpl::stack2reg( r9_off + additional_frame_slots), r9->as_VMReg());
194 194 map->set_callee_saved(VMRegImpl::stack2reg( r10_off + additional_frame_slots), r10->as_VMReg());
195 195 map->set_callee_saved(VMRegImpl::stack2reg( r11_off + additional_frame_slots), r11->as_VMReg());
196 196 map->set_callee_saved(VMRegImpl::stack2reg( r12_off + additional_frame_slots), r12->as_VMReg());
197 197 map->set_callee_saved(VMRegImpl::stack2reg( r13_off + additional_frame_slots), r13->as_VMReg());
198 198 map->set_callee_saved(VMRegImpl::stack2reg( r14_off + additional_frame_slots), r14->as_VMReg());
199 199 map->set_callee_saved(VMRegImpl::stack2reg( r15_off + additional_frame_slots), r15->as_VMReg());
200 200 map->set_callee_saved(VMRegImpl::stack2reg(xmm0_off + additional_frame_slots), xmm0->as_VMReg());
201 201 map->set_callee_saved(VMRegImpl::stack2reg(xmm1_off + additional_frame_slots), xmm1->as_VMReg());
202 202 map->set_callee_saved(VMRegImpl::stack2reg(xmm2_off + additional_frame_slots), xmm2->as_VMReg());
203 203 map->set_callee_saved(VMRegImpl::stack2reg(xmm3_off + additional_frame_slots), xmm3->as_VMReg());
204 204 map->set_callee_saved(VMRegImpl::stack2reg(xmm4_off + additional_frame_slots), xmm4->as_VMReg());
205 205 map->set_callee_saved(VMRegImpl::stack2reg(xmm5_off + additional_frame_slots), xmm5->as_VMReg());
206 206 map->set_callee_saved(VMRegImpl::stack2reg(xmm6_off + additional_frame_slots), xmm6->as_VMReg());
207 207 map->set_callee_saved(VMRegImpl::stack2reg(xmm7_off + additional_frame_slots), xmm7->as_VMReg());
208 208 map->set_callee_saved(VMRegImpl::stack2reg(xmm8_off + additional_frame_slots), xmm8->as_VMReg());
209 209 map->set_callee_saved(VMRegImpl::stack2reg(xmm9_off + additional_frame_slots), xmm9->as_VMReg());
210 210 map->set_callee_saved(VMRegImpl::stack2reg(xmm10_off + additional_frame_slots), xmm10->as_VMReg());
211 211 map->set_callee_saved(VMRegImpl::stack2reg(xmm11_off + additional_frame_slots), xmm11->as_VMReg());
212 212 map->set_callee_saved(VMRegImpl::stack2reg(xmm12_off + additional_frame_slots), xmm12->as_VMReg());
213 213 map->set_callee_saved(VMRegImpl::stack2reg(xmm13_off + additional_frame_slots), xmm13->as_VMReg());
214 214 map->set_callee_saved(VMRegImpl::stack2reg(xmm14_off + additional_frame_slots), xmm14->as_VMReg());
215 215 map->set_callee_saved(VMRegImpl::stack2reg(xmm15_off + additional_frame_slots), xmm15->as_VMReg());
216 216
217 217 // %%% These should all be a waste but we'll keep things as they were for now
218 218 if (true) {
219 219 map->set_callee_saved(VMRegImpl::stack2reg( raxH_off + additional_frame_slots),
220 220 rax->as_VMReg()->next());
221 221 map->set_callee_saved(VMRegImpl::stack2reg( rcxH_off + additional_frame_slots),
222 222 rcx->as_VMReg()->next());
223 223 map->set_callee_saved(VMRegImpl::stack2reg( rdxH_off + additional_frame_slots),
224 224 rdx->as_VMReg()->next());
225 225 map->set_callee_saved(VMRegImpl::stack2reg( rbxH_off + additional_frame_slots),
226 226 rbx->as_VMReg()->next());
227 227 // rbp location is known implicitly by the frame sender code, needs no oopmap
228 228 map->set_callee_saved(VMRegImpl::stack2reg( rsiH_off + additional_frame_slots),
229 229 rsi->as_VMReg()->next());
230 230 map->set_callee_saved(VMRegImpl::stack2reg( rdiH_off + additional_frame_slots),
231 231 rdi->as_VMReg()->next());
232 232 map->set_callee_saved(VMRegImpl::stack2reg( r8H_off + additional_frame_slots),
233 233 r8->as_VMReg()->next());
234 234 map->set_callee_saved(VMRegImpl::stack2reg( r9H_off + additional_frame_slots),
235 235 r9->as_VMReg()->next());
236 236 map->set_callee_saved(VMRegImpl::stack2reg( r10H_off + additional_frame_slots),
237 237 r10->as_VMReg()->next());
238 238 map->set_callee_saved(VMRegImpl::stack2reg( r11H_off + additional_frame_slots),
239 239 r11->as_VMReg()->next());
240 240 map->set_callee_saved(VMRegImpl::stack2reg( r12H_off + additional_frame_slots),
241 241 r12->as_VMReg()->next());
242 242 map->set_callee_saved(VMRegImpl::stack2reg( r13H_off + additional_frame_slots),
243 243 r13->as_VMReg()->next());
244 244 map->set_callee_saved(VMRegImpl::stack2reg( r14H_off + additional_frame_slots),
245 245 r14->as_VMReg()->next());
246 246 map->set_callee_saved(VMRegImpl::stack2reg( r15H_off + additional_frame_slots),
247 247 r15->as_VMReg()->next());
248 248 map->set_callee_saved(VMRegImpl::stack2reg(xmm0H_off + additional_frame_slots),
249 249 xmm0->as_VMReg()->next());
250 250 map->set_callee_saved(VMRegImpl::stack2reg(xmm1H_off + additional_frame_slots),
251 251 xmm1->as_VMReg()->next());
252 252 map->set_callee_saved(VMRegImpl::stack2reg(xmm2H_off + additional_frame_slots),
253 253 xmm2->as_VMReg()->next());
254 254 map->set_callee_saved(VMRegImpl::stack2reg(xmm3H_off + additional_frame_slots),
255 255 xmm3->as_VMReg()->next());
256 256 map->set_callee_saved(VMRegImpl::stack2reg(xmm4H_off + additional_frame_slots),
257 257 xmm4->as_VMReg()->next());
258 258 map->set_callee_saved(VMRegImpl::stack2reg(xmm5H_off + additional_frame_slots),
259 259 xmm5->as_VMReg()->next());
260 260 map->set_callee_saved(VMRegImpl::stack2reg(xmm6H_off + additional_frame_slots),
261 261 xmm6->as_VMReg()->next());
262 262 map->set_callee_saved(VMRegImpl::stack2reg(xmm7H_off + additional_frame_slots),
263 263 xmm7->as_VMReg()->next());
264 264 map->set_callee_saved(VMRegImpl::stack2reg(xmm8H_off + additional_frame_slots),
265 265 xmm8->as_VMReg()->next());
266 266 map->set_callee_saved(VMRegImpl::stack2reg(xmm9H_off + additional_frame_slots),
267 267 xmm9->as_VMReg()->next());
268 268 map->set_callee_saved(VMRegImpl::stack2reg(xmm10H_off + additional_frame_slots),
269 269 xmm10->as_VMReg()->next());
270 270 map->set_callee_saved(VMRegImpl::stack2reg(xmm11H_off + additional_frame_slots),
271 271 xmm11->as_VMReg()->next());
272 272 map->set_callee_saved(VMRegImpl::stack2reg(xmm12H_off + additional_frame_slots),
273 273 xmm12->as_VMReg()->next());
274 274 map->set_callee_saved(VMRegImpl::stack2reg(xmm13H_off + additional_frame_slots),
275 275 xmm13->as_VMReg()->next());
276 276 map->set_callee_saved(VMRegImpl::stack2reg(xmm14H_off + additional_frame_slots),
277 277 xmm14->as_VMReg()->next());
278 278 map->set_callee_saved(VMRegImpl::stack2reg(xmm15H_off + additional_frame_slots),
279 279 xmm15->as_VMReg()->next());
280 280 }
281 281
282 282 return map;
283 283 }
284 284
285 285 void RegisterSaver::restore_live_registers(MacroAssembler* masm) {
286 286 if (frame::arg_reg_save_area_bytes != 0) {
287 287 // Pop arg register save area
288 288 __ addptr(rsp, frame::arg_reg_save_area_bytes);
289 289 }
290 290 // Recover CPU state
291 291 __ pop_CPU_state();
292 292 // Get the rbp described implicitly by the calling convention (no oopMap)
293 293 __ pop(rbp);
294 294 }
295 295
296 296 void RegisterSaver::restore_result_registers(MacroAssembler* masm) {
297 297
298 298 // Just restore result register. Only used by deoptimization. By
299 299 // now any callee save register that needs to be restored to a c2
300 300 // caller of the deoptee has been extracted into the vframeArray
301 301 // and will be stuffed into the c2i adapter we create for later
302 302 // restoration so only result registers need to be restored here.
303 303
304 304 // Restore fp result register
305 305 __ movdbl(xmm0, Address(rsp, xmm0_offset_in_bytes()));
306 306 // Restore integer result register
307 307 __ movptr(rax, Address(rsp, rax_offset_in_bytes()));
308 308 __ movptr(rdx, Address(rsp, rdx_offset_in_bytes()));
309 309
310 310 // Pop all of the register save are off the stack except the return address
311 311 __ addptr(rsp, return_offset_in_bytes());
312 312 }
313 313
314 314 // The java_calling_convention describes stack locations as ideal slots on
315 315 // a frame with no abi restrictions. Since we must observe abi restrictions
316 316 // (like the placement of the register window) the slots must be biased by
317 317 // the following value.
318 318 static int reg2offset_in(VMReg r) {
319 319 // Account for saved rbp and return address
320 320 // This should really be in_preserve_stack_slots
321 321 return (r->reg2stack() + 4) * VMRegImpl::stack_slot_size;
322 322 }
323 323
324 324 static int reg2offset_out(VMReg r) {
325 325 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
326 326 }
327 327
328 328 // ---------------------------------------------------------------------------
329 329 // Read the array of BasicTypes from a signature, and compute where the
330 330 // arguments should go. Values in the VMRegPair regs array refer to 4-byte
331 331 // quantities. Values less than VMRegImpl::stack0 are registers, those above
332 332 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer
333 333 // as framesizes are fixed.
334 334 // VMRegImpl::stack0 refers to the first slot 0(sp).
335 335 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register
336 336 // up to RegisterImpl::number_of_registers) are the 64-bit
337 337 // integer registers.
338 338
339 339 // Note: the INPUTS in sig_bt are in units of Java argument words, which are
340 340 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit
341 341 // units regardless of build. Of course for i486 there is no 64 bit build
342 342
343 343 // The Java calling convention is a "shifted" version of the C ABI.
344 344 // By skipping the first C ABI register we can call non-static jni methods
345 345 // with small numbers of arguments without having to shuffle the arguments
346 346 // at all. Since we control the java ABI we ought to at least get some
347 347 // advantage out of it.
348 348
349 349 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
350 350 VMRegPair *regs,
351 351 int total_args_passed,
352 352 int is_outgoing) {
353 353
354 354 // Create the mapping between argument positions and
355 355 // registers.
356 356 static const Register INT_ArgReg[Argument::n_int_register_parameters_j] = {
357 357 j_rarg0, j_rarg1, j_rarg2, j_rarg3, j_rarg4, j_rarg5
358 358 };
359 359 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_j] = {
360 360 j_farg0, j_farg1, j_farg2, j_farg3,
361 361 j_farg4, j_farg5, j_farg6, j_farg7
362 362 };
363 363
364 364
365 365 uint int_args = 0;
366 366 uint fp_args = 0;
367 367 uint stk_args = 0; // inc by 2 each time
368 368
369 369 for (int i = 0; i < total_args_passed; i++) {
370 370 switch (sig_bt[i]) {
371 371 case T_BOOLEAN:
372 372 case T_CHAR:
373 373 case T_BYTE:
374 374 case T_SHORT:
375 375 case T_INT:
376 376 if (int_args < Argument::n_int_register_parameters_j) {
377 377 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
378 378 } else {
379 379 regs[i].set1(VMRegImpl::stack2reg(stk_args));
380 380 stk_args += 2;
381 381 }
382 382 break;
383 383 case T_VOID:
384 384 // halves of T_LONG or T_DOUBLE
385 385 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
386 386 regs[i].set_bad();
387 387 break;
388 388 case T_LONG:
389 389 assert(sig_bt[i + 1] == T_VOID, "expecting half");
390 390 // fall through
391 391 case T_OBJECT:
392 392 case T_ARRAY:
393 393 case T_ADDRESS:
394 394 if (int_args < Argument::n_int_register_parameters_j) {
395 395 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
396 396 } else {
397 397 regs[i].set2(VMRegImpl::stack2reg(stk_args));
398 398 stk_args += 2;
399 399 }
400 400 break;
401 401 case T_FLOAT:
402 402 if (fp_args < Argument::n_float_register_parameters_j) {
403 403 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg());
404 404 } else {
405 405 regs[i].set1(VMRegImpl::stack2reg(stk_args));
406 406 stk_args += 2;
407 407 }
408 408 break;
409 409 case T_DOUBLE:
410 410 assert(sig_bt[i + 1] == T_VOID, "expecting half");
411 411 if (fp_args < Argument::n_float_register_parameters_j) {
412 412 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg());
413 413 } else {
414 414 regs[i].set2(VMRegImpl::stack2reg(stk_args));
415 415 stk_args += 2;
416 416 }
417 417 break;
418 418 default:
419 419 ShouldNotReachHere();
420 420 break;
421 421 }
422 422 }
423 423
424 424 return round_to(stk_args, 2);
425 425 }
426 426
427 427 // Patch the callers callsite with entry to compiled code if it exists.
428 428 static void patch_callers_callsite(MacroAssembler *masm) {
429 429 Label L;
430 430 __ verify_oop(rbx);
431 431 __ cmpptr(Address(rbx, in_bytes(methodOopDesc::code_offset())), (int32_t)NULL_WORD);
432 432 __ jcc(Assembler::equal, L);
433 433
434 434 // Save the current stack pointer
435 435 __ mov(r13, rsp);
436 436 // Schedule the branch target address early.
437 437 // Call into the VM to patch the caller, then jump to compiled callee
438 438 // rax isn't live so capture return address while we easily can
439 439 __ movptr(rax, Address(rsp, 0));
440 440
441 441 // align stack so push_CPU_state doesn't fault
442 442 __ andptr(rsp, -(StackAlignmentInBytes));
443 443 __ push_CPU_state();
444 444
445 445
446 446 __ verify_oop(rbx);
447 447 // VM needs caller's callsite
448 448 // VM needs target method
449 449 // This needs to be a long call since we will relocate this adapter to
450 450 // the codeBuffer and it may not reach
451 451
452 452 // Allocate argument register save area
453 453 if (frame::arg_reg_save_area_bytes != 0) {
454 454 __ subptr(rsp, frame::arg_reg_save_area_bytes);
455 455 }
456 456 __ mov(c_rarg0, rbx);
457 457 __ mov(c_rarg1, rax);
458 458 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)));
459 459
460 460 // De-allocate argument register save area
461 461 if (frame::arg_reg_save_area_bytes != 0) {
462 462 __ addptr(rsp, frame::arg_reg_save_area_bytes);
463 463 }
464 464
465 465 __ pop_CPU_state();
466 466 // restore sp
467 467 __ mov(rsp, r13);
468 468 __ bind(L);
469 469 }
470 470
471 471
472 472 static void gen_c2i_adapter(MacroAssembler *masm,
473 473 int total_args_passed,
474 474 int comp_args_on_stack,
475 475 const BasicType *sig_bt,
476 476 const VMRegPair *regs,
477 477 Label& skip_fixup) {
478 478 // Before we get into the guts of the C2I adapter, see if we should be here
479 479 // at all. We've come from compiled code and are attempting to jump to the
480 480 // interpreter, which means the caller made a static call to get here
481 481 // (vcalls always get a compiled target if there is one). Check for a
482 482 // compiled target. If there is one, we need to patch the caller's call.
483 483 patch_callers_callsite(masm);
484 484
485 485 __ bind(skip_fixup);
486 486
487 487 // Since all args are passed on the stack, total_args_passed *
488 488 // Interpreter::stackElementSize is the space we need. Plus 1 because
489 489 // we also account for the return address location since
490 490 // we store it first rather than hold it in rax across all the shuffling
491 491
492 492 int extraspace = (total_args_passed * Interpreter::stackElementSize) + wordSize;
493 493
494 494 // stack is aligned, keep it that way
495 495 extraspace = round_to(extraspace, 2*wordSize);
496 496
497 497 // Get return address
498 498 __ pop(rax);
499 499
500 500 // set senderSP value
501 501 __ mov(r13, rsp);
502 502
503 503 __ subptr(rsp, extraspace);
504 504
505 505 // Store the return address in the expected location
506 506 __ movptr(Address(rsp, 0), rax);
507 507
508 508 // Now write the args into the outgoing interpreter space
509 509 for (int i = 0; i < total_args_passed; i++) {
510 510 if (sig_bt[i] == T_VOID) {
511 511 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
512 512 continue;
513 513 }
514 514
515 515 // offset to start parameters
516 516 int st_off = (total_args_passed - i) * Interpreter::stackElementSize;
517 517 int next_off = st_off - Interpreter::stackElementSize;
518 518
519 519 // Say 4 args:
520 520 // i st_off
521 521 // 0 32 T_LONG
522 522 // 1 24 T_VOID
523 523 // 2 16 T_OBJECT
524 524 // 3 8 T_BOOL
525 525 // - 0 return address
526 526 //
527 527 // However to make thing extra confusing. Because we can fit a long/double in
528 528 // a single slot on a 64 bt vm and it would be silly to break them up, the interpreter
529 529 // leaves one slot empty and only stores to a single slot. In this case the
530 530 // slot that is occupied is the T_VOID slot. See I said it was confusing.
531 531
532 532 VMReg r_1 = regs[i].first();
533 533 VMReg r_2 = regs[i].second();
534 534 if (!r_1->is_valid()) {
535 535 assert(!r_2->is_valid(), "");
536 536 continue;
537 537 }
538 538 if (r_1->is_stack()) {
539 539 // memory to memory use rax
540 540 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace;
541 541 if (!r_2->is_valid()) {
542 542 // sign extend??
543 543 __ movl(rax, Address(rsp, ld_off));
544 544 __ movptr(Address(rsp, st_off), rax);
545 545
546 546 } else {
547 547
548 548 __ movq(rax, Address(rsp, ld_off));
549 549
550 550 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
551 551 // T_DOUBLE and T_LONG use two slots in the interpreter
552 552 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
553 553 // ld_off == LSW, ld_off+wordSize == MSW
554 554 // st_off == MSW, next_off == LSW
555 555 __ movq(Address(rsp, next_off), rax);
556 556 #ifdef ASSERT
557 557 // Overwrite the unused slot with known junk
558 558 __ mov64(rax, CONST64(0xdeadffffdeadaaaa));
559 559 __ movptr(Address(rsp, st_off), rax);
560 560 #endif /* ASSERT */
561 561 } else {
562 562 __ movq(Address(rsp, st_off), rax);
563 563 }
564 564 }
565 565 } else if (r_1->is_Register()) {
566 566 Register r = r_1->as_Register();
567 567 if (!r_2->is_valid()) {
568 568 // must be only an int (or less ) so move only 32bits to slot
569 569 // why not sign extend??
570 570 __ movl(Address(rsp, st_off), r);
571 571 } else {
572 572 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
573 573 // T_DOUBLE and T_LONG use two slots in the interpreter
574 574 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
575 575 // long/double in gpr
576 576 #ifdef ASSERT
577 577 // Overwrite the unused slot with known junk
578 578 __ mov64(rax, CONST64(0xdeadffffdeadaaab));
579 579 __ movptr(Address(rsp, st_off), rax);
580 580 #endif /* ASSERT */
581 581 __ movq(Address(rsp, next_off), r);
582 582 } else {
583 583 __ movptr(Address(rsp, st_off), r);
584 584 }
585 585 }
586 586 } else {
587 587 assert(r_1->is_XMMRegister(), "");
588 588 if (!r_2->is_valid()) {
589 589 // only a float use just part of the slot
590 590 __ movflt(Address(rsp, st_off), r_1->as_XMMRegister());
591 591 } else {
592 592 #ifdef ASSERT
593 593 // Overwrite the unused slot with known junk
594 594 __ mov64(rax, CONST64(0xdeadffffdeadaaac));
595 595 __ movptr(Address(rsp, st_off), rax);
596 596 #endif /* ASSERT */
597 597 __ movdbl(Address(rsp, next_off), r_1->as_XMMRegister());
598 598 }
599 599 }
600 600 }
601 601
602 602 // Schedule the branch target address early.
603 603 __ movptr(rcx, Address(rbx, in_bytes(methodOopDesc::interpreter_entry_offset())));
604 604 __ jmp(rcx);
605 605 }
606 606
607 607 static void gen_i2c_adapter(MacroAssembler *masm,
608 608 int total_args_passed,
609 609 int comp_args_on_stack,
610 610 const BasicType *sig_bt,
611 611 const VMRegPair *regs) {
612 612
613 613 // Note: r13 contains the senderSP on entry. We must preserve it since
614 614 // we may do a i2c -> c2i transition if we lose a race where compiled
615 615 // code goes non-entrant while we get args ready.
616 616 // In addition we use r13 to locate all the interpreter args as
617 617 // we must align the stack to 16 bytes on an i2c entry else we
618 618 // lose alignment we expect in all compiled code and register
619 619 // save code can segv when fxsave instructions find improperly
620 620 // aligned stack pointer.
621 621
622 622 // Pick up the return address
623 623 __ movptr(rax, Address(rsp, 0));
624 624
625 625 // Must preserve original SP for loading incoming arguments because
626 626 // we need to align the outgoing SP for compiled code.
627 627 __ movptr(r11, rsp);
628 628
629 629 // Cut-out for having no stack args. Since up to 2 int/oop args are passed
630 630 // in registers, we will occasionally have no stack args.
631 631 int comp_words_on_stack = 0;
632 632 if (comp_args_on_stack) {
633 633 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in
634 634 // registers are below. By subtracting stack0, we either get a negative
635 635 // number (all values in registers) or the maximum stack slot accessed.
636 636
637 637 // Convert 4-byte c2 stack slots to words.
638 638 comp_words_on_stack = round_to(comp_args_on_stack*VMRegImpl::stack_slot_size, wordSize)>>LogBytesPerWord;
639 639 // Round up to miminum stack alignment, in wordSize
640 640 comp_words_on_stack = round_to(comp_words_on_stack, 2);
641 641 __ subptr(rsp, comp_words_on_stack * wordSize);
642 642 }
643 643
644 644
645 645 // Ensure compiled code always sees stack at proper alignment
646 646 __ andptr(rsp, -16);
647 647
648 648 // push the return address and misalign the stack that youngest frame always sees
649 649 // as far as the placement of the call instruction
650 650 __ push(rax);
651 651
652 652 // Put saved SP in another register
653 653 const Register saved_sp = rax;
654 654 __ movptr(saved_sp, r11);
655 655
656 656 // Will jump to the compiled code just as if compiled code was doing it.
657 657 // Pre-load the register-jump target early, to schedule it better.
658 658 __ movptr(r11, Address(rbx, in_bytes(methodOopDesc::from_compiled_offset())));
659 659
660 660 // Now generate the shuffle code. Pick up all register args and move the
661 661 // rest through the floating point stack top.
662 662 for (int i = 0; i < total_args_passed; i++) {
663 663 if (sig_bt[i] == T_VOID) {
664 664 // Longs and doubles are passed in native word order, but misaligned
665 665 // in the 32-bit build.
666 666 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
667 667 continue;
668 668 }
669 669
670 670 // Pick up 0, 1 or 2 words from SP+offset.
671 671
672 672 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(),
673 673 "scrambled load targets?");
674 674 // Load in argument order going down.
675 675 int ld_off = (total_args_passed - i)*Interpreter::stackElementSize;
676 676 // Point to interpreter value (vs. tag)
677 677 int next_off = ld_off - Interpreter::stackElementSize;
678 678 //
679 679 //
680 680 //
681 681 VMReg r_1 = regs[i].first();
682 682 VMReg r_2 = regs[i].second();
683 683 if (!r_1->is_valid()) {
684 684 assert(!r_2->is_valid(), "");
685 685 continue;
686 686 }
687 687 if (r_1->is_stack()) {
688 688 // Convert stack slot to an SP offset (+ wordSize to account for return address )
689 689 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize;
690 690
691 691 // We can use r13 as a temp here because compiled code doesn't need r13 as an input
692 692 // and if we end up going thru a c2i because of a miss a reasonable value of r13
693 693 // will be generated.
694 694 if (!r_2->is_valid()) {
695 695 // sign extend???
696 696 __ movl(r13, Address(saved_sp, ld_off));
697 697 __ movptr(Address(rsp, st_off), r13);
698 698 } else {
699 699 //
700 700 // We are using two optoregs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
701 701 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
702 702 // So we must adjust where to pick up the data to match the interpreter.
703 703 //
704 704 // Interpreter local[n] == MSW, local[n+1] == LSW however locals
705 705 // are accessed as negative so LSW is at LOW address
706 706
707 707 // ld_off is MSW so get LSW
708 708 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
709 709 next_off : ld_off;
710 710 __ movq(r13, Address(saved_sp, offset));
711 711 // st_off is LSW (i.e. reg.first())
712 712 __ movq(Address(rsp, st_off), r13);
713 713 }
714 714 } else if (r_1->is_Register()) { // Register argument
715 715 Register r = r_1->as_Register();
716 716 assert(r != rax, "must be different");
717 717 if (r_2->is_valid()) {
718 718 //
719 719 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
720 720 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
721 721 // So we must adjust where to pick up the data to match the interpreter.
722 722
723 723 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
724 724 next_off : ld_off;
725 725
726 726 // this can be a misaligned move
727 727 __ movq(r, Address(saved_sp, offset));
728 728 } else {
729 729 // sign extend and use a full word?
730 730 __ movl(r, Address(saved_sp, ld_off));
731 731 }
732 732 } else {
733 733 if (!r_2->is_valid()) {
734 734 __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off));
735 735 } else {
736 736 __ movdbl(r_1->as_XMMRegister(), Address(saved_sp, next_off));
737 737 }
738 738 }
739 739 }
740 740
741 741 // 6243940 We might end up in handle_wrong_method if
742 742 // the callee is deoptimized as we race thru here. If that
743 743 // happens we don't want to take a safepoint because the
744 744 // caller frame will look interpreted and arguments are now
745 745 // "compiled" so it is much better to make this transition
746 746 // invisible to the stack walking code. Unfortunately if
747 747 // we try and find the callee by normal means a safepoint
748 748 // is possible. So we stash the desired callee in the thread
749 749 // and the vm will find there should this case occur.
750 750
751 751 __ movptr(Address(r15_thread, JavaThread::callee_target_offset()), rbx);
752 752
753 753 // put methodOop where a c2i would expect should we end up there
754 754 // only needed becaus eof c2 resolve stubs return methodOop as a result in
755 755 // rax
756 756 __ mov(rax, rbx);
757 757 __ jmp(r11);
758 758 }
759 759
760 760 // ---------------------------------------------------------------
761 761 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
762 762 int total_args_passed,
763 763 int comp_args_on_stack,
764 764 const BasicType *sig_bt,
765 765 const VMRegPair *regs,
766 766 AdapterFingerPrint* fingerprint) {
767 767 address i2c_entry = __ pc();
768 768
769 769 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs);
770 770
771 771 // -------------------------------------------------------------------------
772 772 // Generate a C2I adapter. On entry we know rbx holds the methodOop during calls
773 773 // to the interpreter. The args start out packed in the compiled layout. They
774 774 // need to be unpacked into the interpreter layout. This will almost always
775 775 // require some stack space. We grow the current (compiled) stack, then repack
776 776 // the args. We finally end in a jump to the generic interpreter entry point.
777 777 // On exit from the interpreter, the interpreter will restore our SP (lest the
778 778 // compiled code, which relys solely on SP and not RBP, get sick).
779 779
780 780 address c2i_unverified_entry = __ pc();
781 781 Label skip_fixup;
782 782 Label ok;
783 783
784 784 Register holder = rax;
785 785 Register receiver = j_rarg0;
786 786 Register temp = rbx;
787 787
788 788 {
789 789 __ verify_oop(holder);
790 790 __ load_klass(temp, receiver);
791 791 __ verify_oop(temp);
792 792
793 793 __ cmpptr(temp, Address(holder, compiledICHolderOopDesc::holder_klass_offset()));
794 794 __ movptr(rbx, Address(holder, compiledICHolderOopDesc::holder_method_offset()));
795 795 __ jcc(Assembler::equal, ok);
796 796 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
797 797
798 798 __ bind(ok);
799 799 // Method might have been compiled since the call site was patched to
800 800 // interpreted if that is the case treat it as a miss so we can get
801 801 // the call site corrected.
802 802 __ cmpptr(Address(rbx, in_bytes(methodOopDesc::code_offset())), (int32_t)NULL_WORD);
803 803 __ jcc(Assembler::equal, skip_fixup);
804 804 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
805 805 }
806 806
807 807 address c2i_entry = __ pc();
808 808
809 809 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup);
810 810
811 811 __ flush();
812 812 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry);
813 813 }
814 814
815 815 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
816 816 VMRegPair *regs,
817 817 int total_args_passed) {
818 818 // We return the amount of VMRegImpl stack slots we need to reserve for all
819 819 // the arguments NOT counting out_preserve_stack_slots.
820 820
821 821 // NOTE: These arrays will have to change when c1 is ported
822 822 #ifdef _WIN64
823 823 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = {
824 824 c_rarg0, c_rarg1, c_rarg2, c_rarg3
825 825 };
826 826 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = {
827 827 c_farg0, c_farg1, c_farg2, c_farg3
828 828 };
829 829 #else
830 830 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = {
831 831 c_rarg0, c_rarg1, c_rarg2, c_rarg3, c_rarg4, c_rarg5
832 832 };
833 833 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = {
834 834 c_farg0, c_farg1, c_farg2, c_farg3,
835 835 c_farg4, c_farg5, c_farg6, c_farg7
836 836 };
837 837 #endif // _WIN64
838 838
839 839
840 840 uint int_args = 0;
841 841 uint fp_args = 0;
842 842 uint stk_args = 0; // inc by 2 each time
843 843
844 844 for (int i = 0; i < total_args_passed; i++) {
845 845 switch (sig_bt[i]) {
846 846 case T_BOOLEAN:
847 847 case T_CHAR:
848 848 case T_BYTE:
849 849 case T_SHORT:
850 850 case T_INT:
851 851 if (int_args < Argument::n_int_register_parameters_c) {
852 852 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
853 853 #ifdef _WIN64
854 854 fp_args++;
855 855 // Allocate slots for callee to stuff register args the stack.
856 856 stk_args += 2;
857 857 #endif
858 858 } else {
859 859 regs[i].set1(VMRegImpl::stack2reg(stk_args));
860 860 stk_args += 2;
861 861 }
862 862 break;
863 863 case T_LONG:
864 864 assert(sig_bt[i + 1] == T_VOID, "expecting half");
865 865 // fall through
866 866 case T_OBJECT:
867 867 case T_ARRAY:
868 868 case T_ADDRESS:
869 869 if (int_args < Argument::n_int_register_parameters_c) {
870 870 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
871 871 #ifdef _WIN64
872 872 fp_args++;
873 873 stk_args += 2;
874 874 #endif
875 875 } else {
876 876 regs[i].set2(VMRegImpl::stack2reg(stk_args));
877 877 stk_args += 2;
878 878 }
879 879 break;
880 880 case T_FLOAT:
881 881 if (fp_args < Argument::n_float_register_parameters_c) {
882 882 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg());
883 883 #ifdef _WIN64
884 884 int_args++;
885 885 // Allocate slots for callee to stuff register args the stack.
886 886 stk_args += 2;
887 887 #endif
888 888 } else {
889 889 regs[i].set1(VMRegImpl::stack2reg(stk_args));
890 890 stk_args += 2;
891 891 }
892 892 break;
893 893 case T_DOUBLE:
894 894 assert(sig_bt[i + 1] == T_VOID, "expecting half");
895 895 if (fp_args < Argument::n_float_register_parameters_c) {
896 896 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg());
897 897 #ifdef _WIN64
898 898 int_args++;
899 899 // Allocate slots for callee to stuff register args the stack.
900 900 stk_args += 2;
901 901 #endif
902 902 } else {
903 903 regs[i].set2(VMRegImpl::stack2reg(stk_args));
904 904 stk_args += 2;
905 905 }
906 906 break;
907 907 case T_VOID: // Halves of longs and doubles
908 908 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
909 909 regs[i].set_bad();
910 910 break;
911 911 default:
912 912 ShouldNotReachHere();
913 913 break;
914 914 }
915 915 }
916 916 #ifdef _WIN64
917 917 // windows abi requires that we always allocate enough stack space
918 918 // for 4 64bit registers to be stored down.
919 919 if (stk_args < 8) {
920 920 stk_args = 8;
921 921 }
922 922 #endif // _WIN64
923 923
924 924 return stk_args;
925 925 }
926 926
927 927 // On 64 bit we will store integer like items to the stack as
928 928 // 64 bits items (sparc abi) even though java would only store
929 929 // 32bits for a parameter. On 32bit it will simply be 32 bits
930 930 // So this routine will do 32->32 on 32bit and 32->64 on 64bit
931 931 static void move32_64(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
932 932 if (src.first()->is_stack()) {
933 933 if (dst.first()->is_stack()) {
934 934 // stack to stack
935 935 __ movslq(rax, Address(rbp, reg2offset_in(src.first())));
936 936 __ movq(Address(rsp, reg2offset_out(dst.first())), rax);
937 937 } else {
938 938 // stack to reg
939 939 __ movslq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first())));
940 940 }
941 941 } else if (dst.first()->is_stack()) {
942 942 // reg to stack
943 943 // Do we really have to sign extend???
944 944 // __ movslq(src.first()->as_Register(), src.first()->as_Register());
945 945 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
946 946 } else {
947 947 // Do we really have to sign extend???
948 948 // __ movslq(dst.first()->as_Register(), src.first()->as_Register());
949 949 if (dst.first() != src.first()) {
950 950 __ movq(dst.first()->as_Register(), src.first()->as_Register());
951 951 }
952 952 }
953 953 }
954 954
955 955
956 956 // An oop arg. Must pass a handle not the oop itself
957 957 static void object_move(MacroAssembler* masm,
958 958 OopMap* map,
959 959 int oop_handle_offset,
960 960 int framesize_in_slots,
961 961 VMRegPair src,
962 962 VMRegPair dst,
963 963 bool is_receiver,
964 964 int* receiver_offset) {
965 965
966 966 // must pass a handle. First figure out the location we use as a handle
967 967
968 968 Register rHandle = dst.first()->is_stack() ? rax : dst.first()->as_Register();
969 969
970 970 // See if oop is NULL if it is we need no handle
971 971
972 972 if (src.first()->is_stack()) {
973 973
974 974 // Oop is already on the stack as an argument
975 975 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
976 976 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots));
977 977 if (is_receiver) {
978 978 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size;
979 979 }
980 980
981 981 __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD);
982 982 __ lea(rHandle, Address(rbp, reg2offset_in(src.first())));
983 983 // conditionally move a NULL
984 984 __ cmovptr(Assembler::equal, rHandle, Address(rbp, reg2offset_in(src.first())));
985 985 } else {
986 986
987 987 // Oop is in an a register we must store it to the space we reserve
988 988 // on the stack for oop_handles and pass a handle if oop is non-NULL
989 989
990 990 const Register rOop = src.first()->as_Register();
991 991 int oop_slot;
992 992 if (rOop == j_rarg0)
993 993 oop_slot = 0;
994 994 else if (rOop == j_rarg1)
995 995 oop_slot = 1;
996 996 else if (rOop == j_rarg2)
997 997 oop_slot = 2;
998 998 else if (rOop == j_rarg3)
999 999 oop_slot = 3;
1000 1000 else if (rOop == j_rarg4)
1001 1001 oop_slot = 4;
1002 1002 else {
1003 1003 assert(rOop == j_rarg5, "wrong register");
1004 1004 oop_slot = 5;
1005 1005 }
1006 1006
1007 1007 oop_slot = oop_slot * VMRegImpl::slots_per_word + oop_handle_offset;
1008 1008 int offset = oop_slot*VMRegImpl::stack_slot_size;
1009 1009
1010 1010 map->set_oop(VMRegImpl::stack2reg(oop_slot));
1011 1011 // Store oop in handle area, may be NULL
1012 1012 __ movptr(Address(rsp, offset), rOop);
1013 1013 if (is_receiver) {
1014 1014 *receiver_offset = offset;
1015 1015 }
1016 1016
1017 1017 __ cmpptr(rOop, (int32_t)NULL_WORD);
1018 1018 __ lea(rHandle, Address(rsp, offset));
1019 1019 // conditionally move a NULL from the handle area where it was just stored
1020 1020 __ cmovptr(Assembler::equal, rHandle, Address(rsp, offset));
1021 1021 }
1022 1022
1023 1023 // If arg is on the stack then place it otherwise it is already in correct reg.
1024 1024 if (dst.first()->is_stack()) {
1025 1025 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
1026 1026 }
1027 1027 }
1028 1028
1029 1029 // A float arg may have to do float reg int reg conversion
1030 1030 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1031 1031 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move");
1032 1032
1033 1033 // The calling conventions assures us that each VMregpair is either
1034 1034 // all really one physical register or adjacent stack slots.
1035 1035 // This greatly simplifies the cases here compared to sparc.
1036 1036
1037 1037 if (src.first()->is_stack()) {
1038 1038 if (dst.first()->is_stack()) {
1039 1039 __ movl(rax, Address(rbp, reg2offset_in(src.first())));
1040 1040 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1041 1041 } else {
1042 1042 // stack to reg
1043 1043 assert(dst.first()->is_XMMRegister(), "only expect xmm registers as parameters");
1044 1044 __ movflt(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_in(src.first())));
1045 1045 }
1046 1046 } else if (dst.first()->is_stack()) {
1047 1047 // reg to stack
1048 1048 assert(src.first()->is_XMMRegister(), "only expect xmm registers as parameters");
1049 1049 __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1050 1050 } else {
1051 1051 // reg to reg
1052 1052 // In theory these overlap but the ordering is such that this is likely a nop
1053 1053 if ( src.first() != dst.first()) {
1054 1054 __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister());
1055 1055 }
1056 1056 }
1057 1057 }
1058 1058
1059 1059 // A long move
1060 1060 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1061 1061
1062 1062 // The calling conventions assures us that each VMregpair is either
1063 1063 // all really one physical register or adjacent stack slots.
1064 1064 // This greatly simplifies the cases here compared to sparc.
1065 1065
1066 1066 if (src.is_single_phys_reg() ) {
1067 1067 if (dst.is_single_phys_reg()) {
1068 1068 if (dst.first() != src.first()) {
1069 1069 __ mov(dst.first()->as_Register(), src.first()->as_Register());
1070 1070 }
1071 1071 } else {
1072 1072 assert(dst.is_single_reg(), "not a stack pair");
1073 1073 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
1074 1074 }
1075 1075 } else if (dst.is_single_phys_reg()) {
1076 1076 assert(src.is_single_reg(), "not a stack pair");
1077 1077 __ movq(dst.first()->as_Register(), Address(rbp, reg2offset_out(src.first())));
1078 1078 } else {
1079 1079 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs");
1080 1080 __ movq(rax, Address(rbp, reg2offset_in(src.first())));
1081 1081 __ movq(Address(rsp, reg2offset_out(dst.first())), rax);
1082 1082 }
1083 1083 }
1084 1084
1085 1085 // A double move
1086 1086 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1087 1087
1088 1088 // The calling conventions assures us that each VMregpair is either
1089 1089 // all really one physical register or adjacent stack slots.
1090 1090 // This greatly simplifies the cases here compared to sparc.
1091 1091
1092 1092 if (src.is_single_phys_reg() ) {
1093 1093 if (dst.is_single_phys_reg()) {
1094 1094 // In theory these overlap but the ordering is such that this is likely a nop
1095 1095 if ( src.first() != dst.first()) {
1096 1096 __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister());
1097 1097 }
1098 1098 } else {
1099 1099 assert(dst.is_single_reg(), "not a stack pair");
1100 1100 __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1101 1101 }
1102 1102 } else if (dst.is_single_phys_reg()) {
1103 1103 assert(src.is_single_reg(), "not a stack pair");
1104 1104 __ movdbl(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_out(src.first())));
1105 1105 } else {
1106 1106 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs");
1107 1107 __ movq(rax, Address(rbp, reg2offset_in(src.first())));
1108 1108 __ movq(Address(rsp, reg2offset_out(dst.first())), rax);
1109 1109 }
1110 1110 }
1111 1111
1112 1112
1113 1113 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1114 1114 // We always ignore the frame_slots arg and just use the space just below frame pointer
1115 1115 // which by this time is free to use
1116 1116 switch (ret_type) {
1117 1117 case T_FLOAT:
1118 1118 __ movflt(Address(rbp, -wordSize), xmm0);
1119 1119 break;
1120 1120 case T_DOUBLE:
1121 1121 __ movdbl(Address(rbp, -wordSize), xmm0);
1122 1122 break;
1123 1123 case T_VOID: break;
1124 1124 default: {
1125 1125 __ movptr(Address(rbp, -wordSize), rax);
1126 1126 }
1127 1127 }
1128 1128 }
1129 1129
1130 1130 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1131 1131 // We always ignore the frame_slots arg and just use the space just below frame pointer
1132 1132 // which by this time is free to use
1133 1133 switch (ret_type) {
1134 1134 case T_FLOAT:
1135 1135 __ movflt(xmm0, Address(rbp, -wordSize));
1136 1136 break;
1137 1137 case T_DOUBLE:
1138 1138 __ movdbl(xmm0, Address(rbp, -wordSize));
1139 1139 break;
1140 1140 case T_VOID: break;
1141 1141 default: {
1142 1142 __ movptr(rax, Address(rbp, -wordSize));
1143 1143 }
1144 1144 }
1145 1145 }
1146 1146
1147 1147 static void save_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) {
1148 1148 for ( int i = first_arg ; i < arg_count ; i++ ) {
1149 1149 if (args[i].first()->is_Register()) {
1150 1150 __ push(args[i].first()->as_Register());
1151 1151 } else if (args[i].first()->is_XMMRegister()) {
1152 1152 __ subptr(rsp, 2*wordSize);
1153 1153 __ movdbl(Address(rsp, 0), args[i].first()->as_XMMRegister());
1154 1154 }
1155 1155 }
1156 1156 }
1157 1157
1158 1158 static void restore_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) {
1159 1159 for ( int i = arg_count - 1 ; i >= first_arg ; i-- ) {
1160 1160 if (args[i].first()->is_Register()) {
1161 1161 __ pop(args[i].first()->as_Register());
1162 1162 } else if (args[i].first()->is_XMMRegister()) {
1163 1163 __ movdbl(args[i].first()->as_XMMRegister(), Address(rsp, 0));
1164 1164 __ addptr(rsp, 2*wordSize);
1165 1165 }
1166 1166 }
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1167 1167 }
1168 1168
1169 1169 // ---------------------------------------------------------------------------
1170 1170 // Generate a native wrapper for a given method. The method takes arguments
1171 1171 // in the Java compiled code convention, marshals them to the native
1172 1172 // convention (handlizes oops, etc), transitions to native, makes the call,
1173 1173 // returns to java state (possibly blocking), unhandlizes any result and
1174 1174 // returns.
1175 1175 nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm,
1176 1176 methodHandle method,
1177 + int compile_id,
1177 1178 int total_in_args,
1178 1179 int comp_args_on_stack,
1179 1180 BasicType *in_sig_bt,
1180 1181 VMRegPair *in_regs,
1181 1182 BasicType ret_type) {
1182 1183 // Native nmethod wrappers never take possesion of the oop arguments.
1183 1184 // So the caller will gc the arguments. The only thing we need an
1184 1185 // oopMap for is if the call is static
1185 1186 //
1186 1187 // An OopMap for lock (and class if static)
1187 1188 OopMapSet *oop_maps = new OopMapSet();
1188 1189 intptr_t start = (intptr_t)__ pc();
1189 1190
1190 1191 // We have received a description of where all the java arg are located
1191 1192 // on entry to the wrapper. We need to convert these args to where
1192 1193 // the jni function will expect them. To figure out where they go
1193 1194 // we convert the java signature to a C signature by inserting
1194 1195 // the hidden arguments as arg[0] and possibly arg[1] (static method)
1195 1196
1196 1197 int total_c_args = total_in_args + 1;
1197 1198 if (method->is_static()) {
1198 1199 total_c_args++;
1199 1200 }
1200 1201
1201 1202 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
1202 1203 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
1203 1204
1204 1205 int argc = 0;
1205 1206 out_sig_bt[argc++] = T_ADDRESS;
1206 1207 if (method->is_static()) {
1207 1208 out_sig_bt[argc++] = T_OBJECT;
1208 1209 }
1209 1210
1210 1211 for (int i = 0; i < total_in_args ; i++ ) {
1211 1212 out_sig_bt[argc++] = in_sig_bt[i];
1212 1213 }
1213 1214
1214 1215 // Now figure out where the args must be stored and how much stack space
1215 1216 // they require.
1216 1217 //
1217 1218 int out_arg_slots;
1218 1219 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args);
1219 1220
1220 1221 // Compute framesize for the wrapper. We need to handlize all oops in
1221 1222 // incoming registers
1222 1223
1223 1224 // Calculate the total number of stack slots we will need.
1224 1225
1225 1226 // First count the abi requirement plus all of the outgoing args
1226 1227 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
1227 1228
1228 1229 // Now the space for the inbound oop handle area
1229 1230
1230 1231 int oop_handle_offset = stack_slots;
1231 1232 stack_slots += 6*VMRegImpl::slots_per_word;
1232 1233
1233 1234 // Now any space we need for handlizing a klass if static method
1234 1235
1235 1236 int oop_temp_slot_offset = 0;
1236 1237 int klass_slot_offset = 0;
1237 1238 int klass_offset = -1;
1238 1239 int lock_slot_offset = 0;
1239 1240 bool is_static = false;
1240 1241
1241 1242 if (method->is_static()) {
1242 1243 klass_slot_offset = stack_slots;
1243 1244 stack_slots += VMRegImpl::slots_per_word;
1244 1245 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size;
1245 1246 is_static = true;
1246 1247 }
1247 1248
1248 1249 // Plus a lock if needed
1249 1250
1250 1251 if (method->is_synchronized()) {
1251 1252 lock_slot_offset = stack_slots;
1252 1253 stack_slots += VMRegImpl::slots_per_word;
1253 1254 }
1254 1255
1255 1256 // Now a place (+2) to save return values or temp during shuffling
1256 1257 // + 4 for return address (which we own) and saved rbp
1257 1258 stack_slots += 6;
1258 1259
1259 1260 // Ok The space we have allocated will look like:
1260 1261 //
1261 1262 //
1262 1263 // FP-> | |
1263 1264 // |---------------------|
1264 1265 // | 2 slots for moves |
1265 1266 // |---------------------|
1266 1267 // | lock box (if sync) |
1267 1268 // |---------------------| <- lock_slot_offset
1268 1269 // | klass (if static) |
1269 1270 // |---------------------| <- klass_slot_offset
1270 1271 // | oopHandle area |
1271 1272 // |---------------------| <- oop_handle_offset (6 java arg registers)
1272 1273 // | outbound memory |
1273 1274 // | based arguments |
1274 1275 // | |
1275 1276 // |---------------------|
1276 1277 // | |
1277 1278 // SP-> | out_preserved_slots |
1278 1279 //
1279 1280 //
1280 1281
1281 1282
1282 1283 // Now compute actual number of stack words we need rounding to make
1283 1284 // stack properly aligned.
1284 1285 stack_slots = round_to(stack_slots, StackAlignmentInSlots);
1285 1286
1286 1287 int stack_size = stack_slots * VMRegImpl::stack_slot_size;
1287 1288
1288 1289
1289 1290 // First thing make an ic check to see if we should even be here
1290 1291
1291 1292 // We are free to use all registers as temps without saving them and
1292 1293 // restoring them except rbp. rbp is the only callee save register
1293 1294 // as far as the interpreter and the compiler(s) are concerned.
1294 1295
1295 1296
1296 1297 const Register ic_reg = rax;
1297 1298 const Register receiver = j_rarg0;
1298 1299
1299 1300 Label ok;
1300 1301 Label exception_pending;
1301 1302
1302 1303 assert_different_registers(ic_reg, receiver, rscratch1);
1303 1304 __ verify_oop(receiver);
1304 1305 __ load_klass(rscratch1, receiver);
1305 1306 __ cmpq(ic_reg, rscratch1);
1306 1307 __ jcc(Assembler::equal, ok);
1307 1308
1308 1309 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
1309 1310
1310 1311 __ bind(ok);
1311 1312
1312 1313 // Verified entry point must be aligned
1313 1314 __ align(8);
1314 1315
1315 1316 int vep_offset = ((intptr_t)__ pc()) - start;
1316 1317
1317 1318 // The instruction at the verified entry point must be 5 bytes or longer
1318 1319 // because it can be patched on the fly by make_non_entrant. The stack bang
1319 1320 // instruction fits that requirement.
1320 1321
1321 1322 // Generate stack overflow check
1322 1323
1323 1324 if (UseStackBanging) {
1324 1325 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size());
1325 1326 } else {
1326 1327 // need a 5 byte instruction to allow MT safe patching to non-entrant
1327 1328 __ fat_nop();
1328 1329 }
1329 1330
1330 1331 // Generate a new frame for the wrapper.
1331 1332 __ enter();
1332 1333 // -2 because return address is already present and so is saved rbp
1333 1334 __ subptr(rsp, stack_size - 2*wordSize);
1334 1335
1335 1336 // Frame is now completed as far as size and linkage.
1336 1337
1337 1338 int frame_complete = ((intptr_t)__ pc()) - start;
1338 1339
1339 1340 #ifdef ASSERT
1340 1341 {
1341 1342 Label L;
1342 1343 __ mov(rax, rsp);
1343 1344 __ andptr(rax, -16); // must be 16 byte boundary (see amd64 ABI)
1344 1345 __ cmpptr(rax, rsp);
1345 1346 __ jcc(Assembler::equal, L);
1346 1347 __ stop("improperly aligned stack");
1347 1348 __ bind(L);
1348 1349 }
1349 1350 #endif /* ASSERT */
1350 1351
1351 1352
1352 1353 // We use r14 as the oop handle for the receiver/klass
1353 1354 // It is callee save so it survives the call to native
1354 1355
1355 1356 const Register oop_handle_reg = r14;
1356 1357
1357 1358
1358 1359
1359 1360 //
1360 1361 // We immediately shuffle the arguments so that any vm call we have to
1361 1362 // make from here on out (sync slow path, jvmti, etc.) we will have
1362 1363 // captured the oops from our caller and have a valid oopMap for
1363 1364 // them.
1364 1365
1365 1366 // -----------------
1366 1367 // The Grand Shuffle
1367 1368
1368 1369 // The Java calling convention is either equal (linux) or denser (win64) than the
1369 1370 // c calling convention. However the because of the jni_env argument the c calling
1370 1371 // convention always has at least one more (and two for static) arguments than Java.
1371 1372 // Therefore if we move the args from java -> c backwards then we will never have
1372 1373 // a register->register conflict and we don't have to build a dependency graph
1373 1374 // and figure out how to break any cycles.
1374 1375 //
1375 1376
1376 1377 // Record esp-based slot for receiver on stack for non-static methods
1377 1378 int receiver_offset = -1;
1378 1379
1379 1380 // This is a trick. We double the stack slots so we can claim
1380 1381 // the oops in the caller's frame. Since we are sure to have
1381 1382 // more args than the caller doubling is enough to make
1382 1383 // sure we can capture all the incoming oop args from the
1383 1384 // caller.
1384 1385 //
1385 1386 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1386 1387
1387 1388 // Mark location of rbp (someday)
1388 1389 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, vmreg(rbp));
1389 1390
1390 1391 // Use eax, ebx as temporaries during any memory-memory moves we have to do
1391 1392 // All inbound args are referenced based on rbp and all outbound args via rsp.
1392 1393
1393 1394
1394 1395 #ifdef ASSERT
1395 1396 bool reg_destroyed[RegisterImpl::number_of_registers];
1396 1397 bool freg_destroyed[XMMRegisterImpl::number_of_registers];
1397 1398 for ( int r = 0 ; r < RegisterImpl::number_of_registers ; r++ ) {
1398 1399 reg_destroyed[r] = false;
1399 1400 }
1400 1401 for ( int f = 0 ; f < XMMRegisterImpl::number_of_registers ; f++ ) {
1401 1402 freg_destroyed[f] = false;
1402 1403 }
1403 1404
1404 1405 #endif /* ASSERT */
1405 1406
1406 1407
1407 1408 int c_arg = total_c_args - 1;
1408 1409 for ( int i = total_in_args - 1; i >= 0 ; i--, c_arg-- ) {
1409 1410 #ifdef ASSERT
1410 1411 if (in_regs[i].first()->is_Register()) {
1411 1412 assert(!reg_destroyed[in_regs[i].first()->as_Register()->encoding()], "destroyed reg!");
1412 1413 } else if (in_regs[i].first()->is_XMMRegister()) {
1413 1414 assert(!freg_destroyed[in_regs[i].first()->as_XMMRegister()->encoding()], "destroyed reg!");
1414 1415 }
1415 1416 if (out_regs[c_arg].first()->is_Register()) {
1416 1417 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true;
1417 1418 } else if (out_regs[c_arg].first()->is_XMMRegister()) {
1418 1419 freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true;
1419 1420 }
1420 1421 #endif /* ASSERT */
1421 1422 switch (in_sig_bt[i]) {
1422 1423 case T_ARRAY:
1423 1424 case T_OBJECT:
1424 1425 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg],
1425 1426 ((i == 0) && (!is_static)),
1426 1427 &receiver_offset);
1427 1428 break;
1428 1429 case T_VOID:
1429 1430 break;
1430 1431
1431 1432 case T_FLOAT:
1432 1433 float_move(masm, in_regs[i], out_regs[c_arg]);
1433 1434 break;
1434 1435
1435 1436 case T_DOUBLE:
1436 1437 assert( i + 1 < total_in_args &&
1437 1438 in_sig_bt[i + 1] == T_VOID &&
1438 1439 out_sig_bt[c_arg+1] == T_VOID, "bad arg list");
1439 1440 double_move(masm, in_regs[i], out_regs[c_arg]);
1440 1441 break;
1441 1442
1442 1443 case T_LONG :
1443 1444 long_move(masm, in_regs[i], out_regs[c_arg]);
1444 1445 break;
1445 1446
1446 1447 case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
1447 1448
1448 1449 default:
1449 1450 move32_64(masm, in_regs[i], out_regs[c_arg]);
1450 1451 }
1451 1452 }
1452 1453
1453 1454 // point c_arg at the first arg that is already loaded in case we
1454 1455 // need to spill before we call out
1455 1456 c_arg++;
1456 1457
1457 1458 // Pre-load a static method's oop into r14. Used both by locking code and
1458 1459 // the normal JNI call code.
1459 1460 if (method->is_static()) {
1460 1461
1461 1462 // load oop into a register
1462 1463 __ movoop(oop_handle_reg, JNIHandles::make_local(Klass::cast(method->method_holder())->java_mirror()));
1463 1464
1464 1465 // Now handlize the static class mirror it's known not-null.
1465 1466 __ movptr(Address(rsp, klass_offset), oop_handle_reg);
1466 1467 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
1467 1468
1468 1469 // Now get the handle
1469 1470 __ lea(oop_handle_reg, Address(rsp, klass_offset));
1470 1471 // store the klass handle as second argument
1471 1472 __ movptr(c_rarg1, oop_handle_reg);
1472 1473 // and protect the arg if we must spill
1473 1474 c_arg--;
1474 1475 }
1475 1476
1476 1477 // Change state to native (we save the return address in the thread, since it might not
1477 1478 // be pushed on the stack when we do a a stack traversal). It is enough that the pc()
1478 1479 // points into the right code segment. It does not have to be the correct return pc.
1479 1480 // We use the same pc/oopMap repeatedly when we call out
1480 1481
1481 1482 intptr_t the_pc = (intptr_t) __ pc();
1482 1483 oop_maps->add_gc_map(the_pc - start, map);
1483 1484
1484 1485 __ set_last_Java_frame(rsp, noreg, (address)the_pc);
1485 1486
1486 1487
1487 1488 // We have all of the arguments setup at this point. We must not touch any register
1488 1489 // argument registers at this point (what if we save/restore them there are no oop?
1489 1490
1490 1491 {
1491 1492 SkipIfEqual skip(masm, &DTraceMethodProbes, false);
1492 1493 // protect the args we've loaded
1493 1494 save_args(masm, total_c_args, c_arg, out_regs);
1494 1495 __ movoop(c_rarg1, JNIHandles::make_local(method()));
1495 1496 __ call_VM_leaf(
1496 1497 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
1497 1498 r15_thread, c_rarg1);
1498 1499 restore_args(masm, total_c_args, c_arg, out_regs);
1499 1500 }
1500 1501
1501 1502 // RedefineClasses() tracing support for obsolete method entry
1502 1503 if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) {
1503 1504 // protect the args we've loaded
1504 1505 save_args(masm, total_c_args, c_arg, out_regs);
1505 1506 __ movoop(c_rarg1, JNIHandles::make_local(method()));
1506 1507 __ call_VM_leaf(
1507 1508 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry),
1508 1509 r15_thread, c_rarg1);
1509 1510 restore_args(masm, total_c_args, c_arg, out_regs);
1510 1511 }
1511 1512
1512 1513 // Lock a synchronized method
1513 1514
1514 1515 // Register definitions used by locking and unlocking
1515 1516
1516 1517 const Register swap_reg = rax; // Must use rax for cmpxchg instruction
1517 1518 const Register obj_reg = rbx; // Will contain the oop
1518 1519 const Register lock_reg = r13; // Address of compiler lock object (BasicLock)
1519 1520 const Register old_hdr = r13; // value of old header at unlock time
1520 1521
1521 1522 Label slow_path_lock;
1522 1523 Label lock_done;
1523 1524
1524 1525 if (method->is_synchronized()) {
1525 1526
1526 1527
1527 1528 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes();
1528 1529
1529 1530 // Get the handle (the 2nd argument)
1530 1531 __ mov(oop_handle_reg, c_rarg1);
1531 1532
1532 1533 // Get address of the box
1533 1534
1534 1535 __ lea(lock_reg, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size));
1535 1536
1536 1537 // Load the oop from the handle
1537 1538 __ movptr(obj_reg, Address(oop_handle_reg, 0));
1538 1539
1539 1540 if (UseBiasedLocking) {
1540 1541 __ biased_locking_enter(lock_reg, obj_reg, swap_reg, rscratch1, false, lock_done, &slow_path_lock);
1541 1542 }
1542 1543
1543 1544 // Load immediate 1 into swap_reg %rax
1544 1545 __ movl(swap_reg, 1);
1545 1546
1546 1547 // Load (object->mark() | 1) into swap_reg %rax
1547 1548 __ orptr(swap_reg, Address(obj_reg, 0));
1548 1549
1549 1550 // Save (object->mark() | 1) into BasicLock's displaced header
1550 1551 __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
1551 1552
1552 1553 if (os::is_MP()) {
1553 1554 __ lock();
1554 1555 }
1555 1556
1556 1557 // src -> dest iff dest == rax else rax <- dest
1557 1558 __ cmpxchgptr(lock_reg, Address(obj_reg, 0));
1558 1559 __ jcc(Assembler::equal, lock_done);
1559 1560
1560 1561 // Hmm should this move to the slow path code area???
1561 1562
1562 1563 // Test if the oopMark is an obvious stack pointer, i.e.,
1563 1564 // 1) (mark & 3) == 0, and
1564 1565 // 2) rsp <= mark < mark + os::pagesize()
1565 1566 // These 3 tests can be done by evaluating the following
1566 1567 // expression: ((mark - rsp) & (3 - os::vm_page_size())),
1567 1568 // assuming both stack pointer and pagesize have their
1568 1569 // least significant 2 bits clear.
1569 1570 // NOTE: the oopMark is in swap_reg %rax as the result of cmpxchg
1570 1571
1571 1572 __ subptr(swap_reg, rsp);
1572 1573 __ andptr(swap_reg, 3 - os::vm_page_size());
1573 1574
1574 1575 // Save the test result, for recursive case, the result is zero
1575 1576 __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
1576 1577 __ jcc(Assembler::notEqual, slow_path_lock);
1577 1578
1578 1579 // Slow path will re-enter here
1579 1580
1580 1581 __ bind(lock_done);
1581 1582 }
1582 1583
1583 1584
1584 1585 // Finally just about ready to make the JNI call
1585 1586
1586 1587
1587 1588 // get JNIEnv* which is first argument to native
1588 1589
1589 1590 __ lea(c_rarg0, Address(r15_thread, in_bytes(JavaThread::jni_environment_offset())));
1590 1591
1591 1592 // Now set thread in native
1592 1593 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native);
1593 1594
1594 1595 __ call(RuntimeAddress(method->native_function()));
1595 1596
1596 1597 // Either restore the MXCSR register after returning from the JNI Call
1597 1598 // or verify that it wasn't changed.
1598 1599 if (RestoreMXCSROnJNICalls) {
1599 1600 __ ldmxcsr(ExternalAddress(StubRoutines::x86::mxcsr_std()));
1600 1601
1601 1602 }
1602 1603 else if (CheckJNICalls ) {
1603 1604 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, StubRoutines::x86::verify_mxcsr_entry())));
1604 1605 }
1605 1606
1606 1607
1607 1608 // Unpack native results.
1608 1609 switch (ret_type) {
1609 1610 case T_BOOLEAN: __ c2bool(rax); break;
1610 1611 case T_CHAR : __ movzwl(rax, rax); break;
1611 1612 case T_BYTE : __ sign_extend_byte (rax); break;
1612 1613 case T_SHORT : __ sign_extend_short(rax); break;
1613 1614 case T_INT : /* nothing to do */ break;
1614 1615 case T_DOUBLE :
1615 1616 case T_FLOAT :
1616 1617 // Result is in xmm0 we'll save as needed
1617 1618 break;
1618 1619 case T_ARRAY: // Really a handle
1619 1620 case T_OBJECT: // Really a handle
1620 1621 break; // can't de-handlize until after safepoint check
1621 1622 case T_VOID: break;
1622 1623 case T_LONG: break;
1623 1624 default : ShouldNotReachHere();
1624 1625 }
1625 1626
1626 1627 // Switch thread to "native transition" state before reading the synchronization state.
1627 1628 // This additional state is necessary because reading and testing the synchronization
1628 1629 // state is not atomic w.r.t. GC, as this scenario demonstrates:
1629 1630 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted.
1630 1631 // VM thread changes sync state to synchronizing and suspends threads for GC.
1631 1632 // Thread A is resumed to finish this native method, but doesn't block here since it
1632 1633 // didn't see any synchronization is progress, and escapes.
1633 1634 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native_trans);
1634 1635
1635 1636 if(os::is_MP()) {
1636 1637 if (UseMembar) {
1637 1638 // Force this write out before the read below
1638 1639 __ membar(Assembler::Membar_mask_bits(
1639 1640 Assembler::LoadLoad | Assembler::LoadStore |
1640 1641 Assembler::StoreLoad | Assembler::StoreStore));
1641 1642 } else {
1642 1643 // Write serialization page so VM thread can do a pseudo remote membar.
1643 1644 // We use the current thread pointer to calculate a thread specific
1644 1645 // offset to write to within the page. This minimizes bus traffic
1645 1646 // due to cache line collision.
1646 1647 __ serialize_memory(r15_thread, rcx);
1647 1648 }
1648 1649 }
1649 1650
1650 1651
1651 1652 // check for safepoint operation in progress and/or pending suspend requests
1652 1653 {
1653 1654 Label Continue;
1654 1655
1655 1656 __ cmp32(ExternalAddress((address)SafepointSynchronize::address_of_state()),
1656 1657 SafepointSynchronize::_not_synchronized);
1657 1658
1658 1659 Label L;
1659 1660 __ jcc(Assembler::notEqual, L);
1660 1661 __ cmpl(Address(r15_thread, JavaThread::suspend_flags_offset()), 0);
1661 1662 __ jcc(Assembler::equal, Continue);
1662 1663 __ bind(L);
1663 1664
1664 1665 // Don't use call_VM as it will see a possible pending exception and forward it
1665 1666 // and never return here preventing us from clearing _last_native_pc down below.
1666 1667 // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are
1667 1668 // preserved and correspond to the bcp/locals pointers. So we do a runtime call
1668 1669 // by hand.
1669 1670 //
1670 1671 save_native_result(masm, ret_type, stack_slots);
1671 1672 __ mov(c_rarg0, r15_thread);
1672 1673 __ mov(r12, rsp); // remember sp
1673 1674 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows
1674 1675 __ andptr(rsp, -16); // align stack as required by ABI
1675 1676 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans)));
1676 1677 __ mov(rsp, r12); // restore sp
1677 1678 __ reinit_heapbase();
1678 1679 // Restore any method result value
1679 1680 restore_native_result(masm, ret_type, stack_slots);
1680 1681 __ bind(Continue);
1681 1682 }
1682 1683
1683 1684 // change thread state
1684 1685 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_Java);
1685 1686
1686 1687 Label reguard;
1687 1688 Label reguard_done;
1688 1689 __ cmpl(Address(r15_thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_disabled);
1689 1690 __ jcc(Assembler::equal, reguard);
1690 1691 __ bind(reguard_done);
1691 1692
1692 1693 // native result if any is live
1693 1694
1694 1695 // Unlock
1695 1696 Label unlock_done;
1696 1697 Label slow_path_unlock;
1697 1698 if (method->is_synchronized()) {
1698 1699
1699 1700 // Get locked oop from the handle we passed to jni
1700 1701 __ movptr(obj_reg, Address(oop_handle_reg, 0));
1701 1702
1702 1703 Label done;
1703 1704
1704 1705 if (UseBiasedLocking) {
1705 1706 __ biased_locking_exit(obj_reg, old_hdr, done);
1706 1707 }
1707 1708
1708 1709 // Simple recursive lock?
1709 1710
1710 1711 __ cmpptr(Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size), (int32_t)NULL_WORD);
1711 1712 __ jcc(Assembler::equal, done);
1712 1713
1713 1714 // Must save rax if if it is live now because cmpxchg must use it
1714 1715 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
1715 1716 save_native_result(masm, ret_type, stack_slots);
1716 1717 }
1717 1718
1718 1719
1719 1720 // get address of the stack lock
1720 1721 __ lea(rax, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size));
1721 1722 // get old displaced header
1722 1723 __ movptr(old_hdr, Address(rax, 0));
1723 1724
1724 1725 // Atomic swap old header if oop still contains the stack lock
1725 1726 if (os::is_MP()) {
1726 1727 __ lock();
1727 1728 }
1728 1729 __ cmpxchgptr(old_hdr, Address(obj_reg, 0));
1729 1730 __ jcc(Assembler::notEqual, slow_path_unlock);
1730 1731
1731 1732 // slow path re-enters here
1732 1733 __ bind(unlock_done);
1733 1734 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
1734 1735 restore_native_result(masm, ret_type, stack_slots);
1735 1736 }
1736 1737
1737 1738 __ bind(done);
1738 1739
1739 1740 }
1740 1741 {
1741 1742 SkipIfEqual skip(masm, &DTraceMethodProbes, false);
1742 1743 save_native_result(masm, ret_type, stack_slots);
1743 1744 __ movoop(c_rarg1, JNIHandles::make_local(method()));
1744 1745 __ call_VM_leaf(
1745 1746 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
1746 1747 r15_thread, c_rarg1);
1747 1748 restore_native_result(masm, ret_type, stack_slots);
1748 1749 }
1749 1750
1750 1751 __ reset_last_Java_frame(false, true);
1751 1752
1752 1753 // Unpack oop result
1753 1754 if (ret_type == T_OBJECT || ret_type == T_ARRAY) {
1754 1755 Label L;
1755 1756 __ testptr(rax, rax);
1756 1757 __ jcc(Assembler::zero, L);
1757 1758 __ movptr(rax, Address(rax, 0));
1758 1759 __ bind(L);
1759 1760 __ verify_oop(rax);
1760 1761 }
1761 1762
1762 1763 // reset handle block
1763 1764 __ movptr(rcx, Address(r15_thread, JavaThread::active_handles_offset()));
1764 1765 __ movptr(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), (int32_t)NULL_WORD);
1765 1766
1766 1767 // pop our frame
1767 1768
1768 1769 __ leave();
1769 1770
1770 1771 // Any exception pending?
1771 1772 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
1772 1773 __ jcc(Assembler::notEqual, exception_pending);
1773 1774
1774 1775 // Return
1775 1776
1776 1777 __ ret(0);
1777 1778
1778 1779 // Unexpected paths are out of line and go here
1779 1780
1780 1781 // forward the exception
1781 1782 __ bind(exception_pending);
1782 1783
1783 1784 // and forward the exception
1784 1785 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
1785 1786
1786 1787
1787 1788 // Slow path locking & unlocking
1788 1789 if (method->is_synchronized()) {
1789 1790
1790 1791 // BEGIN Slow path lock
1791 1792 __ bind(slow_path_lock);
1792 1793
1793 1794 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM
1794 1795 // args are (oop obj, BasicLock* lock, JavaThread* thread)
1795 1796
1796 1797 // protect the args we've loaded
1797 1798 save_args(masm, total_c_args, c_arg, out_regs);
1798 1799
1799 1800 __ mov(c_rarg0, obj_reg);
1800 1801 __ mov(c_rarg1, lock_reg);
1801 1802 __ mov(c_rarg2, r15_thread);
1802 1803
1803 1804 // Not a leaf but we have last_Java_frame setup as we want
1804 1805 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), 3);
1805 1806 restore_args(masm, total_c_args, c_arg, out_regs);
1806 1807
1807 1808 #ifdef ASSERT
1808 1809 { Label L;
1809 1810 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
1810 1811 __ jcc(Assembler::equal, L);
1811 1812 __ stop("no pending exception allowed on exit from monitorenter");
1812 1813 __ bind(L);
1813 1814 }
1814 1815 #endif
1815 1816 __ jmp(lock_done);
1816 1817
1817 1818 // END Slow path lock
1818 1819
1819 1820 // BEGIN Slow path unlock
1820 1821 __ bind(slow_path_unlock);
1821 1822
1822 1823 // If we haven't already saved the native result we must save it now as xmm registers
1823 1824 // are still exposed.
1824 1825
1825 1826 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
1826 1827 save_native_result(masm, ret_type, stack_slots);
1827 1828 }
1828 1829
1829 1830 __ lea(c_rarg1, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size));
1830 1831
1831 1832 __ mov(c_rarg0, obj_reg);
1832 1833 __ mov(r12, rsp); // remember sp
1833 1834 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows
1834 1835 __ andptr(rsp, -16); // align stack as required by ABI
1835 1836
1836 1837 // Save pending exception around call to VM (which contains an EXCEPTION_MARK)
1837 1838 // NOTE that obj_reg == rbx currently
1838 1839 __ movptr(rbx, Address(r15_thread, in_bytes(Thread::pending_exception_offset())));
1839 1840 __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
1840 1841
1841 1842 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C)));
1842 1843 __ mov(rsp, r12); // restore sp
1843 1844 __ reinit_heapbase();
1844 1845 #ifdef ASSERT
1845 1846 {
1846 1847 Label L;
1847 1848 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD);
1848 1849 __ jcc(Assembler::equal, L);
1849 1850 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C");
1850 1851 __ bind(L);
1851 1852 }
1852 1853 #endif /* ASSERT */
1853 1854
1854 1855 __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), rbx);
1855 1856
1856 1857 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
1857 1858 restore_native_result(masm, ret_type, stack_slots);
1858 1859 }
1859 1860 __ jmp(unlock_done);
1860 1861
1861 1862 // END Slow path unlock
1862 1863
1863 1864 } // synchronized
1864 1865
1865 1866 // SLOW PATH Reguard the stack if needed
1866 1867
1867 1868 __ bind(reguard);
1868 1869 save_native_result(masm, ret_type, stack_slots);
1869 1870 __ mov(r12, rsp); // remember sp
1870 1871 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows
1871 1872 __ andptr(rsp, -16); // align stack as required by ABI
1872 1873 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages)));
1873 1874 __ mov(rsp, r12); // restore sp
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1874 1875 __ reinit_heapbase();
1875 1876 restore_native_result(masm, ret_type, stack_slots);
1876 1877 // and continue
1877 1878 __ jmp(reguard_done);
1878 1879
1879 1880
1880 1881
1881 1882 __ flush();
1882 1883
1883 1884 nmethod *nm = nmethod::new_native_nmethod(method,
1885 + compile_id,
1884 1886 masm->code(),
1885 1887 vep_offset,
1886 1888 frame_complete,
1887 1889 stack_slots / VMRegImpl::slots_per_word,
1888 1890 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
1889 1891 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size),
1890 1892 oop_maps);
1891 1893 return nm;
1892 1894
1893 1895 }
1894 1896
1895 1897 #ifdef HAVE_DTRACE_H
1896 1898 // ---------------------------------------------------------------------------
1897 1899 // Generate a dtrace nmethod for a given signature. The method takes arguments
1898 1900 // in the Java compiled code convention, marshals them to the native
1899 1901 // abi and then leaves nops at the position you would expect to call a native
1900 1902 // function. When the probe is enabled the nops are replaced with a trap
1901 1903 // instruction that dtrace inserts and the trace will cause a notification
1902 1904 // to dtrace.
1903 1905 //
1904 1906 // The probes are only able to take primitive types and java/lang/String as
1905 1907 // arguments. No other java types are allowed. Strings are converted to utf8
1906 1908 // strings so that from dtrace point of view java strings are converted to C
1907 1909 // strings. There is an arbitrary fixed limit on the total space that a method
1908 1910 // can use for converting the strings. (256 chars per string in the signature).
1909 1911 // So any java string larger then this is truncated.
1910 1912
1911 1913 static int fp_offset[ConcreteRegisterImpl::number_of_registers] = { 0 };
1912 1914 static bool offsets_initialized = false;
1913 1915
1914 1916
1915 1917 nmethod *SharedRuntime::generate_dtrace_nmethod(MacroAssembler *masm,
1916 1918 methodHandle method) {
1917 1919
1918 1920
1919 1921 // generate_dtrace_nmethod is guarded by a mutex so we are sure to
1920 1922 // be single threaded in this method.
1921 1923 assert(AdapterHandlerLibrary_lock->owned_by_self(), "must be");
1922 1924
1923 1925 if (!offsets_initialized) {
1924 1926 fp_offset[c_rarg0->as_VMReg()->value()] = -1 * wordSize;
1925 1927 fp_offset[c_rarg1->as_VMReg()->value()] = -2 * wordSize;
1926 1928 fp_offset[c_rarg2->as_VMReg()->value()] = -3 * wordSize;
1927 1929 fp_offset[c_rarg3->as_VMReg()->value()] = -4 * wordSize;
1928 1930 fp_offset[c_rarg4->as_VMReg()->value()] = -5 * wordSize;
1929 1931 fp_offset[c_rarg5->as_VMReg()->value()] = -6 * wordSize;
1930 1932
1931 1933 fp_offset[c_farg0->as_VMReg()->value()] = -7 * wordSize;
1932 1934 fp_offset[c_farg1->as_VMReg()->value()] = -8 * wordSize;
1933 1935 fp_offset[c_farg2->as_VMReg()->value()] = -9 * wordSize;
1934 1936 fp_offset[c_farg3->as_VMReg()->value()] = -10 * wordSize;
1935 1937 fp_offset[c_farg4->as_VMReg()->value()] = -11 * wordSize;
1936 1938 fp_offset[c_farg5->as_VMReg()->value()] = -12 * wordSize;
1937 1939 fp_offset[c_farg6->as_VMReg()->value()] = -13 * wordSize;
1938 1940 fp_offset[c_farg7->as_VMReg()->value()] = -14 * wordSize;
1939 1941
1940 1942 offsets_initialized = true;
1941 1943 }
1942 1944 // Fill in the signature array, for the calling-convention call.
1943 1945 int total_args_passed = method->size_of_parameters();
1944 1946
1945 1947 BasicType* in_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed);
1946 1948 VMRegPair *in_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed);
1947 1949
1948 1950 // The signature we are going to use for the trap that dtrace will see
1949 1951 // java/lang/String is converted. We drop "this" and any other object
1950 1952 // is converted to NULL. (A one-slot java/lang/Long object reference
1951 1953 // is converted to a two-slot long, which is why we double the allocation).
1952 1954 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed * 2);
1953 1955 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed * 2);
1954 1956
1955 1957 int i=0;
1956 1958 int total_strings = 0;
1957 1959 int first_arg_to_pass = 0;
1958 1960 int total_c_args = 0;
1959 1961
1960 1962 // Skip the receiver as dtrace doesn't want to see it
1961 1963 if( !method->is_static() ) {
1962 1964 in_sig_bt[i++] = T_OBJECT;
1963 1965 first_arg_to_pass = 1;
1964 1966 }
1965 1967
1966 1968 // We need to convert the java args to where a native (non-jni) function
1967 1969 // would expect them. To figure out where they go we convert the java
1968 1970 // signature to a C signature.
1969 1971
1970 1972 SignatureStream ss(method->signature());
1971 1973 for ( ; !ss.at_return_type(); ss.next()) {
1972 1974 BasicType bt = ss.type();
1973 1975 in_sig_bt[i++] = bt; // Collect remaining bits of signature
1974 1976 out_sig_bt[total_c_args++] = bt;
1975 1977 if( bt == T_OBJECT) {
1976 1978 Symbol* s = ss.as_symbol_or_null(); // symbol is created
1977 1979 if (s == vmSymbols::java_lang_String()) {
1978 1980 total_strings++;
1979 1981 out_sig_bt[total_c_args-1] = T_ADDRESS;
1980 1982 } else if (s == vmSymbols::java_lang_Boolean() ||
1981 1983 s == vmSymbols::java_lang_Character() ||
1982 1984 s == vmSymbols::java_lang_Byte() ||
1983 1985 s == vmSymbols::java_lang_Short() ||
1984 1986 s == vmSymbols::java_lang_Integer() ||
1985 1987 s == vmSymbols::java_lang_Float()) {
1986 1988 out_sig_bt[total_c_args-1] = T_INT;
1987 1989 } else if (s == vmSymbols::java_lang_Long() ||
1988 1990 s == vmSymbols::java_lang_Double()) {
1989 1991 out_sig_bt[total_c_args-1] = T_LONG;
1990 1992 out_sig_bt[total_c_args++] = T_VOID;
1991 1993 }
1992 1994 } else if ( bt == T_LONG || bt == T_DOUBLE ) {
1993 1995 in_sig_bt[i++] = T_VOID; // Longs & doubles take 2 Java slots
1994 1996 // We convert double to long
1995 1997 out_sig_bt[total_c_args-1] = T_LONG;
1996 1998 out_sig_bt[total_c_args++] = T_VOID;
1997 1999 } else if ( bt == T_FLOAT) {
1998 2000 // We convert float to int
1999 2001 out_sig_bt[total_c_args-1] = T_INT;
2000 2002 }
2001 2003 }
2002 2004
2003 2005 assert(i==total_args_passed, "validly parsed signature");
2004 2006
2005 2007 // Now get the compiled-Java layout as input arguments
2006 2008 int comp_args_on_stack;
2007 2009 comp_args_on_stack = SharedRuntime::java_calling_convention(
2008 2010 in_sig_bt, in_regs, total_args_passed, false);
2009 2011
2010 2012 // Now figure out where the args must be stored and how much stack space
2011 2013 // they require (neglecting out_preserve_stack_slots but space for storing
2012 2014 // the 1st six register arguments). It's weird see int_stk_helper.
2013 2015
2014 2016 int out_arg_slots;
2015 2017 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args);
2016 2018
2017 2019 // Calculate the total number of stack slots we will need.
2018 2020
2019 2021 // First count the abi requirement plus all of the outgoing args
2020 2022 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
2021 2023
2022 2024 // Now space for the string(s) we must convert
2023 2025 int* string_locs = NEW_RESOURCE_ARRAY(int, total_strings + 1);
2024 2026 for (i = 0; i < total_strings ; i++) {
2025 2027 string_locs[i] = stack_slots;
2026 2028 stack_slots += max_dtrace_string_size / VMRegImpl::stack_slot_size;
2027 2029 }
2028 2030
2029 2031 // Plus the temps we might need to juggle register args
2030 2032 // regs take two slots each
2031 2033 stack_slots += (Argument::n_int_register_parameters_c +
2032 2034 Argument::n_float_register_parameters_c) * 2;
2033 2035
2034 2036
2035 2037 // + 4 for return address (which we own) and saved rbp,
2036 2038
2037 2039 stack_slots += 4;
2038 2040
2039 2041 // Ok The space we have allocated will look like:
2040 2042 //
2041 2043 //
2042 2044 // FP-> | |
2043 2045 // |---------------------|
2044 2046 // | string[n] |
2045 2047 // |---------------------| <- string_locs[n]
2046 2048 // | string[n-1] |
2047 2049 // |---------------------| <- string_locs[n-1]
2048 2050 // | ... |
2049 2051 // | ... |
2050 2052 // |---------------------| <- string_locs[1]
2051 2053 // | string[0] |
2052 2054 // |---------------------| <- string_locs[0]
2053 2055 // | outbound memory |
2054 2056 // | based arguments |
2055 2057 // | |
2056 2058 // |---------------------|
2057 2059 // | |
2058 2060 // SP-> | out_preserved_slots |
2059 2061 //
2060 2062 //
2061 2063
2062 2064 // Now compute actual number of stack words we need rounding to make
2063 2065 // stack properly aligned.
2064 2066 stack_slots = round_to(stack_slots, 4 * VMRegImpl::slots_per_word);
2065 2067
2066 2068 int stack_size = stack_slots * VMRegImpl::stack_slot_size;
2067 2069
2068 2070 intptr_t start = (intptr_t)__ pc();
2069 2071
2070 2072 // First thing make an ic check to see if we should even be here
2071 2073
2072 2074 // We are free to use all registers as temps without saving them and
2073 2075 // restoring them except rbp. rbp, is the only callee save register
2074 2076 // as far as the interpreter and the compiler(s) are concerned.
2075 2077
2076 2078 const Register ic_reg = rax;
2077 2079 const Register receiver = rcx;
2078 2080 Label hit;
2079 2081 Label exception_pending;
2080 2082
2081 2083
2082 2084 __ verify_oop(receiver);
2083 2085 __ cmpl(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes()));
2084 2086 __ jcc(Assembler::equal, hit);
2085 2087
2086 2088 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
2087 2089
2088 2090 // verified entry must be aligned for code patching.
2089 2091 // and the first 5 bytes must be in the same cache line
2090 2092 // if we align at 8 then we will be sure 5 bytes are in the same line
2091 2093 __ align(8);
2092 2094
2093 2095 __ bind(hit);
2094 2096
2095 2097 int vep_offset = ((intptr_t)__ pc()) - start;
2096 2098
2097 2099
2098 2100 // The instruction at the verified entry point must be 5 bytes or longer
2099 2101 // because it can be patched on the fly by make_non_entrant. The stack bang
2100 2102 // instruction fits that requirement.
2101 2103
2102 2104 // Generate stack overflow check
2103 2105
2104 2106 if (UseStackBanging) {
2105 2107 if (stack_size <= StackShadowPages*os::vm_page_size()) {
2106 2108 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size());
2107 2109 } else {
2108 2110 __ movl(rax, stack_size);
2109 2111 __ bang_stack_size(rax, rbx);
2110 2112 }
2111 2113 } else {
2112 2114 // need a 5 byte instruction to allow MT safe patching to non-entrant
2113 2115 __ fat_nop();
2114 2116 }
2115 2117
2116 2118 assert(((uintptr_t)__ pc() - start - vep_offset) >= 5,
2117 2119 "valid size for make_non_entrant");
2118 2120
2119 2121 // Generate a new frame for the wrapper.
2120 2122 __ enter();
2121 2123
2122 2124 // -4 because return address is already present and so is saved rbp,
2123 2125 if (stack_size - 2*wordSize != 0) {
2124 2126 __ subq(rsp, stack_size - 2*wordSize);
2125 2127 }
2126 2128
2127 2129 // Frame is now completed as far a size and linkage.
2128 2130
2129 2131 int frame_complete = ((intptr_t)__ pc()) - start;
2130 2132
2131 2133 int c_arg, j_arg;
2132 2134
2133 2135 // State of input register args
2134 2136
2135 2137 bool live[ConcreteRegisterImpl::number_of_registers];
2136 2138
2137 2139 live[j_rarg0->as_VMReg()->value()] = false;
2138 2140 live[j_rarg1->as_VMReg()->value()] = false;
2139 2141 live[j_rarg2->as_VMReg()->value()] = false;
2140 2142 live[j_rarg3->as_VMReg()->value()] = false;
2141 2143 live[j_rarg4->as_VMReg()->value()] = false;
2142 2144 live[j_rarg5->as_VMReg()->value()] = false;
2143 2145
2144 2146 live[j_farg0->as_VMReg()->value()] = false;
2145 2147 live[j_farg1->as_VMReg()->value()] = false;
2146 2148 live[j_farg2->as_VMReg()->value()] = false;
2147 2149 live[j_farg3->as_VMReg()->value()] = false;
2148 2150 live[j_farg4->as_VMReg()->value()] = false;
2149 2151 live[j_farg5->as_VMReg()->value()] = false;
2150 2152 live[j_farg6->as_VMReg()->value()] = false;
2151 2153 live[j_farg7->as_VMReg()->value()] = false;
2152 2154
2153 2155
2154 2156 bool rax_is_zero = false;
2155 2157
2156 2158 // All args (except strings) destined for the stack are moved first
2157 2159 for (j_arg = first_arg_to_pass, c_arg = 0 ;
2158 2160 j_arg < total_args_passed ; j_arg++, c_arg++ ) {
2159 2161 VMRegPair src = in_regs[j_arg];
2160 2162 VMRegPair dst = out_regs[c_arg];
2161 2163
2162 2164 // Get the real reg value or a dummy (rsp)
2163 2165
2164 2166 int src_reg = src.first()->is_reg() ?
2165 2167 src.first()->value() :
2166 2168 rsp->as_VMReg()->value();
2167 2169
2168 2170 bool useless = in_sig_bt[j_arg] == T_ARRAY ||
2169 2171 (in_sig_bt[j_arg] == T_OBJECT &&
2170 2172 out_sig_bt[c_arg] != T_INT &&
2171 2173 out_sig_bt[c_arg] != T_ADDRESS &&
2172 2174 out_sig_bt[c_arg] != T_LONG);
2173 2175
2174 2176 live[src_reg] = !useless;
2175 2177
2176 2178 if (dst.first()->is_stack()) {
2177 2179
2178 2180 // Even though a string arg in a register is still live after this loop
2179 2181 // after the string conversion loop (next) it will be dead so we take
2180 2182 // advantage of that now for simpler code to manage live.
2181 2183
2182 2184 live[src_reg] = false;
2183 2185 switch (in_sig_bt[j_arg]) {
2184 2186
2185 2187 case T_ARRAY:
2186 2188 case T_OBJECT:
2187 2189 {
2188 2190 Address stack_dst(rsp, reg2offset_out(dst.first()));
2189 2191
2190 2192 if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) {
2191 2193 // need to unbox a one-word value
2192 2194 Register in_reg = rax;
2193 2195 if ( src.first()->is_reg() ) {
2194 2196 in_reg = src.first()->as_Register();
2195 2197 } else {
2196 2198 __ movq(rax, Address(rbp, reg2offset_in(src.first())));
2197 2199 rax_is_zero = false;
2198 2200 }
2199 2201 Label skipUnbox;
2200 2202 __ movptr(Address(rsp, reg2offset_out(dst.first())),
2201 2203 (int32_t)NULL_WORD);
2202 2204 __ testq(in_reg, in_reg);
2203 2205 __ jcc(Assembler::zero, skipUnbox);
2204 2206
2205 2207 BasicType bt = out_sig_bt[c_arg];
2206 2208 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt);
2207 2209 Address src1(in_reg, box_offset);
2208 2210 if ( bt == T_LONG ) {
2209 2211 __ movq(in_reg, src1);
2210 2212 __ movq(stack_dst, in_reg);
2211 2213 assert(out_sig_bt[c_arg+1] == T_VOID, "must be");
2212 2214 ++c_arg; // skip over T_VOID to keep the loop indices in sync
2213 2215 } else {
2214 2216 __ movl(in_reg, src1);
2215 2217 __ movl(stack_dst, in_reg);
2216 2218 }
2217 2219
2218 2220 __ bind(skipUnbox);
2219 2221 } else if (out_sig_bt[c_arg] != T_ADDRESS) {
2220 2222 // Convert the arg to NULL
2221 2223 if (!rax_is_zero) {
2222 2224 __ xorq(rax, rax);
2223 2225 rax_is_zero = true;
2224 2226 }
2225 2227 __ movq(stack_dst, rax);
2226 2228 }
2227 2229 }
2228 2230 break;
2229 2231
2230 2232 case T_VOID:
2231 2233 break;
2232 2234
2233 2235 case T_FLOAT:
2234 2236 // This does the right thing since we know it is destined for the
2235 2237 // stack
2236 2238 float_move(masm, src, dst);
2237 2239 break;
2238 2240
2239 2241 case T_DOUBLE:
2240 2242 // This does the right thing since we know it is destined for the
2241 2243 // stack
2242 2244 double_move(masm, src, dst);
2243 2245 break;
2244 2246
2245 2247 case T_LONG :
2246 2248 long_move(masm, src, dst);
2247 2249 break;
2248 2250
2249 2251 case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
2250 2252
2251 2253 default:
2252 2254 move32_64(masm, src, dst);
2253 2255 }
2254 2256 }
2255 2257
2256 2258 }
2257 2259
2258 2260 // If we have any strings we must store any register based arg to the stack
2259 2261 // This includes any still live xmm registers too.
2260 2262
2261 2263 int sid = 0;
2262 2264
2263 2265 if (total_strings > 0 ) {
2264 2266 for (j_arg = first_arg_to_pass, c_arg = 0 ;
2265 2267 j_arg < total_args_passed ; j_arg++, c_arg++ ) {
2266 2268 VMRegPair src = in_regs[j_arg];
2267 2269 VMRegPair dst = out_regs[c_arg];
2268 2270
2269 2271 if (src.first()->is_reg()) {
2270 2272 Address src_tmp(rbp, fp_offset[src.first()->value()]);
2271 2273
2272 2274 // string oops were left untouched by the previous loop even if the
2273 2275 // eventual (converted) arg is destined for the stack so park them
2274 2276 // away now (except for first)
2275 2277
2276 2278 if (out_sig_bt[c_arg] == T_ADDRESS) {
2277 2279 Address utf8_addr = Address(
2278 2280 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size);
2279 2281 if (sid != 1) {
2280 2282 // The first string arg won't be killed until after the utf8
2281 2283 // conversion
2282 2284 __ movq(utf8_addr, src.first()->as_Register());
2283 2285 }
2284 2286 } else if (dst.first()->is_reg()) {
2285 2287 if (in_sig_bt[j_arg] == T_FLOAT || in_sig_bt[j_arg] == T_DOUBLE) {
2286 2288
2287 2289 // Convert the xmm register to an int and store it in the reserved
2288 2290 // location for the eventual c register arg
2289 2291 XMMRegister f = src.first()->as_XMMRegister();
2290 2292 if (in_sig_bt[j_arg] == T_FLOAT) {
2291 2293 __ movflt(src_tmp, f);
2292 2294 } else {
2293 2295 __ movdbl(src_tmp, f);
2294 2296 }
2295 2297 } else {
2296 2298 // If the arg is an oop type we don't support don't bother to store
2297 2299 // it remember string was handled above.
2298 2300 bool useless = in_sig_bt[j_arg] == T_ARRAY ||
2299 2301 (in_sig_bt[j_arg] == T_OBJECT &&
2300 2302 out_sig_bt[c_arg] != T_INT &&
2301 2303 out_sig_bt[c_arg] != T_LONG);
2302 2304
2303 2305 if (!useless) {
2304 2306 __ movq(src_tmp, src.first()->as_Register());
2305 2307 }
2306 2308 }
2307 2309 }
2308 2310 }
2309 2311 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) {
2310 2312 assert(out_sig_bt[c_arg+1] == T_VOID, "must be");
2311 2313 ++c_arg; // skip over T_VOID to keep the loop indices in sync
2312 2314 }
2313 2315 }
2314 2316
2315 2317 // Now that the volatile registers are safe, convert all the strings
2316 2318 sid = 0;
2317 2319
2318 2320 for (j_arg = first_arg_to_pass, c_arg = 0 ;
2319 2321 j_arg < total_args_passed ; j_arg++, c_arg++ ) {
2320 2322 if (out_sig_bt[c_arg] == T_ADDRESS) {
2321 2323 // It's a string
2322 2324 Address utf8_addr = Address(
2323 2325 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size);
2324 2326 // The first string we find might still be in the original java arg
2325 2327 // register
2326 2328
2327 2329 VMReg src = in_regs[j_arg].first();
2328 2330
2329 2331 // We will need to eventually save the final argument to the trap
2330 2332 // in the von-volatile location dedicated to src. This is the offset
2331 2333 // from fp we will use.
2332 2334 int src_off = src->is_reg() ?
2333 2335 fp_offset[src->value()] : reg2offset_in(src);
2334 2336
2335 2337 // This is where the argument will eventually reside
2336 2338 VMRegPair dst = out_regs[c_arg];
2337 2339
2338 2340 if (src->is_reg()) {
2339 2341 if (sid == 1) {
2340 2342 __ movq(c_rarg0, src->as_Register());
2341 2343 } else {
2342 2344 __ movq(c_rarg0, utf8_addr);
2343 2345 }
2344 2346 } else {
2345 2347 // arg is still in the original location
2346 2348 __ movq(c_rarg0, Address(rbp, reg2offset_in(src)));
2347 2349 }
2348 2350 Label done, convert;
2349 2351
2350 2352 // see if the oop is NULL
2351 2353 __ testq(c_rarg0, c_rarg0);
2352 2354 __ jcc(Assembler::notEqual, convert);
2353 2355
2354 2356 if (dst.first()->is_reg()) {
2355 2357 // Save the ptr to utf string in the origina src loc or the tmp
2356 2358 // dedicated to it
2357 2359 __ movq(Address(rbp, src_off), c_rarg0);
2358 2360 } else {
2359 2361 __ movq(Address(rsp, reg2offset_out(dst.first())), c_rarg0);
2360 2362 }
2361 2363 __ jmp(done);
2362 2364
2363 2365 __ bind(convert);
2364 2366
2365 2367 __ lea(c_rarg1, utf8_addr);
2366 2368 if (dst.first()->is_reg()) {
2367 2369 __ movq(Address(rbp, src_off), c_rarg1);
2368 2370 } else {
2369 2371 __ movq(Address(rsp, reg2offset_out(dst.first())), c_rarg1);
2370 2372 }
2371 2373 // And do the conversion
2372 2374 __ call(RuntimeAddress(
2373 2375 CAST_FROM_FN_PTR(address, SharedRuntime::get_utf)));
2374 2376
2375 2377 __ bind(done);
2376 2378 }
2377 2379 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) {
2378 2380 assert(out_sig_bt[c_arg+1] == T_VOID, "must be");
2379 2381 ++c_arg; // skip over T_VOID to keep the loop indices in sync
2380 2382 }
2381 2383 }
2382 2384 // The get_utf call killed all the c_arg registers
2383 2385 live[c_rarg0->as_VMReg()->value()] = false;
2384 2386 live[c_rarg1->as_VMReg()->value()] = false;
2385 2387 live[c_rarg2->as_VMReg()->value()] = false;
2386 2388 live[c_rarg3->as_VMReg()->value()] = false;
2387 2389 live[c_rarg4->as_VMReg()->value()] = false;
2388 2390 live[c_rarg5->as_VMReg()->value()] = false;
2389 2391
2390 2392 live[c_farg0->as_VMReg()->value()] = false;
2391 2393 live[c_farg1->as_VMReg()->value()] = false;
2392 2394 live[c_farg2->as_VMReg()->value()] = false;
2393 2395 live[c_farg3->as_VMReg()->value()] = false;
2394 2396 live[c_farg4->as_VMReg()->value()] = false;
2395 2397 live[c_farg5->as_VMReg()->value()] = false;
2396 2398 live[c_farg6->as_VMReg()->value()] = false;
2397 2399 live[c_farg7->as_VMReg()->value()] = false;
2398 2400 }
2399 2401
2400 2402 // Now we can finally move the register args to their desired locations
2401 2403
2402 2404 rax_is_zero = false;
2403 2405
2404 2406 for (j_arg = first_arg_to_pass, c_arg = 0 ;
2405 2407 j_arg < total_args_passed ; j_arg++, c_arg++ ) {
2406 2408
2407 2409 VMRegPair src = in_regs[j_arg];
2408 2410 VMRegPair dst = out_regs[c_arg];
2409 2411
2410 2412 // Only need to look for args destined for the interger registers (since we
2411 2413 // convert float/double args to look like int/long outbound)
2412 2414 if (dst.first()->is_reg()) {
2413 2415 Register r = dst.first()->as_Register();
2414 2416
2415 2417 // Check if the java arg is unsupported and thereofre useless
2416 2418 bool useless = in_sig_bt[j_arg] == T_ARRAY ||
2417 2419 (in_sig_bt[j_arg] == T_OBJECT &&
2418 2420 out_sig_bt[c_arg] != T_INT &&
2419 2421 out_sig_bt[c_arg] != T_ADDRESS &&
2420 2422 out_sig_bt[c_arg] != T_LONG);
2421 2423
2422 2424
2423 2425 // If we're going to kill an existing arg save it first
2424 2426 if (live[dst.first()->value()]) {
2425 2427 // you can't kill yourself
2426 2428 if (src.first() != dst.first()) {
2427 2429 __ movq(Address(rbp, fp_offset[dst.first()->value()]), r);
2428 2430 }
2429 2431 }
2430 2432 if (src.first()->is_reg()) {
2431 2433 if (live[src.first()->value()] ) {
2432 2434 if (in_sig_bt[j_arg] == T_FLOAT) {
2433 2435 __ movdl(r, src.first()->as_XMMRegister());
2434 2436 } else if (in_sig_bt[j_arg] == T_DOUBLE) {
2435 2437 __ movdq(r, src.first()->as_XMMRegister());
2436 2438 } else if (r != src.first()->as_Register()) {
2437 2439 if (!useless) {
2438 2440 __ movq(r, src.first()->as_Register());
2439 2441 }
2440 2442 }
2441 2443 } else {
2442 2444 // If the arg is an oop type we don't support don't bother to store
2443 2445 // it
2444 2446 if (!useless) {
2445 2447 if (in_sig_bt[j_arg] == T_DOUBLE ||
2446 2448 in_sig_bt[j_arg] == T_LONG ||
2447 2449 in_sig_bt[j_arg] == T_OBJECT ) {
2448 2450 __ movq(r, Address(rbp, fp_offset[src.first()->value()]));
2449 2451 } else {
2450 2452 __ movl(r, Address(rbp, fp_offset[src.first()->value()]));
2451 2453 }
2452 2454 }
2453 2455 }
2454 2456 live[src.first()->value()] = false;
2455 2457 } else if (!useless) {
2456 2458 // full sized move even for int should be ok
2457 2459 __ movq(r, Address(rbp, reg2offset_in(src.first())));
2458 2460 }
2459 2461
2460 2462 // At this point r has the original java arg in the final location
2461 2463 // (assuming it wasn't useless). If the java arg was an oop
2462 2464 // we have a bit more to do
2463 2465
2464 2466 if (in_sig_bt[j_arg] == T_ARRAY || in_sig_bt[j_arg] == T_OBJECT ) {
2465 2467 if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) {
2466 2468 // need to unbox a one-word value
2467 2469 Label skip;
2468 2470 __ testq(r, r);
2469 2471 __ jcc(Assembler::equal, skip);
2470 2472 BasicType bt = out_sig_bt[c_arg];
2471 2473 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt);
2472 2474 Address src1(r, box_offset);
2473 2475 if ( bt == T_LONG ) {
2474 2476 __ movq(r, src1);
2475 2477 } else {
2476 2478 __ movl(r, src1);
2477 2479 }
2478 2480 __ bind(skip);
2479 2481
2480 2482 } else if (out_sig_bt[c_arg] != T_ADDRESS) {
2481 2483 // Convert the arg to NULL
2482 2484 __ xorq(r, r);
2483 2485 }
2484 2486 }
2485 2487
2486 2488 // dst can longer be holding an input value
2487 2489 live[dst.first()->value()] = false;
2488 2490 }
2489 2491 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) {
2490 2492 assert(out_sig_bt[c_arg+1] == T_VOID, "must be");
2491 2493 ++c_arg; // skip over T_VOID to keep the loop indices in sync
2492 2494 }
2493 2495 }
2494 2496
2495 2497
2496 2498 // Ok now we are done. Need to place the nop that dtrace wants in order to
2497 2499 // patch in the trap
2498 2500 int patch_offset = ((intptr_t)__ pc()) - start;
2499 2501
2500 2502 __ nop();
2501 2503
2502 2504
2503 2505 // Return
2504 2506
2505 2507 __ leave();
2506 2508 __ ret(0);
2507 2509
2508 2510 __ flush();
2509 2511
2510 2512 nmethod *nm = nmethod::new_dtrace_nmethod(
2511 2513 method, masm->code(), vep_offset, patch_offset, frame_complete,
2512 2514 stack_slots / VMRegImpl::slots_per_word);
2513 2515 return nm;
2514 2516
2515 2517 }
2516 2518
2517 2519 #endif // HAVE_DTRACE_H
2518 2520
2519 2521 // this function returns the adjust size (in number of words) to a c2i adapter
2520 2522 // activation for use during deoptimization
2521 2523 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) {
2522 2524 return (callee_locals - callee_parameters) * Interpreter::stackElementWords;
2523 2525 }
2524 2526
2525 2527
2526 2528 uint SharedRuntime::out_preserve_stack_slots() {
2527 2529 return 0;
2528 2530 }
2529 2531
2530 2532
2531 2533 //------------------------------generate_deopt_blob----------------------------
2532 2534 void SharedRuntime::generate_deopt_blob() {
2533 2535 // Allocate space for the code
2534 2536 ResourceMark rm;
2535 2537 // Setup code generation tools
2536 2538 CodeBuffer buffer("deopt_blob", 2048, 1024);
2537 2539 MacroAssembler* masm = new MacroAssembler(&buffer);
2538 2540 int frame_size_in_words;
2539 2541 OopMap* map = NULL;
2540 2542 OopMapSet *oop_maps = new OopMapSet();
2541 2543
2542 2544 // -------------
2543 2545 // This code enters when returning to a de-optimized nmethod. A return
2544 2546 // address has been pushed on the the stack, and return values are in
2545 2547 // registers.
2546 2548 // If we are doing a normal deopt then we were called from the patched
2547 2549 // nmethod from the point we returned to the nmethod. So the return
2548 2550 // address on the stack is wrong by NativeCall::instruction_size
2549 2551 // We will adjust the value so it looks like we have the original return
2550 2552 // address on the stack (like when we eagerly deoptimized).
2551 2553 // In the case of an exception pending when deoptimizing, we enter
2552 2554 // with a return address on the stack that points after the call we patched
2553 2555 // into the exception handler. We have the following register state from,
2554 2556 // e.g., the forward exception stub (see stubGenerator_x86_64.cpp).
2555 2557 // rax: exception oop
2556 2558 // rbx: exception handler
2557 2559 // rdx: throwing pc
2558 2560 // So in this case we simply jam rdx into the useless return address and
2559 2561 // the stack looks just like we want.
2560 2562 //
2561 2563 // At this point we need to de-opt. We save the argument return
2562 2564 // registers. We call the first C routine, fetch_unroll_info(). This
2563 2565 // routine captures the return values and returns a structure which
2564 2566 // describes the current frame size and the sizes of all replacement frames.
2565 2567 // The current frame is compiled code and may contain many inlined
2566 2568 // functions, each with their own JVM state. We pop the current frame, then
2567 2569 // push all the new frames. Then we call the C routine unpack_frames() to
2568 2570 // populate these frames. Finally unpack_frames() returns us the new target
2569 2571 // address. Notice that callee-save registers are BLOWN here; they have
2570 2572 // already been captured in the vframeArray at the time the return PC was
2571 2573 // patched.
2572 2574 address start = __ pc();
2573 2575 Label cont;
2574 2576
2575 2577 // Prolog for non exception case!
2576 2578
2577 2579 // Save everything in sight.
2578 2580 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
2579 2581
2580 2582 // Normal deoptimization. Save exec mode for unpack_frames.
2581 2583 __ movl(r14, Deoptimization::Unpack_deopt); // callee-saved
2582 2584 __ jmp(cont);
2583 2585
2584 2586 int reexecute_offset = __ pc() - start;
2585 2587
2586 2588 // Reexecute case
2587 2589 // return address is the pc describes what bci to do re-execute at
2588 2590
2589 2591 // No need to update map as each call to save_live_registers will produce identical oopmap
2590 2592 (void) RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
2591 2593
2592 2594 __ movl(r14, Deoptimization::Unpack_reexecute); // callee-saved
2593 2595 __ jmp(cont);
2594 2596
2595 2597 int exception_offset = __ pc() - start;
2596 2598
2597 2599 // Prolog for exception case
2598 2600
2599 2601 // all registers are dead at this entry point, except for rax, and
2600 2602 // rdx which contain the exception oop and exception pc
2601 2603 // respectively. Set them in TLS and fall thru to the
2602 2604 // unpack_with_exception_in_tls entry point.
2603 2605
2604 2606 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx);
2605 2607 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), rax);
2606 2608
2607 2609 int exception_in_tls_offset = __ pc() - start;
2608 2610
2609 2611 // new implementation because exception oop is now passed in JavaThread
2610 2612
2611 2613 // Prolog for exception case
2612 2614 // All registers must be preserved because they might be used by LinearScan
2613 2615 // Exceptiop oop and throwing PC are passed in JavaThread
2614 2616 // tos: stack at point of call to method that threw the exception (i.e. only
2615 2617 // args are on the stack, no return address)
2616 2618
2617 2619 // make room on stack for the return address
2618 2620 // It will be patched later with the throwing pc. The correct value is not
2619 2621 // available now because loading it from memory would destroy registers.
2620 2622 __ push(0);
2621 2623
2622 2624 // Save everything in sight.
2623 2625 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
2624 2626
2625 2627 // Now it is safe to overwrite any register
2626 2628
2627 2629 // Deopt during an exception. Save exec mode for unpack_frames.
2628 2630 __ movl(r14, Deoptimization::Unpack_exception); // callee-saved
2629 2631
2630 2632 // load throwing pc from JavaThread and patch it as the return address
2631 2633 // of the current frame. Then clear the field in JavaThread
2632 2634
2633 2635 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset()));
2634 2636 __ movptr(Address(rbp, wordSize), rdx);
2635 2637 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD);
2636 2638
2637 2639 #ifdef ASSERT
2638 2640 // verify that there is really an exception oop in JavaThread
2639 2641 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset()));
2640 2642 __ verify_oop(rax);
2641 2643
2642 2644 // verify that there is no pending exception
2643 2645 Label no_pending_exception;
2644 2646 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset()));
2645 2647 __ testptr(rax, rax);
2646 2648 __ jcc(Assembler::zero, no_pending_exception);
2647 2649 __ stop("must not have pending exception here");
2648 2650 __ bind(no_pending_exception);
2649 2651 #endif
2650 2652
2651 2653 __ bind(cont);
2652 2654
2653 2655 // Call C code. Need thread and this frame, but NOT official VM entry
2654 2656 // crud. We cannot block on this call, no GC can happen.
2655 2657 //
2656 2658 // UnrollBlock* fetch_unroll_info(JavaThread* thread)
2657 2659
2658 2660 // fetch_unroll_info needs to call last_java_frame().
2659 2661
2660 2662 __ set_last_Java_frame(noreg, noreg, NULL);
2661 2663 #ifdef ASSERT
2662 2664 { Label L;
2663 2665 __ cmpptr(Address(r15_thread,
2664 2666 JavaThread::last_Java_fp_offset()),
2665 2667 (int32_t)0);
2666 2668 __ jcc(Assembler::equal, L);
2667 2669 __ stop("SharedRuntime::generate_deopt_blob: last_Java_fp not cleared");
2668 2670 __ bind(L);
2669 2671 }
2670 2672 #endif // ASSERT
2671 2673 __ mov(c_rarg0, r15_thread);
2672 2674 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info)));
2673 2675
2674 2676 // Need to have an oopmap that tells fetch_unroll_info where to
2675 2677 // find any register it might need.
2676 2678 oop_maps->add_gc_map(__ pc() - start, map);
2677 2679
2678 2680 __ reset_last_Java_frame(false, false);
2679 2681
2680 2682 // Load UnrollBlock* into rdi
2681 2683 __ mov(rdi, rax);
2682 2684
2683 2685 Label noException;
2684 2686 __ cmpl(r14, Deoptimization::Unpack_exception); // Was exception pending?
2685 2687 __ jcc(Assembler::notEqual, noException);
2686 2688 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset()));
2687 2689 // QQQ this is useless it was NULL above
2688 2690 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset()));
2689 2691 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int32_t)NULL_WORD);
2690 2692 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD);
2691 2693
2692 2694 __ verify_oop(rax);
2693 2695
2694 2696 // Overwrite the result registers with the exception results.
2695 2697 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax);
2696 2698 // I think this is useless
2697 2699 __ movptr(Address(rsp, RegisterSaver::rdx_offset_in_bytes()), rdx);
2698 2700
2699 2701 __ bind(noException);
2700 2702
2701 2703 // Only register save data is on the stack.
2702 2704 // Now restore the result registers. Everything else is either dead
2703 2705 // or captured in the vframeArray.
2704 2706 RegisterSaver::restore_result_registers(masm);
2705 2707
2706 2708 // All of the register save area has been popped of the stack. Only the
2707 2709 // return address remains.
2708 2710
2709 2711 // Pop all the frames we must move/replace.
2710 2712 //
2711 2713 // Frame picture (youngest to oldest)
2712 2714 // 1: self-frame (no frame link)
2713 2715 // 2: deopting frame (no frame link)
2714 2716 // 3: caller of deopting frame (could be compiled/interpreted).
2715 2717 //
2716 2718 // Note: by leaving the return address of self-frame on the stack
2717 2719 // and using the size of frame 2 to adjust the stack
2718 2720 // when we are done the return to frame 3 will still be on the stack.
2719 2721
2720 2722 // Pop deoptimized frame
2721 2723 __ movl(rcx, Address(rdi, Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
2722 2724 __ addptr(rsp, rcx);
2723 2725
2724 2726 // rsp should be pointing at the return address to the caller (3)
2725 2727
2726 2728 // Stack bang to make sure there's enough room for these interpreter frames.
2727 2729 if (UseStackBanging) {
2728 2730 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
2729 2731 __ bang_stack_size(rbx, rcx);
2730 2732 }
2731 2733
2732 2734 // Load address of array of frame pcs into rcx
2733 2735 __ movptr(rcx, Address(rdi, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
2734 2736
2735 2737 // Trash the old pc
2736 2738 __ addptr(rsp, wordSize);
2737 2739
2738 2740 // Load address of array of frame sizes into rsi
2739 2741 __ movptr(rsi, Address(rdi, Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
2740 2742
2741 2743 // Load counter into rdx
2742 2744 __ movl(rdx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
2743 2745
2744 2746 // Pick up the initial fp we should save
2745 2747 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_fp_offset_in_bytes()));
2746 2748
2747 2749 // Now adjust the caller's stack to make up for the extra locals
2748 2750 // but record the original sp so that we can save it in the skeletal interpreter
2749 2751 // frame and the stack walking of interpreter_sender will get the unextended sp
2750 2752 // value and not the "real" sp value.
2751 2753
2752 2754 const Register sender_sp = r8;
2753 2755
2754 2756 __ mov(sender_sp, rsp);
2755 2757 __ movl(rbx, Address(rdi,
2756 2758 Deoptimization::UnrollBlock::
2757 2759 caller_adjustment_offset_in_bytes()));
2758 2760 __ subptr(rsp, rbx);
2759 2761
2760 2762 // Push interpreter frames in a loop
2761 2763 Label loop;
2762 2764 __ bind(loop);
2763 2765 __ movptr(rbx, Address(rsi, 0)); // Load frame size
2764 2766 #ifdef CC_INTERP
2765 2767 __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and
2766 2768 #ifdef ASSERT
2767 2769 __ push(0xDEADDEAD); // Make a recognizable pattern
2768 2770 __ push(0xDEADDEAD);
2769 2771 #else /* ASSERT */
2770 2772 __ subptr(rsp, 2*wordSize); // skip the "static long no_param"
2771 2773 #endif /* ASSERT */
2772 2774 #else
2773 2775 __ subptr(rbx, 2*wordSize); // We'll push pc and ebp by hand
2774 2776 #endif // CC_INTERP
2775 2777 __ pushptr(Address(rcx, 0)); // Save return address
2776 2778 __ enter(); // Save old & set new ebp
2777 2779 __ subptr(rsp, rbx); // Prolog
2778 2780 #ifdef CC_INTERP
2779 2781 __ movptr(Address(rbp,
2780 2782 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))),
2781 2783 sender_sp); // Make it walkable
2782 2784 #else /* CC_INTERP */
2783 2785 // This value is corrected by layout_activation_impl
2784 2786 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD );
2785 2787 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), sender_sp); // Make it walkable
2786 2788 #endif /* CC_INTERP */
2787 2789 __ mov(sender_sp, rsp); // Pass sender_sp to next frame
2788 2790 __ addptr(rsi, wordSize); // Bump array pointer (sizes)
2789 2791 __ addptr(rcx, wordSize); // Bump array pointer (pcs)
2790 2792 __ decrementl(rdx); // Decrement counter
2791 2793 __ jcc(Assembler::notZero, loop);
2792 2794 __ pushptr(Address(rcx, 0)); // Save final return address
2793 2795
2794 2796 // Re-push self-frame
2795 2797 __ enter(); // Save old & set new ebp
2796 2798
2797 2799 // Allocate a full sized register save area.
2798 2800 // Return address and rbp are in place, so we allocate two less words.
2799 2801 __ subptr(rsp, (frame_size_in_words - 2) * wordSize);
2800 2802
2801 2803 // Restore frame locals after moving the frame
2802 2804 __ movdbl(Address(rsp, RegisterSaver::xmm0_offset_in_bytes()), xmm0);
2803 2805 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax);
2804 2806
2805 2807 // Call C code. Need thread but NOT official VM entry
2806 2808 // crud. We cannot block on this call, no GC can happen. Call should
2807 2809 // restore return values to their stack-slots with the new SP.
2808 2810 //
2809 2811 // void Deoptimization::unpack_frames(JavaThread* thread, int exec_mode)
2810 2812
2811 2813 // Use rbp because the frames look interpreted now
2812 2814 __ set_last_Java_frame(noreg, rbp, NULL);
2813 2815
2814 2816 __ mov(c_rarg0, r15_thread);
2815 2817 __ movl(c_rarg1, r14); // second arg: exec_mode
2816 2818 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2817 2819
2818 2820 // Set an oopmap for the call site
2819 2821 oop_maps->add_gc_map(__ pc() - start,
2820 2822 new OopMap( frame_size_in_words, 0 ));
2821 2823
2822 2824 __ reset_last_Java_frame(true, false);
2823 2825
2824 2826 // Collect return values
2825 2827 __ movdbl(xmm0, Address(rsp, RegisterSaver::xmm0_offset_in_bytes()));
2826 2828 __ movptr(rax, Address(rsp, RegisterSaver::rax_offset_in_bytes()));
2827 2829 // I think this is useless (throwing pc?)
2828 2830 __ movptr(rdx, Address(rsp, RegisterSaver::rdx_offset_in_bytes()));
2829 2831
2830 2832 // Pop self-frame.
2831 2833 __ leave(); // Epilog
2832 2834
2833 2835 // Jump to interpreter
2834 2836 __ ret(0);
2835 2837
2836 2838 // Make sure all code is generated
2837 2839 masm->flush();
2838 2840
2839 2841 _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words);
2840 2842 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset);
2841 2843 }
2842 2844
2843 2845 #ifdef COMPILER2
2844 2846 //------------------------------generate_uncommon_trap_blob--------------------
2845 2847 void SharedRuntime::generate_uncommon_trap_blob() {
2846 2848 // Allocate space for the code
2847 2849 ResourceMark rm;
2848 2850 // Setup code generation tools
2849 2851 CodeBuffer buffer("uncommon_trap_blob", 2048, 1024);
2850 2852 MacroAssembler* masm = new MacroAssembler(&buffer);
2851 2853
2852 2854 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned");
2853 2855
2854 2856 address start = __ pc();
2855 2857
2856 2858 // Push self-frame. We get here with a return address on the
2857 2859 // stack, so rsp is 8-byte aligned until we allocate our frame.
2858 2860 __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog!
2859 2861
2860 2862 // No callee saved registers. rbp is assumed implicitly saved
2861 2863 __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp);
2862 2864
2863 2865 // compiler left unloaded_class_index in j_rarg0 move to where the
2864 2866 // runtime expects it.
2865 2867 __ movl(c_rarg1, j_rarg0);
2866 2868
2867 2869 __ set_last_Java_frame(noreg, noreg, NULL);
2868 2870
2869 2871 // Call C code. Need thread but NOT official VM entry
2870 2872 // crud. We cannot block on this call, no GC can happen. Call should
2871 2873 // capture callee-saved registers as well as return values.
2872 2874 // Thread is in rdi already.
2873 2875 //
2874 2876 // UnrollBlock* uncommon_trap(JavaThread* thread, jint unloaded_class_index);
2875 2877
2876 2878 __ mov(c_rarg0, r15_thread);
2877 2879 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap)));
2878 2880
2879 2881 // Set an oopmap for the call site
2880 2882 OopMapSet* oop_maps = new OopMapSet();
2881 2883 OopMap* map = new OopMap(SimpleRuntimeFrame::framesize, 0);
2882 2884
2883 2885 // location of rbp is known implicitly by the frame sender code
2884 2886
2885 2887 oop_maps->add_gc_map(__ pc() - start, map);
2886 2888
2887 2889 __ reset_last_Java_frame(false, false);
2888 2890
2889 2891 // Load UnrollBlock* into rdi
2890 2892 __ mov(rdi, rax);
2891 2893
2892 2894 // Pop all the frames we must move/replace.
2893 2895 //
2894 2896 // Frame picture (youngest to oldest)
2895 2897 // 1: self-frame (no frame link)
2896 2898 // 2: deopting frame (no frame link)
2897 2899 // 3: caller of deopting frame (could be compiled/interpreted).
2898 2900
2899 2901 // Pop self-frame. We have no frame, and must rely only on rax and rsp.
2900 2902 __ addptr(rsp, (SimpleRuntimeFrame::framesize - 2) << LogBytesPerInt); // Epilog!
2901 2903
2902 2904 // Pop deoptimized frame (int)
2903 2905 __ movl(rcx, Address(rdi,
2904 2906 Deoptimization::UnrollBlock::
2905 2907 size_of_deoptimized_frame_offset_in_bytes()));
2906 2908 __ addptr(rsp, rcx);
2907 2909
2908 2910 // rsp should be pointing at the return address to the caller (3)
2909 2911
2910 2912 // Stack bang to make sure there's enough room for these interpreter frames.
2911 2913 if (UseStackBanging) {
2912 2914 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
2913 2915 __ bang_stack_size(rbx, rcx);
2914 2916 }
2915 2917
2916 2918 // Load address of array of frame pcs into rcx (address*)
2917 2919 __ movptr(rcx,
2918 2920 Address(rdi,
2919 2921 Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
2920 2922
2921 2923 // Trash the return pc
2922 2924 __ addptr(rsp, wordSize);
2923 2925
2924 2926 // Load address of array of frame sizes into rsi (intptr_t*)
2925 2927 __ movptr(rsi, Address(rdi,
2926 2928 Deoptimization::UnrollBlock::
2927 2929 frame_sizes_offset_in_bytes()));
2928 2930
2929 2931 // Counter
2930 2932 __ movl(rdx, Address(rdi,
2931 2933 Deoptimization::UnrollBlock::
2932 2934 number_of_frames_offset_in_bytes())); // (int)
2933 2935
2934 2936 // Pick up the initial fp we should save
2935 2937 __ movptr(rbp,
2936 2938 Address(rdi,
2937 2939 Deoptimization::UnrollBlock::initial_fp_offset_in_bytes()));
2938 2940
2939 2941 // Now adjust the caller's stack to make up for the extra locals but
2940 2942 // record the original sp so that we can save it in the skeletal
2941 2943 // interpreter frame and the stack walking of interpreter_sender
2942 2944 // will get the unextended sp value and not the "real" sp value.
2943 2945
2944 2946 const Register sender_sp = r8;
2945 2947
2946 2948 __ mov(sender_sp, rsp);
2947 2949 __ movl(rbx, Address(rdi,
2948 2950 Deoptimization::UnrollBlock::
2949 2951 caller_adjustment_offset_in_bytes())); // (int)
2950 2952 __ subptr(rsp, rbx);
2951 2953
2952 2954 // Push interpreter frames in a loop
2953 2955 Label loop;
2954 2956 __ bind(loop);
2955 2957 __ movptr(rbx, Address(rsi, 0)); // Load frame size
2956 2958 __ subptr(rbx, 2 * wordSize); // We'll push pc and rbp by hand
2957 2959 __ pushptr(Address(rcx, 0)); // Save return address
2958 2960 __ enter(); // Save old & set new rbp
2959 2961 __ subptr(rsp, rbx); // Prolog
2960 2962 #ifdef CC_INTERP
2961 2963 __ movptr(Address(rbp,
2962 2964 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))),
2963 2965 sender_sp); // Make it walkable
2964 2966 #else // CC_INTERP
2965 2967 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize),
2966 2968 sender_sp); // Make it walkable
2967 2969 // This value is corrected by layout_activation_impl
2968 2970 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD );
2969 2971 #endif // CC_INTERP
2970 2972 __ mov(sender_sp, rsp); // Pass sender_sp to next frame
2971 2973 __ addptr(rsi, wordSize); // Bump array pointer (sizes)
2972 2974 __ addptr(rcx, wordSize); // Bump array pointer (pcs)
2973 2975 __ decrementl(rdx); // Decrement counter
2974 2976 __ jcc(Assembler::notZero, loop);
2975 2977 __ pushptr(Address(rcx, 0)); // Save final return address
2976 2978
2977 2979 // Re-push self-frame
2978 2980 __ enter(); // Save old & set new rbp
2979 2981 __ subptr(rsp, (SimpleRuntimeFrame::framesize - 4) << LogBytesPerInt);
2980 2982 // Prolog
2981 2983
2982 2984 // Use rbp because the frames look interpreted now
2983 2985 __ set_last_Java_frame(noreg, rbp, NULL);
2984 2986
2985 2987 // Call C code. Need thread but NOT official VM entry
2986 2988 // crud. We cannot block on this call, no GC can happen. Call should
2987 2989 // restore return values to their stack-slots with the new SP.
2988 2990 // Thread is in rdi already.
2989 2991 //
2990 2992 // BasicType unpack_frames(JavaThread* thread, int exec_mode);
2991 2993
2992 2994 __ mov(c_rarg0, r15_thread);
2993 2995 __ movl(c_rarg1, Deoptimization::Unpack_uncommon_trap);
2994 2996 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2995 2997
2996 2998 // Set an oopmap for the call site
2997 2999 oop_maps->add_gc_map(__ pc() - start, new OopMap(SimpleRuntimeFrame::framesize, 0));
2998 3000
2999 3001 __ reset_last_Java_frame(true, false);
3000 3002
3001 3003 // Pop self-frame.
3002 3004 __ leave(); // Epilog
3003 3005
3004 3006 // Jump to interpreter
3005 3007 __ ret(0);
3006 3008
3007 3009 // Make sure all code is generated
3008 3010 masm->flush();
3009 3011
3010 3012 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps,
3011 3013 SimpleRuntimeFrame::framesize >> 1);
3012 3014 }
3013 3015 #endif // COMPILER2
3014 3016
3015 3017
3016 3018 //------------------------------generate_handler_blob------
3017 3019 //
3018 3020 // Generate a special Compile2Runtime blob that saves all registers,
3019 3021 // and setup oopmap.
3020 3022 //
3021 3023 static SafepointBlob* generate_handler_blob(address call_ptr, bool cause_return) {
3022 3024 assert(StubRoutines::forward_exception_entry() != NULL,
3023 3025 "must be generated before");
3024 3026
3025 3027 ResourceMark rm;
3026 3028 OopMapSet *oop_maps = new OopMapSet();
3027 3029 OopMap* map;
3028 3030
3029 3031 // Allocate space for the code. Setup code generation tools.
3030 3032 CodeBuffer buffer("handler_blob", 2048, 1024);
3031 3033 MacroAssembler* masm = new MacroAssembler(&buffer);
3032 3034
3033 3035 address start = __ pc();
3034 3036 address call_pc = NULL;
3035 3037 int frame_size_in_words;
3036 3038
3037 3039 // Make room for return address (or push it again)
3038 3040 if (!cause_return) {
3039 3041 __ push(rbx);
3040 3042 }
3041 3043
3042 3044 // Save registers, fpu state, and flags
3043 3045 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
3044 3046
3045 3047 // The following is basically a call_VM. However, we need the precise
3046 3048 // address of the call in order to generate an oopmap. Hence, we do all the
3047 3049 // work outselves.
3048 3050
3049 3051 __ set_last_Java_frame(noreg, noreg, NULL);
3050 3052
3051 3053 // The return address must always be correct so that frame constructor never
3052 3054 // sees an invalid pc.
3053 3055
3054 3056 if (!cause_return) {
3055 3057 // overwrite the dummy value we pushed on entry
3056 3058 __ movptr(c_rarg0, Address(r15_thread, JavaThread::saved_exception_pc_offset()));
3057 3059 __ movptr(Address(rbp, wordSize), c_rarg0);
3058 3060 }
3059 3061
3060 3062 // Do the call
3061 3063 __ mov(c_rarg0, r15_thread);
3062 3064 __ call(RuntimeAddress(call_ptr));
3063 3065
3064 3066 // Set an oopmap for the call site. This oopmap will map all
3065 3067 // oop-registers and debug-info registers as callee-saved. This
3066 3068 // will allow deoptimization at this safepoint to find all possible
3067 3069 // debug-info recordings, as well as let GC find all oops.
3068 3070
3069 3071 oop_maps->add_gc_map( __ pc() - start, map);
3070 3072
3071 3073 Label noException;
3072 3074
3073 3075 __ reset_last_Java_frame(false, false);
3074 3076
3075 3077 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
3076 3078 __ jcc(Assembler::equal, noException);
3077 3079
3078 3080 // Exception pending
3079 3081
3080 3082 RegisterSaver::restore_live_registers(masm);
3081 3083
3082 3084 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3083 3085
3084 3086 // No exception case
3085 3087 __ bind(noException);
3086 3088
3087 3089 // Normal exit, restore registers and exit.
3088 3090 RegisterSaver::restore_live_registers(masm);
3089 3091
3090 3092 __ ret(0);
3091 3093
3092 3094 // Make sure all code is generated
3093 3095 masm->flush();
3094 3096
3095 3097 // Fill-out other meta info
3096 3098 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words);
3097 3099 }
3098 3100
3099 3101 //
3100 3102 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss
3101 3103 //
3102 3104 // Generate a stub that calls into vm to find out the proper destination
3103 3105 // of a java call. All the argument registers are live at this point
3104 3106 // but since this is generic code we don't know what they are and the caller
3105 3107 // must do any gc of the args.
3106 3108 //
3107 3109 static RuntimeStub* generate_resolve_blob(address destination, const char* name) {
3108 3110 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
3109 3111
3110 3112 // allocate space for the code
3111 3113 ResourceMark rm;
3112 3114
3113 3115 CodeBuffer buffer(name, 1000, 512);
3114 3116 MacroAssembler* masm = new MacroAssembler(&buffer);
3115 3117
3116 3118 int frame_size_in_words;
3117 3119
3118 3120 OopMapSet *oop_maps = new OopMapSet();
3119 3121 OopMap* map = NULL;
3120 3122
3121 3123 int start = __ offset();
3122 3124
3123 3125 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
3124 3126
3125 3127 int frame_complete = __ offset();
3126 3128
3127 3129 __ set_last_Java_frame(noreg, noreg, NULL);
3128 3130
3129 3131 __ mov(c_rarg0, r15_thread);
3130 3132
3131 3133 __ call(RuntimeAddress(destination));
3132 3134
3133 3135
3134 3136 // Set an oopmap for the call site.
3135 3137 // We need this not only for callee-saved registers, but also for volatile
3136 3138 // registers that the compiler might be keeping live across a safepoint.
3137 3139
3138 3140 oop_maps->add_gc_map( __ offset() - start, map);
3139 3141
3140 3142 // rax contains the address we are going to jump to assuming no exception got installed
3141 3143
3142 3144 // clear last_Java_sp
3143 3145 __ reset_last_Java_frame(false, false);
3144 3146 // check for pending exceptions
3145 3147 Label pending;
3146 3148 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
3147 3149 __ jcc(Assembler::notEqual, pending);
3148 3150
3149 3151 // get the returned methodOop
3150 3152 __ movptr(rbx, Address(r15_thread, JavaThread::vm_result_offset()));
3151 3153 __ movptr(Address(rsp, RegisterSaver::rbx_offset_in_bytes()), rbx);
3152 3154
3153 3155 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax);
3154 3156
3155 3157 RegisterSaver::restore_live_registers(masm);
3156 3158
3157 3159 // We are back the the original state on entry and ready to go.
3158 3160
3159 3161 __ jmp(rax);
3160 3162
3161 3163 // Pending exception after the safepoint
3162 3164
3163 3165 __ bind(pending);
3164 3166
3165 3167 RegisterSaver::restore_live_registers(masm);
3166 3168
3167 3169 // exception pending => remove activation and forward to exception handler
3168 3170
3169 3171 __ movptr(Address(r15_thread, JavaThread::vm_result_offset()), (int)NULL_WORD);
3170 3172
3171 3173 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset()));
3172 3174 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3173 3175
3174 3176 // -------------
3175 3177 // make sure all code is generated
3176 3178 masm->flush();
3177 3179
3178 3180 // return the blob
3179 3181 // frame_size_words or bytes??
3180 3182 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_in_words, oop_maps, true);
3181 3183 }
3182 3184
3183 3185
3184 3186 void SharedRuntime::generate_stubs() {
3185 3187
3186 3188 _wrong_method_blob = generate_resolve_blob(CAST_FROM_FN_PTR(address, SharedRuntime::handle_wrong_method),
3187 3189 "wrong_method_stub");
3188 3190 _ic_miss_blob = generate_resolve_blob(CAST_FROM_FN_PTR(address, SharedRuntime::handle_wrong_method_ic_miss),
3189 3191 "ic_miss_stub");
3190 3192 _resolve_opt_virtual_call_blob = generate_resolve_blob(CAST_FROM_FN_PTR(address, SharedRuntime::resolve_opt_virtual_call_C),
3191 3193 "resolve_opt_virtual_call");
3192 3194
3193 3195 _resolve_virtual_call_blob = generate_resolve_blob(CAST_FROM_FN_PTR(address, SharedRuntime::resolve_virtual_call_C),
3194 3196 "resolve_virtual_call");
3195 3197
3196 3198 _resolve_static_call_blob = generate_resolve_blob(CAST_FROM_FN_PTR(address, SharedRuntime::resolve_static_call_C),
3197 3199 "resolve_static_call");
3198 3200 _polling_page_safepoint_handler_blob =
3199 3201 generate_handler_blob(CAST_FROM_FN_PTR(address,
3200 3202 SafepointSynchronize::handle_polling_page_exception), false);
3201 3203
3202 3204 _polling_page_return_handler_blob =
3203 3205 generate_handler_blob(CAST_FROM_FN_PTR(address,
3204 3206 SafepointSynchronize::handle_polling_page_exception), true);
3205 3207
3206 3208 generate_deopt_blob();
3207 3209
3208 3210 #ifdef COMPILER2
3209 3211 generate_uncommon_trap_blob();
3210 3212 #endif // COMPILER2
3211 3213 }
3212 3214
3213 3215
3214 3216 #ifdef COMPILER2
3215 3217 // This is here instead of runtime_x86_64.cpp because it uses SimpleRuntimeFrame
3216 3218 //
3217 3219 //------------------------------generate_exception_blob---------------------------
3218 3220 // creates exception blob at the end
3219 3221 // Using exception blob, this code is jumped from a compiled method.
3220 3222 // (see emit_exception_handler in x86_64.ad file)
3221 3223 //
3222 3224 // Given an exception pc at a call we call into the runtime for the
3223 3225 // handler in this method. This handler might merely restore state
3224 3226 // (i.e. callee save registers) unwind the frame and jump to the
3225 3227 // exception handler for the nmethod if there is no Java level handler
3226 3228 // for the nmethod.
3227 3229 //
3228 3230 // This code is entered with a jmp.
3229 3231 //
3230 3232 // Arguments:
3231 3233 // rax: exception oop
3232 3234 // rdx: exception pc
3233 3235 //
3234 3236 // Results:
3235 3237 // rax: exception oop
3236 3238 // rdx: exception pc in caller or ???
3237 3239 // destination: exception handler of caller
3238 3240 //
3239 3241 // Note: the exception pc MUST be at a call (precise debug information)
3240 3242 // Registers rax, rdx, rcx, rsi, rdi, r8-r11 are not callee saved.
3241 3243 //
3242 3244
3243 3245 void OptoRuntime::generate_exception_blob() {
3244 3246 assert(!OptoRuntime::is_callee_saved_register(RDX_num), "");
3245 3247 assert(!OptoRuntime::is_callee_saved_register(RAX_num), "");
3246 3248 assert(!OptoRuntime::is_callee_saved_register(RCX_num), "");
3247 3249
3248 3250 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned");
3249 3251
3250 3252 // Allocate space for the code
3251 3253 ResourceMark rm;
3252 3254 // Setup code generation tools
3253 3255 CodeBuffer buffer("exception_blob", 2048, 1024);
3254 3256 MacroAssembler* masm = new MacroAssembler(&buffer);
3255 3257
3256 3258
3257 3259 address start = __ pc();
3258 3260
3259 3261 // Exception pc is 'return address' for stack walker
3260 3262 __ push(rdx);
3261 3263 __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Prolog
3262 3264
3263 3265 // Save callee-saved registers. See x86_64.ad.
3264 3266
3265 3267 // rbp is an implicitly saved callee saved register (i.e. the calling
3266 3268 // convention will save restore it in prolog/epilog) Other than that
3267 3269 // there are no callee save registers now that adapter frames are gone.
3268 3270
3269 3271 __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp);
3270 3272
3271 3273 // Store exception in Thread object. We cannot pass any arguments to the
3272 3274 // handle_exception call, since we do not want to make any assumption
3273 3275 // about the size of the frame where the exception happened in.
3274 3276 // c_rarg0 is either rdi (Linux) or rcx (Windows).
3275 3277 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()),rax);
3276 3278 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx);
3277 3279
3278 3280 // This call does all the hard work. It checks if an exception handler
3279 3281 // exists in the method.
3280 3282 // If so, it returns the handler address.
3281 3283 // If not, it prepares for stack-unwinding, restoring the callee-save
3282 3284 // registers of the frame being removed.
3283 3285 //
3284 3286 // address OptoRuntime::handle_exception_C(JavaThread* thread)
3285 3287
3286 3288 __ set_last_Java_frame(noreg, noreg, NULL);
3287 3289 __ mov(c_rarg0, r15_thread);
3288 3290 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, OptoRuntime::handle_exception_C)));
3289 3291
3290 3292 // Set an oopmap for the call site. This oopmap will only be used if we
3291 3293 // are unwinding the stack. Hence, all locations will be dead.
3292 3294 // Callee-saved registers will be the same as the frame above (i.e.,
3293 3295 // handle_exception_stub), since they were restored when we got the
3294 3296 // exception.
3295 3297
3296 3298 OopMapSet* oop_maps = new OopMapSet();
3297 3299
3298 3300 oop_maps->add_gc_map( __ pc()-start, new OopMap(SimpleRuntimeFrame::framesize, 0));
3299 3301
3300 3302 __ reset_last_Java_frame(false, false);
3301 3303
3302 3304 // Restore callee-saved registers
3303 3305
3304 3306 // rbp is an implicitly saved callee saved register (i.e. the calling
3305 3307 // convention will save restore it in prolog/epilog) Other than that
3306 3308 // there are no callee save registers no that adapter frames are gone.
3307 3309
3308 3310 __ movptr(rbp, Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt));
3309 3311
3310 3312 __ addptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog
3311 3313 __ pop(rdx); // No need for exception pc anymore
3312 3314
3313 3315 // rax: exception handler
3314 3316
3315 3317 // Restore SP from BP if the exception PC is a MethodHandle call site.
3316 3318 __ cmpl(Address(r15_thread, JavaThread::is_method_handle_return_offset()), 0);
3317 3319 __ cmovptr(Assembler::notEqual, rsp, rbp_mh_SP_save);
3318 3320
3319 3321 // We have a handler in rax (could be deopt blob).
3320 3322 __ mov(r8, rax);
3321 3323
3322 3324 // Get the exception oop
3323 3325 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset()));
3324 3326 // Get the exception pc in case we are deoptimized
3325 3327 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset()));
3326 3328 #ifdef ASSERT
3327 3329 __ movptr(Address(r15_thread, JavaThread::exception_handler_pc_offset()), (int)NULL_WORD);
3328 3330 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int)NULL_WORD);
3329 3331 #endif
3330 3332 // Clear the exception oop so GC no longer processes it as a root.
3331 3333 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int)NULL_WORD);
3332 3334
3333 3335 // rax: exception oop
3334 3336 // r8: exception handler
3335 3337 // rdx: exception pc
3336 3338 // Jump to handler
3337 3339
3338 3340 __ jmp(r8);
3339 3341
3340 3342 // Make sure all code is generated
3341 3343 masm->flush();
3342 3344
3343 3345 // Set exception blob
3344 3346 _exception_blob = ExceptionBlob::create(&buffer, oop_maps, SimpleRuntimeFrame::framesize >> 1);
3345 3347 }
3346 3348 #endif // COMPILER2
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