1 /*
   2  * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *

 194       FLAG_SET_DEFAULT(UseBlockZeroing, true);
 195     }
 196   } else if (UseBlockZeroing) {
 197     warning("BIS zeroing instructions are not available on this CPU");
 198     FLAG_SET_DEFAULT(UseBlockZeroing, false);
 199   }
 200 
 201   assert(BlockCopyLowLimit > 0, "invalid value");
 202   if (has_block_zeroing()) { // has_blk_init() && is_T4(): core's local L2 cache
 203     if (FLAG_IS_DEFAULT(UseBlockCopy)) {
 204       FLAG_SET_DEFAULT(UseBlockCopy, true);
 205     }
 206   } else if (UseBlockCopy) {
 207     warning("BIS instructions are not available or expensive on this CPU");
 208     FLAG_SET_DEFAULT(UseBlockCopy, false);
 209   }
 210 
 211 #ifdef COMPILER2
 212   // T4 and newer Sparc cpus have fast RDPC.
 213   if (has_fast_rdpc() && FLAG_IS_DEFAULT(UseRDPCForConstantTableBase)) {
 214 //    FLAG_SET_DEFAULT(UseRDPCForConstantTableBase, true);
 215   }
 216 
 217   // Currently not supported anywhere.
 218   FLAG_SET_DEFAULT(UseFPUForSpilling, false);
 219 
 220   assert((InteriorEntryAlignment % relocInfo::addr_unit()) == 0, "alignment is not a multiple of NOP size");
 221 #endif
 222 
 223   assert((CodeEntryAlignment % relocInfo::addr_unit()) == 0, "alignment is not a multiple of NOP size");
 224   assert((OptoLoopAlignment % relocInfo::addr_unit()) == 0, "alignment is not a multiple of NOP size");
 225 
 226   char buf[512];
 227   jio_snprintf(buf, sizeof(buf), "%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
 228                (has_v9() ? ", v9" : (has_v8() ? ", v8" : "")),
 229                (has_hardware_popc() ? ", popc" : ""),
 230                (has_vis1() ? ", vis1" : ""),
 231                (has_vis2() ? ", vis2" : ""),
 232                (has_vis3() ? ", vis3" : ""),
 233                (has_blk_init() ? ", blk_init" : ""),
 234                (has_cbcond() ? ", cbcond" : ""),

   1 /*
   2  * Copyright (c) 1997, 2011, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *

 194       FLAG_SET_DEFAULT(UseBlockZeroing, true);
 195     }
 196   } else if (UseBlockZeroing) {
 197     warning("BIS zeroing instructions are not available on this CPU");
 198     FLAG_SET_DEFAULT(UseBlockZeroing, false);
 199   }
 200 
 201   assert(BlockCopyLowLimit > 0, "invalid value");
 202   if (has_block_zeroing()) { // has_blk_init() && is_T4(): core's local L2 cache
 203     if (FLAG_IS_DEFAULT(UseBlockCopy)) {
 204       FLAG_SET_DEFAULT(UseBlockCopy, true);
 205     }
 206   } else if (UseBlockCopy) {
 207     warning("BIS instructions are not available or expensive on this CPU");
 208     FLAG_SET_DEFAULT(UseBlockCopy, false);
 209   }
 210 
 211 #ifdef COMPILER2
 212   // T4 and newer Sparc cpus have fast RDPC.
 213   if (has_fast_rdpc() && FLAG_IS_DEFAULT(UseRDPCForConstantTableBase)) {
 214     FLAG_SET_DEFAULT(UseRDPCForConstantTableBase, true);
 215   }
 216 
 217   // Currently not supported anywhere.
 218   FLAG_SET_DEFAULT(UseFPUForSpilling, false);
 219 
 220   assert((InteriorEntryAlignment % relocInfo::addr_unit()) == 0, "alignment is not a multiple of NOP size");
 221 #endif
 222 
 223   assert((CodeEntryAlignment % relocInfo::addr_unit()) == 0, "alignment is not a multiple of NOP size");
 224   assert((OptoLoopAlignment % relocInfo::addr_unit()) == 0, "alignment is not a multiple of NOP size");
 225 
 226   char buf[512];
 227   jio_snprintf(buf, sizeof(buf), "%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
 228                (has_v9() ? ", v9" : (has_v8() ? ", v8" : "")),
 229                (has_hardware_popc() ? ", popc" : ""),
 230                (has_vis1() ? ", vis1" : ""),
 231                (has_vis2() ? ", vis2" : ""),
 232                (has_vis3() ? ", vis3" : ""),
 233                (has_blk_init() ? ", blk_init" : ""),
 234                (has_cbcond() ? ", cbcond" : ""),