src/cpu/x86/vm/assembler_x86.cpp
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8004536 Cdiff src/cpu/x86/vm/assembler_x86.cpp
src/cpu/x86/vm/assembler_x86.cpp
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*** 1227,1237 ****
InstructionMark im(this);
assert(!dst.base_needs_rex() && !dst.index_needs_rex(), "no extended registers");
emit_byte(0x66);
emit_byte(0x81);
emit_operand(rdi, dst, 2);
! emit_word(imm16);
}
// The 32-bit cmpxchg compares the value at adr with the contents of rax,
// and stores reg into adr if so; otherwise, the value at adr is loaded into rax,.
// The ZF is set if the compared values were equal, and cleared otherwise.
--- 1227,1237 ----
InstructionMark im(this);
assert(!dst.base_needs_rex() && !dst.index_needs_rex(), "no extended registers");
emit_byte(0x66);
emit_byte(0x81);
emit_operand(rdi, dst, 2);
! emit_int16(imm16);
}
// The 32-bit cmpxchg compares the value at adr with the contents of rax,
// and stores reg into adr if so; otherwise, the value at adr is loaded into rax,.
// The ZF is set if the compared values were equal, and cleared otherwise.
*** 1877,1887 ****
emit_byte(0x66); // switch to 16-bit mode
prefix(dst);
emit_byte(0xC7);
emit_operand(rax, dst, 2);
! emit_word(imm16);
}
void Assembler::movw(Register dst, Address src) {
InstructionMark im(this);
emit_byte(0x66);
--- 1877,1887 ----
emit_byte(0x66); // switch to 16-bit mode
prefix(dst);
emit_byte(0xC7);
emit_operand(rax, dst, 2);
! emit_int16(imm16);
}
void Assembler::movw(Register dst, Address src) {
InstructionMark im(this);
emit_byte(0x66);
*** 2569,2579 ****
void Assembler::ret(int imm16) {
if (imm16 == 0) {
emit_byte(0xC3);
} else {
emit_byte(0xC2);
! emit_word(imm16);
}
}
void Assembler::sahf() {
#ifdef _LP64
--- 2569,2579 ----
void Assembler::ret(int imm16) {
if (imm16 == 0) {
emit_byte(0xC3);
} else {
emit_byte(0xC2);
! emit_int16(imm16);
}
}
void Assembler::sahf() {
#ifdef _LP64
src/cpu/x86/vm/assembler_x86.cpp
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