1 /* 2 * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #ifndef SHARE_VM_ASM_ASSEMBLER_HPP 26 #define SHARE_VM_ASM_ASSEMBLER_HPP 27 28 #include "asm/codeBuffer.hpp" 29 #include "code/oopRecorder.hpp" 30 #include "code/relocInfo.hpp" 31 #include "memory/allocation.hpp" 32 #include "utilities/debug.hpp" 33 #include "utilities/growableArray.hpp" 34 #include "utilities/top.hpp" 35 36 #ifdef TARGET_ARCH_x86 37 # include "register_x86.hpp" 38 # include "vm_version_x86.hpp" 39 #endif 40 #ifdef TARGET_ARCH_sparc 41 # include "register_sparc.hpp" 42 # include "vm_version_sparc.hpp" 43 #endif 44 #ifdef TARGET_ARCH_zero 45 # include "register_zero.hpp" 46 # include "vm_version_zero.hpp" 47 #endif 48 #ifdef TARGET_ARCH_arm 49 # include "register_arm.hpp" 50 # include "vm_version_arm.hpp" 51 #endif 52 #ifdef TARGET_ARCH_ppc 53 # include "register_ppc.hpp" 54 # include "vm_version_ppc.hpp" 55 #endif 56 57 // This file contains platform-independent assembler declarations. 58 59 class MacroAssembler; 60 class AbstractAssembler; 61 class Label; 62 63 /** 64 * Labels represent destinations for control transfer instructions. Such 65 * instructions can accept a Label as their target argument. A Label is 66 * bound to the current location in the code stream by calling the 67 * MacroAssembler's 'bind' method, which in turn calls the Label's 'bind' 68 * method. A Label may be referenced by an instruction before it's bound 69 * (i.e., 'forward referenced'). 'bind' stores the current code offset 70 * in the Label object. 71 * 72 * If an instruction references a bound Label, the offset field(s) within 73 * the instruction are immediately filled in based on the Label's code 74 * offset. If an instruction references an unbound label, that 75 * instruction is put on a list of instructions that must be patched 76 * (i.e., 'resolved') when the Label is bound. 77 * 78 * 'bind' will call the platform-specific 'patch_instruction' method to 79 * fill in the offset field(s) for each unresolved instruction (if there 80 * are any). 'patch_instruction' lives in one of the 81 * cpu/<arch>/vm/assembler_<arch>* files. 82 * 83 * Instead of using a linked list of unresolved instructions, a Label has 84 * an array of unresolved instruction code offsets. _patch_index 85 * contains the total number of forward references. If the Label's array 86 * overflows (i.e., _patch_index grows larger than the array size), a 87 * GrowableArray is allocated to hold the remaining offsets. (The cache 88 * size is 4 for now, which handles over 99.5% of the cases) 89 * 90 * Labels may only be used within a single CodeSection. If you need 91 * to create references between code sections, use explicit relocations. 92 */ 93 class Label VALUE_OBJ_CLASS_SPEC { 94 private: 95 enum { PatchCacheSize = 4 }; 96 97 // _loc encodes both the binding state (via its sign) 98 // and the binding locator (via its value) of a label. 99 // 100 // _loc >= 0 bound label, loc() encodes the target (jump) position 101 // _loc == -1 unbound label 102 int _loc; 103 104 // References to instructions that jump to this unresolved label. 105 // These instructions need to be patched when the label is bound 106 // using the platform-specific patchInstruction() method. 107 // 108 // To avoid having to allocate from the C-heap each time, we provide 109 // a local cache and use the overflow only if we exceed the local cache 110 int _patches[PatchCacheSize]; 111 int _patch_index; 112 GrowableArray<int>* _patch_overflow; 113 114 Label(const Label&) { ShouldNotReachHere(); } 115 116 public: 117 118 /** 119 * After binding, be sure 'patch_instructions' is called later to link 120 */ 121 void bind_loc(int loc) { 122 assert(loc >= 0, "illegal locator"); 123 assert(_loc == -1, "already bound"); 124 _loc = loc; 125 } 126 void bind_loc(int pos, int sect) { bind_loc(CodeBuffer::locator(pos, sect)); } 127 128 #ifndef PRODUCT 129 // Iterates over all unresolved instructions for printing 130 void print_instructions(MacroAssembler* masm) const; 131 #endif // PRODUCT 132 133 /** 134 * Returns the position of the the Label in the code buffer 135 * The position is a 'locator', which encodes both offset and section. 136 */ 137 int loc() const { 138 assert(_loc >= 0, "unbound label"); 139 return _loc; 140 } 141 int loc_pos() const { return CodeBuffer::locator_pos(loc()); } 142 int loc_sect() const { return CodeBuffer::locator_sect(loc()); } 143 144 bool is_bound() const { return _loc >= 0; } 145 bool is_unbound() const { return _loc == -1 && _patch_index > 0; } 146 bool is_unused() const { return _loc == -1 && _patch_index == 0; } 147 148 /** 149 * Adds a reference to an unresolved displacement instruction to 150 * this unbound label 151 * 152 * @param cb the code buffer being patched 153 * @param branch_loc the locator of the branch instruction in the code buffer 154 */ 155 void add_patch_at(CodeBuffer* cb, int branch_loc); 156 157 /** 158 * Iterate over the list of patches, resolving the instructions 159 * Call patch_instruction on each 'branch_loc' value 160 */ 161 void patch_instructions(MacroAssembler* masm); 162 163 void init() { 164 _loc = -1; 165 _patch_index = 0; 166 _patch_overflow = NULL; 167 } 168 169 Label() { 170 init(); 171 } 172 }; 173 174 // A union type for code which has to assemble both constant and 175 // non-constant operands, when the distinction cannot be made 176 // statically. 177 class RegisterOrConstant VALUE_OBJ_CLASS_SPEC { 178 private: 179 Register _r; 180 intptr_t _c; 181 182 public: 183 RegisterOrConstant(): _r(noreg), _c(0) {} 184 RegisterOrConstant(Register r): _r(r), _c(0) {} 185 RegisterOrConstant(intptr_t c): _r(noreg), _c(c) {} 186 187 Register as_register() const { assert(is_register(),""); return _r; } 188 intptr_t as_constant() const { assert(is_constant(),""); return _c; } 189 190 Register register_or_noreg() const { return _r; } 191 intptr_t constant_or_zero() const { return _c; } 192 193 bool is_register() const { return _r != noreg; } 194 bool is_constant() const { return _r == noreg; } 195 }; 196 197 // The Abstract Assembler: Pure assembler doing NO optimizations on the 198 // instruction level; i.e., what you write is what you get. 199 // The Assembler is generating code into a CodeBuffer. 200 class AbstractAssembler : public ResourceObj { 201 friend class Label; 202 203 protected: 204 CodeSection* _code_section; // section within the code buffer 205 OopRecorder* _oop_recorder; // support for relocInfo::oop_type 206 207 // Code emission & accessing 208 address addr_at(int pos) const { return code_section()->start() + pos; } 209 210 211 // This routine is called with a label is used for an address. 212 // Labels and displacements truck in offsets, but target must return a PC. 213 address target(Label& L) { return code_section()->target(L, pc()); } 214 215 bool is8bit(int x) const { return -0x80 <= x && x < 0x80; } 216 bool isByte(int x) const { return 0 <= x && x < 0x100; } 217 bool isShiftCount(int x) const { return 0 <= x && x < 32; } 218 219 void emit_long(jint x) { emit_int32(x); } // deprecated 220 221 // Instruction boundaries (required when emitting relocatable values). 222 class InstructionMark: public StackObj { 223 private: 224 AbstractAssembler* _assm; 225 226 public: 227 InstructionMark(AbstractAssembler* assm) : _assm(assm) { 228 assert(assm->inst_mark() == NULL, "overlapping instructions"); 229 _assm->set_inst_mark(); 230 } 231 ~InstructionMark() { 232 _assm->clear_inst_mark(); 233 } 234 }; 235 friend class InstructionMark; 236 #ifdef ASSERT 237 // Make it return true on platforms which need to verify 238 // instruction boundaries for some operations. 239 static bool pd_check_instruction_mark(); 240 241 // Add delta to short branch distance to verify that it still fit into imm8. 242 int _short_branch_delta; 243 244 int short_branch_delta() const { return _short_branch_delta; } 245 void set_short_branch_delta() { _short_branch_delta = 32; } 246 void clear_short_branch_delta() { _short_branch_delta = 0; } 247 248 class ShortBranchVerifier: public StackObj { 249 private: 250 AbstractAssembler* _assm; 251 252 public: 253 ShortBranchVerifier(AbstractAssembler* assm) : _assm(assm) { 254 assert(assm->short_branch_delta() == 0, "overlapping instructions"); 255 _assm->set_short_branch_delta(); 256 } 257 ~ShortBranchVerifier() { 258 _assm->clear_short_branch_delta(); 259 } 260 }; 261 #else 262 // Dummy in product. 263 class ShortBranchVerifier: public StackObj { 264 public: 265 ShortBranchVerifier(AbstractAssembler* assm) {} 266 }; 267 #endif 268 269 public: 270 271 // Creation 272 AbstractAssembler(CodeBuffer* code); 273 274 // ensure buf contains all code (call this before using/copying the code) 275 void flush(); 276 277 void emit_int8( int8_t x) { code_section()->emit_int8( x); } 278 void emit_int16( int16_t x) { code_section()->emit_int16( x); } 279 void emit_int32( int32_t x) { code_section()->emit_int32( x); } 280 void emit_int64( int64_t x) { code_section()->emit_int64( x); } 281 282 void emit_float( jfloat x) { code_section()->emit_float( x); } 283 void emit_double( jdouble x) { code_section()->emit_double( x); } 284 void emit_address(address x) { code_section()->emit_address(x); } 285 286 // min and max values for signed immediate ranges 287 static int min_simm(int nbits) { return -(intptr_t(1) << (nbits - 1)) ; } 288 static int max_simm(int nbits) { return (intptr_t(1) << (nbits - 1)) - 1; } 289 290 // Define some: 291 static int min_simm10() { return min_simm(10); } 292 static int min_simm13() { return min_simm(13); } 293 static int min_simm16() { return min_simm(16); } 294 295 // Test if x is within signed immediate range for nbits 296 static bool is_simm(intptr_t x, int nbits) { return min_simm(nbits) <= x && x <= max_simm(nbits); } 297 298 // Define some: 299 static bool is_simm5( intptr_t x) { return is_simm(x, 5 ); } 300 static bool is_simm8( intptr_t x) { return is_simm(x, 8 ); } 301 static bool is_simm10(intptr_t x) { return is_simm(x, 10); } 302 static bool is_simm11(intptr_t x) { return is_simm(x, 11); } 303 static bool is_simm12(intptr_t x) { return is_simm(x, 12); } 304 static bool is_simm13(intptr_t x) { return is_simm(x, 13); } 305 static bool is_simm16(intptr_t x) { return is_simm(x, 16); } 306 static bool is_simm26(intptr_t x) { return is_simm(x, 26); } 307 static bool is_simm32(intptr_t x) { return is_simm(x, 32); } 308 309 // Accessors 310 CodeSection* code_section() const { return _code_section; } 311 CodeBuffer* code() const { return code_section()->outer(); } 312 int sect() const { return code_section()->index(); } 313 address pc() const { return code_section()->end(); } 314 int offset() const { return code_section()->size(); } 315 int locator() const { return CodeBuffer::locator(offset(), sect()); } 316 317 OopRecorder* oop_recorder() const { return _oop_recorder; } 318 void set_oop_recorder(OopRecorder* r) { _oop_recorder = r; } 319 320 address inst_mark() const { return code_section()->mark(); } 321 void set_inst_mark() { code_section()->set_mark(); } 322 void clear_inst_mark() { code_section()->clear_mark(); } 323 324 // Constants in code 325 void relocate(RelocationHolder const& rspec, int format = 0) { 326 assert(!pd_check_instruction_mark() 327 || inst_mark() == NULL || inst_mark() == code_section()->end(), 328 "call relocate() between instructions"); 329 code_section()->relocate(code_section()->end(), rspec, format); 330 } 331 void relocate( relocInfo::relocType rtype, int format = 0) { 332 code_section()->relocate(code_section()->end(), rtype, format); 333 } 334 335 static int code_fill_byte(); // used to pad out odd-sized code buffers 336 337 // Associate a comment with the current offset. It will be printed 338 // along with the disassembly when printing nmethods. Currently 339 // only supported in the instruction section of the code buffer. 340 void block_comment(const char* comment); 341 342 // Label functions 343 void bind(Label& L); // binds an unbound label L to the current code position 344 345 // Move to a different section in the same code buffer. 346 void set_code_section(CodeSection* cs); 347 348 // Inform assembler when generating stub code and relocation info 349 address start_a_stub(int required_space); 350 void end_a_stub(); 351 // Ditto for constants. 352 address start_a_const(int required_space, int required_align = sizeof(double)); 353 void end_a_const(CodeSection* cs); // Pass the codesection to continue in (insts or stubs?). 354 355 // constants support 356 // 357 // We must remember the code section (insts or stubs) in c1 358 // so we can reset to the proper section in end_a_const(). 359 address long_constant(jlong c) { 360 CodeSection* c1 = _code_section; 361 address ptr = start_a_const(sizeof(c), sizeof(c)); 362 if (ptr != NULL) { 363 emit_int64(c); 364 end_a_const(c1); 365 } 366 return ptr; 367 } 368 address double_constant(jdouble c) { 369 CodeSection* c1 = _code_section; 370 address ptr = start_a_const(sizeof(c), sizeof(c)); 371 if (ptr != NULL) { 372 emit_double(c); 373 end_a_const(c1); 374 } 375 return ptr; 376 } 377 address float_constant(jfloat c) { 378 CodeSection* c1 = _code_section; 379 address ptr = start_a_const(sizeof(c), sizeof(c)); 380 if (ptr != NULL) { 381 emit_float(c); 382 end_a_const(c1); 383 } 384 return ptr; 385 } 386 address address_constant(address c) { 387 CodeSection* c1 = _code_section; 388 address ptr = start_a_const(sizeof(c), sizeof(c)); 389 if (ptr != NULL) { 390 emit_address(c); 391 end_a_const(c1); 392 } 393 return ptr; 394 } 395 address address_constant(address c, RelocationHolder const& rspec) { 396 CodeSection* c1 = _code_section; 397 address ptr = start_a_const(sizeof(c), sizeof(c)); 398 if (ptr != NULL) { 399 relocate(rspec); 400 emit_address(c); 401 end_a_const(c1); 402 } 403 return ptr; 404 } 405 406 // Bootstrapping aid to cope with delayed determination of constants. 407 // Returns a static address which will eventually contain the constant. 408 // The value zero (NULL) stands instead of a constant which is still uncomputed. 409 // Thus, the eventual value of the constant must not be zero. 410 // This is fine, since this is designed for embedding object field 411 // offsets in code which must be generated before the object class is loaded. 412 // Field offsets are never zero, since an object's header (mark word) 413 // is located at offset zero. 414 RegisterOrConstant delayed_value(int(*value_fn)(), Register tmp, int offset = 0); 415 RegisterOrConstant delayed_value(address(*value_fn)(), Register tmp, int offset = 0); 416 virtual RegisterOrConstant delayed_value_impl(intptr_t* delayed_value_addr, Register tmp, int offset) = 0; 417 // Last overloading is platform-dependent; look in assembler_<arch>.cpp. 418 static intptr_t* delayed_value_addr(int(*constant_fn)()); 419 static intptr_t* delayed_value_addr(address(*constant_fn)()); 420 static void update_delayed_values(); 421 422 // Bang stack to trigger StackOverflowError at a safe location 423 // implementation delegates to machine-specific bang_stack_with_offset 424 void generate_stack_overflow_check( int frame_size_in_bytes ); 425 virtual void bang_stack_with_offset(int offset) = 0; 426 427 428 /** 429 * A platform-dependent method to patch a jump instruction that refers 430 * to this label. 431 * 432 * @param branch the location of the instruction to patch 433 * @param masm the assembler which generated the branch 434 */ 435 void pd_patch_instruction(address branch, address target); 436 437 }; 438 439 #ifdef TARGET_ARCH_x86 440 # include "assembler_x86.hpp" 441 #endif 442 #ifdef TARGET_ARCH_sparc 443 # include "assembler_sparc.hpp" 444 #endif 445 #ifdef TARGET_ARCH_zero 446 # include "assembler_zero.hpp" 447 #endif 448 #ifdef TARGET_ARCH_arm 449 # include "assembler_arm.hpp" 450 #endif 451 #ifdef TARGET_ARCH_ppc 452 # include "assembler_ppc.hpp" 453 #endif 454 455 456 #endif // SHARE_VM_ASM_ASSEMBLER_HPP