22 * 23 */ 24 25 #ifndef CPU_X86_VM_C1_DEFS_X86_HPP 26 #define CPU_X86_VM_C1_DEFS_X86_HPP 27 28 // native word offsets from memory address (little endian) 29 enum { 30 pd_lo_word_offset_in_bytes = 0, 31 pd_hi_word_offset_in_bytes = BytesPerWord 32 }; 33 34 // explicit rounding operations are required to implement the strictFP mode 35 enum { 36 pd_strict_fp_requires_explicit_rounding = true 37 }; 38 39 40 // registers 41 enum { 42 pd_nof_cpu_regs_frame_map = RegisterImpl::number_of_registers, // number of registers used during code emission 43 pd_nof_fpu_regs_frame_map = FloatRegisterImpl::number_of_registers, // number of registers used during code emission 44 pd_nof_xmm_regs_frame_map = XMMRegisterImpl::number_of_registers, // number of registers used during code emission 45 46 #ifdef _LP64 47 #define UNALLOCATED 4 // rsp, rbp, r15, r10 48 #else 49 #define UNALLOCATED 2 // rsp, rbp 50 #endif // LP64 51 52 pd_nof_caller_save_cpu_regs_frame_map = pd_nof_cpu_regs_frame_map - UNALLOCATED, // number of registers killed by calls 53 pd_nof_caller_save_fpu_regs_frame_map = pd_nof_fpu_regs_frame_map, // number of registers killed by calls 54 pd_nof_caller_save_xmm_regs_frame_map = pd_nof_xmm_regs_frame_map, // number of registers killed by calls 55 56 pd_nof_cpu_regs_reg_alloc = pd_nof_caller_save_cpu_regs_frame_map, // number of registers that are visible to register allocator 57 pd_nof_fpu_regs_reg_alloc = 6, // number of registers that are visible to register allocator 58 59 pd_nof_cpu_regs_linearscan = pd_nof_cpu_regs_frame_map, // number of registers visible to linear scan 60 pd_nof_fpu_regs_linearscan = pd_nof_fpu_regs_frame_map, // number of registers visible to linear scan 61 pd_nof_xmm_regs_linearscan = pd_nof_xmm_regs_frame_map, // number of registers visible to linear scan 62 pd_first_cpu_reg = 0, 63 pd_last_cpu_reg = NOT_LP64(5) LP64_ONLY(11), 64 pd_first_byte_reg = NOT_LP64(2) LP64_ONLY(0), | 22 * 23 */ 24 25 #ifndef CPU_X86_VM_C1_DEFS_X86_HPP 26 #define CPU_X86_VM_C1_DEFS_X86_HPP 27 28 // native word offsets from memory address (little endian) 29 enum { 30 pd_lo_word_offset_in_bytes = 0, 31 pd_hi_word_offset_in_bytes = BytesPerWord 32 }; 33 34 // explicit rounding operations are required to implement the strictFP mode 35 enum { 36 pd_strict_fp_requires_explicit_rounding = true 37 }; 38 39 40 // registers 41 enum { 42 pd_nof_cpu_regs_frame_map = Register::number_of_registers, // number of registers used during code emission 43 pd_nof_fpu_regs_frame_map = FloatRegister::number_of_registers, // number of registers used during code emission 44 pd_nof_xmm_regs_frame_map = XMMRegister::number_of_registers, // number of registers used during code emission 45 46 #ifdef _LP64 47 #define UNALLOCATED 4 // rsp, rbp, r15, r10 48 #else 49 #define UNALLOCATED 2 // rsp, rbp 50 #endif // LP64 51 52 pd_nof_caller_save_cpu_regs_frame_map = pd_nof_cpu_regs_frame_map - UNALLOCATED, // number of registers killed by calls 53 pd_nof_caller_save_fpu_regs_frame_map = pd_nof_fpu_regs_frame_map, // number of registers killed by calls 54 pd_nof_caller_save_xmm_regs_frame_map = pd_nof_xmm_regs_frame_map, // number of registers killed by calls 55 56 pd_nof_cpu_regs_reg_alloc = pd_nof_caller_save_cpu_regs_frame_map, // number of registers that are visible to register allocator 57 pd_nof_fpu_regs_reg_alloc = 6, // number of registers that are visible to register allocator 58 59 pd_nof_cpu_regs_linearscan = pd_nof_cpu_regs_frame_map, // number of registers visible to linear scan 60 pd_nof_fpu_regs_linearscan = pd_nof_fpu_regs_frame_map, // number of registers visible to linear scan 61 pd_nof_xmm_regs_linearscan = pd_nof_xmm_regs_frame_map, // number of registers visible to linear scan 62 pd_first_cpu_reg = 0, 63 pd_last_cpu_reg = NOT_LP64(5) LP64_ONLY(11), 64 pd_first_byte_reg = NOT_LP64(2) LP64_ONLY(0), |