*** old/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp	Thu Apr 24 15:52:58 2014
--- new/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp	Thu Apr 24 15:52:58 2014

*** 1010,1020 ****
--- 1010,1020 ----
  #ifdef _LP64
      if (UseCompressedOops && !wide) {
        __ movptr(compressed_src, src->as_register());
        __ encode_heap_oop(compressed_src);
        if (patch_code != lir_patch_none) {
!         info->oop_map()->set_narrowoop(compressed_src->as_VMReg());
!         info->oop_map()->set_narrowoop(compressed_src.as_VMReg());
        }
      }
  #endif
    }
  

*** 1110,1120 ****
--- 1110,1120 ----
  
      case T_BYTE:    // fall through
      case T_BOOLEAN: {
        Register src_reg = src->as_register();
        Address dst_addr = as_Address(to_addr);
!       assert(VM_Version::is_P6() || src_reg->has_byte_register(), "must use byte registers if not P6");
!       assert(VM_Version::is_P6() || src_reg.has_byte_register(), "must use byte registers if not P6");
        __ movb(dst_addr, src_reg);
        break;
      }
  
      case T_CHAR:    // fall through

*** 1336,1346 ****
--- 1336,1346 ----
      }
  
      case T_BOOLEAN: // fall through
      case T_BYTE: {
        Register dest_reg = dest->as_register();
!       assert(VM_Version::is_P6() || dest_reg->has_byte_register(), "must use byte registers if not P6");
!       assert(VM_Version::is_P6() || dest_reg.has_byte_register(), "must use byte registers if not P6");
        if (VM_Version::is_P6() || from_addr.uses(dest_reg)) {
          __ movsbl(dest_reg, from_addr);
        } else {
          __ movb(dest_reg, from_addr);
          __ shll(dest_reg, 24);

*** 1349,1359 ****
--- 1349,1359 ----
        break;
      }
  
      case T_CHAR: {
        Register dest_reg = dest->as_register();
!       assert(VM_Version::is_P6() || dest_reg->has_byte_register(), "must use byte registers if not P6");
!       assert(VM_Version::is_P6() || dest_reg.has_byte_register(), "must use byte registers if not P6");
        if (VM_Version::is_P6() || from_addr.uses(dest_reg)) {
          __ movzwl(dest_reg, from_addr);
        } else {
          __ movw(dest_reg, from_addr);
        }

*** 1986,1996 ****
--- 1986,1996 ----
      NOT_LP64(assert(op->addr()->is_single_cpu(), "must be single");)
      Register addr = (op->addr()->is_single_cpu() ? op->addr()->as_register() : op->addr()->as_register_lo());
      Register newval = op->new_value()->as_register();
      Register cmpval = op->cmp_value()->as_register();
      assert(cmpval == rax, "wrong register");
!     assert(newval != NULL, "new val must be register");
!     assert(newval != noreg, "new val must be register");
      assert(cmpval != newval, "cmp and new values must be in different registers");
      assert(cmpval != addr, "cmp and addr must be in different registers");
      assert(newval != addr, "new value and addr must be in different registers");
  
      if ( op->code() == lir_cas_obj) {

*** 2023,2033 ****
--- 2023,2033 ----
    } else if (op->code() == lir_cas_long) {
      Register addr = (op->addr()->is_single_cpu() ? op->addr()->as_register() : op->addr()->as_register_lo());
      Register newval = op->new_value()->as_register_lo();
      Register cmpval = op->cmp_value()->as_register_lo();
      assert(cmpval == rax, "wrong register");
!     assert(newval != NULL, "new val must be register");
!     assert(newval != noreg, "new val must be register");
      assert(cmpval != newval, "cmp and new values must be in different registers");
      assert(cmpval != addr, "cmp and addr must be in different registers");
      assert(newval != addr, "new value and addr must be in different registers");
      if (os::is_MP()) {
        __ lock();