--- old/src/cpu/x86/vm/sharedRuntime_x86_64.cpp 2014-04-24 15:53:04.000000000 -1000 +++ new/src/cpu/x86/vm/sharedRuntime_x86_64.cpp 2014-04-24 15:53:04.000000000 -1000 @@ -203,72 +203,72 @@ #define STACK_OFFSET(x) VMRegImpl::stack2reg((x) + additional_frame_slots) - map->set_callee_saved(STACK_OFFSET( rax_off ), rax->as_VMReg()); - map->set_callee_saved(STACK_OFFSET( rcx_off ), rcx->as_VMReg()); - map->set_callee_saved(STACK_OFFSET( rdx_off ), rdx->as_VMReg()); - map->set_callee_saved(STACK_OFFSET( rbx_off ), rbx->as_VMReg()); + map->set_callee_saved(STACK_OFFSET( rax_off ), rax.as_VMReg()); + map->set_callee_saved(STACK_OFFSET( rcx_off ), rcx.as_VMReg()); + map->set_callee_saved(STACK_OFFSET( rdx_off ), rdx.as_VMReg()); + map->set_callee_saved(STACK_OFFSET( rbx_off ), rbx.as_VMReg()); // rbp location is known implicitly by the frame sender code, needs no oopmap // and the location where rbp was saved by is ignored - map->set_callee_saved(STACK_OFFSET( rsi_off ), rsi->as_VMReg()); - map->set_callee_saved(STACK_OFFSET( rdi_off ), rdi->as_VMReg()); - map->set_callee_saved(STACK_OFFSET( r8_off ), r8->as_VMReg()); - map->set_callee_saved(STACK_OFFSET( r9_off ), r9->as_VMReg()); - map->set_callee_saved(STACK_OFFSET( r10_off ), r10->as_VMReg()); - map->set_callee_saved(STACK_OFFSET( r11_off ), r11->as_VMReg()); - map->set_callee_saved(STACK_OFFSET( r12_off ), r12->as_VMReg()); - map->set_callee_saved(STACK_OFFSET( r13_off ), r13->as_VMReg()); - map->set_callee_saved(STACK_OFFSET( r14_off ), r14->as_VMReg()); - map->set_callee_saved(STACK_OFFSET( r15_off ), r15->as_VMReg()); - map->set_callee_saved(STACK_OFFSET(xmm0_off ), xmm0->as_VMReg()); - map->set_callee_saved(STACK_OFFSET(xmm1_off ), xmm1->as_VMReg()); - map->set_callee_saved(STACK_OFFSET(xmm2_off ), xmm2->as_VMReg()); - map->set_callee_saved(STACK_OFFSET(xmm3_off ), xmm3->as_VMReg()); - map->set_callee_saved(STACK_OFFSET(xmm4_off ), xmm4->as_VMReg()); - map->set_callee_saved(STACK_OFFSET(xmm5_off ), xmm5->as_VMReg()); - map->set_callee_saved(STACK_OFFSET(xmm6_off ), xmm6->as_VMReg()); - map->set_callee_saved(STACK_OFFSET(xmm7_off ), xmm7->as_VMReg()); - map->set_callee_saved(STACK_OFFSET(xmm8_off ), xmm8->as_VMReg()); - map->set_callee_saved(STACK_OFFSET(xmm9_off ), xmm9->as_VMReg()); - map->set_callee_saved(STACK_OFFSET(xmm10_off), xmm10->as_VMReg()); - map->set_callee_saved(STACK_OFFSET(xmm11_off), xmm11->as_VMReg()); - map->set_callee_saved(STACK_OFFSET(xmm12_off), xmm12->as_VMReg()); - map->set_callee_saved(STACK_OFFSET(xmm13_off), xmm13->as_VMReg()); - map->set_callee_saved(STACK_OFFSET(xmm14_off), xmm14->as_VMReg()); - map->set_callee_saved(STACK_OFFSET(xmm15_off), xmm15->as_VMReg()); + map->set_callee_saved(STACK_OFFSET( rsi_off ), rsi.as_VMReg()); + map->set_callee_saved(STACK_OFFSET( rdi_off ), rdi.as_VMReg()); + map->set_callee_saved(STACK_OFFSET( r8_off ), r8.as_VMReg()); + map->set_callee_saved(STACK_OFFSET( r9_off ), r9.as_VMReg()); + map->set_callee_saved(STACK_OFFSET( r10_off ), r10.as_VMReg()); + map->set_callee_saved(STACK_OFFSET( r11_off ), r11.as_VMReg()); + map->set_callee_saved(STACK_OFFSET( r12_off ), r12.as_VMReg()); + map->set_callee_saved(STACK_OFFSET( r13_off ), r13.as_VMReg()); + map->set_callee_saved(STACK_OFFSET( r14_off ), r14.as_VMReg()); + map->set_callee_saved(STACK_OFFSET( r15_off ), r15.as_VMReg()); + map->set_callee_saved(STACK_OFFSET(xmm0_off ), xmm0.as_VMReg()); + map->set_callee_saved(STACK_OFFSET(xmm1_off ), xmm1.as_VMReg()); + map->set_callee_saved(STACK_OFFSET(xmm2_off ), xmm2.as_VMReg()); + map->set_callee_saved(STACK_OFFSET(xmm3_off ), xmm3.as_VMReg()); + map->set_callee_saved(STACK_OFFSET(xmm4_off ), xmm4.as_VMReg()); + map->set_callee_saved(STACK_OFFSET(xmm5_off ), xmm5.as_VMReg()); + map->set_callee_saved(STACK_OFFSET(xmm6_off ), xmm6.as_VMReg()); + map->set_callee_saved(STACK_OFFSET(xmm7_off ), xmm7.as_VMReg()); + map->set_callee_saved(STACK_OFFSET(xmm8_off ), xmm8.as_VMReg()); + map->set_callee_saved(STACK_OFFSET(xmm9_off ), xmm9.as_VMReg()); + map->set_callee_saved(STACK_OFFSET(xmm10_off), xmm10.as_VMReg()); + map->set_callee_saved(STACK_OFFSET(xmm11_off), xmm11.as_VMReg()); + map->set_callee_saved(STACK_OFFSET(xmm12_off), xmm12.as_VMReg()); + map->set_callee_saved(STACK_OFFSET(xmm13_off), xmm13.as_VMReg()); + map->set_callee_saved(STACK_OFFSET(xmm14_off), xmm14.as_VMReg()); + map->set_callee_saved(STACK_OFFSET(xmm15_off), xmm15.as_VMReg()); // %%% These should all be a waste but we'll keep things as they were for now if (true) { - map->set_callee_saved(STACK_OFFSET( raxH_off ), rax->as_VMReg()->next()); - map->set_callee_saved(STACK_OFFSET( rcxH_off ), rcx->as_VMReg()->next()); - map->set_callee_saved(STACK_OFFSET( rdxH_off ), rdx->as_VMReg()->next()); - map->set_callee_saved(STACK_OFFSET( rbxH_off ), rbx->as_VMReg()->next()); + map->set_callee_saved(STACK_OFFSET( raxH_off ), rax.as_VMReg()->next()); + map->set_callee_saved(STACK_OFFSET( rcxH_off ), rcx.as_VMReg()->next()); + map->set_callee_saved(STACK_OFFSET( rdxH_off ), rdx.as_VMReg()->next()); + map->set_callee_saved(STACK_OFFSET( rbxH_off ), rbx.as_VMReg()->next()); // rbp location is known implicitly by the frame sender code, needs no oopmap - map->set_callee_saved(STACK_OFFSET( rsiH_off ), rsi->as_VMReg()->next()); - map->set_callee_saved(STACK_OFFSET( rdiH_off ), rdi->as_VMReg()->next()); - map->set_callee_saved(STACK_OFFSET( r8H_off ), r8->as_VMReg()->next()); - map->set_callee_saved(STACK_OFFSET( r9H_off ), r9->as_VMReg()->next()); - map->set_callee_saved(STACK_OFFSET( r10H_off ), r10->as_VMReg()->next()); - map->set_callee_saved(STACK_OFFSET( r11H_off ), r11->as_VMReg()->next()); - map->set_callee_saved(STACK_OFFSET( r12H_off ), r12->as_VMReg()->next()); - map->set_callee_saved(STACK_OFFSET( r13H_off ), r13->as_VMReg()->next()); - map->set_callee_saved(STACK_OFFSET( r14H_off ), r14->as_VMReg()->next()); - map->set_callee_saved(STACK_OFFSET( r15H_off ), r15->as_VMReg()->next()); - map->set_callee_saved(STACK_OFFSET(xmm0H_off ), xmm0->as_VMReg()->next()); - map->set_callee_saved(STACK_OFFSET(xmm1H_off ), xmm1->as_VMReg()->next()); - map->set_callee_saved(STACK_OFFSET(xmm2H_off ), xmm2->as_VMReg()->next()); - map->set_callee_saved(STACK_OFFSET(xmm3H_off ), xmm3->as_VMReg()->next()); - map->set_callee_saved(STACK_OFFSET(xmm4H_off ), xmm4->as_VMReg()->next()); - map->set_callee_saved(STACK_OFFSET(xmm5H_off ), xmm5->as_VMReg()->next()); - map->set_callee_saved(STACK_OFFSET(xmm6H_off ), xmm6->as_VMReg()->next()); - map->set_callee_saved(STACK_OFFSET(xmm7H_off ), xmm7->as_VMReg()->next()); - map->set_callee_saved(STACK_OFFSET(xmm8H_off ), xmm8->as_VMReg()->next()); - map->set_callee_saved(STACK_OFFSET(xmm9H_off ), xmm9->as_VMReg()->next()); - map->set_callee_saved(STACK_OFFSET(xmm10H_off), xmm10->as_VMReg()->next()); - map->set_callee_saved(STACK_OFFSET(xmm11H_off), xmm11->as_VMReg()->next()); - map->set_callee_saved(STACK_OFFSET(xmm12H_off), xmm12->as_VMReg()->next()); - map->set_callee_saved(STACK_OFFSET(xmm13H_off), xmm13->as_VMReg()->next()); - map->set_callee_saved(STACK_OFFSET(xmm14H_off), xmm14->as_VMReg()->next()); - map->set_callee_saved(STACK_OFFSET(xmm15H_off), xmm15->as_VMReg()->next()); + map->set_callee_saved(STACK_OFFSET( rsiH_off ), rsi.as_VMReg()->next()); + map->set_callee_saved(STACK_OFFSET( rdiH_off ), rdi.as_VMReg()->next()); + map->set_callee_saved(STACK_OFFSET( r8H_off ), r8.as_VMReg()->next()); + map->set_callee_saved(STACK_OFFSET( r9H_off ), r9.as_VMReg()->next()); + map->set_callee_saved(STACK_OFFSET( r10H_off ), r10.as_VMReg()->next()); + map->set_callee_saved(STACK_OFFSET( r11H_off ), r11.as_VMReg()->next()); + map->set_callee_saved(STACK_OFFSET( r12H_off ), r12.as_VMReg()->next()); + map->set_callee_saved(STACK_OFFSET( r13H_off ), r13.as_VMReg()->next()); + map->set_callee_saved(STACK_OFFSET( r14H_off ), r14.as_VMReg()->next()); + map->set_callee_saved(STACK_OFFSET( r15H_off ), r15.as_VMReg()->next()); + map->set_callee_saved(STACK_OFFSET(xmm0H_off ), xmm0.as_VMReg()->next()); + map->set_callee_saved(STACK_OFFSET(xmm1H_off ), xmm1.as_VMReg()->next()); + map->set_callee_saved(STACK_OFFSET(xmm2H_off ), xmm2.as_VMReg()->next()); + map->set_callee_saved(STACK_OFFSET(xmm3H_off ), xmm3.as_VMReg()->next()); + map->set_callee_saved(STACK_OFFSET(xmm4H_off ), xmm4.as_VMReg()->next()); + map->set_callee_saved(STACK_OFFSET(xmm5H_off ), xmm5.as_VMReg()->next()); + map->set_callee_saved(STACK_OFFSET(xmm6H_off ), xmm6.as_VMReg()->next()); + map->set_callee_saved(STACK_OFFSET(xmm7H_off ), xmm7.as_VMReg()->next()); + map->set_callee_saved(STACK_OFFSET(xmm8H_off ), xmm8.as_VMReg()->next()); + map->set_callee_saved(STACK_OFFSET(xmm9H_off ), xmm9.as_VMReg()->next()); + map->set_callee_saved(STACK_OFFSET(xmm10H_off), xmm10.as_VMReg()->next()); + map->set_callee_saved(STACK_OFFSET(xmm11H_off), xmm11.as_VMReg()->next()); + map->set_callee_saved(STACK_OFFSET(xmm12H_off), xmm12.as_VMReg()->next()); + map->set_callee_saved(STACK_OFFSET(xmm13H_off), xmm13.as_VMReg()->next()); + map->set_callee_saved(STACK_OFFSET(xmm14H_off), xmm14.as_VMReg()->next()); + map->set_callee_saved(STACK_OFFSET(xmm15H_off), xmm15.as_VMReg()->next()); } return map; @@ -398,7 +398,7 @@ case T_SHORT: case T_INT: if (int_args < Argument::n_int_register_parameters_j) { - regs[i].set1(INT_ArgReg[int_args++]->as_VMReg()); + regs[i].set1(INT_ArgReg[int_args++].as_VMReg()); } else { regs[i].set1(VMRegImpl::stack2reg(stk_args)); stk_args += 2; @@ -416,7 +416,7 @@ case T_ARRAY: case T_ADDRESS: if (int_args < Argument::n_int_register_parameters_j) { - regs[i].set2(INT_ArgReg[int_args++]->as_VMReg()); + regs[i].set2(INT_ArgReg[int_args++].as_VMReg()); } else { regs[i].set2(VMRegImpl::stack2reg(stk_args)); stk_args += 2; @@ -424,7 +424,7 @@ break; case T_FLOAT: if (fp_args < Argument::n_float_register_parameters_j) { - regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg()); + regs[i].set1(FP_ArgReg[fp_args++].as_VMReg()); } else { regs[i].set1(VMRegImpl::stack2reg(stk_args)); stk_args += 2; @@ -433,7 +433,7 @@ case T_DOUBLE: assert(sig_bt[i + 1] == T_VOID, "expecting half"); if (fp_args < Argument::n_float_register_parameters_j) { - regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg()); + regs[i].set2(FP_ArgReg[fp_args++].as_VMReg()); } else { regs[i].set2(VMRegImpl::stack2reg(stk_args)); stk_args += 2; @@ -926,7 +926,7 @@ case T_SHORT: case T_INT: if (int_args < Argument::n_int_register_parameters_c) { - regs[i].set1(INT_ArgReg[int_args++]->as_VMReg()); + regs[i].set1(INT_ArgReg[int_args++].as_VMReg()); #ifdef _WIN64 fp_args++; // Allocate slots for callee to stuff register args the stack. @@ -945,7 +945,7 @@ case T_ADDRESS: case T_METADATA: if (int_args < Argument::n_int_register_parameters_c) { - regs[i].set2(INT_ArgReg[int_args++]->as_VMReg()); + regs[i].set2(INT_ArgReg[int_args++].as_VMReg()); #ifdef _WIN64 fp_args++; stk_args += 2; @@ -957,7 +957,7 @@ break; case T_FLOAT: if (fp_args < Argument::n_float_register_parameters_c) { - regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg()); + regs[i].set1(FP_ArgReg[fp_args++].as_VMReg()); #ifdef _WIN64 int_args++; // Allocate slots for callee to stuff register args the stack. @@ -971,7 +971,7 @@ case T_DOUBLE: assert(sig_bt[i + 1] == T_VOID, "expecting half"); if (fp_args < Argument::n_float_register_parameters_c) { - regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg()); + regs[i].set2(FP_ArgReg[fp_args++].as_VMReg()); #ifdef _WIN64 int_args++; // Allocate slots for callee to stuff register args the stack. @@ -1436,7 +1436,7 @@ // Pass the length, ptr pair Label is_null, done; VMRegPair tmp; - tmp.set_ptr(tmp_reg->as_VMReg()); + tmp.set_ptr(tmp_reg.as_VMReg()); if (reg.first()->is_stack()) { // Load the arg up from the stack move_ptr(masm, reg, tmp); @@ -2078,12 +2078,12 @@ #ifdef ASSERT - bool reg_destroyed[RegisterImpl::number_of_registers]; - bool freg_destroyed[XMMRegisterImpl::number_of_registers]; - for ( int r = 0 ; r < RegisterImpl::number_of_registers ; r++ ) { + bool reg_destroyed[Register::number_of_registers]; + bool freg_destroyed[XMMRegister::number_of_registers]; + for ( int r = 0 ; r < Register::number_of_registers ; r++ ) { reg_destroyed[r] = false; } - for ( int f = 0 ; f < XMMRegisterImpl::number_of_registers ; f++ ) { + for ( int f = 0 ; f < XMMRegister::number_of_registers ; f++ ) { freg_destroyed[f] = false; } @@ -2095,7 +2095,7 @@ // critical natives they are offset down. GrowableArray arg_order(2 * total_in_args); VMRegPair tmp_vmreg; - tmp_vmreg.set1(rbx->as_VMReg()); + tmp_vmreg.set1(rbx.as_VMReg()); if (!is_critical_native) { for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) { @@ -2128,14 +2128,14 @@ } #ifdef ASSERT if (in_regs[i].first()->is_Register()) { - assert(!reg_destroyed[in_regs[i].first()->as_Register()->encoding()], "destroyed reg!"); + assert(!reg_destroyed[in_regs[i].first()->as_Register().encoding()], "destroyed reg!"); } else if (in_regs[i].first()->is_XMMRegister()) { - assert(!freg_destroyed[in_regs[i].first()->as_XMMRegister()->encoding()], "destroyed reg!"); + assert(!freg_destroyed[in_regs[i].first()->as_XMMRegister().encoding()], "destroyed reg!"); } if (out_regs[c_arg].first()->is_Register()) { - reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true; + reg_destroyed[out_regs[c_arg].first()->as_Register().encoding()] = true; } else if (out_regs[c_arg].first()->is_XMMRegister()) { - freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true; + freg_destroyed[out_regs[c_arg].first()->as_XMMRegister().encoding()] = true; } #endif /* ASSERT */ switch (in_sig_bt[i]) { @@ -2145,9 +2145,9 @@ c_arg++; #ifdef ASSERT if (out_regs[c_arg].first()->is_Register()) { - reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true; + reg_destroyed[out_regs[c_arg].first()->as_Register().encoding()] = true; } else if (out_regs[c_arg].first()->is_XMMRegister()) { - freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true; + freg_destroyed[out_regs[c_arg].first()->as_XMMRegister().encoding()] = true; } #endif break; @@ -2679,21 +2679,21 @@ assert(AdapterHandlerLibrary_lock->owned_by_self(), "must be"); if (!offsets_initialized) { - fp_offset[c_rarg0->as_VMReg()->value()] = -1 * wordSize; - fp_offset[c_rarg1->as_VMReg()->value()] = -2 * wordSize; - fp_offset[c_rarg2->as_VMReg()->value()] = -3 * wordSize; - fp_offset[c_rarg3->as_VMReg()->value()] = -4 * wordSize; - fp_offset[c_rarg4->as_VMReg()->value()] = -5 * wordSize; - fp_offset[c_rarg5->as_VMReg()->value()] = -6 * wordSize; - - fp_offset[c_farg0->as_VMReg()->value()] = -7 * wordSize; - fp_offset[c_farg1->as_VMReg()->value()] = -8 * wordSize; - fp_offset[c_farg2->as_VMReg()->value()] = -9 * wordSize; - fp_offset[c_farg3->as_VMReg()->value()] = -10 * wordSize; - fp_offset[c_farg4->as_VMReg()->value()] = -11 * wordSize; - fp_offset[c_farg5->as_VMReg()->value()] = -12 * wordSize; - fp_offset[c_farg6->as_VMReg()->value()] = -13 * wordSize; - fp_offset[c_farg7->as_VMReg()->value()] = -14 * wordSize; + fp_offset[c_rarg0.as_VMReg()->value()] = -1 * wordSize; + fp_offset[c_rarg1.as_VMReg()->value()] = -2 * wordSize; + fp_offset[c_rarg2.as_VMReg()->value()] = -3 * wordSize; + fp_offset[c_rarg3.as_VMReg()->value()] = -4 * wordSize; + fp_offset[c_rarg4.as_VMReg()->value()] = -5 * wordSize; + fp_offset[c_rarg5.as_VMReg()->value()] = -6 * wordSize; + + fp_offset[c_farg0.as_VMReg()->value()] = -7 * wordSize; + fp_offset[c_farg1.as_VMReg()->value()] = -8 * wordSize; + fp_offset[c_farg2.as_VMReg()->value()] = -9 * wordSize; + fp_offset[c_farg3.as_VMReg()->value()] = -10 * wordSize; + fp_offset[c_farg4.as_VMReg()->value()] = -11 * wordSize; + fp_offset[c_farg5.as_VMReg()->value()] = -12 * wordSize; + fp_offset[c_farg6.as_VMReg()->value()] = -13 * wordSize; + fp_offset[c_farg7.as_VMReg()->value()] = -14 * wordSize; offsets_initialized = true; } @@ -2892,21 +2892,21 @@ bool live[ConcreteRegisterImpl::number_of_registers]; - live[j_rarg0->as_VMReg()->value()] = false; - live[j_rarg1->as_VMReg()->value()] = false; - live[j_rarg2->as_VMReg()->value()] = false; - live[j_rarg3->as_VMReg()->value()] = false; - live[j_rarg4->as_VMReg()->value()] = false; - live[j_rarg5->as_VMReg()->value()] = false; - - live[j_farg0->as_VMReg()->value()] = false; - live[j_farg1->as_VMReg()->value()] = false; - live[j_farg2->as_VMReg()->value()] = false; - live[j_farg3->as_VMReg()->value()] = false; - live[j_farg4->as_VMReg()->value()] = false; - live[j_farg5->as_VMReg()->value()] = false; - live[j_farg6->as_VMReg()->value()] = false; - live[j_farg7->as_VMReg()->value()] = false; + live[j_rarg0.as_VMReg()->value()] = false; + live[j_rarg1.as_VMReg()->value()] = false; + live[j_rarg2.as_VMReg()->value()] = false; + live[j_rarg3.as_VMReg()->value()] = false; + live[j_rarg4.as_VMReg()->value()] = false; + live[j_rarg5.as_VMReg()->value()] = false; + + live[j_farg0.as_VMReg()->value()] = false; + live[j_farg1.as_VMReg()->value()] = false; + live[j_farg2.as_VMReg()->value()] = false; + live[j_farg3.as_VMReg()->value()] = false; + live[j_farg4.as_VMReg()->value()] = false; + live[j_farg5.as_VMReg()->value()] = false; + live[j_farg6.as_VMReg()->value()] = false; + live[j_farg7.as_VMReg()->value()] = false; bool rax_is_zero = false; @@ -2921,7 +2921,7 @@ int src_reg = src.first()->is_reg() ? src.first()->value() : - rsp->as_VMReg()->value(); + rsp.as_VMReg()->value(); bool useless = in_sig_bt[j_arg] == T_ARRAY || (in_sig_bt[j_arg] == T_OBJECT && @@ -3138,21 +3138,21 @@ } } // The get_utf call killed all the c_arg registers - live[c_rarg0->as_VMReg()->value()] = false; - live[c_rarg1->as_VMReg()->value()] = false; - live[c_rarg2->as_VMReg()->value()] = false; - live[c_rarg3->as_VMReg()->value()] = false; - live[c_rarg4->as_VMReg()->value()] = false; - live[c_rarg5->as_VMReg()->value()] = false; - - live[c_farg0->as_VMReg()->value()] = false; - live[c_farg1->as_VMReg()->value()] = false; - live[c_farg2->as_VMReg()->value()] = false; - live[c_farg3->as_VMReg()->value()] = false; - live[c_farg4->as_VMReg()->value()] = false; - live[c_farg5->as_VMReg()->value()] = false; - live[c_farg6->as_VMReg()->value()] = false; - live[c_farg7->as_VMReg()->value()] = false; + live[c_rarg0.as_VMReg()->value()] = false; + live[c_rarg1.as_VMReg()->value()] = false; + live[c_rarg2.as_VMReg()->value()] = false; + live[c_rarg3.as_VMReg()->value()] = false; + live[c_rarg4.as_VMReg()->value()] = false; + live[c_rarg5.as_VMReg()->value()] = false; + + live[c_farg0.as_VMReg()->value()] = false; + live[c_farg1.as_VMReg()->value()] = false; + live[c_farg2.as_VMReg()->value()] = false; + live[c_farg3.as_VMReg()->value()] = false; + live[c_farg4.as_VMReg()->value()] = false; + live[c_farg5.as_VMReg()->value()] = false; + live[c_farg6.as_VMReg()->value()] = false; + live[c_farg7.as_VMReg()->value()] = false; } // Now we can finally move the register args to their desired locations