src/cpu/x86/vm/sharedRuntime_x86_64.cpp
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src/cpu/x86/vm/sharedRuntime_x86_64.cpp

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 186     __ vextractf128h(Address(rsp,192),xmm12);
 187     __ vextractf128h(Address(rsp,208),xmm13);
 188     __ vextractf128h(Address(rsp,224),xmm14);
 189     __ vextractf128h(Address(rsp,240),xmm15);
 190   }
 191   if (frame::arg_reg_save_area_bytes != 0) {
 192     // Allocate argument register save area
 193     __ subptr(rsp, frame::arg_reg_save_area_bytes);
 194   }
 195 
 196   // Set an oopmap for the call site.  This oopmap will map all
 197   // oop-registers and debug-info registers as callee-saved.  This
 198   // will allow deoptimization at this safepoint to find all possible
 199   // debug-info recordings, as well as let GC find all oops.
 200 
 201   OopMapSet *oop_maps = new OopMapSet();
 202   OopMap* map = new OopMap(frame_size_in_slots, 0);
 203 
 204 #define STACK_OFFSET(x) VMRegImpl::stack2reg((x) + additional_frame_slots)
 205 
 206   map->set_callee_saved(STACK_OFFSET( rax_off ), rax->as_VMReg());
 207   map->set_callee_saved(STACK_OFFSET( rcx_off ), rcx->as_VMReg());
 208   map->set_callee_saved(STACK_OFFSET( rdx_off ), rdx->as_VMReg());
 209   map->set_callee_saved(STACK_OFFSET( rbx_off ), rbx->as_VMReg());
 210   // rbp location is known implicitly by the frame sender code, needs no oopmap
 211   // and the location where rbp was saved by is ignored
 212   map->set_callee_saved(STACK_OFFSET( rsi_off ), rsi->as_VMReg());
 213   map->set_callee_saved(STACK_OFFSET( rdi_off ), rdi->as_VMReg());
 214   map->set_callee_saved(STACK_OFFSET( r8_off  ), r8->as_VMReg());
 215   map->set_callee_saved(STACK_OFFSET( r9_off  ), r9->as_VMReg());
 216   map->set_callee_saved(STACK_OFFSET( r10_off ), r10->as_VMReg());
 217   map->set_callee_saved(STACK_OFFSET( r11_off ), r11->as_VMReg());
 218   map->set_callee_saved(STACK_OFFSET( r12_off ), r12->as_VMReg());
 219   map->set_callee_saved(STACK_OFFSET( r13_off ), r13->as_VMReg());
 220   map->set_callee_saved(STACK_OFFSET( r14_off ), r14->as_VMReg());
 221   map->set_callee_saved(STACK_OFFSET( r15_off ), r15->as_VMReg());
 222   map->set_callee_saved(STACK_OFFSET(xmm0_off ), xmm0->as_VMReg());
 223   map->set_callee_saved(STACK_OFFSET(xmm1_off ), xmm1->as_VMReg());
 224   map->set_callee_saved(STACK_OFFSET(xmm2_off ), xmm2->as_VMReg());
 225   map->set_callee_saved(STACK_OFFSET(xmm3_off ), xmm3->as_VMReg());
 226   map->set_callee_saved(STACK_OFFSET(xmm4_off ), xmm4->as_VMReg());
 227   map->set_callee_saved(STACK_OFFSET(xmm5_off ), xmm5->as_VMReg());
 228   map->set_callee_saved(STACK_OFFSET(xmm6_off ), xmm6->as_VMReg());
 229   map->set_callee_saved(STACK_OFFSET(xmm7_off ), xmm7->as_VMReg());
 230   map->set_callee_saved(STACK_OFFSET(xmm8_off ), xmm8->as_VMReg());
 231   map->set_callee_saved(STACK_OFFSET(xmm9_off ), xmm9->as_VMReg());
 232   map->set_callee_saved(STACK_OFFSET(xmm10_off), xmm10->as_VMReg());
 233   map->set_callee_saved(STACK_OFFSET(xmm11_off), xmm11->as_VMReg());
 234   map->set_callee_saved(STACK_OFFSET(xmm12_off), xmm12->as_VMReg());
 235   map->set_callee_saved(STACK_OFFSET(xmm13_off), xmm13->as_VMReg());
 236   map->set_callee_saved(STACK_OFFSET(xmm14_off), xmm14->as_VMReg());
 237   map->set_callee_saved(STACK_OFFSET(xmm15_off), xmm15->as_VMReg());
 238 
 239   // %%% These should all be a waste but we'll keep things as they were for now
 240   if (true) {
 241     map->set_callee_saved(STACK_OFFSET( raxH_off ), rax->as_VMReg()->next());
 242     map->set_callee_saved(STACK_OFFSET( rcxH_off ), rcx->as_VMReg()->next());
 243     map->set_callee_saved(STACK_OFFSET( rdxH_off ), rdx->as_VMReg()->next());
 244     map->set_callee_saved(STACK_OFFSET( rbxH_off ), rbx->as_VMReg()->next());
 245     // rbp location is known implicitly by the frame sender code, needs no oopmap
 246     map->set_callee_saved(STACK_OFFSET( rsiH_off ), rsi->as_VMReg()->next());
 247     map->set_callee_saved(STACK_OFFSET( rdiH_off ), rdi->as_VMReg()->next());
 248     map->set_callee_saved(STACK_OFFSET( r8H_off  ), r8->as_VMReg()->next());
 249     map->set_callee_saved(STACK_OFFSET( r9H_off  ), r9->as_VMReg()->next());
 250     map->set_callee_saved(STACK_OFFSET( r10H_off ), r10->as_VMReg()->next());
 251     map->set_callee_saved(STACK_OFFSET( r11H_off ), r11->as_VMReg()->next());
 252     map->set_callee_saved(STACK_OFFSET( r12H_off ), r12->as_VMReg()->next());
 253     map->set_callee_saved(STACK_OFFSET( r13H_off ), r13->as_VMReg()->next());
 254     map->set_callee_saved(STACK_OFFSET( r14H_off ), r14->as_VMReg()->next());
 255     map->set_callee_saved(STACK_OFFSET( r15H_off ), r15->as_VMReg()->next());
 256     map->set_callee_saved(STACK_OFFSET(xmm0H_off ), xmm0->as_VMReg()->next());
 257     map->set_callee_saved(STACK_OFFSET(xmm1H_off ), xmm1->as_VMReg()->next());
 258     map->set_callee_saved(STACK_OFFSET(xmm2H_off ), xmm2->as_VMReg()->next());
 259     map->set_callee_saved(STACK_OFFSET(xmm3H_off ), xmm3->as_VMReg()->next());
 260     map->set_callee_saved(STACK_OFFSET(xmm4H_off ), xmm4->as_VMReg()->next());
 261     map->set_callee_saved(STACK_OFFSET(xmm5H_off ), xmm5->as_VMReg()->next());
 262     map->set_callee_saved(STACK_OFFSET(xmm6H_off ), xmm6->as_VMReg()->next());
 263     map->set_callee_saved(STACK_OFFSET(xmm7H_off ), xmm7->as_VMReg()->next());
 264     map->set_callee_saved(STACK_OFFSET(xmm8H_off ), xmm8->as_VMReg()->next());
 265     map->set_callee_saved(STACK_OFFSET(xmm9H_off ), xmm9->as_VMReg()->next());
 266     map->set_callee_saved(STACK_OFFSET(xmm10H_off), xmm10->as_VMReg()->next());
 267     map->set_callee_saved(STACK_OFFSET(xmm11H_off), xmm11->as_VMReg()->next());
 268     map->set_callee_saved(STACK_OFFSET(xmm12H_off), xmm12->as_VMReg()->next());
 269     map->set_callee_saved(STACK_OFFSET(xmm13H_off), xmm13->as_VMReg()->next());
 270     map->set_callee_saved(STACK_OFFSET(xmm14H_off), xmm14->as_VMReg()->next());
 271     map->set_callee_saved(STACK_OFFSET(xmm15H_off), xmm15->as_VMReg()->next());
 272   }
 273 
 274   return map;
 275 }
 276 
 277 void RegisterSaver::restore_live_registers(MacroAssembler* masm, bool restore_vectors) {
 278   if (frame::arg_reg_save_area_bytes != 0) {
 279     // Pop arg register save area
 280     __ addptr(rsp, frame::arg_reg_save_area_bytes);
 281   }
 282 #ifdef COMPILER2
 283   if (restore_vectors) {
 284     // Restore upper half of YMM registes.
 285     assert(UseAVX > 0, "256bit vectors are supported only with AVX");
 286     assert(MaxVectorSize == 32, "only 256bit vectors are supported now");
 287     __ vinsertf128h(xmm0, Address(rsp,  0));
 288     __ vinsertf128h(xmm1, Address(rsp, 16));
 289     __ vinsertf128h(xmm2, Address(rsp, 32));
 290     __ vinsertf128h(xmm3, Address(rsp, 48));
 291     __ vinsertf128h(xmm4, Address(rsp, 64));


 381     j_rarg0, j_rarg1, j_rarg2, j_rarg3, j_rarg4, j_rarg5
 382   };
 383   static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_j] = {
 384     j_farg0, j_farg1, j_farg2, j_farg3,
 385     j_farg4, j_farg5, j_farg6, j_farg7
 386   };
 387 
 388 
 389   uint int_args = 0;
 390   uint fp_args = 0;
 391   uint stk_args = 0; // inc by 2 each time
 392 
 393   for (int i = 0; i < total_args_passed; i++) {
 394     switch (sig_bt[i]) {
 395     case T_BOOLEAN:
 396     case T_CHAR:
 397     case T_BYTE:
 398     case T_SHORT:
 399     case T_INT:
 400       if (int_args < Argument::n_int_register_parameters_j) {
 401         regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
 402       } else {
 403         regs[i].set1(VMRegImpl::stack2reg(stk_args));
 404         stk_args += 2;
 405       }
 406       break;
 407     case T_VOID:
 408       // halves of T_LONG or T_DOUBLE
 409       assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
 410       regs[i].set_bad();
 411       break;
 412     case T_LONG:
 413       assert(sig_bt[i + 1] == T_VOID, "expecting half");
 414       // fall through
 415     case T_OBJECT:
 416     case T_ARRAY:
 417     case T_ADDRESS:
 418       if (int_args < Argument::n_int_register_parameters_j) {
 419         regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
 420       } else {
 421         regs[i].set2(VMRegImpl::stack2reg(stk_args));
 422         stk_args += 2;
 423       }
 424       break;
 425     case T_FLOAT:
 426       if (fp_args < Argument::n_float_register_parameters_j) {
 427         regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg());
 428       } else {
 429         regs[i].set1(VMRegImpl::stack2reg(stk_args));
 430         stk_args += 2;
 431       }
 432       break;
 433     case T_DOUBLE:
 434       assert(sig_bt[i + 1] == T_VOID, "expecting half");
 435       if (fp_args < Argument::n_float_register_parameters_j) {
 436         regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg());
 437       } else {
 438         regs[i].set2(VMRegImpl::stack2reg(stk_args));
 439         stk_args += 2;
 440       }
 441       break;
 442     default:
 443       ShouldNotReachHere();
 444       break;
 445     }
 446   }
 447 
 448   return round_to(stk_args, 2);
 449 }
 450 
 451 // Patch the callers callsite with entry to compiled code if it exists.
 452 static void patch_callers_callsite(MacroAssembler *masm) {
 453   Label L;
 454   __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD);
 455   __ jcc(Assembler::equal, L);
 456 


 909     };
 910     static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = {
 911       c_farg0, c_farg1, c_farg2, c_farg3,
 912       c_farg4, c_farg5, c_farg6, c_farg7
 913     };
 914 #endif // _WIN64
 915 
 916 
 917     uint int_args = 0;
 918     uint fp_args = 0;
 919     uint stk_args = 0; // inc by 2 each time
 920 
 921     for (int i = 0; i < total_args_passed; i++) {
 922       switch (sig_bt[i]) {
 923       case T_BOOLEAN:
 924       case T_CHAR:
 925       case T_BYTE:
 926       case T_SHORT:
 927       case T_INT:
 928         if (int_args < Argument::n_int_register_parameters_c) {
 929           regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
 930 #ifdef _WIN64
 931           fp_args++;
 932           // Allocate slots for callee to stuff register args the stack.
 933           stk_args += 2;
 934 #endif
 935         } else {
 936           regs[i].set1(VMRegImpl::stack2reg(stk_args));
 937           stk_args += 2;
 938         }
 939         break;
 940       case T_LONG:
 941         assert(sig_bt[i + 1] == T_VOID, "expecting half");
 942         // fall through
 943       case T_OBJECT:
 944       case T_ARRAY:
 945       case T_ADDRESS:
 946       case T_METADATA:
 947         if (int_args < Argument::n_int_register_parameters_c) {
 948           regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
 949 #ifdef _WIN64
 950           fp_args++;
 951           stk_args += 2;
 952 #endif
 953         } else {
 954           regs[i].set2(VMRegImpl::stack2reg(stk_args));
 955           stk_args += 2;
 956         }
 957         break;
 958       case T_FLOAT:
 959         if (fp_args < Argument::n_float_register_parameters_c) {
 960           regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg());
 961 #ifdef _WIN64
 962           int_args++;
 963           // Allocate slots for callee to stuff register args the stack.
 964           stk_args += 2;
 965 #endif
 966         } else {
 967           regs[i].set1(VMRegImpl::stack2reg(stk_args));
 968           stk_args += 2;
 969         }
 970         break;
 971       case T_DOUBLE:
 972         assert(sig_bt[i + 1] == T_VOID, "expecting half");
 973         if (fp_args < Argument::n_float_register_parameters_c) {
 974           regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg());
 975 #ifdef _WIN64
 976           int_args++;
 977           // Allocate slots for callee to stuff register args the stack.
 978           stk_args += 2;
 979 #endif
 980         } else {
 981           regs[i].set2(VMRegImpl::stack2reg(stk_args));
 982           stk_args += 2;
 983         }
 984         break;
 985       case T_VOID: // Halves of longs and doubles
 986         assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
 987         regs[i].set_bad();
 988         break;
 989       default:
 990         ShouldNotReachHere();
 991         break;
 992       }
 993     }
 994 #ifdef _WIN64


1419     save_or_restore_arguments(masm, stack_slots, total_in_args,
1420                               arg_save_area, NULL, in_regs, in_sig_bt);
1421   }
1422 #endif
1423 }
1424 
1425 // Unpack an array argument into a pointer to the body and the length
1426 // if the array is non-null, otherwise pass 0 for both.
1427 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) {
1428   Register tmp_reg = rax;
1429   assert(!body_arg.first()->is_Register() || body_arg.first()->as_Register() != tmp_reg,
1430          "possible collision");
1431   assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg,
1432          "possible collision");
1433 
1434   __ block_comment("unpack_array_argument {");
1435 
1436   // Pass the length, ptr pair
1437   Label is_null, done;
1438   VMRegPair tmp;
1439   tmp.set_ptr(tmp_reg->as_VMReg());
1440   if (reg.first()->is_stack()) {
1441     // Load the arg up from the stack
1442     move_ptr(masm, reg, tmp);
1443     reg = tmp;
1444   }
1445   __ testptr(reg.first()->as_Register(), reg.first()->as_Register());
1446   __ jccb(Assembler::equal, is_null);
1447   __ lea(tmp_reg, Address(reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type)));
1448   move_ptr(masm, tmp, body_arg);
1449   // load the length relative to the body.
1450   __ movl(tmp_reg, Address(tmp_reg, arrayOopDesc::length_offset_in_bytes() -
1451                            arrayOopDesc::base_offset_in_bytes(in_elem_type)));
1452   move32_64(masm, tmp, length_arg);
1453   __ jmpb(done);
1454   __ bind(is_null);
1455   // Pass zeros
1456   __ xorptr(tmp_reg, tmp_reg);
1457   move_ptr(masm, tmp, body_arg);
1458   move32_64(masm, tmp, length_arg);
1459   __ bind(done);


2061 
2062   // Record esp-based slot for receiver on stack for non-static methods
2063   int receiver_offset = -1;
2064 
2065   // This is a trick. We double the stack slots so we can claim
2066   // the oops in the caller's frame. Since we are sure to have
2067   // more args than the caller doubling is enough to make
2068   // sure we can capture all the incoming oop args from the
2069   // caller.
2070   //
2071   OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
2072 
2073   // Mark location of rbp (someday)
2074   // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, vmreg(rbp));
2075 
2076   // Use eax, ebx as temporaries during any memory-memory moves we have to do
2077   // All inbound args are referenced based on rbp and all outbound args via rsp.
2078 
2079 
2080 #ifdef ASSERT
2081   bool reg_destroyed[RegisterImpl::number_of_registers];
2082   bool freg_destroyed[XMMRegisterImpl::number_of_registers];
2083   for ( int r = 0 ; r < RegisterImpl::number_of_registers ; r++ ) {
2084     reg_destroyed[r] = false;
2085   }
2086   for ( int f = 0 ; f < XMMRegisterImpl::number_of_registers ; f++ ) {
2087     freg_destroyed[f] = false;
2088   }
2089 
2090 #endif /* ASSERT */
2091 
2092   // This may iterate in two different directions depending on the
2093   // kind of native it is.  The reason is that for regular JNI natives
2094   // the incoming and outgoing registers are offset upwards and for
2095   // critical natives they are offset down.
2096   GrowableArray<int> arg_order(2 * total_in_args);
2097   VMRegPair tmp_vmreg;
2098   tmp_vmreg.set1(rbx->as_VMReg());
2099 
2100   if (!is_critical_native) {
2101     for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) {
2102       arg_order.push(i);
2103       arg_order.push(c_arg);
2104     }
2105   } else {
2106     // Compute a valid move order, using tmp_vmreg to break any cycles
2107     ComputeMoveOrder cmo(total_in_args, in_regs, total_c_args, out_regs, in_sig_bt, arg_order, tmp_vmreg);
2108   }
2109 
2110   int temploc = -1;
2111   for (int ai = 0; ai < arg_order.length(); ai += 2) {
2112     int i = arg_order.at(ai);
2113     int c_arg = arg_order.at(ai + 1);
2114     __ block_comment(err_msg("move %d -> %d", i, c_arg));
2115     if (c_arg == -1) {
2116       assert(is_critical_native, "should only be required for critical natives");
2117       // This arg needs to be moved to a temporary
2118       __ mov(tmp_vmreg.first()->as_Register(), in_regs[i].first()->as_Register());
2119       in_regs[i] = tmp_vmreg;
2120       temploc = i;
2121       continue;
2122     } else if (i == -1) {
2123       assert(is_critical_native, "should only be required for critical natives");
2124       // Read from the temporary location
2125       assert(temploc != -1, "must be valid");
2126       i = temploc;
2127       temploc = -1;
2128     }
2129 #ifdef ASSERT
2130     if (in_regs[i].first()->is_Register()) {
2131       assert(!reg_destroyed[in_regs[i].first()->as_Register()->encoding()], "destroyed reg!");
2132     } else if (in_regs[i].first()->is_XMMRegister()) {
2133       assert(!freg_destroyed[in_regs[i].first()->as_XMMRegister()->encoding()], "destroyed reg!");
2134     }
2135     if (out_regs[c_arg].first()->is_Register()) {
2136       reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true;
2137     } else if (out_regs[c_arg].first()->is_XMMRegister()) {
2138       freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true;
2139     }
2140 #endif /* ASSERT */
2141     switch (in_sig_bt[i]) {
2142       case T_ARRAY:
2143         if (is_critical_native) {
2144           unpack_array_argument(masm, in_regs[i], in_elem_bt[i], out_regs[c_arg + 1], out_regs[c_arg]);
2145           c_arg++;
2146 #ifdef ASSERT
2147           if (out_regs[c_arg].first()->is_Register()) {
2148             reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true;
2149           } else if (out_regs[c_arg].first()->is_XMMRegister()) {
2150             freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true;
2151           }
2152 #endif
2153           break;
2154         }
2155       case T_OBJECT:
2156         assert(!is_critical_native, "no oop arguments");
2157         object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg],
2158                     ((i == 0) && (!is_static)),
2159                     &receiver_offset);
2160         break;
2161       case T_VOID:
2162         break;
2163 
2164       case T_FLOAT:
2165         float_move(masm, in_regs[i], out_regs[c_arg]);
2166           break;
2167 
2168       case T_DOUBLE:
2169         assert( i + 1 < total_in_args &&
2170                 in_sig_bt[i + 1] == T_VOID &&


2662 // The probes are only able to take primitive types and java/lang/String as
2663 // arguments.  No other java types are allowed. Strings are converted to utf8
2664 // strings so that from dtrace point of view java strings are converted to C
2665 // strings. There is an arbitrary fixed limit on the total space that a method
2666 // can use for converting the strings. (256 chars per string in the signature).
2667 // So any java string larger then this is truncated.
2668 
2669 static int  fp_offset[ConcreteRegisterImpl::number_of_registers] = { 0 };
2670 static bool offsets_initialized = false;
2671 
2672 
2673 nmethod *SharedRuntime::generate_dtrace_nmethod(MacroAssembler *masm,
2674                                                 methodHandle method) {
2675 
2676 
2677   // generate_dtrace_nmethod is guarded by a mutex so we are sure to
2678   // be single threaded in this method.
2679   assert(AdapterHandlerLibrary_lock->owned_by_self(), "must be");
2680 
2681   if (!offsets_initialized) {
2682     fp_offset[c_rarg0->as_VMReg()->value()] = -1 * wordSize;
2683     fp_offset[c_rarg1->as_VMReg()->value()] = -2 * wordSize;
2684     fp_offset[c_rarg2->as_VMReg()->value()] = -3 * wordSize;
2685     fp_offset[c_rarg3->as_VMReg()->value()] = -4 * wordSize;
2686     fp_offset[c_rarg4->as_VMReg()->value()] = -5 * wordSize;
2687     fp_offset[c_rarg5->as_VMReg()->value()] = -6 * wordSize;
2688 
2689     fp_offset[c_farg0->as_VMReg()->value()] = -7 * wordSize;
2690     fp_offset[c_farg1->as_VMReg()->value()] = -8 * wordSize;
2691     fp_offset[c_farg2->as_VMReg()->value()] = -9 * wordSize;
2692     fp_offset[c_farg3->as_VMReg()->value()] = -10 * wordSize;
2693     fp_offset[c_farg4->as_VMReg()->value()] = -11 * wordSize;
2694     fp_offset[c_farg5->as_VMReg()->value()] = -12 * wordSize;
2695     fp_offset[c_farg6->as_VMReg()->value()] = -13 * wordSize;
2696     fp_offset[c_farg7->as_VMReg()->value()] = -14 * wordSize;
2697 
2698     offsets_initialized = true;
2699   }
2700   // Fill in the signature array, for the calling-convention call.
2701   int total_args_passed = method->size_of_parameters();
2702 
2703   BasicType* in_sig_bt  = NEW_RESOURCE_ARRAY(BasicType, total_args_passed);
2704   VMRegPair  *in_regs   = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed);
2705 
2706   // The signature we are going to use for the trap that dtrace will see
2707   // java/lang/String is converted. We drop "this" and any other object
2708   // is converted to NULL.  (A one-slot java/lang/Long object reference
2709   // is converted to a two-slot long, which is why we double the allocation).
2710   BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed * 2);
2711   VMRegPair* out_regs   = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed * 2);
2712 
2713   int i=0;
2714   int total_strings = 0;
2715   int first_arg_to_pass = 0;
2716   int total_c_args = 0;


2875          "valid size for make_non_entrant");
2876 
2877   // Generate a new frame for the wrapper.
2878   __ enter();
2879 
2880   // -4 because return address is already present and so is saved rbp,
2881   if (stack_size - 2*wordSize != 0) {
2882     __ subq(rsp, stack_size - 2*wordSize);
2883   }
2884 
2885   // Frame is now completed as far a size and linkage.
2886 
2887   int frame_complete = ((intptr_t)__ pc()) - start;
2888 
2889   int c_arg, j_arg;
2890 
2891   // State of input register args
2892 
2893   bool  live[ConcreteRegisterImpl::number_of_registers];
2894 
2895   live[j_rarg0->as_VMReg()->value()] = false;
2896   live[j_rarg1->as_VMReg()->value()] = false;
2897   live[j_rarg2->as_VMReg()->value()] = false;
2898   live[j_rarg3->as_VMReg()->value()] = false;
2899   live[j_rarg4->as_VMReg()->value()] = false;
2900   live[j_rarg5->as_VMReg()->value()] = false;
2901 
2902   live[j_farg0->as_VMReg()->value()] = false;
2903   live[j_farg1->as_VMReg()->value()] = false;
2904   live[j_farg2->as_VMReg()->value()] = false;
2905   live[j_farg3->as_VMReg()->value()] = false;
2906   live[j_farg4->as_VMReg()->value()] = false;
2907   live[j_farg5->as_VMReg()->value()] = false;
2908   live[j_farg6->as_VMReg()->value()] = false;
2909   live[j_farg7->as_VMReg()->value()] = false;
2910 
2911 
2912   bool rax_is_zero = false;
2913 
2914   // All args (except strings) destined for the stack are moved first
2915   for (j_arg = first_arg_to_pass, c_arg = 0 ;
2916        j_arg < total_args_passed ; j_arg++, c_arg++ ) {
2917     VMRegPair src = in_regs[j_arg];
2918     VMRegPair dst = out_regs[c_arg];
2919 
2920     // Get the real reg value or a dummy (rsp)
2921 
2922     int src_reg = src.first()->is_reg() ?
2923                   src.first()->value() :
2924                   rsp->as_VMReg()->value();
2925 
2926     bool useless =  in_sig_bt[j_arg] == T_ARRAY ||
2927                     (in_sig_bt[j_arg] == T_OBJECT &&
2928                      out_sig_bt[c_arg] != T_INT &&
2929                      out_sig_bt[c_arg] != T_ADDRESS &&
2930                      out_sig_bt[c_arg] != T_LONG);
2931 
2932     live[src_reg] = !useless;
2933 
2934     if (dst.first()->is_stack()) {
2935 
2936       // Even though a string arg in a register is still live after this loop
2937       // after the string conversion loop (next) it will be dead so we take
2938       // advantage of that now for simpler code to manage live.
2939 
2940       live[src_reg] = false;
2941       switch (in_sig_bt[j_arg]) {
2942 
2943         case T_ARRAY:
2944         case T_OBJECT:


3121         __ bind(convert);
3122 
3123         __ lea(c_rarg1, utf8_addr);
3124         if (dst.first()->is_reg()) {
3125           __ movq(Address(rbp, src_off), c_rarg1);
3126         } else {
3127           __ movq(Address(rsp, reg2offset_out(dst.first())), c_rarg1);
3128         }
3129         // And do the conversion
3130         __ call(RuntimeAddress(
3131                 CAST_FROM_FN_PTR(address, SharedRuntime::get_utf)));
3132 
3133         __ bind(done);
3134       }
3135       if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) {
3136         assert(out_sig_bt[c_arg+1] == T_VOID, "must be");
3137         ++c_arg; // skip over T_VOID to keep the loop indices in sync
3138       }
3139     }
3140     // The get_utf call killed all the c_arg registers
3141     live[c_rarg0->as_VMReg()->value()] = false;
3142     live[c_rarg1->as_VMReg()->value()] = false;
3143     live[c_rarg2->as_VMReg()->value()] = false;
3144     live[c_rarg3->as_VMReg()->value()] = false;
3145     live[c_rarg4->as_VMReg()->value()] = false;
3146     live[c_rarg5->as_VMReg()->value()] = false;
3147 
3148     live[c_farg0->as_VMReg()->value()] = false;
3149     live[c_farg1->as_VMReg()->value()] = false;
3150     live[c_farg2->as_VMReg()->value()] = false;
3151     live[c_farg3->as_VMReg()->value()] = false;
3152     live[c_farg4->as_VMReg()->value()] = false;
3153     live[c_farg5->as_VMReg()->value()] = false;
3154     live[c_farg6->as_VMReg()->value()] = false;
3155     live[c_farg7->as_VMReg()->value()] = false;
3156   }
3157 
3158   // Now we can finally move the register args to their desired locations
3159 
3160   rax_is_zero = false;
3161 
3162   for (j_arg = first_arg_to_pass, c_arg = 0 ;
3163        j_arg < total_args_passed ; j_arg++, c_arg++ ) {
3164 
3165     VMRegPair src = in_regs[j_arg];
3166     VMRegPair dst = out_regs[c_arg];
3167 
3168     // Only need to look for args destined for the interger registers (since we
3169     // convert float/double args to look like int/long outbound)
3170     if (dst.first()->is_reg()) {
3171       Register r =  dst.first()->as_Register();
3172 
3173       // Check if the java arg is unsupported and thereofre useless
3174       bool useless =  in_sig_bt[j_arg] == T_ARRAY ||
3175                       (in_sig_bt[j_arg] == T_OBJECT &&




 186     __ vextractf128h(Address(rsp,192),xmm12);
 187     __ vextractf128h(Address(rsp,208),xmm13);
 188     __ vextractf128h(Address(rsp,224),xmm14);
 189     __ vextractf128h(Address(rsp,240),xmm15);
 190   }
 191   if (frame::arg_reg_save_area_bytes != 0) {
 192     // Allocate argument register save area
 193     __ subptr(rsp, frame::arg_reg_save_area_bytes);
 194   }
 195 
 196   // Set an oopmap for the call site.  This oopmap will map all
 197   // oop-registers and debug-info registers as callee-saved.  This
 198   // will allow deoptimization at this safepoint to find all possible
 199   // debug-info recordings, as well as let GC find all oops.
 200 
 201   OopMapSet *oop_maps = new OopMapSet();
 202   OopMap* map = new OopMap(frame_size_in_slots, 0);
 203 
 204 #define STACK_OFFSET(x) VMRegImpl::stack2reg((x) + additional_frame_slots)
 205 
 206   map->set_callee_saved(STACK_OFFSET( rax_off ), rax.as_VMReg());
 207   map->set_callee_saved(STACK_OFFSET( rcx_off ), rcx.as_VMReg());
 208   map->set_callee_saved(STACK_OFFSET( rdx_off ), rdx.as_VMReg());
 209   map->set_callee_saved(STACK_OFFSET( rbx_off ), rbx.as_VMReg());
 210   // rbp location is known implicitly by the frame sender code, needs no oopmap
 211   // and the location where rbp was saved by is ignored
 212   map->set_callee_saved(STACK_OFFSET( rsi_off ), rsi.as_VMReg());
 213   map->set_callee_saved(STACK_OFFSET( rdi_off ), rdi.as_VMReg());
 214   map->set_callee_saved(STACK_OFFSET( r8_off  ), r8.as_VMReg());
 215   map->set_callee_saved(STACK_OFFSET( r9_off  ), r9.as_VMReg());
 216   map->set_callee_saved(STACK_OFFSET( r10_off ), r10.as_VMReg());
 217   map->set_callee_saved(STACK_OFFSET( r11_off ), r11.as_VMReg());
 218   map->set_callee_saved(STACK_OFFSET( r12_off ), r12.as_VMReg());
 219   map->set_callee_saved(STACK_OFFSET( r13_off ), r13.as_VMReg());
 220   map->set_callee_saved(STACK_OFFSET( r14_off ), r14.as_VMReg());
 221   map->set_callee_saved(STACK_OFFSET( r15_off ), r15.as_VMReg());
 222   map->set_callee_saved(STACK_OFFSET(xmm0_off ), xmm0.as_VMReg());
 223   map->set_callee_saved(STACK_OFFSET(xmm1_off ), xmm1.as_VMReg());
 224   map->set_callee_saved(STACK_OFFSET(xmm2_off ), xmm2.as_VMReg());
 225   map->set_callee_saved(STACK_OFFSET(xmm3_off ), xmm3.as_VMReg());
 226   map->set_callee_saved(STACK_OFFSET(xmm4_off ), xmm4.as_VMReg());
 227   map->set_callee_saved(STACK_OFFSET(xmm5_off ), xmm5.as_VMReg());
 228   map->set_callee_saved(STACK_OFFSET(xmm6_off ), xmm6.as_VMReg());
 229   map->set_callee_saved(STACK_OFFSET(xmm7_off ), xmm7.as_VMReg());
 230   map->set_callee_saved(STACK_OFFSET(xmm8_off ), xmm8.as_VMReg());
 231   map->set_callee_saved(STACK_OFFSET(xmm9_off ), xmm9.as_VMReg());
 232   map->set_callee_saved(STACK_OFFSET(xmm10_off), xmm10.as_VMReg());
 233   map->set_callee_saved(STACK_OFFSET(xmm11_off), xmm11.as_VMReg());
 234   map->set_callee_saved(STACK_OFFSET(xmm12_off), xmm12.as_VMReg());
 235   map->set_callee_saved(STACK_OFFSET(xmm13_off), xmm13.as_VMReg());
 236   map->set_callee_saved(STACK_OFFSET(xmm14_off), xmm14.as_VMReg());
 237   map->set_callee_saved(STACK_OFFSET(xmm15_off), xmm15.as_VMReg());
 238 
 239   // %%% These should all be a waste but we'll keep things as they were for now
 240   if (true) {
 241     map->set_callee_saved(STACK_OFFSET( raxH_off ), rax.as_VMReg()->next());
 242     map->set_callee_saved(STACK_OFFSET( rcxH_off ), rcx.as_VMReg()->next());
 243     map->set_callee_saved(STACK_OFFSET( rdxH_off ), rdx.as_VMReg()->next());
 244     map->set_callee_saved(STACK_OFFSET( rbxH_off ), rbx.as_VMReg()->next());
 245     // rbp location is known implicitly by the frame sender code, needs no oopmap
 246     map->set_callee_saved(STACK_OFFSET( rsiH_off ), rsi.as_VMReg()->next());
 247     map->set_callee_saved(STACK_OFFSET( rdiH_off ), rdi.as_VMReg()->next());
 248     map->set_callee_saved(STACK_OFFSET( r8H_off  ), r8.as_VMReg()->next());
 249     map->set_callee_saved(STACK_OFFSET( r9H_off  ), r9.as_VMReg()->next());
 250     map->set_callee_saved(STACK_OFFSET( r10H_off ), r10.as_VMReg()->next());
 251     map->set_callee_saved(STACK_OFFSET( r11H_off ), r11.as_VMReg()->next());
 252     map->set_callee_saved(STACK_OFFSET( r12H_off ), r12.as_VMReg()->next());
 253     map->set_callee_saved(STACK_OFFSET( r13H_off ), r13.as_VMReg()->next());
 254     map->set_callee_saved(STACK_OFFSET( r14H_off ), r14.as_VMReg()->next());
 255     map->set_callee_saved(STACK_OFFSET( r15H_off ), r15.as_VMReg()->next());
 256     map->set_callee_saved(STACK_OFFSET(xmm0H_off ), xmm0.as_VMReg()->next());
 257     map->set_callee_saved(STACK_OFFSET(xmm1H_off ), xmm1.as_VMReg()->next());
 258     map->set_callee_saved(STACK_OFFSET(xmm2H_off ), xmm2.as_VMReg()->next());
 259     map->set_callee_saved(STACK_OFFSET(xmm3H_off ), xmm3.as_VMReg()->next());
 260     map->set_callee_saved(STACK_OFFSET(xmm4H_off ), xmm4.as_VMReg()->next());
 261     map->set_callee_saved(STACK_OFFSET(xmm5H_off ), xmm5.as_VMReg()->next());
 262     map->set_callee_saved(STACK_OFFSET(xmm6H_off ), xmm6.as_VMReg()->next());
 263     map->set_callee_saved(STACK_OFFSET(xmm7H_off ), xmm7.as_VMReg()->next());
 264     map->set_callee_saved(STACK_OFFSET(xmm8H_off ), xmm8.as_VMReg()->next());
 265     map->set_callee_saved(STACK_OFFSET(xmm9H_off ), xmm9.as_VMReg()->next());
 266     map->set_callee_saved(STACK_OFFSET(xmm10H_off), xmm10.as_VMReg()->next());
 267     map->set_callee_saved(STACK_OFFSET(xmm11H_off), xmm11.as_VMReg()->next());
 268     map->set_callee_saved(STACK_OFFSET(xmm12H_off), xmm12.as_VMReg()->next());
 269     map->set_callee_saved(STACK_OFFSET(xmm13H_off), xmm13.as_VMReg()->next());
 270     map->set_callee_saved(STACK_OFFSET(xmm14H_off), xmm14.as_VMReg()->next());
 271     map->set_callee_saved(STACK_OFFSET(xmm15H_off), xmm15.as_VMReg()->next());
 272   }
 273 
 274   return map;
 275 }
 276 
 277 void RegisterSaver::restore_live_registers(MacroAssembler* masm, bool restore_vectors) {
 278   if (frame::arg_reg_save_area_bytes != 0) {
 279     // Pop arg register save area
 280     __ addptr(rsp, frame::arg_reg_save_area_bytes);
 281   }
 282 #ifdef COMPILER2
 283   if (restore_vectors) {
 284     // Restore upper half of YMM registes.
 285     assert(UseAVX > 0, "256bit vectors are supported only with AVX");
 286     assert(MaxVectorSize == 32, "only 256bit vectors are supported now");
 287     __ vinsertf128h(xmm0, Address(rsp,  0));
 288     __ vinsertf128h(xmm1, Address(rsp, 16));
 289     __ vinsertf128h(xmm2, Address(rsp, 32));
 290     __ vinsertf128h(xmm3, Address(rsp, 48));
 291     __ vinsertf128h(xmm4, Address(rsp, 64));


 381     j_rarg0, j_rarg1, j_rarg2, j_rarg3, j_rarg4, j_rarg5
 382   };
 383   static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_j] = {
 384     j_farg0, j_farg1, j_farg2, j_farg3,
 385     j_farg4, j_farg5, j_farg6, j_farg7
 386   };
 387 
 388 
 389   uint int_args = 0;
 390   uint fp_args = 0;
 391   uint stk_args = 0; // inc by 2 each time
 392 
 393   for (int i = 0; i < total_args_passed; i++) {
 394     switch (sig_bt[i]) {
 395     case T_BOOLEAN:
 396     case T_CHAR:
 397     case T_BYTE:
 398     case T_SHORT:
 399     case T_INT:
 400       if (int_args < Argument::n_int_register_parameters_j) {
 401         regs[i].set1(INT_ArgReg[int_args++].as_VMReg());
 402       } else {
 403         regs[i].set1(VMRegImpl::stack2reg(stk_args));
 404         stk_args += 2;
 405       }
 406       break;
 407     case T_VOID:
 408       // halves of T_LONG or T_DOUBLE
 409       assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
 410       regs[i].set_bad();
 411       break;
 412     case T_LONG:
 413       assert(sig_bt[i + 1] == T_VOID, "expecting half");
 414       // fall through
 415     case T_OBJECT:
 416     case T_ARRAY:
 417     case T_ADDRESS:
 418       if (int_args < Argument::n_int_register_parameters_j) {
 419         regs[i].set2(INT_ArgReg[int_args++].as_VMReg());
 420       } else {
 421         regs[i].set2(VMRegImpl::stack2reg(stk_args));
 422         stk_args += 2;
 423       }
 424       break;
 425     case T_FLOAT:
 426       if (fp_args < Argument::n_float_register_parameters_j) {
 427         regs[i].set1(FP_ArgReg[fp_args++].as_VMReg());
 428       } else {
 429         regs[i].set1(VMRegImpl::stack2reg(stk_args));
 430         stk_args += 2;
 431       }
 432       break;
 433     case T_DOUBLE:
 434       assert(sig_bt[i + 1] == T_VOID, "expecting half");
 435       if (fp_args < Argument::n_float_register_parameters_j) {
 436         regs[i].set2(FP_ArgReg[fp_args++].as_VMReg());
 437       } else {
 438         regs[i].set2(VMRegImpl::stack2reg(stk_args));
 439         stk_args += 2;
 440       }
 441       break;
 442     default:
 443       ShouldNotReachHere();
 444       break;
 445     }
 446   }
 447 
 448   return round_to(stk_args, 2);
 449 }
 450 
 451 // Patch the callers callsite with entry to compiled code if it exists.
 452 static void patch_callers_callsite(MacroAssembler *masm) {
 453   Label L;
 454   __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD);
 455   __ jcc(Assembler::equal, L);
 456 


 909     };
 910     static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = {
 911       c_farg0, c_farg1, c_farg2, c_farg3,
 912       c_farg4, c_farg5, c_farg6, c_farg7
 913     };
 914 #endif // _WIN64
 915 
 916 
 917     uint int_args = 0;
 918     uint fp_args = 0;
 919     uint stk_args = 0; // inc by 2 each time
 920 
 921     for (int i = 0; i < total_args_passed; i++) {
 922       switch (sig_bt[i]) {
 923       case T_BOOLEAN:
 924       case T_CHAR:
 925       case T_BYTE:
 926       case T_SHORT:
 927       case T_INT:
 928         if (int_args < Argument::n_int_register_parameters_c) {
 929           regs[i].set1(INT_ArgReg[int_args++].as_VMReg());
 930 #ifdef _WIN64
 931           fp_args++;
 932           // Allocate slots for callee to stuff register args the stack.
 933           stk_args += 2;
 934 #endif
 935         } else {
 936           regs[i].set1(VMRegImpl::stack2reg(stk_args));
 937           stk_args += 2;
 938         }
 939         break;
 940       case T_LONG:
 941         assert(sig_bt[i + 1] == T_VOID, "expecting half");
 942         // fall through
 943       case T_OBJECT:
 944       case T_ARRAY:
 945       case T_ADDRESS:
 946       case T_METADATA:
 947         if (int_args < Argument::n_int_register_parameters_c) {
 948           regs[i].set2(INT_ArgReg[int_args++].as_VMReg());
 949 #ifdef _WIN64
 950           fp_args++;
 951           stk_args += 2;
 952 #endif
 953         } else {
 954           regs[i].set2(VMRegImpl::stack2reg(stk_args));
 955           stk_args += 2;
 956         }
 957         break;
 958       case T_FLOAT:
 959         if (fp_args < Argument::n_float_register_parameters_c) {
 960           regs[i].set1(FP_ArgReg[fp_args++].as_VMReg());
 961 #ifdef _WIN64
 962           int_args++;
 963           // Allocate slots for callee to stuff register args the stack.
 964           stk_args += 2;
 965 #endif
 966         } else {
 967           regs[i].set1(VMRegImpl::stack2reg(stk_args));
 968           stk_args += 2;
 969         }
 970         break;
 971       case T_DOUBLE:
 972         assert(sig_bt[i + 1] == T_VOID, "expecting half");
 973         if (fp_args < Argument::n_float_register_parameters_c) {
 974           regs[i].set2(FP_ArgReg[fp_args++].as_VMReg());
 975 #ifdef _WIN64
 976           int_args++;
 977           // Allocate slots for callee to stuff register args the stack.
 978           stk_args += 2;
 979 #endif
 980         } else {
 981           regs[i].set2(VMRegImpl::stack2reg(stk_args));
 982           stk_args += 2;
 983         }
 984         break;
 985       case T_VOID: // Halves of longs and doubles
 986         assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
 987         regs[i].set_bad();
 988         break;
 989       default:
 990         ShouldNotReachHere();
 991         break;
 992       }
 993     }
 994 #ifdef _WIN64


1419     save_or_restore_arguments(masm, stack_slots, total_in_args,
1420                               arg_save_area, NULL, in_regs, in_sig_bt);
1421   }
1422 #endif
1423 }
1424 
1425 // Unpack an array argument into a pointer to the body and the length
1426 // if the array is non-null, otherwise pass 0 for both.
1427 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) {
1428   Register tmp_reg = rax;
1429   assert(!body_arg.first()->is_Register() || body_arg.first()->as_Register() != tmp_reg,
1430          "possible collision");
1431   assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg,
1432          "possible collision");
1433 
1434   __ block_comment("unpack_array_argument {");
1435 
1436   // Pass the length, ptr pair
1437   Label is_null, done;
1438   VMRegPair tmp;
1439   tmp.set_ptr(tmp_reg.as_VMReg());
1440   if (reg.first()->is_stack()) {
1441     // Load the arg up from the stack
1442     move_ptr(masm, reg, tmp);
1443     reg = tmp;
1444   }
1445   __ testptr(reg.first()->as_Register(), reg.first()->as_Register());
1446   __ jccb(Assembler::equal, is_null);
1447   __ lea(tmp_reg, Address(reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type)));
1448   move_ptr(masm, tmp, body_arg);
1449   // load the length relative to the body.
1450   __ movl(tmp_reg, Address(tmp_reg, arrayOopDesc::length_offset_in_bytes() -
1451                            arrayOopDesc::base_offset_in_bytes(in_elem_type)));
1452   move32_64(masm, tmp, length_arg);
1453   __ jmpb(done);
1454   __ bind(is_null);
1455   // Pass zeros
1456   __ xorptr(tmp_reg, tmp_reg);
1457   move_ptr(masm, tmp, body_arg);
1458   move32_64(masm, tmp, length_arg);
1459   __ bind(done);


2061 
2062   // Record esp-based slot for receiver on stack for non-static methods
2063   int receiver_offset = -1;
2064 
2065   // This is a trick. We double the stack slots so we can claim
2066   // the oops in the caller's frame. Since we are sure to have
2067   // more args than the caller doubling is enough to make
2068   // sure we can capture all the incoming oop args from the
2069   // caller.
2070   //
2071   OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
2072 
2073   // Mark location of rbp (someday)
2074   // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, vmreg(rbp));
2075 
2076   // Use eax, ebx as temporaries during any memory-memory moves we have to do
2077   // All inbound args are referenced based on rbp and all outbound args via rsp.
2078 
2079 
2080 #ifdef ASSERT
2081   bool reg_destroyed[Register::number_of_registers];
2082   bool freg_destroyed[XMMRegister::number_of_registers];
2083   for ( int r = 0 ; r < Register::number_of_registers ; r++ ) {
2084     reg_destroyed[r] = false;
2085   }
2086   for ( int f = 0 ; f < XMMRegister::number_of_registers ; f++ ) {
2087     freg_destroyed[f] = false;
2088   }
2089 
2090 #endif /* ASSERT */
2091 
2092   // This may iterate in two different directions depending on the
2093   // kind of native it is.  The reason is that for regular JNI natives
2094   // the incoming and outgoing registers are offset upwards and for
2095   // critical natives they are offset down.
2096   GrowableArray<int> arg_order(2 * total_in_args);
2097   VMRegPair tmp_vmreg;
2098   tmp_vmreg.set1(rbx.as_VMReg());
2099 
2100   if (!is_critical_native) {
2101     for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) {
2102       arg_order.push(i);
2103       arg_order.push(c_arg);
2104     }
2105   } else {
2106     // Compute a valid move order, using tmp_vmreg to break any cycles
2107     ComputeMoveOrder cmo(total_in_args, in_regs, total_c_args, out_regs, in_sig_bt, arg_order, tmp_vmreg);
2108   }
2109 
2110   int temploc = -1;
2111   for (int ai = 0; ai < arg_order.length(); ai += 2) {
2112     int i = arg_order.at(ai);
2113     int c_arg = arg_order.at(ai + 1);
2114     __ block_comment(err_msg("move %d -> %d", i, c_arg));
2115     if (c_arg == -1) {
2116       assert(is_critical_native, "should only be required for critical natives");
2117       // This arg needs to be moved to a temporary
2118       __ mov(tmp_vmreg.first()->as_Register(), in_regs[i].first()->as_Register());
2119       in_regs[i] = tmp_vmreg;
2120       temploc = i;
2121       continue;
2122     } else if (i == -1) {
2123       assert(is_critical_native, "should only be required for critical natives");
2124       // Read from the temporary location
2125       assert(temploc != -1, "must be valid");
2126       i = temploc;
2127       temploc = -1;
2128     }
2129 #ifdef ASSERT
2130     if (in_regs[i].first()->is_Register()) {
2131       assert(!reg_destroyed[in_regs[i].first()->as_Register().encoding()], "destroyed reg!");
2132     } else if (in_regs[i].first()->is_XMMRegister()) {
2133       assert(!freg_destroyed[in_regs[i].first()->as_XMMRegister().encoding()], "destroyed reg!");
2134     }
2135     if (out_regs[c_arg].first()->is_Register()) {
2136       reg_destroyed[out_regs[c_arg].first()->as_Register().encoding()] = true;
2137     } else if (out_regs[c_arg].first()->is_XMMRegister()) {
2138       freg_destroyed[out_regs[c_arg].first()->as_XMMRegister().encoding()] = true;
2139     }
2140 #endif /* ASSERT */
2141     switch (in_sig_bt[i]) {
2142       case T_ARRAY:
2143         if (is_critical_native) {
2144           unpack_array_argument(masm, in_regs[i], in_elem_bt[i], out_regs[c_arg + 1], out_regs[c_arg]);
2145           c_arg++;
2146 #ifdef ASSERT
2147           if (out_regs[c_arg].first()->is_Register()) {
2148             reg_destroyed[out_regs[c_arg].first()->as_Register().encoding()] = true;
2149           } else if (out_regs[c_arg].first()->is_XMMRegister()) {
2150             freg_destroyed[out_regs[c_arg].first()->as_XMMRegister().encoding()] = true;
2151           }
2152 #endif
2153           break;
2154         }
2155       case T_OBJECT:
2156         assert(!is_critical_native, "no oop arguments");
2157         object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg],
2158                     ((i == 0) && (!is_static)),
2159                     &receiver_offset);
2160         break;
2161       case T_VOID:
2162         break;
2163 
2164       case T_FLOAT:
2165         float_move(masm, in_regs[i], out_regs[c_arg]);
2166           break;
2167 
2168       case T_DOUBLE:
2169         assert( i + 1 < total_in_args &&
2170                 in_sig_bt[i + 1] == T_VOID &&


2662 // The probes are only able to take primitive types and java/lang/String as
2663 // arguments.  No other java types are allowed. Strings are converted to utf8
2664 // strings so that from dtrace point of view java strings are converted to C
2665 // strings. There is an arbitrary fixed limit on the total space that a method
2666 // can use for converting the strings. (256 chars per string in the signature).
2667 // So any java string larger then this is truncated.
2668 
2669 static int  fp_offset[ConcreteRegisterImpl::number_of_registers] = { 0 };
2670 static bool offsets_initialized = false;
2671 
2672 
2673 nmethod *SharedRuntime::generate_dtrace_nmethod(MacroAssembler *masm,
2674                                                 methodHandle method) {
2675 
2676 
2677   // generate_dtrace_nmethod is guarded by a mutex so we are sure to
2678   // be single threaded in this method.
2679   assert(AdapterHandlerLibrary_lock->owned_by_self(), "must be");
2680 
2681   if (!offsets_initialized) {
2682     fp_offset[c_rarg0.as_VMReg()->value()] = -1 * wordSize;
2683     fp_offset[c_rarg1.as_VMReg()->value()] = -2 * wordSize;
2684     fp_offset[c_rarg2.as_VMReg()->value()] = -3 * wordSize;
2685     fp_offset[c_rarg3.as_VMReg()->value()] = -4 * wordSize;
2686     fp_offset[c_rarg4.as_VMReg()->value()] = -5 * wordSize;
2687     fp_offset[c_rarg5.as_VMReg()->value()] = -6 * wordSize;
2688 
2689     fp_offset[c_farg0.as_VMReg()->value()] = -7 * wordSize;
2690     fp_offset[c_farg1.as_VMReg()->value()] = -8 * wordSize;
2691     fp_offset[c_farg2.as_VMReg()->value()] = -9 * wordSize;
2692     fp_offset[c_farg3.as_VMReg()->value()] = -10 * wordSize;
2693     fp_offset[c_farg4.as_VMReg()->value()] = -11 * wordSize;
2694     fp_offset[c_farg5.as_VMReg()->value()] = -12 * wordSize;
2695     fp_offset[c_farg6.as_VMReg()->value()] = -13 * wordSize;
2696     fp_offset[c_farg7.as_VMReg()->value()] = -14 * wordSize;
2697 
2698     offsets_initialized = true;
2699   }
2700   // Fill in the signature array, for the calling-convention call.
2701   int total_args_passed = method->size_of_parameters();
2702 
2703   BasicType* in_sig_bt  = NEW_RESOURCE_ARRAY(BasicType, total_args_passed);
2704   VMRegPair  *in_regs   = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed);
2705 
2706   // The signature we are going to use for the trap that dtrace will see
2707   // java/lang/String is converted. We drop "this" and any other object
2708   // is converted to NULL.  (A one-slot java/lang/Long object reference
2709   // is converted to a two-slot long, which is why we double the allocation).
2710   BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed * 2);
2711   VMRegPair* out_regs   = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed * 2);
2712 
2713   int i=0;
2714   int total_strings = 0;
2715   int first_arg_to_pass = 0;
2716   int total_c_args = 0;


2875          "valid size for make_non_entrant");
2876 
2877   // Generate a new frame for the wrapper.
2878   __ enter();
2879 
2880   // -4 because return address is already present and so is saved rbp,
2881   if (stack_size - 2*wordSize != 0) {
2882     __ subq(rsp, stack_size - 2*wordSize);
2883   }
2884 
2885   // Frame is now completed as far a size and linkage.
2886 
2887   int frame_complete = ((intptr_t)__ pc()) - start;
2888 
2889   int c_arg, j_arg;
2890 
2891   // State of input register args
2892 
2893   bool  live[ConcreteRegisterImpl::number_of_registers];
2894 
2895   live[j_rarg0.as_VMReg()->value()] = false;
2896   live[j_rarg1.as_VMReg()->value()] = false;
2897   live[j_rarg2.as_VMReg()->value()] = false;
2898   live[j_rarg3.as_VMReg()->value()] = false;
2899   live[j_rarg4.as_VMReg()->value()] = false;
2900   live[j_rarg5.as_VMReg()->value()] = false;
2901 
2902   live[j_farg0.as_VMReg()->value()] = false;
2903   live[j_farg1.as_VMReg()->value()] = false;
2904   live[j_farg2.as_VMReg()->value()] = false;
2905   live[j_farg3.as_VMReg()->value()] = false;
2906   live[j_farg4.as_VMReg()->value()] = false;
2907   live[j_farg5.as_VMReg()->value()] = false;
2908   live[j_farg6.as_VMReg()->value()] = false;
2909   live[j_farg7.as_VMReg()->value()] = false;
2910 
2911 
2912   bool rax_is_zero = false;
2913 
2914   // All args (except strings) destined for the stack are moved first
2915   for (j_arg = first_arg_to_pass, c_arg = 0 ;
2916        j_arg < total_args_passed ; j_arg++, c_arg++ ) {
2917     VMRegPair src = in_regs[j_arg];
2918     VMRegPair dst = out_regs[c_arg];
2919 
2920     // Get the real reg value or a dummy (rsp)
2921 
2922     int src_reg = src.first()->is_reg() ?
2923                   src.first()->value() :
2924                   rsp.as_VMReg()->value();
2925 
2926     bool useless =  in_sig_bt[j_arg] == T_ARRAY ||
2927                     (in_sig_bt[j_arg] == T_OBJECT &&
2928                      out_sig_bt[c_arg] != T_INT &&
2929                      out_sig_bt[c_arg] != T_ADDRESS &&
2930                      out_sig_bt[c_arg] != T_LONG);
2931 
2932     live[src_reg] = !useless;
2933 
2934     if (dst.first()->is_stack()) {
2935 
2936       // Even though a string arg in a register is still live after this loop
2937       // after the string conversion loop (next) it will be dead so we take
2938       // advantage of that now for simpler code to manage live.
2939 
2940       live[src_reg] = false;
2941       switch (in_sig_bt[j_arg]) {
2942 
2943         case T_ARRAY:
2944         case T_OBJECT:


3121         __ bind(convert);
3122 
3123         __ lea(c_rarg1, utf8_addr);
3124         if (dst.first()->is_reg()) {
3125           __ movq(Address(rbp, src_off), c_rarg1);
3126         } else {
3127           __ movq(Address(rsp, reg2offset_out(dst.first())), c_rarg1);
3128         }
3129         // And do the conversion
3130         __ call(RuntimeAddress(
3131                 CAST_FROM_FN_PTR(address, SharedRuntime::get_utf)));
3132 
3133         __ bind(done);
3134       }
3135       if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) {
3136         assert(out_sig_bt[c_arg+1] == T_VOID, "must be");
3137         ++c_arg; // skip over T_VOID to keep the loop indices in sync
3138       }
3139     }
3140     // The get_utf call killed all the c_arg registers
3141     live[c_rarg0.as_VMReg()->value()] = false;
3142     live[c_rarg1.as_VMReg()->value()] = false;
3143     live[c_rarg2.as_VMReg()->value()] = false;
3144     live[c_rarg3.as_VMReg()->value()] = false;
3145     live[c_rarg4.as_VMReg()->value()] = false;
3146     live[c_rarg5.as_VMReg()->value()] = false;
3147 
3148     live[c_farg0.as_VMReg()->value()] = false;
3149     live[c_farg1.as_VMReg()->value()] = false;
3150     live[c_farg2.as_VMReg()->value()] = false;
3151     live[c_farg3.as_VMReg()->value()] = false;
3152     live[c_farg4.as_VMReg()->value()] = false;
3153     live[c_farg5.as_VMReg()->value()] = false;
3154     live[c_farg6.as_VMReg()->value()] = false;
3155     live[c_farg7.as_VMReg()->value()] = false;
3156   }
3157 
3158   // Now we can finally move the register args to their desired locations
3159 
3160   rax_is_zero = false;
3161 
3162   for (j_arg = first_arg_to_pass, c_arg = 0 ;
3163        j_arg < total_args_passed ; j_arg++, c_arg++ ) {
3164 
3165     VMRegPair src = in_regs[j_arg];
3166     VMRegPair dst = out_regs[c_arg];
3167 
3168     // Only need to look for args destined for the interger registers (since we
3169     // convert float/double args to look like int/long outbound)
3170     if (dst.first()->is_reg()) {
3171       Register r =  dst.first()->as_Register();
3172 
3173       // Check if the java arg is unsupported and thereofre useless
3174       bool useless =  in_sig_bt[j_arg] == T_ARRAY ||
3175                       (in_sig_bt[j_arg] == T_OBJECT &&


src/cpu/x86/vm/sharedRuntime_x86_64.cpp
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