src/cpu/x86/vm/vmreg_x86.inline.hpp

*** 23,46 ****
   */
  
  #ifndef CPU_X86_VM_VMREG_X86_INLINE_HPP
  #define CPU_X86_VM_VMREG_X86_INLINE_HPP
  
! inline VMReg RegisterImpl::as_VMReg() {
!   if( this==noreg ) return VMRegImpl::Bad();
  #ifdef AMD64
    return VMRegImpl::as_VMReg(encoding() << 1 );
  #else
    return VMRegImpl::as_VMReg(encoding() );
  #endif // AMD64
  }
  
! inline VMReg FloatRegisterImpl::as_VMReg() {
    return VMRegImpl::as_VMReg((encoding() << 1) + ConcreteRegisterImpl::max_gpr);
  }
  
! inline VMReg XMMRegisterImpl::as_VMReg() {
    return VMRegImpl::as_VMReg((encoding() << 3) + ConcreteRegisterImpl::max_fpr);
  }
  
  
  inline bool VMRegImpl::is_Register() {
--- 23,48 ----
   */
  
  #ifndef CPU_X86_VM_VMREG_X86_INLINE_HPP
  #define CPU_X86_VM_VMREG_X86_INLINE_HPP
  
! inline VMReg Register::as_VMReg() const {
!   if (encoding() == noreg.encoding()) {
!     return VMRegImpl::Bad();
!   }
  #ifdef AMD64
    return VMRegImpl::as_VMReg(encoding() << 1 );
  #else
    return VMRegImpl::as_VMReg(encoding() );
  #endif // AMD64
  }
  
! inline VMReg FloatRegister::as_VMReg() const {
    return VMRegImpl::as_VMReg((encoding() << 1) + ConcreteRegisterImpl::max_gpr);
  }
  
! inline VMReg XMMRegister::as_VMReg() const {
    return VMRegImpl::as_VMReg((encoding() << 3) + ConcreteRegisterImpl::max_fpr);
  }
  
  
  inline bool VMRegImpl::is_Register() {