src/cpu/x86/vm/x86.ad

*** 68,316 ****
  // Linux ABI:   No register preserved across function calls
  //              XMM0-XMM7 might hold parameters
  // Windows ABI: XMM6-XMM15 preserved across function calls
  //              XMM0-XMM3 might hold parameters
  
! reg_def XMM0 ( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg());
! reg_def XMM0b( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(1));
! reg_def XMM0c( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(2));
! reg_def XMM0d( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(3));
! reg_def XMM0e( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(4));
! reg_def XMM0f( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(5));
! reg_def XMM0g( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(6));
! reg_def XMM0h( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(7));
! 
! reg_def XMM1 ( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg());
! reg_def XMM1b( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(1));
! reg_def XMM1c( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(2));
! reg_def XMM1d( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(3));
! reg_def XMM1e( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(4));
! reg_def XMM1f( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(5));
! reg_def XMM1g( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(6));
! reg_def XMM1h( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(7));
! 
! reg_def XMM2 ( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg());
! reg_def XMM2b( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(1));
! reg_def XMM2c( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(2));
! reg_def XMM2d( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(3));
! reg_def XMM2e( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(4));
! reg_def XMM2f( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(5));
! reg_def XMM2g( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(6));
! reg_def XMM2h( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(7));
! 
! reg_def XMM3 ( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg());
! reg_def XMM3b( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(1));
! reg_def XMM3c( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(2));
! reg_def XMM3d( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(3));
! reg_def XMM3e( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(4));
! reg_def XMM3f( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(5));
! reg_def XMM3g( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(6));
! reg_def XMM3h( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(7));
! 
! reg_def XMM4 ( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg());
! reg_def XMM4b( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(1));
! reg_def XMM4c( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(2));
! reg_def XMM4d( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(3));
! reg_def XMM4e( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(4));
! reg_def XMM4f( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(5));
! reg_def XMM4g( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(6));
! reg_def XMM4h( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(7));
! 
! reg_def XMM5 ( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg());
! reg_def XMM5b( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(1));
! reg_def XMM5c( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(2));
! reg_def XMM5d( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(3));
! reg_def XMM5e( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(4));
! reg_def XMM5f( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(5));
! reg_def XMM5g( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(6));
! reg_def XMM5h( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(7));
  
  #ifdef _WIN64
  
! reg_def XMM6 ( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg());
! reg_def XMM6b( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(1));
! reg_def XMM6c( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(2));
! reg_def XMM6d( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(3));
! reg_def XMM6e( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(4));
! reg_def XMM6f( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(5));
! reg_def XMM6g( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(6));
! reg_def XMM6h( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(7));
! 
! reg_def XMM7 ( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg());
! reg_def XMM7b( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(1));
! reg_def XMM7c( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(2));
! reg_def XMM7d( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(3));
! reg_def XMM7e( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(4));
! reg_def XMM7f( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(5));
! reg_def XMM7g( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(6));
! reg_def XMM7h( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(7));
! 
! reg_def XMM8 ( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg());
! reg_def XMM8b( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(1));
! reg_def XMM8c( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(2));
! reg_def XMM8d( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(3));
! reg_def XMM8e( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(4));
! reg_def XMM8f( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(5));
! reg_def XMM8g( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(6));
! reg_def XMM8h( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(7));
! 
! reg_def XMM9 ( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg());
! reg_def XMM9b( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(1));
! reg_def XMM9c( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(2));
! reg_def XMM9d( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(3));
! reg_def XMM9e( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(4));
! reg_def XMM9f( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(5));
! reg_def XMM9g( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(6));
! reg_def XMM9h( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(7));
! 
! reg_def XMM10 ( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg());
! reg_def XMM10b( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(1));
! reg_def XMM10c( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(2));
! reg_def XMM10d( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(3));
! reg_def XMM10e( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(4));
! reg_def XMM10f( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(5));
! reg_def XMM10g( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(6));
! reg_def XMM10h( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(7));
! 
! reg_def XMM11 ( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg());
! reg_def XMM11b( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(1));
! reg_def XMM11c( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(2));
! reg_def XMM11d( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(3));
! reg_def XMM11e( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(4));
! reg_def XMM11f( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(5));
! reg_def XMM11g( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(6));
! reg_def XMM11h( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(7));
! 
! reg_def XMM12 ( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg());
! reg_def XMM12b( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(1));
! reg_def XMM12c( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(2));
! reg_def XMM12d( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(3));
! reg_def XMM12e( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(4));
! reg_def XMM12f( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(5));
! reg_def XMM12g( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(6));
! reg_def XMM12h( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(7));
! 
! reg_def XMM13 ( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg());
! reg_def XMM13b( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(1));
! reg_def XMM13c( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(2));
! reg_def XMM13d( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(3));
! reg_def XMM13e( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(4));
! reg_def XMM13f( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(5));
! reg_def XMM13g( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(6));
! reg_def XMM13h( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(7));
! 
! reg_def XMM14 ( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg());
! reg_def XMM14b( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(1));
! reg_def XMM14c( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(2));
! reg_def XMM14d( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(3));
! reg_def XMM14e( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(4));
! reg_def XMM14f( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(5));
! reg_def XMM14g( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(6));
! reg_def XMM14h( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(7));
! 
! reg_def XMM15 ( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg());
! reg_def XMM15b( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(1));
! reg_def XMM15c( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(2));
! reg_def XMM15d( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(3));
! reg_def XMM15e( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(4));
! reg_def XMM15f( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(5));
! reg_def XMM15g( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(6));
! reg_def XMM15h( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(7));
  
  #else // _WIN64
  
! reg_def XMM6 ( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg());
! reg_def XMM6b( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(1));
! reg_def XMM6c( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(2));
! reg_def XMM6d( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(3));
! reg_def XMM6e( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(4));
! reg_def XMM6f( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(5));
! reg_def XMM6g( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(6));
! reg_def XMM6h( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(7));
! 
! reg_def XMM7 ( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg());
! reg_def XMM7b( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(1));
! reg_def XMM7c( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(2));
! reg_def XMM7d( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(3));
! reg_def XMM7e( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(4));
! reg_def XMM7f( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(5));
! reg_def XMM7g( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(6));
! reg_def XMM7h( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(7));
  
  #ifdef _LP64
  
! reg_def XMM8 ( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg());
! reg_def XMM8b( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(1));
! reg_def XMM8c( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(2));
! reg_def XMM8d( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(3));
! reg_def XMM8e( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(4));
! reg_def XMM8f( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(5));
! reg_def XMM8g( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(6));
! reg_def XMM8h( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(7));
! 
! reg_def XMM9 ( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg());
! reg_def XMM9b( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(1));
! reg_def XMM9c( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(2));
! reg_def XMM9d( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(3));
! reg_def XMM9e( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(4));
! reg_def XMM9f( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(5));
! reg_def XMM9g( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(6));
! reg_def XMM9h( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(7));
! 
! reg_def XMM10 ( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg());
! reg_def XMM10b( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(1));
! reg_def XMM10c( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(2));
! reg_def XMM10d( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(3));
! reg_def XMM10e( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(4));
! reg_def XMM10f( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(5));
! reg_def XMM10g( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(6));
! reg_def XMM10h( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(7));
! 
! reg_def XMM11 ( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg());
! reg_def XMM11b( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(1));
! reg_def XMM11c( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(2));
! reg_def XMM11d( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(3));
! reg_def XMM11e( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(4));
! reg_def XMM11f( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(5));
! reg_def XMM11g( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(6));
! reg_def XMM11h( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(7));
! 
! reg_def XMM12 ( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg());
! reg_def XMM12b( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(1));
! reg_def XMM12c( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(2));
! reg_def XMM12d( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(3));
! reg_def XMM12e( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(4));
! reg_def XMM12f( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(5));
! reg_def XMM12g( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(6));
! reg_def XMM12h( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(7));
! 
! reg_def XMM13 ( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg());
! reg_def XMM13b( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(1));
! reg_def XMM13c( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(2));
! reg_def XMM13d( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(3));
! reg_def XMM13e( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(4));
! reg_def XMM13f( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(5));
! reg_def XMM13g( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(6));
! reg_def XMM13h( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(7));
! 
! reg_def XMM14 ( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg());
! reg_def XMM14b( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(1));
! reg_def XMM14c( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(2));
! reg_def XMM14d( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(3));
! reg_def XMM14e( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(4));
! reg_def XMM14f( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(5));
! reg_def XMM14g( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(6));
! reg_def XMM14h( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(7));
! 
! reg_def XMM15 ( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg());
! reg_def XMM15b( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(1));
! reg_def XMM15c( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(2));
! reg_def XMM15d( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(3));
! reg_def XMM15e( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(4));
! reg_def XMM15f( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(5));
! reg_def XMM15g( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(6));
! reg_def XMM15h( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(7));
  
  #endif // _LP64
  
  #endif // _WIN64
  
--- 68,316 ----
  // Linux ABI:   No register preserved across function calls
  //              XMM0-XMM7 might hold parameters
  // Windows ABI: XMM6-XMM15 preserved across function calls
  //              XMM0-XMM3 might hold parameters
  
! reg_def XMM0 ( SOC, SOC, Op_RegF, 0, xmm0.as_VMReg());
! reg_def XMM0b( SOC, SOC, Op_RegF, 0, xmm0.as_VMReg()->next(1));
! reg_def XMM0c( SOC, SOC, Op_RegF, 0, xmm0.as_VMReg()->next(2));
! reg_def XMM0d( SOC, SOC, Op_RegF, 0, xmm0.as_VMReg()->next(3));
! reg_def XMM0e( SOC, SOC, Op_RegF, 0, xmm0.as_VMReg()->next(4));
! reg_def XMM0f( SOC, SOC, Op_RegF, 0, xmm0.as_VMReg()->next(5));
! reg_def XMM0g( SOC, SOC, Op_RegF, 0, xmm0.as_VMReg()->next(6));
! reg_def XMM0h( SOC, SOC, Op_RegF, 0, xmm0.as_VMReg()->next(7));
! 
! reg_def XMM1 ( SOC, SOC, Op_RegF, 1, xmm1.as_VMReg());
! reg_def XMM1b( SOC, SOC, Op_RegF, 1, xmm1.as_VMReg()->next(1));
! reg_def XMM1c( SOC, SOC, Op_RegF, 1, xmm1.as_VMReg()->next(2));
! reg_def XMM1d( SOC, SOC, Op_RegF, 1, xmm1.as_VMReg()->next(3));
! reg_def XMM1e( SOC, SOC, Op_RegF, 1, xmm1.as_VMReg()->next(4));
! reg_def XMM1f( SOC, SOC, Op_RegF, 1, xmm1.as_VMReg()->next(5));
! reg_def XMM1g( SOC, SOC, Op_RegF, 1, xmm1.as_VMReg()->next(6));
! reg_def XMM1h( SOC, SOC, Op_RegF, 1, xmm1.as_VMReg()->next(7));
! 
! reg_def XMM2 ( SOC, SOC, Op_RegF, 2, xmm2.as_VMReg());
! reg_def XMM2b( SOC, SOC, Op_RegF, 2, xmm2.as_VMReg()->next(1));
! reg_def XMM2c( SOC, SOC, Op_RegF, 2, xmm2.as_VMReg()->next(2));
! reg_def XMM2d( SOC, SOC, Op_RegF, 2, xmm2.as_VMReg()->next(3));
! reg_def XMM2e( SOC, SOC, Op_RegF, 2, xmm2.as_VMReg()->next(4));
! reg_def XMM2f( SOC, SOC, Op_RegF, 2, xmm2.as_VMReg()->next(5));
! reg_def XMM2g( SOC, SOC, Op_RegF, 2, xmm2.as_VMReg()->next(6));
! reg_def XMM2h( SOC, SOC, Op_RegF, 2, xmm2.as_VMReg()->next(7));
! 
! reg_def XMM3 ( SOC, SOC, Op_RegF, 3, xmm3.as_VMReg());
! reg_def XMM3b( SOC, SOC, Op_RegF, 3, xmm3.as_VMReg()->next(1));
! reg_def XMM3c( SOC, SOC, Op_RegF, 3, xmm3.as_VMReg()->next(2));
! reg_def XMM3d( SOC, SOC, Op_RegF, 3, xmm3.as_VMReg()->next(3));
! reg_def XMM3e( SOC, SOC, Op_RegF, 3, xmm3.as_VMReg()->next(4));
! reg_def XMM3f( SOC, SOC, Op_RegF, 3, xmm3.as_VMReg()->next(5));
! reg_def XMM3g( SOC, SOC, Op_RegF, 3, xmm3.as_VMReg()->next(6));
! reg_def XMM3h( SOC, SOC, Op_RegF, 3, xmm3.as_VMReg()->next(7));
! 
! reg_def XMM4 ( SOC, SOC, Op_RegF, 4, xmm4.as_VMReg());
! reg_def XMM4b( SOC, SOC, Op_RegF, 4, xmm4.as_VMReg()->next(1));
! reg_def XMM4c( SOC, SOC, Op_RegF, 4, xmm4.as_VMReg()->next(2));
! reg_def XMM4d( SOC, SOC, Op_RegF, 4, xmm4.as_VMReg()->next(3));
! reg_def XMM4e( SOC, SOC, Op_RegF, 4, xmm4.as_VMReg()->next(4));
! reg_def XMM4f( SOC, SOC, Op_RegF, 4, xmm4.as_VMReg()->next(5));
! reg_def XMM4g( SOC, SOC, Op_RegF, 4, xmm4.as_VMReg()->next(6));
! reg_def XMM4h( SOC, SOC, Op_RegF, 4, xmm4.as_VMReg()->next(7));
! 
! reg_def XMM5 ( SOC, SOC, Op_RegF, 5, xmm5.as_VMReg());
! reg_def XMM5b( SOC, SOC, Op_RegF, 5, xmm5.as_VMReg()->next(1));
! reg_def XMM5c( SOC, SOC, Op_RegF, 5, xmm5.as_VMReg()->next(2));
! reg_def XMM5d( SOC, SOC, Op_RegF, 5, xmm5.as_VMReg()->next(3));
! reg_def XMM5e( SOC, SOC, Op_RegF, 5, xmm5.as_VMReg()->next(4));
! reg_def XMM5f( SOC, SOC, Op_RegF, 5, xmm5.as_VMReg()->next(5));
! reg_def XMM5g( SOC, SOC, Op_RegF, 5, xmm5.as_VMReg()->next(6));
! reg_def XMM5h( SOC, SOC, Op_RegF, 5, xmm5.as_VMReg()->next(7));
  
  #ifdef _WIN64
  
! reg_def XMM6 ( SOC, SOE, Op_RegF, 6, xmm6.as_VMReg());
! reg_def XMM6b( SOC, SOE, Op_RegF, 6, xmm6.as_VMReg()->next(1));
! reg_def XMM6c( SOC, SOE, Op_RegF, 6, xmm6.as_VMReg()->next(2));
! reg_def XMM6d( SOC, SOE, Op_RegF, 6, xmm6.as_VMReg()->next(3));
! reg_def XMM6e( SOC, SOE, Op_RegF, 6, xmm6.as_VMReg()->next(4));
! reg_def XMM6f( SOC, SOE, Op_RegF, 6, xmm6.as_VMReg()->next(5));
! reg_def XMM6g( SOC, SOE, Op_RegF, 6, xmm6.as_VMReg()->next(6));
! reg_def XMM6h( SOC, SOE, Op_RegF, 6, xmm6.as_VMReg()->next(7));
! 
! reg_def XMM7 ( SOC, SOE, Op_RegF, 7, xmm7.as_VMReg());
! reg_def XMM7b( SOC, SOE, Op_RegF, 7, xmm7.as_VMReg()->next(1));
! reg_def XMM7c( SOC, SOE, Op_RegF, 7, xmm7.as_VMReg()->next(2));
! reg_def XMM7d( SOC, SOE, Op_RegF, 7, xmm7.as_VMReg()->next(3));
! reg_def XMM7e( SOC, SOE, Op_RegF, 7, xmm7.as_VMReg()->next(4));
! reg_def XMM7f( SOC, SOE, Op_RegF, 7, xmm7.as_VMReg()->next(5));
! reg_def XMM7g( SOC, SOE, Op_RegF, 7, xmm7.as_VMReg()->next(6));
! reg_def XMM7h( SOC, SOE, Op_RegF, 7, xmm7.as_VMReg()->next(7));
! 
! reg_def XMM8 ( SOC, SOE, Op_RegF, 8, xmm8.as_VMReg());
! reg_def XMM8b( SOC, SOE, Op_RegF, 8, xmm8.as_VMReg()->next(1));
! reg_def XMM8c( SOC, SOE, Op_RegF, 8, xmm8.as_VMReg()->next(2));
! reg_def XMM8d( SOC, SOE, Op_RegF, 8, xmm8.as_VMReg()->next(3));
! reg_def XMM8e( SOC, SOE, Op_RegF, 8, xmm8.as_VMReg()->next(4));
! reg_def XMM8f( SOC, SOE, Op_RegF, 8, xmm8.as_VMReg()->next(5));
! reg_def XMM8g( SOC, SOE, Op_RegF, 8, xmm8.as_VMReg()->next(6));
! reg_def XMM8h( SOC, SOE, Op_RegF, 8, xmm8.as_VMReg()->next(7));
! 
! reg_def XMM9 ( SOC, SOE, Op_RegF, 9, xmm9.as_VMReg());
! reg_def XMM9b( SOC, SOE, Op_RegF, 9, xmm9.as_VMReg()->next(1));
! reg_def XMM9c( SOC, SOE, Op_RegF, 9, xmm9.as_VMReg()->next(2));
! reg_def XMM9d( SOC, SOE, Op_RegF, 9, xmm9.as_VMReg()->next(3));
! reg_def XMM9e( SOC, SOE, Op_RegF, 9, xmm9.as_VMReg()->next(4));
! reg_def XMM9f( SOC, SOE, Op_RegF, 9, xmm9.as_VMReg()->next(5));
! reg_def XMM9g( SOC, SOE, Op_RegF, 9, xmm9.as_VMReg()->next(6));
! reg_def XMM9h( SOC, SOE, Op_RegF, 9, xmm9.as_VMReg()->next(7));
! 
! reg_def XMM10 ( SOC, SOE, Op_RegF, 10, xmm10.as_VMReg());
! reg_def XMM10b( SOC, SOE, Op_RegF, 10, xmm10.as_VMReg()->next(1));
! reg_def XMM10c( SOC, SOE, Op_RegF, 10, xmm10.as_VMReg()->next(2));
! reg_def XMM10d( SOC, SOE, Op_RegF, 10, xmm10.as_VMReg()->next(3));
! reg_def XMM10e( SOC, SOE, Op_RegF, 10, xmm10.as_VMReg()->next(4));
! reg_def XMM10f( SOC, SOE, Op_RegF, 10, xmm10.as_VMReg()->next(5));
! reg_def XMM10g( SOC, SOE, Op_RegF, 10, xmm10.as_VMReg()->next(6));
! reg_def XMM10h( SOC, SOE, Op_RegF, 10, xmm10.as_VMReg()->next(7));
! 
! reg_def XMM11 ( SOC, SOE, Op_RegF, 11, xmm11.as_VMReg());
! reg_def XMM11b( SOC, SOE, Op_RegF, 11, xmm11.as_VMReg()->next(1));
! reg_def XMM11c( SOC, SOE, Op_RegF, 11, xmm11.as_VMReg()->next(2));
! reg_def XMM11d( SOC, SOE, Op_RegF, 11, xmm11.as_VMReg()->next(3));
! reg_def XMM11e( SOC, SOE, Op_RegF, 11, xmm11.as_VMReg()->next(4));
! reg_def XMM11f( SOC, SOE, Op_RegF, 11, xmm11.as_VMReg()->next(5));
! reg_def XMM11g( SOC, SOE, Op_RegF, 11, xmm11.as_VMReg()->next(6));
! reg_def XMM11h( SOC, SOE, Op_RegF, 11, xmm11.as_VMReg()->next(7));
! 
! reg_def XMM12 ( SOC, SOE, Op_RegF, 12, xmm12.as_VMReg());
! reg_def XMM12b( SOC, SOE, Op_RegF, 12, xmm12.as_VMReg()->next(1));
! reg_def XMM12c( SOC, SOE, Op_RegF, 12, xmm12.as_VMReg()->next(2));
! reg_def XMM12d( SOC, SOE, Op_RegF, 12, xmm12.as_VMReg()->next(3));
! reg_def XMM12e( SOC, SOE, Op_RegF, 12, xmm12.as_VMReg()->next(4));
! reg_def XMM12f( SOC, SOE, Op_RegF, 12, xmm12.as_VMReg()->next(5));
! reg_def XMM12g( SOC, SOE, Op_RegF, 12, xmm12.as_VMReg()->next(6));
! reg_def XMM12h( SOC, SOE, Op_RegF, 12, xmm12.as_VMReg()->next(7));
! 
! reg_def XMM13 ( SOC, SOE, Op_RegF, 13, xmm13.as_VMReg());
! reg_def XMM13b( SOC, SOE, Op_RegF, 13, xmm13.as_VMReg()->next(1));
! reg_def XMM13c( SOC, SOE, Op_RegF, 13, xmm13.as_VMReg()->next(2));
! reg_def XMM13d( SOC, SOE, Op_RegF, 13, xmm13.as_VMReg()->next(3));
! reg_def XMM13e( SOC, SOE, Op_RegF, 13, xmm13.as_VMReg()->next(4));
! reg_def XMM13f( SOC, SOE, Op_RegF, 13, xmm13.as_VMReg()->next(5));
! reg_def XMM13g( SOC, SOE, Op_RegF, 13, xmm13.as_VMReg()->next(6));
! reg_def XMM13h( SOC, SOE, Op_RegF, 13, xmm13.as_VMReg()->next(7));
! 
! reg_def XMM14 ( SOC, SOE, Op_RegF, 14, xmm14.as_VMReg());
! reg_def XMM14b( SOC, SOE, Op_RegF, 14, xmm14.as_VMReg()->next(1));
! reg_def XMM14c( SOC, SOE, Op_RegF, 14, xmm14.as_VMReg()->next(2));
! reg_def XMM14d( SOC, SOE, Op_RegF, 14, xmm14.as_VMReg()->next(3));
! reg_def XMM14e( SOC, SOE, Op_RegF, 14, xmm14.as_VMReg()->next(4));
! reg_def XMM14f( SOC, SOE, Op_RegF, 14, xmm14.as_VMReg()->next(5));
! reg_def XMM14g( SOC, SOE, Op_RegF, 14, xmm14.as_VMReg()->next(6));
! reg_def XMM14h( SOC, SOE, Op_RegF, 14, xmm14.as_VMReg()->next(7));
! 
! reg_def XMM15 ( SOC, SOE, Op_RegF, 15, xmm15.as_VMReg());
! reg_def XMM15b( SOC, SOE, Op_RegF, 15, xmm15.as_VMReg()->next(1));
! reg_def XMM15c( SOC, SOE, Op_RegF, 15, xmm15.as_VMReg()->next(2));
! reg_def XMM15d( SOC, SOE, Op_RegF, 15, xmm15.as_VMReg()->next(3));
! reg_def XMM15e( SOC, SOE, Op_RegF, 15, xmm15.as_VMReg()->next(4));
! reg_def XMM15f( SOC, SOE, Op_RegF, 15, xmm15.as_VMReg()->next(5));
! reg_def XMM15g( SOC, SOE, Op_RegF, 15, xmm15.as_VMReg()->next(6));
! reg_def XMM15h( SOC, SOE, Op_RegF, 15, xmm15.as_VMReg()->next(7));
  
  #else // _WIN64
  
! reg_def XMM6 ( SOC, SOC, Op_RegF, 6, xmm6.as_VMReg());
! reg_def XMM6b( SOC, SOC, Op_RegF, 6, xmm6.as_VMReg()->next(1));
! reg_def XMM6c( SOC, SOC, Op_RegF, 6, xmm6.as_VMReg()->next(2));
! reg_def XMM6d( SOC, SOC, Op_RegF, 6, xmm6.as_VMReg()->next(3));
! reg_def XMM6e( SOC, SOC, Op_RegF, 6, xmm6.as_VMReg()->next(4));
! reg_def XMM6f( SOC, SOC, Op_RegF, 6, xmm6.as_VMReg()->next(5));
! reg_def XMM6g( SOC, SOC, Op_RegF, 6, xmm6.as_VMReg()->next(6));
! reg_def XMM6h( SOC, SOC, Op_RegF, 6, xmm6.as_VMReg()->next(7));
! 
! reg_def XMM7 ( SOC, SOC, Op_RegF, 7, xmm7.as_VMReg());
! reg_def XMM7b( SOC, SOC, Op_RegF, 7, xmm7.as_VMReg()->next(1));
! reg_def XMM7c( SOC, SOC, Op_RegF, 7, xmm7.as_VMReg()->next(2));
! reg_def XMM7d( SOC, SOC, Op_RegF, 7, xmm7.as_VMReg()->next(3));
! reg_def XMM7e( SOC, SOC, Op_RegF, 7, xmm7.as_VMReg()->next(4));
! reg_def XMM7f( SOC, SOC, Op_RegF, 7, xmm7.as_VMReg()->next(5));
! reg_def XMM7g( SOC, SOC, Op_RegF, 7, xmm7.as_VMReg()->next(6));
! reg_def XMM7h( SOC, SOC, Op_RegF, 7, xmm7.as_VMReg()->next(7));
  
  #ifdef _LP64
  
! reg_def XMM8 ( SOC, SOC, Op_RegF, 8, xmm8.as_VMReg());
! reg_def XMM8b( SOC, SOC, Op_RegF, 8, xmm8.as_VMReg()->next(1));
! reg_def XMM8c( SOC, SOC, Op_RegF, 8, xmm8.as_VMReg()->next(2));
! reg_def XMM8d( SOC, SOC, Op_RegF, 8, xmm8.as_VMReg()->next(3));
! reg_def XMM8e( SOC, SOC, Op_RegF, 8, xmm8.as_VMReg()->next(4));
! reg_def XMM8f( SOC, SOC, Op_RegF, 8, xmm8.as_VMReg()->next(5));
! reg_def XMM8g( SOC, SOC, Op_RegF, 8, xmm8.as_VMReg()->next(6));
! reg_def XMM8h( SOC, SOC, Op_RegF, 8, xmm8.as_VMReg()->next(7));
! 
! reg_def XMM9 ( SOC, SOC, Op_RegF, 9, xmm9.as_VMReg());
! reg_def XMM9b( SOC, SOC, Op_RegF, 9, xmm9.as_VMReg()->next(1));
! reg_def XMM9c( SOC, SOC, Op_RegF, 9, xmm9.as_VMReg()->next(2));
! reg_def XMM9d( SOC, SOC, Op_RegF, 9, xmm9.as_VMReg()->next(3));
! reg_def XMM9e( SOC, SOC, Op_RegF, 9, xmm9.as_VMReg()->next(4));
! reg_def XMM9f( SOC, SOC, Op_RegF, 9, xmm9.as_VMReg()->next(5));
! reg_def XMM9g( SOC, SOC, Op_RegF, 9, xmm9.as_VMReg()->next(6));
! reg_def XMM9h( SOC, SOC, Op_RegF, 9, xmm9.as_VMReg()->next(7));
! 
! reg_def XMM10 ( SOC, SOC, Op_RegF, 10, xmm10.as_VMReg());
! reg_def XMM10b( SOC, SOC, Op_RegF, 10, xmm10.as_VMReg()->next(1));
! reg_def XMM10c( SOC, SOC, Op_RegF, 10, xmm10.as_VMReg()->next(2));
! reg_def XMM10d( SOC, SOC, Op_RegF, 10, xmm10.as_VMReg()->next(3));
! reg_def XMM10e( SOC, SOC, Op_RegF, 10, xmm10.as_VMReg()->next(4));
! reg_def XMM10f( SOC, SOC, Op_RegF, 10, xmm10.as_VMReg()->next(5));
! reg_def XMM10g( SOC, SOC, Op_RegF, 10, xmm10.as_VMReg()->next(6));
! reg_def XMM10h( SOC, SOC, Op_RegF, 10, xmm10.as_VMReg()->next(7));
! 
! reg_def XMM11 ( SOC, SOC, Op_RegF, 11, xmm11.as_VMReg());
! reg_def XMM11b( SOC, SOC, Op_RegF, 11, xmm11.as_VMReg()->next(1));
! reg_def XMM11c( SOC, SOC, Op_RegF, 11, xmm11.as_VMReg()->next(2));
! reg_def XMM11d( SOC, SOC, Op_RegF, 11, xmm11.as_VMReg()->next(3));
! reg_def XMM11e( SOC, SOC, Op_RegF, 11, xmm11.as_VMReg()->next(4));
! reg_def XMM11f( SOC, SOC, Op_RegF, 11, xmm11.as_VMReg()->next(5));
! reg_def XMM11g( SOC, SOC, Op_RegF, 11, xmm11.as_VMReg()->next(6));
! reg_def XMM11h( SOC, SOC, Op_RegF, 11, xmm11.as_VMReg()->next(7));
! 
! reg_def XMM12 ( SOC, SOC, Op_RegF, 12, xmm12.as_VMReg());
! reg_def XMM12b( SOC, SOC, Op_RegF, 12, xmm12.as_VMReg()->next(1));
! reg_def XMM12c( SOC, SOC, Op_RegF, 12, xmm12.as_VMReg()->next(2));
! reg_def XMM12d( SOC, SOC, Op_RegF, 12, xmm12.as_VMReg()->next(3));
! reg_def XMM12e( SOC, SOC, Op_RegF, 12, xmm12.as_VMReg()->next(4));
! reg_def XMM12f( SOC, SOC, Op_RegF, 12, xmm12.as_VMReg()->next(5));
! reg_def XMM12g( SOC, SOC, Op_RegF, 12, xmm12.as_VMReg()->next(6));
! reg_def XMM12h( SOC, SOC, Op_RegF, 12, xmm12.as_VMReg()->next(7));
! 
! reg_def XMM13 ( SOC, SOC, Op_RegF, 13, xmm13.as_VMReg());
! reg_def XMM13b( SOC, SOC, Op_RegF, 13, xmm13.as_VMReg()->next(1));
! reg_def XMM13c( SOC, SOC, Op_RegF, 13, xmm13.as_VMReg()->next(2));
! reg_def XMM13d( SOC, SOC, Op_RegF, 13, xmm13.as_VMReg()->next(3));
! reg_def XMM13e( SOC, SOC, Op_RegF, 13, xmm13.as_VMReg()->next(4));
! reg_def XMM13f( SOC, SOC, Op_RegF, 13, xmm13.as_VMReg()->next(5));
! reg_def XMM13g( SOC, SOC, Op_RegF, 13, xmm13.as_VMReg()->next(6));
! reg_def XMM13h( SOC, SOC, Op_RegF, 13, xmm13.as_VMReg()->next(7));
! 
! reg_def XMM14 ( SOC, SOC, Op_RegF, 14, xmm14.as_VMReg());
! reg_def XMM14b( SOC, SOC, Op_RegF, 14, xmm14.as_VMReg()->next(1));
! reg_def XMM14c( SOC, SOC, Op_RegF, 14, xmm14.as_VMReg()->next(2));
! reg_def XMM14d( SOC, SOC, Op_RegF, 14, xmm14.as_VMReg()->next(3));
! reg_def XMM14e( SOC, SOC, Op_RegF, 14, xmm14.as_VMReg()->next(4));
! reg_def XMM14f( SOC, SOC, Op_RegF, 14, xmm14.as_VMReg()->next(5));
! reg_def XMM14g( SOC, SOC, Op_RegF, 14, xmm14.as_VMReg()->next(6));
! reg_def XMM14h( SOC, SOC, Op_RegF, 14, xmm14.as_VMReg()->next(7));
! 
! reg_def XMM15 ( SOC, SOC, Op_RegF, 15, xmm15.as_VMReg());
! reg_def XMM15b( SOC, SOC, Op_RegF, 15, xmm15.as_VMReg()->next(1));
! reg_def XMM15c( SOC, SOC, Op_RegF, 15, xmm15.as_VMReg()->next(2));
! reg_def XMM15d( SOC, SOC, Op_RegF, 15, xmm15.as_VMReg()->next(3));
! reg_def XMM15e( SOC, SOC, Op_RegF, 15, xmm15.as_VMReg()->next(4));
! reg_def XMM15f( SOC, SOC, Op_RegF, 15, xmm15.as_VMReg()->next(5));
! reg_def XMM15g( SOC, SOC, Op_RegF, 15, xmm15.as_VMReg()->next(6));
! reg_def XMM15h( SOC, SOC, Op_RegF, 15, xmm15.as_VMReg()->next(7));
  
  #endif // _LP64
  
  #endif // _WIN64