1546 // LIR_OprDesc
1547 void LIR_OprDesc::print() const {
1548   print(tty);
1549 }
1550 
1551 void LIR_OprDesc::print(outputStream* out) const {
1552   if (is_illegal()) {
1553     return;
1554   }
1555 
1556   out->print("[");
1557   if (is_pointer()) {
1558     pointer()->print_value_on(out);
1559   } else if (is_single_stack()) {
1560     out->print("stack:%d", single_stack_ix());
1561   } else if (is_double_stack()) {
1562     out->print("dbl_stack:%d",double_stack_ix());
1563   } else if (is_virtual()) {
1564     out->print("R%d", vreg_number());
1565   } else if (is_single_cpu()) {
1566     out->print(as_register()->name());
1567   } else if (is_double_cpu()) {
1568     out->print(as_register_hi()->name());
1569     out->print(as_register_lo()->name());
1570 #if defined(X86)
1571   } else if (is_single_xmm()) {
1572     out->print(as_xmm_float_reg()->name());
1573   } else if (is_double_xmm()) {
1574     out->print(as_xmm_double_reg()->name());
1575   } else if (is_single_fpu()) {
1576     out->print("fpu%d", fpu_regnr());
1577   } else if (is_double_fpu()) {
1578     out->print("fpu%d", fpu_regnrLo());
1579 #elif defined(ARM)
1580   } else if (is_single_fpu()) {
1581     out->print("s%d", fpu_regnr());
1582   } else if (is_double_fpu()) {
1583     out->print("d%d", fpu_regnrLo() >> 1);
1584 #else
1585   } else if (is_single_fpu()) {
1586     out->print(as_float_reg()->name());
1587   } else if (is_double_fpu()) {
1588     out->print(as_double_reg()->name());
1589 #endif
1590 
1591   } else if (is_illegal()) {
1592     out->print("-");
1593   } else {
1594     out->print("Unknown Operand");
1595   }
1596   if (!is_illegal()) {
1597     out->print("|%c", type_char());
1598   }
1599   if (is_register() && is_last_use()) {
1600     out->print("(last_use)");
1601   }
1602   out->print("]");
1603 }
1604 
1605 
1606 // LIR_Address
1607 void LIR_Const::print_value_on(outputStream* out) const {
1608   switch (type()) {

1546 // LIR_OprDesc
1547 void LIR_OprDesc::print() const {
1548   print(tty);
1549 }
1550 
1551 void LIR_OprDesc::print(outputStream* out) const {
1552   if (is_illegal()) {
1553     return;
1554   }
1555 
1556   out->print("[");
1557   if (is_pointer()) {
1558     pointer()->print_value_on(out);
1559   } else if (is_single_stack()) {
1560     out->print("stack:%d", single_stack_ix());
1561   } else if (is_double_stack()) {
1562     out->print("dbl_stack:%d",double_stack_ix());
1563   } else if (is_virtual()) {
1564     out->print("R%d", vreg_number());
1565   } else if (is_single_cpu()) {
1566     out->print(as_register().name());
1567   } else if (is_double_cpu()) {
1568     out->print(as_register_hi().name());
1569     out->print(as_register_lo().name());
1570 #if defined(X86)
1571   } else if (is_single_xmm()) {
1572     out->print(as_xmm_float_reg().name());
1573   } else if (is_double_xmm()) {
1574     out->print(as_xmm_double_reg().name());
1575   } else if (is_single_fpu()) {
1576     out->print("fpu%d", fpu_regnr());
1577   } else if (is_double_fpu()) {
1578     out->print("fpu%d", fpu_regnrLo());
1579 #elif defined(ARM)
1580   } else if (is_single_fpu()) {
1581     out->print("s%d", fpu_regnr());
1582   } else if (is_double_fpu()) {
1583     out->print("d%d", fpu_regnrLo() >> 1);
1584 #else
1585   } else if (is_single_fpu()) {
1586     out->print(as_float_reg().name());
1587   } else if (is_double_fpu()) {
1588     out->print(as_double_reg().name());
1589 #endif
1590 
1591   } else if (is_illegal()) {
1592     out->print("-");
1593   } else {
1594     out->print("Unknown Operand");
1595   }
1596   if (!is_illegal()) {
1597     out->print("|%c", type_char());
1598   }
1599   if (is_register() && is_last_use()) {
1600     out->print("(last_use)");
1601   }
1602   out->print("]");
1603 }
1604 
1605 
1606 // LIR_Address
1607 void LIR_Const::print_value_on(outputStream* out) const {
1608   switch (type()) {