856
857 } else if (src->is_address()) {
858 mem2reg(src, dest, type, patch_code, info, wide, unaligned);
859
860 } else {
861 ShouldNotReachHere();
862 }
863 }
864
865
866 void LIR_Assembler::verify_oop_map(CodeEmitInfo* info) {
867 #ifndef PRODUCT
868 if (VerifyOops) {
869 OopMapStream s(info->oop_map());
870 while (!s.is_done()) {
871 OopMapValue v = s.current();
872 if (v.is_oop()) {
873 VMReg r = v.reg();
874 if (!r->is_stack()) {
875 stringStream st;
876 st.print("bad oop %s at %d", r->as_Register()->name(), _masm->offset());
877 #ifdef SPARC
878 _masm->_verify_oop(r->as_Register(), strdup(st.as_string()), __FILE__, __LINE__);
879 #else
880 _masm->verify_oop(r->as_Register());
881 #endif
882 } else {
883 _masm->verify_stack_oop(r->reg2stack() * VMRegImpl::stack_slot_size);
884 }
885 }
886 check_codespace();
887 CHECK_BAILOUT();
888
889 s.next();
890 }
891 }
892 #endif
893 }
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856
857 } else if (src->is_address()) {
858 mem2reg(src, dest, type, patch_code, info, wide, unaligned);
859
860 } else {
861 ShouldNotReachHere();
862 }
863 }
864
865
866 void LIR_Assembler::verify_oop_map(CodeEmitInfo* info) {
867 #ifndef PRODUCT
868 if (VerifyOops) {
869 OopMapStream s(info->oop_map());
870 while (!s.is_done()) {
871 OopMapValue v = s.current();
872 if (v.is_oop()) {
873 VMReg r = v.reg();
874 if (!r->is_stack()) {
875 stringStream st;
876 st.print("bad oop %s at %d", r->as_Register().name(), _masm->offset());
877 #ifdef SPARC
878 _masm->_verify_oop(r->as_Register(), strdup(st.as_string()), __FILE__, __LINE__);
879 #else
880 _masm->verify_oop(r->as_Register());
881 #endif
882 } else {
883 _masm->verify_stack_oop(r->reg2stack() * VMRegImpl::stack_slot_size);
884 }
885 }
886 check_codespace();
887 CHECK_BAILOUT();
888
889 s.next();
890 }
891 }
892 #endif
893 }
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