2597     bool is_oop = opr->is_oop_register();
2598     int cache_idx = opr->cpu_regnr() * 2 + (is_oop ? 1 : 0);
2599     Location::Type int_loc_type = NOT_LP64(Location::normal) LP64_ONLY(Location::int_in_long);
2600 
2601     ScopeValue* sv = _scope_value_cache.at(cache_idx);
2602     if (sv == NULL) {
2603       Location::Type loc_type = is_oop ? Location::oop : int_loc_type;
2604       VMReg rname = frame_map()->regname(opr);
2605       sv = new LocationValue(Location::new_reg_loc(loc_type, rname));
2606       _scope_value_cache.at_put(cache_idx, sv);
2607     }
2608 
2609     // check if cached value is correct
2610     DEBUG_ONLY(assert_equal(sv, new LocationValue(Location::new_reg_loc(is_oop ? Location::oop : int_loc_type, frame_map()->regname(opr)))));
2611 
2612     scope_values->append(sv);
2613     return 1;
2614 
2615 #ifdef X86
2616   } else if (opr->is_single_xmm()) {
2617     VMReg rname = opr->as_xmm_float_reg()->as_VMReg();
2618     LocationValue* sv = new LocationValue(Location::new_reg_loc(Location::normal, rname));
2619 
2620     scope_values->append(sv);
2621     return 1;
2622 #endif
2623 
2624   } else if (opr->is_single_fpu()) {
2625 #ifdef X86
2626     // the exact location of fpu stack values is only known
2627     // during fpu stack allocation, so the stack allocator object
2628     // must be present
2629     assert(use_fpu_stack_allocation(), "should not have float stack values without fpu stack allocation (all floats must be SSE2)");
2630     assert(_fpu_stack_allocator != NULL, "must be present");
2631     opr = _fpu_stack_allocator->to_fpu_stack(opr);
2632 #endif
2633 
2634     Location::Type loc_type = float_saved_as_double ? Location::float_in_dbl : Location::normal;
2635     VMReg rname = frame_map()->fpu_regname(opr->fpu_regnr());
2636 #ifndef __SOFTFP__
2637 #ifndef VM_LITTLE_ENDIAN

2666 #ifdef _LP64
2667       Location loc1;
2668       Location::Type loc_type = opr->type() == T_LONG ? Location::lng : Location::dbl;
2669       if (!frame_map()->locations_for_slot(opr->double_stack_ix(), loc_type, &loc1, NULL)) {
2670         bailout("too large frame");
2671       }
2672       // Does this reverse on x86 vs. sparc?
2673       first =  new LocationValue(loc1);
2674       second = _int_0_scope_value;
2675 #else
2676       Location loc1, loc2;
2677       if (!frame_map()->locations_for_slot(opr->double_stack_ix(), Location::normal, &loc1, &loc2)) {
2678         bailout("too large frame");
2679       }
2680       first =  new LocationValue(loc1);
2681       second = new LocationValue(loc2);
2682 #endif // _LP64
2683 
2684     } else if (opr->is_double_cpu()) {
2685 #ifdef _LP64
2686       VMReg rname_first = opr->as_register_lo()->as_VMReg();
2687       first = new LocationValue(Location::new_reg_loc(Location::lng, rname_first));
2688       second = _int_0_scope_value;
2689 #else
2690       VMReg rname_first = opr->as_register_lo()->as_VMReg();
2691       VMReg rname_second = opr->as_register_hi()->as_VMReg();
2692 
2693       if (hi_word_offset_in_bytes < lo_word_offset_in_bytes) {
2694         // lo/hi and swapped relative to first and second, so swap them
2695         VMReg tmp = rname_first;
2696         rname_first = rname_second;
2697         rname_second = tmp;
2698       }
2699 
2700       first = new LocationValue(Location::new_reg_loc(Location::normal, rname_first));
2701       second = new LocationValue(Location::new_reg_loc(Location::normal, rname_second));
2702 #endif //_LP64
2703 
2704 
2705 #ifdef X86
2706     } else if (opr->is_double_xmm()) {
2707       assert(opr->fpu_regnrLo() == opr->fpu_regnrHi(), "assumed in calculation");
2708       VMReg rname_first  = opr->as_xmm_double_reg()->as_VMReg();
2709 #  ifdef _LP64
2710       first = new LocationValue(Location::new_reg_loc(Location::dbl, rname_first));
2711       second = _int_0_scope_value;
2712 #  else
2713       first = new LocationValue(Location::new_reg_loc(Location::normal, rname_first));
2714       // %%% This is probably a waste but we'll keep things as they were for now
2715       if (true) {
2716         VMReg rname_second = rname_first->next();
2717         second = new LocationValue(Location::new_reg_loc(Location::normal, rname_second));
2718       }
2719 #  endif
2720 #endif
2721 
2722     } else if (opr->is_double_fpu()) {
2723       // On SPARC, fpu_regnrLo/fpu_regnrHi represents the two halves of
2724       // the double as float registers in the native ordering. On X86,
2725       // fpu_regnrLo is a FPU stack slot whose VMReg represents
2726       // the low-order word of the double and fpu_regnrLo + 1 is the
2727       // name for the other half.  *first and *second must represent the
2728       // least and most significant words, respectively.

2597     bool is_oop = opr->is_oop_register();
2598     int cache_idx = opr->cpu_regnr() * 2 + (is_oop ? 1 : 0);
2599     Location::Type int_loc_type = NOT_LP64(Location::normal) LP64_ONLY(Location::int_in_long);
2600 
2601     ScopeValue* sv = _scope_value_cache.at(cache_idx);
2602     if (sv == NULL) {
2603       Location::Type loc_type = is_oop ? Location::oop : int_loc_type;
2604       VMReg rname = frame_map()->regname(opr);
2605       sv = new LocationValue(Location::new_reg_loc(loc_type, rname));
2606       _scope_value_cache.at_put(cache_idx, sv);
2607     }
2608 
2609     // check if cached value is correct
2610     DEBUG_ONLY(assert_equal(sv, new LocationValue(Location::new_reg_loc(is_oop ? Location::oop : int_loc_type, frame_map()->regname(opr)))));
2611 
2612     scope_values->append(sv);
2613     return 1;
2614 
2615 #ifdef X86
2616   } else if (opr->is_single_xmm()) {
2617     VMReg rname = opr->as_xmm_float_reg().as_VMReg();
2618     LocationValue* sv = new LocationValue(Location::new_reg_loc(Location::normal, rname));
2619 
2620     scope_values->append(sv);
2621     return 1;
2622 #endif
2623 
2624   } else if (opr->is_single_fpu()) {
2625 #ifdef X86
2626     // the exact location of fpu stack values is only known
2627     // during fpu stack allocation, so the stack allocator object
2628     // must be present
2629     assert(use_fpu_stack_allocation(), "should not have float stack values without fpu stack allocation (all floats must be SSE2)");
2630     assert(_fpu_stack_allocator != NULL, "must be present");
2631     opr = _fpu_stack_allocator->to_fpu_stack(opr);
2632 #endif
2633 
2634     Location::Type loc_type = float_saved_as_double ? Location::float_in_dbl : Location::normal;
2635     VMReg rname = frame_map()->fpu_regname(opr->fpu_regnr());
2636 #ifndef __SOFTFP__
2637 #ifndef VM_LITTLE_ENDIAN

2666 #ifdef _LP64
2667       Location loc1;
2668       Location::Type loc_type = opr->type() == T_LONG ? Location::lng : Location::dbl;
2669       if (!frame_map()->locations_for_slot(opr->double_stack_ix(), loc_type, &loc1, NULL)) {
2670         bailout("too large frame");
2671       }
2672       // Does this reverse on x86 vs. sparc?
2673       first =  new LocationValue(loc1);
2674       second = _int_0_scope_value;
2675 #else
2676       Location loc1, loc2;
2677       if (!frame_map()->locations_for_slot(opr->double_stack_ix(), Location::normal, &loc1, &loc2)) {
2678         bailout("too large frame");
2679       }
2680       first =  new LocationValue(loc1);
2681       second = new LocationValue(loc2);
2682 #endif // _LP64
2683 
2684     } else if (opr->is_double_cpu()) {
2685 #ifdef _LP64
2686       VMReg rname_first = opr->as_register_lo().as_VMReg();
2687       first = new LocationValue(Location::new_reg_loc(Location::lng, rname_first));
2688       second = _int_0_scope_value;
2689 #else
2690       VMReg rname_first = opr->as_register_lo().as_VMReg();
2691       VMReg rname_second = opr->as_register_hi().as_VMReg();
2692 
2693       if (hi_word_offset_in_bytes < lo_word_offset_in_bytes) {
2694         // lo/hi and swapped relative to first and second, so swap them
2695         VMReg tmp = rname_first;
2696         rname_first = rname_second;
2697         rname_second = tmp;
2698       }
2699 
2700       first = new LocationValue(Location::new_reg_loc(Location::normal, rname_first));
2701       second = new LocationValue(Location::new_reg_loc(Location::normal, rname_second));
2702 #endif //_LP64
2703 
2704 
2705 #ifdef X86
2706     } else if (opr->is_double_xmm()) {
2707       assert(opr->fpu_regnrLo() == opr->fpu_regnrHi(), "assumed in calculation");
2708       VMReg rname_first  = opr->as_xmm_double_reg().as_VMReg();
2709 #  ifdef _LP64
2710       first = new LocationValue(Location::new_reg_loc(Location::dbl, rname_first));
2711       second = _int_0_scope_value;
2712 #  else
2713       first = new LocationValue(Location::new_reg_loc(Location::normal, rname_first));
2714       // %%% This is probably a waste but we'll keep things as they were for now
2715       if (true) {
2716         VMReg rname_second = rname_first->next();
2717         second = new LocationValue(Location::new_reg_loc(Location::normal, rname_second));
2718       }
2719 #  endif
2720 #endif
2721 
2722     } else if (opr->is_double_fpu()) {
2723       // On SPARC, fpu_regnrLo/fpu_regnrHi represents the two halves of
2724       // the double as float registers in the native ordering. On X86,
2725       // fpu_regnrLo is a FPU stack slot whose VMReg represents
2726       // the low-order word of the double and fpu_regnrLo + 1 is the
2727       // name for the other half.  *first and *second must represent the
2728       // least and most significant words, respectively.