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src/cpu/x86/vm/vm_version_x86.cpp

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 770     if (PrintPreciseRTMLockingStatistics) {
 771       FLAG_SET_DEFAULT(PrintPreciseRTMLockingStatistics, false);
 772     }
 773   }
 774 #else
 775   if (UseRTMLocking) {
 776     // Only C2 does RTM locking optimization.
 777     // Can't continue because UseRTMLocking affects UseBiasedLocking flag
 778     // setting during arguments processing. See use_biased_locking().
 779     vm_exit_during_initialization("RTM locking optimization is not supported in this VM");
 780   }
 781 #endif
 782 
 783 #ifdef COMPILER2
 784   if (UseFPUForSpilling) {
 785     if (UseSSE < 2) {
 786       // Only supported with SSE2+
 787       FLAG_SET_DEFAULT(UseFPUForSpilling, false);
 788     }
 789   }


 790   if (MaxVectorSize > 0) {
 791     if (!is_power_of_2(MaxVectorSize)) {
 792       warning("MaxVectorSize must be a power of 2");
 793       FLAG_SET_DEFAULT(MaxVectorSize, 64);
 794     }
 795     if (MaxVectorSize > 64) {
 796       FLAG_SET_DEFAULT(MaxVectorSize, 64);
 797     }
 798     if (MaxVectorSize > 16 && (UseAVX == 0 || !os_supports_avx_vectors())) {
 799       // 32 bytes vectors (in YMM) are only supported with AVX+
 800       FLAG_SET_DEFAULT(MaxVectorSize, 16);
 801     }
 802     if (UseSSE < 2) {
 803       // Vectors (in XMM) are only supported with SSE2+
 804       FLAG_SET_DEFAULT(MaxVectorSize, 0);
 805     }
 806 #ifdef ASSERT
 807     if (supports_avx() && PrintMiscellaneous && Verbose && TraceNewVectors) {
 808       tty->print_cr("State of YMM registers after signal handle:");
 809       int nreg = 2 LP64_ONLY(+2);
 810       const char* ymm_name[4] = {"0", "7", "8", "15"};
 811       for (int i = 0; i < nreg; i++) {
 812         tty->print("YMM%s:", ymm_name[i]);
 813         for (int j = 7; j >=0; j--) {
 814           tty->print(" %x", _cpuid_info.ymm_save[i*8 + j]);
 815         }
 816         tty->cr();
 817       }
 818     }
 819 #endif
 820   }

 821 

 822 #ifdef _LP64
 823   if (FLAG_IS_DEFAULT(UseMultiplyToLenIntrinsic)) {
 824     UseMultiplyToLenIntrinsic = true;
 825   }
 826   if (FLAG_IS_DEFAULT(UseSquareToLenIntrinsic)) {
 827     UseSquareToLenIntrinsic = true;
 828   }
 829   if (FLAG_IS_DEFAULT(UseMulAddIntrinsic)) {
 830     UseMulAddIntrinsic = true;
 831   }
 832   if (FLAG_IS_DEFAULT(UseMontgomeryMultiplyIntrinsic)) {
 833     UseMontgomeryMultiplyIntrinsic = true;
 834   }
 835   if (FLAG_IS_DEFAULT(UseMontgomerySquareIntrinsic)) {
 836     UseMontgomerySquareIntrinsic = true;
 837   }
 838 #else
 839   if (UseMultiplyToLenIntrinsic) {
 840     if (!FLAG_IS_DEFAULT(UseMultiplyToLenIntrinsic)) {
 841       warning("multiplyToLen intrinsic is not available in 32-bit VM");




 770     if (PrintPreciseRTMLockingStatistics) {
 771       FLAG_SET_DEFAULT(PrintPreciseRTMLockingStatistics, false);
 772     }
 773   }
 774 #else
 775   if (UseRTMLocking) {
 776     // Only C2 does RTM locking optimization.
 777     // Can't continue because UseRTMLocking affects UseBiasedLocking flag
 778     // setting during arguments processing. See use_biased_locking().
 779     vm_exit_during_initialization("RTM locking optimization is not supported in this VM");
 780   }
 781 #endif
 782 
 783 #ifdef COMPILER2
 784   if (UseFPUForSpilling) {
 785     if (UseSSE < 2) {
 786       // Only supported with SSE2+
 787       FLAG_SET_DEFAULT(UseFPUForSpilling, false);
 788     }
 789   }
 790 #endif
 791 #if defined(COMPILER2) || INCLUDE_JVMCI
 792   if (MaxVectorSize > 0) {
 793     if (!is_power_of_2(MaxVectorSize)) {
 794       warning("MaxVectorSize must be a power of 2");
 795       FLAG_SET_DEFAULT(MaxVectorSize, 64);
 796     }
 797     if (MaxVectorSize > 64) {
 798       FLAG_SET_DEFAULT(MaxVectorSize, 64);
 799     }
 800     if (MaxVectorSize > 16 && (UseAVX == 0 || !os_supports_avx_vectors())) {
 801       // 32 bytes vectors (in YMM) are only supported with AVX+
 802       FLAG_SET_DEFAULT(MaxVectorSize, 16);
 803     }
 804     if (UseSSE < 2) {
 805       // Vectors (in XMM) are only supported with SSE2+
 806       FLAG_SET_DEFAULT(MaxVectorSize, 0);
 807     }
 808 #if defined(COMPILER2) && defined(ASSERT)
 809     if (supports_avx() && PrintMiscellaneous && Verbose && TraceNewVectors) {
 810       tty->print_cr("State of YMM registers after signal handle:");
 811       int nreg = 2 LP64_ONLY(+2);
 812       const char* ymm_name[4] = {"0", "7", "8", "15"};
 813       for (int i = 0; i < nreg; i++) {
 814         tty->print("YMM%s:", ymm_name[i]);
 815         for (int j = 7; j >=0; j--) {
 816           tty->print(" %x", _cpuid_info.ymm_save[i*8 + j]);
 817         }
 818         tty->cr();
 819       }
 820     }
 821 #endif // COMPILER2 && ASSERT
 822   }
 823 #endif // COMPILER2 || INCLUDE_JVMCI
 824 
 825 #ifdef COMPILER2
 826 #ifdef _LP64
 827   if (FLAG_IS_DEFAULT(UseMultiplyToLenIntrinsic)) {
 828     UseMultiplyToLenIntrinsic = true;
 829   }
 830   if (FLAG_IS_DEFAULT(UseSquareToLenIntrinsic)) {
 831     UseSquareToLenIntrinsic = true;
 832   }
 833   if (FLAG_IS_DEFAULT(UseMulAddIntrinsic)) {
 834     UseMulAddIntrinsic = true;
 835   }
 836   if (FLAG_IS_DEFAULT(UseMontgomeryMultiplyIntrinsic)) {
 837     UseMontgomeryMultiplyIntrinsic = true;
 838   }
 839   if (FLAG_IS_DEFAULT(UseMontgomerySquareIntrinsic)) {
 840     UseMontgomerySquareIntrinsic = true;
 841   }
 842 #else
 843   if (UseMultiplyToLenIntrinsic) {
 844     if (!FLAG_IS_DEFAULT(UseMultiplyToLenIntrinsic)) {
 845       warning("multiplyToLen intrinsic is not available in 32-bit VM");


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