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src/cpu/x86/vm/assembler_x86.hpp

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rev 10837 : SHA256-AVX2


1347   void kmovql(Register dst, KRegister src);
1348 
1349   void kortestbl(KRegister dst, KRegister src);
1350   void kortestwl(KRegister dst, KRegister src);
1351   void kortestdl(KRegister dst, KRegister src);
1352   void kortestql(KRegister dst, KRegister src);
1353 
1354   void movdl(XMMRegister dst, Register src);
1355   void movdl(Register dst, XMMRegister src);
1356   void movdl(XMMRegister dst, Address src);
1357   void movdl(Address dst, XMMRegister src);
1358 
1359   // Move Double Quadword
1360   void movdq(XMMRegister dst, Register src);
1361   void movdq(Register dst, XMMRegister src);
1362 
1363   // Move Aligned Double Quadword
1364   void movdqa(XMMRegister dst, XMMRegister src);
1365   void movdqa(XMMRegister dst, Address src);
1366 




1367   // Move Unaligned Double Quadword
1368   void movdqu(Address     dst, XMMRegister src);
1369   void movdqu(XMMRegister dst, Address src);
1370   void movdqu(XMMRegister dst, XMMRegister src);
1371 
1372   // Move Unaligned 256bit Vector
1373   void vmovdqu(Address dst, XMMRegister src);
1374   void vmovdqu(XMMRegister dst, Address src);
1375   void vmovdqu(XMMRegister dst, XMMRegister src);
1376 
1377    // Move Unaligned 512bit Vector
1378   void evmovdqub(Address dst, XMMRegister src, int vector_len);
1379   void evmovdqub(XMMRegister dst, Address src, int vector_len);
1380   void evmovdqub(XMMRegister dst, XMMRegister src, int vector_len);
1381   void evmovdquw(Address dst, XMMRegister src, int vector_len);
1382   void evmovdquw(XMMRegister dst, Address src, int vector_len);
1383   void evmovdquw(XMMRegister dst, XMMRegister src, int vector_len);
1384   void evmovdqul(Address dst, XMMRegister src, int vector_len);
1385   void evmovdqul(XMMRegister dst, Address src, int vector_len);
1386   void evmovdqul(XMMRegister dst, XMMRegister src, int vector_len);


1502 
1503   void orl(Address dst, int32_t imm32);
1504   void orl(Register dst, int32_t imm32);
1505   void orl(Register dst, Address src);
1506   void orl(Register dst, Register src);
1507   void orl(Address dst, Register src);
1508 
1509   void orq(Address dst, int32_t imm32);
1510   void orq(Register dst, int32_t imm32);
1511   void orq(Register dst, Address src);
1512   void orq(Register dst, Register src);
1513 
1514   // Pack with unsigned saturation
1515   void packuswb(XMMRegister dst, XMMRegister src);
1516   void packuswb(XMMRegister dst, Address src);
1517   void vpackuswb(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1518 
1519   // Pemutation of 64bit words
1520   void vpermq(XMMRegister dst, XMMRegister src, int imm8, int vector_len);
1521   void vpermq(XMMRegister dst, XMMRegister src, int imm8);

1522 
1523   void pause();
1524 
1525   // SSE4.2 string instructions
1526   void pcmpestri(XMMRegister xmm1, XMMRegister xmm2, int imm8);
1527   void pcmpestri(XMMRegister xmm1, Address src, int imm8);
1528 
1529   void pcmpeqb(XMMRegister dst, XMMRegister src);
1530   void vpcmpeqb(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1531   void evpcmpeqb(KRegister kdst, XMMRegister nds, XMMRegister src, int vector_len);
1532   void evpcmpeqb(KRegister kdst, XMMRegister nds, Address src, int vector_len);
1533 
1534   void pcmpeqw(XMMRegister dst, XMMRegister src);
1535   void vpcmpeqw(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1536   void evpcmpeqw(KRegister kdst, XMMRegister nds, XMMRegister src, int vector_len);
1537   void evpcmpeqw(KRegister kdst, XMMRegister nds, Address src, int vector_len);
1538 
1539   void pcmpeqd(XMMRegister dst, XMMRegister src);
1540   void vpcmpeqd(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1541   void evpcmpeqd(KRegister kdst, XMMRegister nds, XMMRegister src, int vector_len);


1586   void popcntl(Register dst, Address src);
1587   void popcntl(Register dst, Register src);
1588 
1589 #ifdef _LP64
1590   void popcntq(Register dst, Address src);
1591   void popcntq(Register dst, Register src);
1592 #endif
1593 
1594   // Prefetches (SSE, SSE2, 3DNOW only)
1595 
1596   void prefetchnta(Address src);
1597   void prefetchr(Address src);
1598   void prefetcht0(Address src);
1599   void prefetcht1(Address src);
1600   void prefetcht2(Address src);
1601   void prefetchw(Address src);
1602 
1603   // Shuffle Bytes
1604   void pshufb(XMMRegister dst, XMMRegister src);
1605   void pshufb(XMMRegister dst, Address src);

1606 
1607   // Shuffle Packed Doublewords
1608   void pshufd(XMMRegister dst, XMMRegister src, int mode);
1609   void pshufd(XMMRegister dst, Address src,     int mode);

1610 
1611   // Shuffle Packed Low Words
1612   void pshuflw(XMMRegister dst, XMMRegister src, int mode);
1613   void pshuflw(XMMRegister dst, Address src,     int mode);
1614 
1615   // Shift Right by bytes Logical DoubleQuadword Immediate
1616   void psrldq(XMMRegister dst, int shift);

1617   // Shift Left by bytes Logical DoubleQuadword Immediate
1618   void pslldq(XMMRegister dst, int shift);

1619 
1620   // Logical Compare 128bit
1621   void ptest(XMMRegister dst, XMMRegister src);
1622   void ptest(XMMRegister dst, Address src);
1623   // Logical Compare 256bit
1624   void vptest(XMMRegister dst, XMMRegister src);
1625   void vptest(XMMRegister dst, Address src);
1626 
1627   // Interleave Low Bytes
1628   void punpcklbw(XMMRegister dst, XMMRegister src);
1629   void punpcklbw(XMMRegister dst, Address src);
1630 
1631   // Interleave Low Doublewords
1632   void punpckldq(XMMRegister dst, XMMRegister src);
1633   void punpckldq(XMMRegister dst, Address src);
1634 
1635   // Interleave Low Quadwords
1636   void punpcklqdq(XMMRegister dst, XMMRegister src);
1637 
1638 #ifndef _LP64 // no 32bit push/pop on amd64


1641 
1642   void pushq(Address src);
1643 
1644   void rcll(Register dst, int imm8);
1645 
1646   void rclq(Register dst, int imm8);
1647 
1648   void rcrq(Register dst, int imm8);
1649 
1650   void rcpps(XMMRegister dst, XMMRegister src);
1651 
1652   void rcpss(XMMRegister dst, XMMRegister src);
1653 
1654   void rdtsc();
1655 
1656   void ret(int imm16);
1657 
1658 #ifdef _LP64
1659   void rorq(Register dst, int imm8);
1660   void rorxq(Register dst, Register src, int imm8);

1661 #endif
1662 
1663   void sahf();
1664 
1665   void sarl(Register dst, int imm8);
1666   void sarl(Register dst);
1667 
1668   void sarq(Register dst, int imm8);
1669   void sarq(Register dst);
1670 
1671   void sbbl(Address dst, int32_t imm32);
1672   void sbbl(Register dst, int32_t imm32);
1673   void sbbl(Register dst, Address src);
1674   void sbbl(Register dst, Register src);
1675 
1676   void sbbq(Address dst, int32_t imm32);
1677   void sbbq(Register dst, int32_t imm32);
1678   void sbbq(Register dst, Address src);
1679   void sbbq(Register dst, Register src);
1680 
1681   void setb(Condition cc, Register dst);
1682 
1683   void palignr(XMMRegister dst, XMMRegister src, int imm8);


1684   void pblendw(XMMRegister dst, XMMRegister src, int imm8);
1685 
1686   void sha1rnds4(XMMRegister dst, XMMRegister src, int imm8);
1687   void sha1nexte(XMMRegister dst, XMMRegister src);
1688   void sha1msg1(XMMRegister dst, XMMRegister src);
1689   void sha1msg2(XMMRegister dst, XMMRegister src);
1690   // xmm0 is implicit additional source to the following instruction.
1691   void sha256rnds2(XMMRegister dst, XMMRegister src);
1692   void sha256msg1(XMMRegister dst, XMMRegister src);
1693   void sha256msg2(XMMRegister dst, XMMRegister src);
1694 
1695   void shldl(Register dst, Register src);
1696   void shldl(Register dst, Register src, int8_t imm8);
1697 
1698   void shll(Register dst, int imm8);
1699   void shll(Register dst);
1700 
1701   void shlq(Register dst, int imm8);
1702   void shlq(Register dst);
1703 




1347   void kmovql(Register dst, KRegister src);
1348 
1349   void kortestbl(KRegister dst, KRegister src);
1350   void kortestwl(KRegister dst, KRegister src);
1351   void kortestdl(KRegister dst, KRegister src);
1352   void kortestql(KRegister dst, KRegister src);
1353 
1354   void movdl(XMMRegister dst, Register src);
1355   void movdl(Register dst, XMMRegister src);
1356   void movdl(XMMRegister dst, Address src);
1357   void movdl(Address dst, XMMRegister src);
1358 
1359   // Move Double Quadword
1360   void movdq(XMMRegister dst, Register src);
1361   void movdq(Register dst, XMMRegister src);
1362 
1363   // Move Aligned Double Quadword
1364   void movdqa(XMMRegister dst, XMMRegister src);
1365   void movdqa(XMMRegister dst, Address src);
1366 
1367   void movdqa(Address dst, XMMRegister src);
1368   void vmovdqa(XMMRegister dst, Address src);
1369   void vmovdqa(Address dst, XMMRegister src);
1370 
1371   // Move Unaligned Double Quadword
1372   void movdqu(Address     dst, XMMRegister src);
1373   void movdqu(XMMRegister dst, Address src);
1374   void movdqu(XMMRegister dst, XMMRegister src);
1375 
1376   // Move Unaligned 256bit Vector
1377   void vmovdqu(Address dst, XMMRegister src);
1378   void vmovdqu(XMMRegister dst, Address src);
1379   void vmovdqu(XMMRegister dst, XMMRegister src);
1380 
1381    // Move Unaligned 512bit Vector
1382   void evmovdqub(Address dst, XMMRegister src, int vector_len);
1383   void evmovdqub(XMMRegister dst, Address src, int vector_len);
1384   void evmovdqub(XMMRegister dst, XMMRegister src, int vector_len);
1385   void evmovdquw(Address dst, XMMRegister src, int vector_len);
1386   void evmovdquw(XMMRegister dst, Address src, int vector_len);
1387   void evmovdquw(XMMRegister dst, XMMRegister src, int vector_len);
1388   void evmovdqul(Address dst, XMMRegister src, int vector_len);
1389   void evmovdqul(XMMRegister dst, Address src, int vector_len);
1390   void evmovdqul(XMMRegister dst, XMMRegister src, int vector_len);


1506 
1507   void orl(Address dst, int32_t imm32);
1508   void orl(Register dst, int32_t imm32);
1509   void orl(Register dst, Address src);
1510   void orl(Register dst, Register src);
1511   void orl(Address dst, Register src);
1512 
1513   void orq(Address dst, int32_t imm32);
1514   void orq(Register dst, int32_t imm32);
1515   void orq(Register dst, Address src);
1516   void orq(Register dst, Register src);
1517 
1518   // Pack with unsigned saturation
1519   void packuswb(XMMRegister dst, XMMRegister src);
1520   void packuswb(XMMRegister dst, Address src);
1521   void vpackuswb(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1522 
1523   // Pemutation of 64bit words
1524   void vpermq(XMMRegister dst, XMMRegister src, int imm8, int vector_len);
1525   void vpermq(XMMRegister dst, XMMRegister src, int imm8);
1526   void vperm2i128(XMMRegister dst,  XMMRegister nds, XMMRegister src, int imm8);
1527 
1528   void pause();
1529 
1530   // SSE4.2 string instructions
1531   void pcmpestri(XMMRegister xmm1, XMMRegister xmm2, int imm8);
1532   void pcmpestri(XMMRegister xmm1, Address src, int imm8);
1533 
1534   void pcmpeqb(XMMRegister dst, XMMRegister src);
1535   void vpcmpeqb(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1536   void evpcmpeqb(KRegister kdst, XMMRegister nds, XMMRegister src, int vector_len);
1537   void evpcmpeqb(KRegister kdst, XMMRegister nds, Address src, int vector_len);
1538 
1539   void pcmpeqw(XMMRegister dst, XMMRegister src);
1540   void vpcmpeqw(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1541   void evpcmpeqw(KRegister kdst, XMMRegister nds, XMMRegister src, int vector_len);
1542   void evpcmpeqw(KRegister kdst, XMMRegister nds, Address src, int vector_len);
1543 
1544   void pcmpeqd(XMMRegister dst, XMMRegister src);
1545   void vpcmpeqd(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1546   void evpcmpeqd(KRegister kdst, XMMRegister nds, XMMRegister src, int vector_len);


1591   void popcntl(Register dst, Address src);
1592   void popcntl(Register dst, Register src);
1593 
1594 #ifdef _LP64
1595   void popcntq(Register dst, Address src);
1596   void popcntq(Register dst, Register src);
1597 #endif
1598 
1599   // Prefetches (SSE, SSE2, 3DNOW only)
1600 
1601   void prefetchnta(Address src);
1602   void prefetchr(Address src);
1603   void prefetcht0(Address src);
1604   void prefetcht1(Address src);
1605   void prefetcht2(Address src);
1606   void prefetchw(Address src);
1607 
1608   // Shuffle Bytes
1609   void pshufb(XMMRegister dst, XMMRegister src);
1610   void pshufb(XMMRegister dst, Address src);
1611   void vpshufb(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1612 
1613   // Shuffle Packed Doublewords
1614   void pshufd(XMMRegister dst, XMMRegister src, int mode);
1615   void pshufd(XMMRegister dst, Address src,     int mode);
1616   void vpshufd(XMMRegister dst, XMMRegister src, int mode, int vector_len);
1617 
1618   // Shuffle Packed Low Words
1619   void pshuflw(XMMRegister dst, XMMRegister src, int mode);
1620   void pshuflw(XMMRegister dst, Address src,     int mode);
1621 
1622   // Shift Right by bytes Logical DoubleQuadword Immediate
1623   void psrldq(XMMRegister dst, int shift);
1624   void vpsrldq(XMMRegister dst, XMMRegister src, int shift, int vector_len);
1625   // Shift Left by bytes Logical DoubleQuadword Immediate
1626   void pslldq(XMMRegister dst, int shift);
1627   void vpslldq(XMMRegister dst, XMMRegister src, int shift, int vector_len);
1628 
1629   // Logical Compare 128bit
1630   void ptest(XMMRegister dst, XMMRegister src);
1631   void ptest(XMMRegister dst, Address src);
1632   // Logical Compare 256bit
1633   void vptest(XMMRegister dst, XMMRegister src);
1634   void vptest(XMMRegister dst, Address src);
1635 
1636   // Interleave Low Bytes
1637   void punpcklbw(XMMRegister dst, XMMRegister src);
1638   void punpcklbw(XMMRegister dst, Address src);
1639 
1640   // Interleave Low Doublewords
1641   void punpckldq(XMMRegister dst, XMMRegister src);
1642   void punpckldq(XMMRegister dst, Address src);
1643 
1644   // Interleave Low Quadwords
1645   void punpcklqdq(XMMRegister dst, XMMRegister src);
1646 
1647 #ifndef _LP64 // no 32bit push/pop on amd64


1650 
1651   void pushq(Address src);
1652 
1653   void rcll(Register dst, int imm8);
1654 
1655   void rclq(Register dst, int imm8);
1656 
1657   void rcrq(Register dst, int imm8);
1658 
1659   void rcpps(XMMRegister dst, XMMRegister src);
1660 
1661   void rcpss(XMMRegister dst, XMMRegister src);
1662 
1663   void rdtsc();
1664 
1665   void ret(int imm16);
1666 
1667 #ifdef _LP64
1668   void rorq(Register dst, int imm8);
1669   void rorxq(Register dst, Register src, int imm8);
1670   void rorxd(Register dst, Register src, int imm8);
1671 #endif
1672 
1673   void sahf();
1674 
1675   void sarl(Register dst, int imm8);
1676   void sarl(Register dst);
1677 
1678   void sarq(Register dst, int imm8);
1679   void sarq(Register dst);
1680 
1681   void sbbl(Address dst, int32_t imm32);
1682   void sbbl(Register dst, int32_t imm32);
1683   void sbbl(Register dst, Address src);
1684   void sbbl(Register dst, Register src);
1685 
1686   void sbbq(Address dst, int32_t imm32);
1687   void sbbq(Register dst, int32_t imm32);
1688   void sbbq(Register dst, Address src);
1689   void sbbq(Register dst, Register src);
1690 
1691   void setb(Condition cc, Register dst);
1692 
1693   void palignr(XMMRegister dst, XMMRegister src, int imm8);
1694   void vpalignr(XMMRegister dst, XMMRegister src1, XMMRegister src2, int imm8, int vector_len);
1695 
1696   void pblendw(XMMRegister dst, XMMRegister src, int imm8);
1697 
1698   void sha1rnds4(XMMRegister dst, XMMRegister src, int imm8);
1699   void sha1nexte(XMMRegister dst, XMMRegister src);
1700   void sha1msg1(XMMRegister dst, XMMRegister src);
1701   void sha1msg2(XMMRegister dst, XMMRegister src);
1702   // xmm0 is implicit additional source to the following instruction.
1703   void sha256rnds2(XMMRegister dst, XMMRegister src);
1704   void sha256msg1(XMMRegister dst, XMMRegister src);
1705   void sha256msg2(XMMRegister dst, XMMRegister src);
1706 
1707   void shldl(Register dst, Register src);
1708   void shldl(Register dst, Register src, int8_t imm8);
1709 
1710   void shll(Register dst, int imm8);
1711   void shll(Register dst);
1712 
1713   void shlq(Register dst, int imm8);
1714   void shlq(Register dst);
1715 


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