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src/cpu/x86/vm/assembler_x86.hpp

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rev 10837 : SHA256-AVX2

@@ -1362,10 +1362,14 @@
 
   // Move Aligned Double Quadword
   void movdqa(XMMRegister dst, XMMRegister src);
   void movdqa(XMMRegister dst, Address src);
 
+  void movdqa(Address dst, XMMRegister src);
+  void vmovdqa(XMMRegister dst, Address src);
+  void vmovdqa(Address dst, XMMRegister src);
+
   // Move Unaligned Double Quadword
   void movdqu(Address     dst, XMMRegister src);
   void movdqu(XMMRegister dst, Address src);
   void movdqu(XMMRegister dst, XMMRegister src);
 

@@ -1517,10 +1521,11 @@
   void vpackuswb(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
 
   // Pemutation of 64bit words
   void vpermq(XMMRegister dst, XMMRegister src, int imm8, int vector_len);
   void vpermq(XMMRegister dst, XMMRegister src, int imm8);
+  void vperm2i128(XMMRegister dst,  XMMRegister nds, XMMRegister src, int imm8);
 
   void pause();
 
   // SSE4.2 string instructions
   void pcmpestri(XMMRegister xmm1, XMMRegister xmm2, int imm8);

@@ -1601,23 +1606,27 @@
   void prefetchw(Address src);
 
   // Shuffle Bytes
   void pshufb(XMMRegister dst, XMMRegister src);
   void pshufb(XMMRegister dst, Address src);
+  void vpshufb(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
 
   // Shuffle Packed Doublewords
   void pshufd(XMMRegister dst, XMMRegister src, int mode);
   void pshufd(XMMRegister dst, Address src,     int mode);
+  void vpshufd(XMMRegister dst, XMMRegister src, int mode, int vector_len);
 
   // Shuffle Packed Low Words
   void pshuflw(XMMRegister dst, XMMRegister src, int mode);
   void pshuflw(XMMRegister dst, Address src,     int mode);
 
   // Shift Right by bytes Logical DoubleQuadword Immediate
   void psrldq(XMMRegister dst, int shift);
+  void vpsrldq(XMMRegister dst, XMMRegister src, int shift, int vector_len);
   // Shift Left by bytes Logical DoubleQuadword Immediate
   void pslldq(XMMRegister dst, int shift);
+  void vpslldq(XMMRegister dst, XMMRegister src, int shift, int vector_len);
 
   // Logical Compare 128bit
   void ptest(XMMRegister dst, XMMRegister src);
   void ptest(XMMRegister dst, Address src);
   // Logical Compare 256bit

@@ -1656,10 +1665,11 @@
   void ret(int imm16);
 
 #ifdef _LP64
   void rorq(Register dst, int imm8);
   void rorxq(Register dst, Register src, int imm8);
+  void rorxd(Register dst, Register src, int imm8);
 #endif
 
   void sahf();
 
   void sarl(Register dst, int imm8);

@@ -1679,10 +1689,12 @@
   void sbbq(Register dst, Register src);
 
   void setb(Condition cc, Register dst);
 
   void palignr(XMMRegister dst, XMMRegister src, int imm8);
+  void vpalignr(XMMRegister dst, XMMRegister src1, XMMRegister src2, int imm8, int vector_len);
+
   void pblendw(XMMRegister dst, XMMRegister src, int imm8);
 
   void sha1rnds4(XMMRegister dst, XMMRegister src, int imm8);
   void sha1nexte(XMMRegister dst, XMMRegister src);
   void sha1msg1(XMMRegister dst, XMMRegister src);
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