1 /*
2 * Copyright (c) 2003, 2016, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #ifndef _WINDOWS
27 #include "alloca.h"
28 #endif
29 #include "asm/macroAssembler.hpp"
30 #include "asm/macroAssembler.inline.hpp"
31 #include "code/debugInfoRec.hpp"
32 #include "code/icBuffer.hpp"
33 #include "code/vtableStubs.hpp"
34 #include "interpreter/interpreter.hpp"
35 #include "logging/log.hpp"
36 #include "memory/resourceArea.hpp"
37 #include "oops/compiledICHolder.hpp"
38 #include "runtime/sharedRuntime.hpp"
39 #include "runtime/vframeArray.hpp"
40 #include "vmreg_x86.inline.hpp"
41 #ifdef COMPILER1
42 #include "c1/c1_Runtime1.hpp"
43 #endif
44 #ifdef COMPILER2
45 #include "opto/runtime.hpp"
46 #endif
47 #if INCLUDE_JVMCI
48 #include "jvmci/jvmciJavaClasses.hpp"
49 #endif
50 #include "vm_version_x86.hpp"
51
52 #define __ masm->
53
54 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size;
55
56 class SimpleRuntimeFrame {
57
58 public:
59
60 // Most of the runtime stubs have this simple frame layout.
61 // This class exists to make the layout shared in one place.
62 // Offsets are for compiler stack slots, which are jints.
63 enum layout {
64 // The frame sender code expects that rbp will be in the "natural" place and
65 // will override any oopMap setting for it. We must therefore force the layout
66 // so that it agrees with the frame sender code.
67 rbp_off = frame::arg_reg_save_area_bytes/BytesPerInt,
68 rbp_off2,
69 return_off, return_off2,
70 framesize
71 };
72 };
73
74 class RegisterSaver {
75 // Capture info about frame layout. Layout offsets are in jint
76 // units because compiler frame slots are jints.
77 #define XSAVE_AREA_BEGIN 160
78 #define XSAVE_AREA_YMM_BEGIN 576
79 #define XSAVE_AREA_ZMM_BEGIN 1152
80 #define XSAVE_AREA_UPPERBANK 1664
81 #define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off
82 #define DEF_YMM_OFFS(regnum) ymm ## regnum ## _off = ymm_off + (regnum)*16/BytesPerInt, ymm ## regnum ## H_off
83 #define DEF_ZMM_OFFS(regnum) zmm ## regnum ## _off = zmm_off + (regnum-16)*64/BytesPerInt, zmm ## regnum ## H_off
84 enum layout {
85 fpu_state_off = frame::arg_reg_save_area_bytes/BytesPerInt, // fxsave save area
86 xmm_off = fpu_state_off + XSAVE_AREA_BEGIN/BytesPerInt, // offset in fxsave save area
87 DEF_XMM_OFFS(0),
88 DEF_XMM_OFFS(1),
89 // 2..15 are implied in range usage
90 ymm_off = xmm_off + (XSAVE_AREA_YMM_BEGIN - XSAVE_AREA_BEGIN)/BytesPerInt,
91 DEF_YMM_OFFS(0),
92 DEF_YMM_OFFS(1),
93 // 2..15 are implied in range usage
94 zmm_high = xmm_off + (XSAVE_AREA_ZMM_BEGIN - XSAVE_AREA_BEGIN)/BytesPerInt,
95 zmm_off = xmm_off + (XSAVE_AREA_UPPERBANK - XSAVE_AREA_BEGIN)/BytesPerInt,
96 DEF_ZMM_OFFS(16),
97 DEF_ZMM_OFFS(17),
98 // 18..31 are implied in range usage
99 fpu_state_end = fpu_state_off + ((FPUStateSizeInWords-1)*wordSize / BytesPerInt),
100 fpu_stateH_end,
101 r15_off, r15H_off,
102 r14_off, r14H_off,
103 r13_off, r13H_off,
104 r12_off, r12H_off,
105 r11_off, r11H_off,
106 r10_off, r10H_off,
107 r9_off, r9H_off,
108 r8_off, r8H_off,
109 rdi_off, rdiH_off,
110 rsi_off, rsiH_off,
111 ignore_off, ignoreH_off, // extra copy of rbp
112 rsp_off, rspH_off,
113 rbx_off, rbxH_off,
114 rdx_off, rdxH_off,
115 rcx_off, rcxH_off,
116 rax_off, raxH_off,
117 // 16-byte stack alignment fill word: see MacroAssembler::push/pop_IU_state
118 align_off, alignH_off,
119 flags_off, flagsH_off,
120 // The frame sender code expects that rbp will be in the "natural" place and
121 // will override any oopMap setting for it. We must therefore force the layout
122 // so that it agrees with the frame sender code.
123 rbp_off, rbpH_off, // copy of rbp we will restore
124 return_off, returnH_off, // slot for return address
125 reg_save_size // size in compiler stack slots
126 };
127
128 public:
129 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words, bool save_vectors = false);
130 static void restore_live_registers(MacroAssembler* masm, bool restore_vectors = false);
131
132 // Offsets into the register save area
133 // Used by deoptimization when it is managing result register
134 // values on its own
135
136 static int rax_offset_in_bytes(void) { return BytesPerInt * rax_off; }
137 static int rdx_offset_in_bytes(void) { return BytesPerInt * rdx_off; }
138 static int rbx_offset_in_bytes(void) { return BytesPerInt * rbx_off; }
139 static int xmm0_offset_in_bytes(void) { return BytesPerInt * xmm0_off; }
140 static int return_offset_in_bytes(void) { return BytesPerInt * return_off; }
141
142 // During deoptimization only the result registers need to be restored,
143 // all the other values have already been extracted.
144 static void restore_result_registers(MacroAssembler* masm);
145 };
146
147 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words, bool save_vectors) {
148 int off = 0;
149 int num_xmm_regs = XMMRegisterImpl::number_of_registers;
150 if (UseAVX < 3) {
151 num_xmm_regs = num_xmm_regs/2;
152 }
153 #if defined(COMPILER2) || INCLUDE_JVMCI
154 if (save_vectors) {
155 assert(UseAVX > 0, "Vectors larger than 16 byte long are supported only with AVX");
156 assert(MaxVectorSize <= 64, "Only up to 64 byte long vectors are supported");
157 }
158 #else
159 assert(!save_vectors, "vectors are generated only by C2 and JVMCI");
160 #endif
161
162 // Always make the frame size 16-byte aligned, both vector and non vector stacks are always allocated
163 int frame_size_in_bytes = round_to(reg_save_size*BytesPerInt, num_xmm_regs);
164 // OopMap frame size is in compiler stack slots (jint's) not bytes or words
165 int frame_size_in_slots = frame_size_in_bytes / BytesPerInt;
166 // CodeBlob frame size is in words.
167 int frame_size_in_words = frame_size_in_bytes / wordSize;
168 *total_frame_words = frame_size_in_words;
169
170 // Save registers, fpu state, and flags.
171 // We assume caller has already pushed the return address onto the
172 // stack, so rsp is 8-byte aligned here.
173 // We push rpb twice in this sequence because we want the real rbp
174 // to be under the return like a normal enter.
175
176 __ enter(); // rsp becomes 16-byte aligned here
177 __ push_CPU_state(); // Push a multiple of 16 bytes
178
179 // push cpu state handles this on EVEX enabled targets
180 if (save_vectors) {
181 // Save upper half of YMM registers(0..15)
182 int base_addr = XSAVE_AREA_YMM_BEGIN;
183 for (int n = 0; n < 16; n++) {
184 __ vextractf128_high(Address(rsp, base_addr+n*16), as_XMMRegister(n));
185 }
186 if (VM_Version::supports_evex()) {
187 // Save upper half of ZMM registers(0..15)
188 base_addr = XSAVE_AREA_ZMM_BEGIN;
189 for (int n = 0; n < 16; n++) {
190 __ vextractf64x4_high(Address(rsp, base_addr+n*32), as_XMMRegister(n));
191 }
192 // Save full ZMM registers(16..num_xmm_regs)
193 base_addr = XSAVE_AREA_UPPERBANK;
194 off = 0;
195 int vector_len = Assembler::AVX_512bit;
196 for (int n = 16; n < num_xmm_regs; n++) {
197 __ evmovdqul(Address(rsp, base_addr+(off++*64)), as_XMMRegister(n), vector_len);
198 }
199 }
200 } else {
201 if (VM_Version::supports_evex()) {
202 // Save upper bank of ZMM registers(16..31) for double/float usage
203 int base_addr = XSAVE_AREA_UPPERBANK;
204 off = 0;
205 for (int n = 16; n < num_xmm_regs; n++) {
206 __ movsd(Address(rsp, base_addr+(off++*64)), as_XMMRegister(n));
207 }
208 }
209 }
210 if (VM_Version::supports_avx()) {
211 __ vzeroupper();
212 }
213 if (frame::arg_reg_save_area_bytes != 0) {
214 // Allocate argument register save area
215 __ subptr(rsp, frame::arg_reg_save_area_bytes);
216 }
217
218 // Set an oopmap for the call site. This oopmap will map all
219 // oop-registers and debug-info registers as callee-saved. This
220 // will allow deoptimization at this safepoint to find all possible
221 // debug-info recordings, as well as let GC find all oops.
222
223 OopMapSet *oop_maps = new OopMapSet();
224 OopMap* map = new OopMap(frame_size_in_slots, 0);
225
226 #define STACK_OFFSET(x) VMRegImpl::stack2reg((x))
227
228 map->set_callee_saved(STACK_OFFSET( rax_off ), rax->as_VMReg());
229 map->set_callee_saved(STACK_OFFSET( rcx_off ), rcx->as_VMReg());
230 map->set_callee_saved(STACK_OFFSET( rdx_off ), rdx->as_VMReg());
231 map->set_callee_saved(STACK_OFFSET( rbx_off ), rbx->as_VMReg());
232 // rbp location is known implicitly by the frame sender code, needs no oopmap
233 // and the location where rbp was saved by is ignored
234 map->set_callee_saved(STACK_OFFSET( rsi_off ), rsi->as_VMReg());
235 map->set_callee_saved(STACK_OFFSET( rdi_off ), rdi->as_VMReg());
236 map->set_callee_saved(STACK_OFFSET( r8_off ), r8->as_VMReg());
237 map->set_callee_saved(STACK_OFFSET( r9_off ), r9->as_VMReg());
238 map->set_callee_saved(STACK_OFFSET( r10_off ), r10->as_VMReg());
239 map->set_callee_saved(STACK_OFFSET( r11_off ), r11->as_VMReg());
240 map->set_callee_saved(STACK_OFFSET( r12_off ), r12->as_VMReg());
241 map->set_callee_saved(STACK_OFFSET( r13_off ), r13->as_VMReg());
242 map->set_callee_saved(STACK_OFFSET( r14_off ), r14->as_VMReg());
243 map->set_callee_saved(STACK_OFFSET( r15_off ), r15->as_VMReg());
244 // For both AVX and EVEX we will use the legacy FXSAVE area for xmm0..xmm15,
245 // on EVEX enabled targets, we get it included in the xsave area
246 off = xmm0_off;
247 int delta = xmm1_off - off;
248 for (int n = 0; n < 16; n++) {
249 XMMRegister xmm_name = as_XMMRegister(n);
250 map->set_callee_saved(STACK_OFFSET(off), xmm_name->as_VMReg());
251 off += delta;
252 }
253 if(UseAVX > 2) {
254 // Obtain xmm16..xmm31 from the XSAVE area on EVEX enabled targets
255 off = zmm16_off;
256 delta = zmm17_off - off;
257 for (int n = 16; n < num_xmm_regs; n++) {
258 XMMRegister zmm_name = as_XMMRegister(n);
259 map->set_callee_saved(STACK_OFFSET(off), zmm_name->as_VMReg());
260 off += delta;
261 }
262 }
263
264 #if defined(COMPILER2) || INCLUDE_JVMCI
265 if (save_vectors) {
266 off = ymm0_off;
267 int delta = ymm1_off - off;
268 for (int n = 0; n < 16; n++) {
269 XMMRegister ymm_name = as_XMMRegister(n);
270 map->set_callee_saved(STACK_OFFSET(off), ymm_name->as_VMReg()->next(4));
271 off += delta;
272 }
273 }
274 #endif // COMPILER2 || INCLUDE_JVMCI
275
276 // %%% These should all be a waste but we'll keep things as they were for now
277 if (true) {
278 map->set_callee_saved(STACK_OFFSET( raxH_off ), rax->as_VMReg()->next());
279 map->set_callee_saved(STACK_OFFSET( rcxH_off ), rcx->as_VMReg()->next());
280 map->set_callee_saved(STACK_OFFSET( rdxH_off ), rdx->as_VMReg()->next());
281 map->set_callee_saved(STACK_OFFSET( rbxH_off ), rbx->as_VMReg()->next());
282 // rbp location is known implicitly by the frame sender code, needs no oopmap
283 map->set_callee_saved(STACK_OFFSET( rsiH_off ), rsi->as_VMReg()->next());
284 map->set_callee_saved(STACK_OFFSET( rdiH_off ), rdi->as_VMReg()->next());
285 map->set_callee_saved(STACK_OFFSET( r8H_off ), r8->as_VMReg()->next());
286 map->set_callee_saved(STACK_OFFSET( r9H_off ), r9->as_VMReg()->next());
287 map->set_callee_saved(STACK_OFFSET( r10H_off ), r10->as_VMReg()->next());
288 map->set_callee_saved(STACK_OFFSET( r11H_off ), r11->as_VMReg()->next());
289 map->set_callee_saved(STACK_OFFSET( r12H_off ), r12->as_VMReg()->next());
290 map->set_callee_saved(STACK_OFFSET( r13H_off ), r13->as_VMReg()->next());
291 map->set_callee_saved(STACK_OFFSET( r14H_off ), r14->as_VMReg()->next());
292 map->set_callee_saved(STACK_OFFSET( r15H_off ), r15->as_VMReg()->next());
293 // For both AVX and EVEX we will use the legacy FXSAVE area for xmm0..xmm15,
294 // on EVEX enabled targets, we get it included in the xsave area
295 off = xmm0H_off;
296 delta = xmm1H_off - off;
297 for (int n = 0; n < 16; n++) {
298 XMMRegister xmm_name = as_XMMRegister(n);
299 map->set_callee_saved(STACK_OFFSET(off), xmm_name->as_VMReg()->next());
300 off += delta;
301 }
302 if (UseAVX > 2) {
303 // Obtain xmm16..xmm31 from the XSAVE area on EVEX enabled targets
304 off = zmm16H_off;
305 delta = zmm17H_off - off;
306 for (int n = 16; n < num_xmm_regs; n++) {
307 XMMRegister zmm_name = as_XMMRegister(n);
308 map->set_callee_saved(STACK_OFFSET(off), zmm_name->as_VMReg()->next());
309 off += delta;
310 }
311 }
312 }
313
314 return map;
315 }
316
317 void RegisterSaver::restore_live_registers(MacroAssembler* masm, bool restore_vectors) {
318 int num_xmm_regs = XMMRegisterImpl::number_of_registers;
319 if (UseAVX < 3) {
320 num_xmm_regs = num_xmm_regs/2;
321 }
322 if (frame::arg_reg_save_area_bytes != 0) {
323 // Pop arg register save area
324 __ addptr(rsp, frame::arg_reg_save_area_bytes);
325 }
326
327 #if defined(COMPILER2) || INCLUDE_JVMCI
328 if (restore_vectors) {
329 assert(UseAVX > 0, "Vectors larger than 16 byte long are supported only with AVX");
330 assert(MaxVectorSize <= 64, "Only up to 64 byte long vectors are supported");
331 }
332 #else
333 assert(!restore_vectors, "vectors are generated only by C2");
334 #endif
335
336 if (VM_Version::supports_avx()) {
337 __ vzeroupper();
338 }
339
340 // On EVEX enabled targets everything is handled in pop fpu state
341 if (restore_vectors) {
342 // Restore upper half of YMM registers (0..15)
343 int base_addr = XSAVE_AREA_YMM_BEGIN;
344 for (int n = 0; n < 16; n++) {
345 __ vinsertf128_high(as_XMMRegister(n), Address(rsp, base_addr+n*16));
346 }
347 if (VM_Version::supports_evex()) {
348 // Restore upper half of ZMM registers (0..15)
349 base_addr = XSAVE_AREA_ZMM_BEGIN;
350 for (int n = 0; n < 16; n++) {
351 __ vinsertf64x4_high(as_XMMRegister(n), Address(rsp, base_addr+n*32));
352 }
353 // Restore full ZMM registers(16..num_xmm_regs)
354 base_addr = XSAVE_AREA_UPPERBANK;
355 int vector_len = Assembler::AVX_512bit;
356 int off = 0;
357 for (int n = 16; n < num_xmm_regs; n++) {
358 __ evmovdqul(as_XMMRegister(n), Address(rsp, base_addr+(off++*64)), vector_len);
359 }
360 }
361 } else {
362 if (VM_Version::supports_evex()) {
363 // Restore upper bank of ZMM registers(16..31) for double/float usage
364 int base_addr = XSAVE_AREA_UPPERBANK;
365 int off = 0;
366 for (int n = 16; n < num_xmm_regs; n++) {
367 __ movsd(as_XMMRegister(n), Address(rsp, base_addr+(off++*64)));
368 }
369 }
370 }
371
372 // Recover CPU state
373 __ pop_CPU_state();
374 // Get the rbp described implicitly by the calling convention (no oopMap)
375 __ pop(rbp);
376 }
377
378 void RegisterSaver::restore_result_registers(MacroAssembler* masm) {
379
380 // Just restore result register. Only used by deoptimization. By
381 // now any callee save register that needs to be restored to a c2
382 // caller of the deoptee has been extracted into the vframeArray
383 // and will be stuffed into the c2i adapter we create for later
384 // restoration so only result registers need to be restored here.
385
386 // Restore fp result register
387 __ movdbl(xmm0, Address(rsp, xmm0_offset_in_bytes()));
388 // Restore integer result register
389 __ movptr(rax, Address(rsp, rax_offset_in_bytes()));
390 __ movptr(rdx, Address(rsp, rdx_offset_in_bytes()));
391
392 // Pop all of the register save are off the stack except the return address
393 __ addptr(rsp, return_offset_in_bytes());
394 }
395
396 // Is vector's size (in bytes) bigger than a size saved by default?
397 // 16 bytes XMM registers are saved by default using fxsave/fxrstor instructions.
398 bool SharedRuntime::is_wide_vector(int size) {
399 return size > 16;
400 }
401
402 size_t SharedRuntime::trampoline_size() {
403 return 16;
404 }
405
406 void SharedRuntime::generate_trampoline(MacroAssembler *masm, address destination) {
407 __ jump(RuntimeAddress(destination));
408 }
409
410 // The java_calling_convention describes stack locations as ideal slots on
411 // a frame with no abi restrictions. Since we must observe abi restrictions
412 // (like the placement of the register window) the slots must be biased by
413 // the following value.
414 static int reg2offset_in(VMReg r) {
415 // Account for saved rbp and return address
416 // This should really be in_preserve_stack_slots
417 return (r->reg2stack() + 4) * VMRegImpl::stack_slot_size;
418 }
419
420 static int reg2offset_out(VMReg r) {
421 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
422 }
423
424 // ---------------------------------------------------------------------------
425 // Read the array of BasicTypes from a signature, and compute where the
426 // arguments should go. Values in the VMRegPair regs array refer to 4-byte
427 // quantities. Values less than VMRegImpl::stack0 are registers, those above
428 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer
429 // as framesizes are fixed.
430 // VMRegImpl::stack0 refers to the first slot 0(sp).
431 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register
432 // up to RegisterImpl::number_of_registers) are the 64-bit
433 // integer registers.
434
435 // Note: the INPUTS in sig_bt are in units of Java argument words, which are
436 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit
437 // units regardless of build. Of course for i486 there is no 64 bit build
438
439 // The Java calling convention is a "shifted" version of the C ABI.
440 // By skipping the first C ABI register we can call non-static jni methods
441 // with small numbers of arguments without having to shuffle the arguments
442 // at all. Since we control the java ABI we ought to at least get some
443 // advantage out of it.
444
445 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
446 VMRegPair *regs,
447 int total_args_passed,
448 int is_outgoing) {
449
450 // Create the mapping between argument positions and
451 // registers.
452 static const Register INT_ArgReg[Argument::n_int_register_parameters_j] = {
453 j_rarg0, j_rarg1, j_rarg2, j_rarg3, j_rarg4, j_rarg5
454 };
455 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_j] = {
456 j_farg0, j_farg1, j_farg2, j_farg3,
457 j_farg4, j_farg5, j_farg6, j_farg7
458 };
459
460
461 uint int_args = 0;
462 uint fp_args = 0;
463 uint stk_args = 0; // inc by 2 each time
464
465 for (int i = 0; i < total_args_passed; i++) {
466 switch (sig_bt[i]) {
467 case T_BOOLEAN:
468 case T_CHAR:
469 case T_BYTE:
470 case T_SHORT:
471 case T_INT:
472 if (int_args < Argument::n_int_register_parameters_j) {
473 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
474 } else {
475 regs[i].set1(VMRegImpl::stack2reg(stk_args));
476 stk_args += 2;
477 }
478 break;
479 case T_VOID:
480 // halves of T_LONG or T_DOUBLE
481 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
482 regs[i].set_bad();
483 break;
484 case T_LONG:
485 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
486 // fall through
487 case T_OBJECT:
488 case T_ARRAY:
489 case T_ADDRESS:
490 if (int_args < Argument::n_int_register_parameters_j) {
491 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
492 } else {
493 regs[i].set2(VMRegImpl::stack2reg(stk_args));
494 stk_args += 2;
495 }
496 break;
497 case T_FLOAT:
498 if (fp_args < Argument::n_float_register_parameters_j) {
499 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg());
500 } else {
501 regs[i].set1(VMRegImpl::stack2reg(stk_args));
502 stk_args += 2;
503 }
504 break;
505 case T_DOUBLE:
506 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
507 if (fp_args < Argument::n_float_register_parameters_j) {
508 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg());
509 } else {
510 regs[i].set2(VMRegImpl::stack2reg(stk_args));
511 stk_args += 2;
512 }
513 break;
514 default:
515 ShouldNotReachHere();
516 break;
517 }
518 }
519
520 return round_to(stk_args, 2);
521 }
522
523 // Patch the callers callsite with entry to compiled code if it exists.
524 static void patch_callers_callsite(MacroAssembler *masm) {
525 Label L;
526 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD);
527 __ jcc(Assembler::equal, L);
528
529 // Save the current stack pointer
530 __ mov(r13, rsp);
531 // Schedule the branch target address early.
532 // Call into the VM to patch the caller, then jump to compiled callee
533 // rax isn't live so capture return address while we easily can
534 __ movptr(rax, Address(rsp, 0));
535
536 // align stack so push_CPU_state doesn't fault
537 __ andptr(rsp, -(StackAlignmentInBytes));
538 __ push_CPU_state();
539
540 if (VM_Version::supports_avx()) {
541 __ vzeroupper();
542 }
543 // VM needs caller's callsite
544 // VM needs target method
545 // This needs to be a long call since we will relocate this adapter to
546 // the codeBuffer and it may not reach
547
548 // Allocate argument register save area
549 if (frame::arg_reg_save_area_bytes != 0) {
550 __ subptr(rsp, frame::arg_reg_save_area_bytes);
551 }
552 __ mov(c_rarg0, rbx);
553 __ mov(c_rarg1, rax);
554 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)));
555
556 // De-allocate argument register save area
557 if (frame::arg_reg_save_area_bytes != 0) {
558 __ addptr(rsp, frame::arg_reg_save_area_bytes);
559 }
560
561 if (VM_Version::supports_avx()) {
562 __ vzeroupper();
563 }
564 __ pop_CPU_state();
565 // restore sp
566 __ mov(rsp, r13);
567 __ bind(L);
568 }
569
570
571 static void gen_c2i_adapter(MacroAssembler *masm,
572 int total_args_passed,
573 int comp_args_on_stack,
574 const BasicType *sig_bt,
575 const VMRegPair *regs,
576 Label& skip_fixup) {
577 // Before we get into the guts of the C2I adapter, see if we should be here
578 // at all. We've come from compiled code and are attempting to jump to the
579 // interpreter, which means the caller made a static call to get here
580 // (vcalls always get a compiled target if there is one). Check for a
581 // compiled target. If there is one, we need to patch the caller's call.
582 patch_callers_callsite(masm);
583
584 __ bind(skip_fixup);
585
586 // Since all args are passed on the stack, total_args_passed *
587 // Interpreter::stackElementSize is the space we need. Plus 1 because
588 // we also account for the return address location since
589 // we store it first rather than hold it in rax across all the shuffling
590
591 int extraspace = (total_args_passed * Interpreter::stackElementSize) + wordSize;
592
593 // stack is aligned, keep it that way
594 extraspace = round_to(extraspace, 2*wordSize);
595
596 // Get return address
597 __ pop(rax);
598
599 // set senderSP value
600 __ mov(r13, rsp);
601
602 __ subptr(rsp, extraspace);
603
604 // Store the return address in the expected location
605 __ movptr(Address(rsp, 0), rax);
606
607 // Now write the args into the outgoing interpreter space
608 for (int i = 0; i < total_args_passed; i++) {
609 if (sig_bt[i] == T_VOID) {
610 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
611 continue;
612 }
613
614 // offset to start parameters
615 int st_off = (total_args_passed - i) * Interpreter::stackElementSize;
616 int next_off = st_off - Interpreter::stackElementSize;
617
618 // Say 4 args:
619 // i st_off
620 // 0 32 T_LONG
621 // 1 24 T_VOID
622 // 2 16 T_OBJECT
623 // 3 8 T_BOOL
624 // - 0 return address
625 //
626 // However to make thing extra confusing. Because we can fit a long/double in
627 // a single slot on a 64 bt vm and it would be silly to break them up, the interpreter
628 // leaves one slot empty and only stores to a single slot. In this case the
629 // slot that is occupied is the T_VOID slot. See I said it was confusing.
630
631 VMReg r_1 = regs[i].first();
632 VMReg r_2 = regs[i].second();
633 if (!r_1->is_valid()) {
634 assert(!r_2->is_valid(), "");
635 continue;
636 }
637 if (r_1->is_stack()) {
638 // memory to memory use rax
639 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace;
640 if (!r_2->is_valid()) {
641 // sign extend??
642 __ movl(rax, Address(rsp, ld_off));
643 __ movptr(Address(rsp, st_off), rax);
644
645 } else {
646
647 __ movq(rax, Address(rsp, ld_off));
648
649 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
650 // T_DOUBLE and T_LONG use two slots in the interpreter
651 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
652 // ld_off == LSW, ld_off+wordSize == MSW
653 // st_off == MSW, next_off == LSW
654 __ movq(Address(rsp, next_off), rax);
655 #ifdef ASSERT
656 // Overwrite the unused slot with known junk
657 __ mov64(rax, CONST64(0xdeadffffdeadaaaa));
658 __ movptr(Address(rsp, st_off), rax);
659 #endif /* ASSERT */
660 } else {
661 __ movq(Address(rsp, st_off), rax);
662 }
663 }
664 } else if (r_1->is_Register()) {
665 Register r = r_1->as_Register();
666 if (!r_2->is_valid()) {
667 // must be only an int (or less ) so move only 32bits to slot
668 // why not sign extend??
669 __ movl(Address(rsp, st_off), r);
670 } else {
671 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
672 // T_DOUBLE and T_LONG use two slots in the interpreter
673 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
674 // long/double in gpr
675 #ifdef ASSERT
676 // Overwrite the unused slot with known junk
677 __ mov64(rax, CONST64(0xdeadffffdeadaaab));
678 __ movptr(Address(rsp, st_off), rax);
679 #endif /* ASSERT */
680 __ movq(Address(rsp, next_off), r);
681 } else {
682 __ movptr(Address(rsp, st_off), r);
683 }
684 }
685 } else {
686 assert(r_1->is_XMMRegister(), "");
687 if (!r_2->is_valid()) {
688 // only a float use just part of the slot
689 __ movflt(Address(rsp, st_off), r_1->as_XMMRegister());
690 } else {
691 #ifdef ASSERT
692 // Overwrite the unused slot with known junk
693 __ mov64(rax, CONST64(0xdeadffffdeadaaac));
694 __ movptr(Address(rsp, st_off), rax);
695 #endif /* ASSERT */
696 __ movdbl(Address(rsp, next_off), r_1->as_XMMRegister());
697 }
698 }
699 }
700
701 // Schedule the branch target address early.
702 __ movptr(rcx, Address(rbx, in_bytes(Method::interpreter_entry_offset())));
703 __ jmp(rcx);
704 }
705
706 static void range_check(MacroAssembler* masm, Register pc_reg, Register temp_reg,
707 address code_start, address code_end,
708 Label& L_ok) {
709 Label L_fail;
710 __ lea(temp_reg, ExternalAddress(code_start));
711 __ cmpptr(pc_reg, temp_reg);
712 __ jcc(Assembler::belowEqual, L_fail);
713 __ lea(temp_reg, ExternalAddress(code_end));
714 __ cmpptr(pc_reg, temp_reg);
715 __ jcc(Assembler::below, L_ok);
716 __ bind(L_fail);
717 }
718
719 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm,
720 int total_args_passed,
721 int comp_args_on_stack,
722 const BasicType *sig_bt,
723 const VMRegPair *regs) {
724
725 // Note: r13 contains the senderSP on entry. We must preserve it since
726 // we may do a i2c -> c2i transition if we lose a race where compiled
727 // code goes non-entrant while we get args ready.
728 // In addition we use r13 to locate all the interpreter args as
729 // we must align the stack to 16 bytes on an i2c entry else we
730 // lose alignment we expect in all compiled code and register
731 // save code can segv when fxsave instructions find improperly
732 // aligned stack pointer.
733
734 // Adapters can be frameless because they do not require the caller
735 // to perform additional cleanup work, such as correcting the stack pointer.
736 // An i2c adapter is frameless because the *caller* frame, which is interpreted,
737 // routinely repairs its own stack pointer (from interpreter_frame_last_sp),
738 // even if a callee has modified the stack pointer.
739 // A c2i adapter is frameless because the *callee* frame, which is interpreted,
740 // routinely repairs its caller's stack pointer (from sender_sp, which is set
741 // up via the senderSP register).
742 // In other words, if *either* the caller or callee is interpreted, we can
743 // get the stack pointer repaired after a call.
744 // This is why c2i and i2c adapters cannot be indefinitely composed.
745 // In particular, if a c2i adapter were to somehow call an i2c adapter,
746 // both caller and callee would be compiled methods, and neither would
747 // clean up the stack pointer changes performed by the two adapters.
748 // If this happens, control eventually transfers back to the compiled
749 // caller, but with an uncorrected stack, causing delayed havoc.
750
751 // Pick up the return address
752 __ movptr(rax, Address(rsp, 0));
753
754 if (VerifyAdapterCalls &&
755 (Interpreter::code() != NULL || StubRoutines::code1() != NULL)) {
756 // So, let's test for cascading c2i/i2c adapters right now.
757 // assert(Interpreter::contains($return_addr) ||
758 // StubRoutines::contains($return_addr),
759 // "i2c adapter must return to an interpreter frame");
760 __ block_comment("verify_i2c { ");
761 Label L_ok;
762 if (Interpreter::code() != NULL)
763 range_check(masm, rax, r11,
764 Interpreter::code()->code_start(), Interpreter::code()->code_end(),
765 L_ok);
766 if (StubRoutines::code1() != NULL)
767 range_check(masm, rax, r11,
768 StubRoutines::code1()->code_begin(), StubRoutines::code1()->code_end(),
769 L_ok);
770 if (StubRoutines::code2() != NULL)
771 range_check(masm, rax, r11,
772 StubRoutines::code2()->code_begin(), StubRoutines::code2()->code_end(),
773 L_ok);
774 const char* msg = "i2c adapter must return to an interpreter frame";
775 __ block_comment(msg);
776 __ stop(msg);
777 __ bind(L_ok);
778 __ block_comment("} verify_i2ce ");
779 }
780
781 // Must preserve original SP for loading incoming arguments because
782 // we need to align the outgoing SP for compiled code.
783 __ movptr(r11, rsp);
784
785 // Cut-out for having no stack args. Since up to 2 int/oop args are passed
786 // in registers, we will occasionally have no stack args.
787 int comp_words_on_stack = 0;
788 if (comp_args_on_stack) {
789 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in
790 // registers are below. By subtracting stack0, we either get a negative
791 // number (all values in registers) or the maximum stack slot accessed.
792
793 // Convert 4-byte c2 stack slots to words.
794 comp_words_on_stack = round_to(comp_args_on_stack*VMRegImpl::stack_slot_size, wordSize)>>LogBytesPerWord;
795 // Round up to miminum stack alignment, in wordSize
796 comp_words_on_stack = round_to(comp_words_on_stack, 2);
797 __ subptr(rsp, comp_words_on_stack * wordSize);
798 }
799
800
801 // Ensure compiled code always sees stack at proper alignment
802 __ andptr(rsp, -16);
803
804 // push the return address and misalign the stack that youngest frame always sees
805 // as far as the placement of the call instruction
806 __ push(rax);
807
808 // Put saved SP in another register
809 const Register saved_sp = rax;
810 __ movptr(saved_sp, r11);
811
812 // Will jump to the compiled code just as if compiled code was doing it.
813 // Pre-load the register-jump target early, to schedule it better.
814 __ movptr(r11, Address(rbx, in_bytes(Method::from_compiled_offset())));
815
816 #if INCLUDE_JVMCI
817 if (EnableJVMCI || UseAOT) {
818 // check if this call should be routed towards a specific entry point
819 __ cmpptr(Address(r15_thread, in_bytes(JavaThread::jvmci_alternate_call_target_offset())), 0);
820 Label no_alternative_target;
821 __ jcc(Assembler::equal, no_alternative_target);
822 __ movptr(r11, Address(r15_thread, in_bytes(JavaThread::jvmci_alternate_call_target_offset())));
823 __ movptr(Address(r15_thread, in_bytes(JavaThread::jvmci_alternate_call_target_offset())), 0);
824 __ bind(no_alternative_target);
825 }
826 #endif // INCLUDE_JVMCI
827
828 // Now generate the shuffle code. Pick up all register args and move the
829 // rest through the floating point stack top.
830 for (int i = 0; i < total_args_passed; i++) {
831 if (sig_bt[i] == T_VOID) {
832 // Longs and doubles are passed in native word order, but misaligned
833 // in the 32-bit build.
834 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
835 continue;
836 }
837
838 // Pick up 0, 1 or 2 words from SP+offset.
839
840 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(),
841 "scrambled load targets?");
842 // Load in argument order going down.
843 int ld_off = (total_args_passed - i)*Interpreter::stackElementSize;
844 // Point to interpreter value (vs. tag)
845 int next_off = ld_off - Interpreter::stackElementSize;
846 //
847 //
848 //
849 VMReg r_1 = regs[i].first();
850 VMReg r_2 = regs[i].second();
851 if (!r_1->is_valid()) {
852 assert(!r_2->is_valid(), "");
853 continue;
854 }
855 if (r_1->is_stack()) {
856 // Convert stack slot to an SP offset (+ wordSize to account for return address )
857 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize;
858
859 // We can use r13 as a temp here because compiled code doesn't need r13 as an input
860 // and if we end up going thru a c2i because of a miss a reasonable value of r13
861 // will be generated.
862 if (!r_2->is_valid()) {
863 // sign extend???
864 __ movl(r13, Address(saved_sp, ld_off));
865 __ movptr(Address(rsp, st_off), r13);
866 } else {
867 //
868 // We are using two optoregs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
869 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
870 // So we must adjust where to pick up the data to match the interpreter.
871 //
872 // Interpreter local[n] == MSW, local[n+1] == LSW however locals
873 // are accessed as negative so LSW is at LOW address
874
875 // ld_off is MSW so get LSW
876 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
877 next_off : ld_off;
878 __ movq(r13, Address(saved_sp, offset));
879 // st_off is LSW (i.e. reg.first())
880 __ movq(Address(rsp, st_off), r13);
881 }
882 } else if (r_1->is_Register()) { // Register argument
883 Register r = r_1->as_Register();
884 assert(r != rax, "must be different");
885 if (r_2->is_valid()) {
886 //
887 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
888 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
889 // So we must adjust where to pick up the data to match the interpreter.
890
891 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
892 next_off : ld_off;
893
894 // this can be a misaligned move
895 __ movq(r, Address(saved_sp, offset));
896 } else {
897 // sign extend and use a full word?
898 __ movl(r, Address(saved_sp, ld_off));
899 }
900 } else {
901 if (!r_2->is_valid()) {
902 __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off));
903 } else {
904 __ movdbl(r_1->as_XMMRegister(), Address(saved_sp, next_off));
905 }
906 }
907 }
908
909 // 6243940 We might end up in handle_wrong_method if
910 // the callee is deoptimized as we race thru here. If that
911 // happens we don't want to take a safepoint because the
912 // caller frame will look interpreted and arguments are now
913 // "compiled" so it is much better to make this transition
914 // invisible to the stack walking code. Unfortunately if
915 // we try and find the callee by normal means a safepoint
916 // is possible. So we stash the desired callee in the thread
917 // and the vm will find there should this case occur.
918
919 __ movptr(Address(r15_thread, JavaThread::callee_target_offset()), rbx);
920
921 // put Method* where a c2i would expect should we end up there
922 // only needed becaus eof c2 resolve stubs return Method* as a result in
923 // rax
924 __ mov(rax, rbx);
925 __ jmp(r11);
926 }
927
928 // ---------------------------------------------------------------
929 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
930 int total_args_passed,
931 int comp_args_on_stack,
932 const BasicType *sig_bt,
933 const VMRegPair *regs,
934 AdapterFingerPrint* fingerprint) {
935 address i2c_entry = __ pc();
936
937 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs);
938
939 // -------------------------------------------------------------------------
940 // Generate a C2I adapter. On entry we know rbx holds the Method* during calls
941 // to the interpreter. The args start out packed in the compiled layout. They
942 // need to be unpacked into the interpreter layout. This will almost always
943 // require some stack space. We grow the current (compiled) stack, then repack
944 // the args. We finally end in a jump to the generic interpreter entry point.
945 // On exit from the interpreter, the interpreter will restore our SP (lest the
946 // compiled code, which relys solely on SP and not RBP, get sick).
947
948 address c2i_unverified_entry = __ pc();
949 Label skip_fixup;
950 Label ok;
951
952 Register holder = rax;
953 Register receiver = j_rarg0;
954 Register temp = rbx;
955
956 {
957 __ load_klass(temp, receiver);
958 __ cmpptr(temp, Address(holder, CompiledICHolder::holder_klass_offset()));
959 __ movptr(rbx, Address(holder, CompiledICHolder::holder_method_offset()));
960 __ jcc(Assembler::equal, ok);
961 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
962
963 __ bind(ok);
964 // Method might have been compiled since the call site was patched to
965 // interpreted if that is the case treat it as a miss so we can get
966 // the call site corrected.
967 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD);
968 __ jcc(Assembler::equal, skip_fixup);
969 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
970 }
971
972 address c2i_entry = __ pc();
973
974 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup);
975
976 __ flush();
977 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry);
978 }
979
980 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
981 VMRegPair *regs,
982 VMRegPair *regs2,
983 int total_args_passed) {
984 assert(regs2 == NULL, "not needed on x86");
985 // We return the amount of VMRegImpl stack slots we need to reserve for all
986 // the arguments NOT counting out_preserve_stack_slots.
987
988 // NOTE: These arrays will have to change when c1 is ported
989 #ifdef _WIN64
990 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = {
991 c_rarg0, c_rarg1, c_rarg2, c_rarg3
992 };
993 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = {
994 c_farg0, c_farg1, c_farg2, c_farg3
995 };
996 #else
997 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = {
998 c_rarg0, c_rarg1, c_rarg2, c_rarg3, c_rarg4, c_rarg5
999 };
1000 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = {
1001 c_farg0, c_farg1, c_farg2, c_farg3,
1002 c_farg4, c_farg5, c_farg6, c_farg7
1003 };
1004 #endif // _WIN64
1005
1006
1007 uint int_args = 0;
1008 uint fp_args = 0;
1009 uint stk_args = 0; // inc by 2 each time
1010
1011 for (int i = 0; i < total_args_passed; i++) {
1012 switch (sig_bt[i]) {
1013 case T_BOOLEAN:
1014 case T_CHAR:
1015 case T_BYTE:
1016 case T_SHORT:
1017 case T_INT:
1018 if (int_args < Argument::n_int_register_parameters_c) {
1019 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
1020 #ifdef _WIN64
1021 fp_args++;
1022 // Allocate slots for callee to stuff register args the stack.
1023 stk_args += 2;
1024 #endif
1025 } else {
1026 regs[i].set1(VMRegImpl::stack2reg(stk_args));
1027 stk_args += 2;
1028 }
1029 break;
1030 case T_LONG:
1031 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
1032 // fall through
1033 case T_OBJECT:
1034 case T_ARRAY:
1035 case T_ADDRESS:
1036 case T_METADATA:
1037 if (int_args < Argument::n_int_register_parameters_c) {
1038 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
1039 #ifdef _WIN64
1040 fp_args++;
1041 stk_args += 2;
1042 #endif
1043 } else {
1044 regs[i].set2(VMRegImpl::stack2reg(stk_args));
1045 stk_args += 2;
1046 }
1047 break;
1048 case T_FLOAT:
1049 if (fp_args < Argument::n_float_register_parameters_c) {
1050 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg());
1051 #ifdef _WIN64
1052 int_args++;
1053 // Allocate slots for callee to stuff register args the stack.
1054 stk_args += 2;
1055 #endif
1056 } else {
1057 regs[i].set1(VMRegImpl::stack2reg(stk_args));
1058 stk_args += 2;
1059 }
1060 break;
1061 case T_DOUBLE:
1062 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
1063 if (fp_args < Argument::n_float_register_parameters_c) {
1064 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg());
1065 #ifdef _WIN64
1066 int_args++;
1067 // Allocate slots for callee to stuff register args the stack.
1068 stk_args += 2;
1069 #endif
1070 } else {
1071 regs[i].set2(VMRegImpl::stack2reg(stk_args));
1072 stk_args += 2;
1073 }
1074 break;
1075 case T_VOID: // Halves of longs and doubles
1076 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
1077 regs[i].set_bad();
1078 break;
1079 default:
1080 ShouldNotReachHere();
1081 break;
1082 }
1083 }
1084 #ifdef _WIN64
1085 // windows abi requires that we always allocate enough stack space
1086 // for 4 64bit registers to be stored down.
1087 if (stk_args < 8) {
1088 stk_args = 8;
1089 }
1090 #endif // _WIN64
1091
1092 return stk_args;
1093 }
1094
1095 // On 64 bit we will store integer like items to the stack as
1096 // 64 bits items (sparc abi) even though java would only store
1097 // 32bits for a parameter. On 32bit it will simply be 32 bits
1098 // So this routine will do 32->32 on 32bit and 32->64 on 64bit
1099 static void move32_64(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1100 if (src.first()->is_stack()) {
1101 if (dst.first()->is_stack()) {
1102 // stack to stack
1103 __ movslq(rax, Address(rbp, reg2offset_in(src.first())));
1104 __ movq(Address(rsp, reg2offset_out(dst.first())), rax);
1105 } else {
1106 // stack to reg
1107 __ movslq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first())));
1108 }
1109 } else if (dst.first()->is_stack()) {
1110 // reg to stack
1111 // Do we really have to sign extend???
1112 // __ movslq(src.first()->as_Register(), src.first()->as_Register());
1113 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
1114 } else {
1115 // Do we really have to sign extend???
1116 // __ movslq(dst.first()->as_Register(), src.first()->as_Register());
1117 if (dst.first() != src.first()) {
1118 __ movq(dst.first()->as_Register(), src.first()->as_Register());
1119 }
1120 }
1121 }
1122
1123 static void move_ptr(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1124 if (src.first()->is_stack()) {
1125 if (dst.first()->is_stack()) {
1126 // stack to stack
1127 __ movq(rax, Address(rbp, reg2offset_in(src.first())));
1128 __ movq(Address(rsp, reg2offset_out(dst.first())), rax);
1129 } else {
1130 // stack to reg
1131 __ movq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first())));
1132 }
1133 } else if (dst.first()->is_stack()) {
1134 // reg to stack
1135 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
1136 } else {
1137 if (dst.first() != src.first()) {
1138 __ movq(dst.first()->as_Register(), src.first()->as_Register());
1139 }
1140 }
1141 }
1142
1143 // An oop arg. Must pass a handle not the oop itself
1144 static void object_move(MacroAssembler* masm,
1145 OopMap* map,
1146 int oop_handle_offset,
1147 int framesize_in_slots,
1148 VMRegPair src,
1149 VMRegPair dst,
1150 bool is_receiver,
1151 int* receiver_offset) {
1152
1153 // must pass a handle. First figure out the location we use as a handle
1154
1155 Register rHandle = dst.first()->is_stack() ? rax : dst.first()->as_Register();
1156
1157 // See if oop is NULL if it is we need no handle
1158
1159 if (src.first()->is_stack()) {
1160
1161 // Oop is already on the stack as an argument
1162 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
1163 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots));
1164 if (is_receiver) {
1165 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size;
1166 }
1167
1168 __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD);
1169 __ lea(rHandle, Address(rbp, reg2offset_in(src.first())));
1170 // conditionally move a NULL
1171 __ cmovptr(Assembler::equal, rHandle, Address(rbp, reg2offset_in(src.first())));
1172 } else {
1173
1174 // Oop is in an a register we must store it to the space we reserve
1175 // on the stack for oop_handles and pass a handle if oop is non-NULL
1176
1177 const Register rOop = src.first()->as_Register();
1178 int oop_slot;
1179 if (rOop == j_rarg0)
1180 oop_slot = 0;
1181 else if (rOop == j_rarg1)
1182 oop_slot = 1;
1183 else if (rOop == j_rarg2)
1184 oop_slot = 2;
1185 else if (rOop == j_rarg3)
1186 oop_slot = 3;
1187 else if (rOop == j_rarg4)
1188 oop_slot = 4;
1189 else {
1190 assert(rOop == j_rarg5, "wrong register");
1191 oop_slot = 5;
1192 }
1193
1194 oop_slot = oop_slot * VMRegImpl::slots_per_word + oop_handle_offset;
1195 int offset = oop_slot*VMRegImpl::stack_slot_size;
1196
1197 map->set_oop(VMRegImpl::stack2reg(oop_slot));
1198 // Store oop in handle area, may be NULL
1199 __ movptr(Address(rsp, offset), rOop);
1200 if (is_receiver) {
1201 *receiver_offset = offset;
1202 }
1203
1204 __ cmpptr(rOop, (int32_t)NULL_WORD);
1205 __ lea(rHandle, Address(rsp, offset));
1206 // conditionally move a NULL from the handle area where it was just stored
1207 __ cmovptr(Assembler::equal, rHandle, Address(rsp, offset));
1208 }
1209
1210 // If arg is on the stack then place it otherwise it is already in correct reg.
1211 if (dst.first()->is_stack()) {
1212 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
1213 }
1214 }
1215
1216 // A float arg may have to do float reg int reg conversion
1217 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1218 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move");
1219
1220 // The calling conventions assures us that each VMregpair is either
1221 // all really one physical register or adjacent stack slots.
1222 // This greatly simplifies the cases here compared to sparc.
1223
1224 if (src.first()->is_stack()) {
1225 if (dst.first()->is_stack()) {
1226 __ movl(rax, Address(rbp, reg2offset_in(src.first())));
1227 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1228 } else {
1229 // stack to reg
1230 assert(dst.first()->is_XMMRegister(), "only expect xmm registers as parameters");
1231 __ movflt(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_in(src.first())));
1232 }
1233 } else if (dst.first()->is_stack()) {
1234 // reg to stack
1235 assert(src.first()->is_XMMRegister(), "only expect xmm registers as parameters");
1236 __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1237 } else {
1238 // reg to reg
1239 // In theory these overlap but the ordering is such that this is likely a nop
1240 if ( src.first() != dst.first()) {
1241 __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister());
1242 }
1243 }
1244 }
1245
1246 // A long move
1247 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1248
1249 // The calling conventions assures us that each VMregpair is either
1250 // all really one physical register or adjacent stack slots.
1251 // This greatly simplifies the cases here compared to sparc.
1252
1253 if (src.is_single_phys_reg() ) {
1254 if (dst.is_single_phys_reg()) {
1255 if (dst.first() != src.first()) {
1256 __ mov(dst.first()->as_Register(), src.first()->as_Register());
1257 }
1258 } else {
1259 assert(dst.is_single_reg(), "not a stack pair");
1260 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
1261 }
1262 } else if (dst.is_single_phys_reg()) {
1263 assert(src.is_single_reg(), "not a stack pair");
1264 __ movq(dst.first()->as_Register(), Address(rbp, reg2offset_out(src.first())));
1265 } else {
1266 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs");
1267 __ movq(rax, Address(rbp, reg2offset_in(src.first())));
1268 __ movq(Address(rsp, reg2offset_out(dst.first())), rax);
1269 }
1270 }
1271
1272 // A double move
1273 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1274
1275 // The calling conventions assures us that each VMregpair is either
1276 // all really one physical register or adjacent stack slots.
1277 // This greatly simplifies the cases here compared to sparc.
1278
1279 if (src.is_single_phys_reg() ) {
1280 if (dst.is_single_phys_reg()) {
1281 // In theory these overlap but the ordering is such that this is likely a nop
1282 if ( src.first() != dst.first()) {
1283 __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister());
1284 }
1285 } else {
1286 assert(dst.is_single_reg(), "not a stack pair");
1287 __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1288 }
1289 } else if (dst.is_single_phys_reg()) {
1290 assert(src.is_single_reg(), "not a stack pair");
1291 __ movdbl(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_out(src.first())));
1292 } else {
1293 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs");
1294 __ movq(rax, Address(rbp, reg2offset_in(src.first())));
1295 __ movq(Address(rsp, reg2offset_out(dst.first())), rax);
1296 }
1297 }
1298
1299
1300 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1301 // We always ignore the frame_slots arg and just use the space just below frame pointer
1302 // which by this time is free to use
1303 switch (ret_type) {
1304 case T_FLOAT:
1305 __ movflt(Address(rbp, -wordSize), xmm0);
1306 break;
1307 case T_DOUBLE:
1308 __ movdbl(Address(rbp, -wordSize), xmm0);
1309 break;
1310 case T_VOID: break;
1311 default: {
1312 __ movptr(Address(rbp, -wordSize), rax);
1313 }
1314 }
1315 }
1316
1317 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1318 // We always ignore the frame_slots arg and just use the space just below frame pointer
1319 // which by this time is free to use
1320 switch (ret_type) {
1321 case T_FLOAT:
1322 __ movflt(xmm0, Address(rbp, -wordSize));
1323 break;
1324 case T_DOUBLE:
1325 __ movdbl(xmm0, Address(rbp, -wordSize));
1326 break;
1327 case T_VOID: break;
1328 default: {
1329 __ movptr(rax, Address(rbp, -wordSize));
1330 }
1331 }
1332 }
1333
1334 static void save_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) {
1335 for ( int i = first_arg ; i < arg_count ; i++ ) {
1336 if (args[i].first()->is_Register()) {
1337 __ push(args[i].first()->as_Register());
1338 } else if (args[i].first()->is_XMMRegister()) {
1339 __ subptr(rsp, 2*wordSize);
1340 __ movdbl(Address(rsp, 0), args[i].first()->as_XMMRegister());
1341 }
1342 }
1343 }
1344
1345 static void restore_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) {
1346 for ( int i = arg_count - 1 ; i >= first_arg ; i-- ) {
1347 if (args[i].first()->is_Register()) {
1348 __ pop(args[i].first()->as_Register());
1349 } else if (args[i].first()->is_XMMRegister()) {
1350 __ movdbl(args[i].first()->as_XMMRegister(), Address(rsp, 0));
1351 __ addptr(rsp, 2*wordSize);
1352 }
1353 }
1354 }
1355
1356
1357 static void save_or_restore_arguments(MacroAssembler* masm,
1358 const int stack_slots,
1359 const int total_in_args,
1360 const int arg_save_area,
1361 OopMap* map,
1362 VMRegPair* in_regs,
1363 BasicType* in_sig_bt) {
1364 // if map is non-NULL then the code should store the values,
1365 // otherwise it should load them.
1366 int slot = arg_save_area;
1367 // Save down double word first
1368 for ( int i = 0; i < total_in_args; i++) {
1369 if (in_regs[i].first()->is_XMMRegister() && in_sig_bt[i] == T_DOUBLE) {
1370 int offset = slot * VMRegImpl::stack_slot_size;
1371 slot += VMRegImpl::slots_per_word;
1372 assert(slot <= stack_slots, "overflow");
1373 if (map != NULL) {
1374 __ movdbl(Address(rsp, offset), in_regs[i].first()->as_XMMRegister());
1375 } else {
1376 __ movdbl(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset));
1377 }
1378 }
1379 if (in_regs[i].first()->is_Register() &&
1380 (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_ARRAY)) {
1381 int offset = slot * VMRegImpl::stack_slot_size;
1382 if (map != NULL) {
1383 __ movq(Address(rsp, offset), in_regs[i].first()->as_Register());
1384 if (in_sig_bt[i] == T_ARRAY) {
1385 map->set_oop(VMRegImpl::stack2reg(slot));;
1386 }
1387 } else {
1388 __ movq(in_regs[i].first()->as_Register(), Address(rsp, offset));
1389 }
1390 slot += VMRegImpl::slots_per_word;
1391 }
1392 }
1393 // Save or restore single word registers
1394 for ( int i = 0; i < total_in_args; i++) {
1395 if (in_regs[i].first()->is_Register()) {
1396 int offset = slot * VMRegImpl::stack_slot_size;
1397 slot++;
1398 assert(slot <= stack_slots, "overflow");
1399
1400 // Value is in an input register pass we must flush it to the stack
1401 const Register reg = in_regs[i].first()->as_Register();
1402 switch (in_sig_bt[i]) {
1403 case T_BOOLEAN:
1404 case T_CHAR:
1405 case T_BYTE:
1406 case T_SHORT:
1407 case T_INT:
1408 if (map != NULL) {
1409 __ movl(Address(rsp, offset), reg);
1410 } else {
1411 __ movl(reg, Address(rsp, offset));
1412 }
1413 break;
1414 case T_ARRAY:
1415 case T_LONG:
1416 // handled above
1417 break;
1418 case T_OBJECT:
1419 default: ShouldNotReachHere();
1420 }
1421 } else if (in_regs[i].first()->is_XMMRegister()) {
1422 if (in_sig_bt[i] == T_FLOAT) {
1423 int offset = slot * VMRegImpl::stack_slot_size;
1424 slot++;
1425 assert(slot <= stack_slots, "overflow");
1426 if (map != NULL) {
1427 __ movflt(Address(rsp, offset), in_regs[i].first()->as_XMMRegister());
1428 } else {
1429 __ movflt(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset));
1430 }
1431 }
1432 } else if (in_regs[i].first()->is_stack()) {
1433 if (in_sig_bt[i] == T_ARRAY && map != NULL) {
1434 int offset_in_older_frame = in_regs[i].first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
1435 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + stack_slots));
1436 }
1437 }
1438 }
1439 }
1440
1441
1442 // Check GCLocker::needs_gc and enter the runtime if it's true. This
1443 // keeps a new JNI critical region from starting until a GC has been
1444 // forced. Save down any oops in registers and describe them in an
1445 // OopMap.
1446 static void check_needs_gc_for_critical_native(MacroAssembler* masm,
1447 int stack_slots,
1448 int total_c_args,
1449 int total_in_args,
1450 int arg_save_area,
1451 OopMapSet* oop_maps,
1452 VMRegPair* in_regs,
1453 BasicType* in_sig_bt) {
1454 __ block_comment("check GCLocker::needs_gc");
1455 Label cont;
1456 __ cmp8(ExternalAddress((address)GCLocker::needs_gc_address()), false);
1457 __ jcc(Assembler::equal, cont);
1458
1459 // Save down any incoming oops and call into the runtime to halt for a GC
1460
1461 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1462 save_or_restore_arguments(masm, stack_slots, total_in_args,
1463 arg_save_area, map, in_regs, in_sig_bt);
1464
1465 address the_pc = __ pc();
1466 oop_maps->add_gc_map( __ offset(), map);
1467 __ set_last_Java_frame(rsp, noreg, the_pc);
1468
1469 __ block_comment("block_for_jni_critical");
1470 __ movptr(c_rarg0, r15_thread);
1471 __ mov(r12, rsp); // remember sp
1472 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows
1473 __ andptr(rsp, -16); // align stack as required by ABI
1474 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::block_for_jni_critical)));
1475 __ mov(rsp, r12); // restore sp
1476 __ reinit_heapbase();
1477
1478 __ reset_last_Java_frame(false);
1479
1480 save_or_restore_arguments(masm, stack_slots, total_in_args,
1481 arg_save_area, NULL, in_regs, in_sig_bt);
1482 __ bind(cont);
1483 #ifdef ASSERT
1484 if (StressCriticalJNINatives) {
1485 // Stress register saving
1486 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1487 save_or_restore_arguments(masm, stack_slots, total_in_args,
1488 arg_save_area, map, in_regs, in_sig_bt);
1489 // Destroy argument registers
1490 for (int i = 0; i < total_in_args - 1; i++) {
1491 if (in_regs[i].first()->is_Register()) {
1492 const Register reg = in_regs[i].first()->as_Register();
1493 __ xorptr(reg, reg);
1494 } else if (in_regs[i].first()->is_XMMRegister()) {
1495 __ xorpd(in_regs[i].first()->as_XMMRegister(), in_regs[i].first()->as_XMMRegister());
1496 } else if (in_regs[i].first()->is_FloatRegister()) {
1497 ShouldNotReachHere();
1498 } else if (in_regs[i].first()->is_stack()) {
1499 // Nothing to do
1500 } else {
1501 ShouldNotReachHere();
1502 }
1503 if (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_DOUBLE) {
1504 i++;
1505 }
1506 }
1507
1508 save_or_restore_arguments(masm, stack_slots, total_in_args,
1509 arg_save_area, NULL, in_regs, in_sig_bt);
1510 }
1511 #endif
1512 }
1513
1514 // Unpack an array argument into a pointer to the body and the length
1515 // if the array is non-null, otherwise pass 0 for both.
1516 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) {
1517 Register tmp_reg = rax;
1518 assert(!body_arg.first()->is_Register() || body_arg.first()->as_Register() != tmp_reg,
1519 "possible collision");
1520 assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg,
1521 "possible collision");
1522
1523 __ block_comment("unpack_array_argument {");
1524
1525 // Pass the length, ptr pair
1526 Label is_null, done;
1527 VMRegPair tmp;
1528 tmp.set_ptr(tmp_reg->as_VMReg());
1529 if (reg.first()->is_stack()) {
1530 // Load the arg up from the stack
1531 move_ptr(masm, reg, tmp);
1532 reg = tmp;
1533 }
1534 __ testptr(reg.first()->as_Register(), reg.first()->as_Register());
1535 __ jccb(Assembler::equal, is_null);
1536 __ lea(tmp_reg, Address(reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type)));
1537 move_ptr(masm, tmp, body_arg);
1538 // load the length relative to the body.
1539 __ movl(tmp_reg, Address(tmp_reg, arrayOopDesc::length_offset_in_bytes() -
1540 arrayOopDesc::base_offset_in_bytes(in_elem_type)));
1541 move32_64(masm, tmp, length_arg);
1542 __ jmpb(done);
1543 __ bind(is_null);
1544 // Pass zeros
1545 __ xorptr(tmp_reg, tmp_reg);
1546 move_ptr(masm, tmp, body_arg);
1547 move32_64(masm, tmp, length_arg);
1548 __ bind(done);
1549
1550 __ block_comment("} unpack_array_argument");
1551 }
1552
1553
1554 // Different signatures may require very different orders for the move
1555 // to avoid clobbering other arguments. There's no simple way to
1556 // order them safely. Compute a safe order for issuing stores and
1557 // break any cycles in those stores. This code is fairly general but
1558 // it's not necessary on the other platforms so we keep it in the
1559 // platform dependent code instead of moving it into a shared file.
1560 // (See bugs 7013347 & 7145024.)
1561 // Note that this code is specific to LP64.
1562 class ComputeMoveOrder: public StackObj {
1563 class MoveOperation: public ResourceObj {
1564 friend class ComputeMoveOrder;
1565 private:
1566 VMRegPair _src;
1567 VMRegPair _dst;
1568 int _src_index;
1569 int _dst_index;
1570 bool _processed;
1571 MoveOperation* _next;
1572 MoveOperation* _prev;
1573
1574 static int get_id(VMRegPair r) {
1575 return r.first()->value();
1576 }
1577
1578 public:
1579 MoveOperation(int src_index, VMRegPair src, int dst_index, VMRegPair dst):
1580 _src(src)
1581 , _src_index(src_index)
1582 , _dst(dst)
1583 , _dst_index(dst_index)
1584 , _next(NULL)
1585 , _prev(NULL)
1586 , _processed(false) {
1587 }
1588
1589 VMRegPair src() const { return _src; }
1590 int src_id() const { return get_id(src()); }
1591 int src_index() const { return _src_index; }
1592 VMRegPair dst() const { return _dst; }
1593 void set_dst(int i, VMRegPair dst) { _dst_index = i, _dst = dst; }
1594 int dst_index() const { return _dst_index; }
1595 int dst_id() const { return get_id(dst()); }
1596 MoveOperation* next() const { return _next; }
1597 MoveOperation* prev() const { return _prev; }
1598 void set_processed() { _processed = true; }
1599 bool is_processed() const { return _processed; }
1600
1601 // insert
1602 void break_cycle(VMRegPair temp_register) {
1603 // create a new store following the last store
1604 // to move from the temp_register to the original
1605 MoveOperation* new_store = new MoveOperation(-1, temp_register, dst_index(), dst());
1606
1607 // break the cycle of links and insert new_store at the end
1608 // break the reverse link.
1609 MoveOperation* p = prev();
1610 assert(p->next() == this, "must be");
1611 _prev = NULL;
1612 p->_next = new_store;
1613 new_store->_prev = p;
1614
1615 // change the original store to save it's value in the temp.
1616 set_dst(-1, temp_register);
1617 }
1618
1619 void link(GrowableArray<MoveOperation*>& killer) {
1620 // link this store in front the store that it depends on
1621 MoveOperation* n = killer.at_grow(src_id(), NULL);
1622 if (n != NULL) {
1623 assert(_next == NULL && n->_prev == NULL, "shouldn't have been set yet");
1624 _next = n;
1625 n->_prev = this;
1626 }
1627 }
1628 };
1629
1630 private:
1631 GrowableArray<MoveOperation*> edges;
1632
1633 public:
1634 ComputeMoveOrder(int total_in_args, VMRegPair* in_regs, int total_c_args, VMRegPair* out_regs,
1635 BasicType* in_sig_bt, GrowableArray<int>& arg_order, VMRegPair tmp_vmreg) {
1636 // Move operations where the dest is the stack can all be
1637 // scheduled first since they can't interfere with the other moves.
1638 for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) {
1639 if (in_sig_bt[i] == T_ARRAY) {
1640 c_arg--;
1641 if (out_regs[c_arg].first()->is_stack() &&
1642 out_regs[c_arg + 1].first()->is_stack()) {
1643 arg_order.push(i);
1644 arg_order.push(c_arg);
1645 } else {
1646 if (out_regs[c_arg].first()->is_stack() ||
1647 in_regs[i].first() == out_regs[c_arg].first()) {
1648 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg + 1]);
1649 } else {
1650 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg]);
1651 }
1652 }
1653 } else if (in_sig_bt[i] == T_VOID) {
1654 arg_order.push(i);
1655 arg_order.push(c_arg);
1656 } else {
1657 if (out_regs[c_arg].first()->is_stack() ||
1658 in_regs[i].first() == out_regs[c_arg].first()) {
1659 arg_order.push(i);
1660 arg_order.push(c_arg);
1661 } else {
1662 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg]);
1663 }
1664 }
1665 }
1666 // Break any cycles in the register moves and emit the in the
1667 // proper order.
1668 GrowableArray<MoveOperation*>* stores = get_store_order(tmp_vmreg);
1669 for (int i = 0; i < stores->length(); i++) {
1670 arg_order.push(stores->at(i)->src_index());
1671 arg_order.push(stores->at(i)->dst_index());
1672 }
1673 }
1674
1675 // Collected all the move operations
1676 void add_edge(int src_index, VMRegPair src, int dst_index, VMRegPair dst) {
1677 if (src.first() == dst.first()) return;
1678 edges.append(new MoveOperation(src_index, src, dst_index, dst));
1679 }
1680
1681 // Walk the edges breaking cycles between moves. The result list
1682 // can be walked in order to produce the proper set of loads
1683 GrowableArray<MoveOperation*>* get_store_order(VMRegPair temp_register) {
1684 // Record which moves kill which values
1685 GrowableArray<MoveOperation*> killer;
1686 for (int i = 0; i < edges.length(); i++) {
1687 MoveOperation* s = edges.at(i);
1688 assert(killer.at_grow(s->dst_id(), NULL) == NULL, "only one killer");
1689 killer.at_put_grow(s->dst_id(), s, NULL);
1690 }
1691 assert(killer.at_grow(MoveOperation::get_id(temp_register), NULL) == NULL,
1692 "make sure temp isn't in the registers that are killed");
1693
1694 // create links between loads and stores
1695 for (int i = 0; i < edges.length(); i++) {
1696 edges.at(i)->link(killer);
1697 }
1698
1699 // at this point, all the move operations are chained together
1700 // in a doubly linked list. Processing it backwards finds
1701 // the beginning of the chain, forwards finds the end. If there's
1702 // a cycle it can be broken at any point, so pick an edge and walk
1703 // backward until the list ends or we end where we started.
1704 GrowableArray<MoveOperation*>* stores = new GrowableArray<MoveOperation*>();
1705 for (int e = 0; e < edges.length(); e++) {
1706 MoveOperation* s = edges.at(e);
1707 if (!s->is_processed()) {
1708 MoveOperation* start = s;
1709 // search for the beginning of the chain or cycle
1710 while (start->prev() != NULL && start->prev() != s) {
1711 start = start->prev();
1712 }
1713 if (start->prev() == s) {
1714 start->break_cycle(temp_register);
1715 }
1716 // walk the chain forward inserting to store list
1717 while (start != NULL) {
1718 stores->append(start);
1719 start->set_processed();
1720 start = start->next();
1721 }
1722 }
1723 }
1724 return stores;
1725 }
1726 };
1727
1728 static void verify_oop_args(MacroAssembler* masm,
1729 const methodHandle& method,
1730 const BasicType* sig_bt,
1731 const VMRegPair* regs) {
1732 Register temp_reg = rbx; // not part of any compiled calling seq
1733 if (VerifyOops) {
1734 for (int i = 0; i < method->size_of_parameters(); i++) {
1735 if (sig_bt[i] == T_OBJECT ||
1736 sig_bt[i] == T_ARRAY) {
1737 VMReg r = regs[i].first();
1738 assert(r->is_valid(), "bad oop arg");
1739 if (r->is_stack()) {
1740 __ movptr(temp_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1741 __ verify_oop(temp_reg);
1742 } else {
1743 __ verify_oop(r->as_Register());
1744 }
1745 }
1746 }
1747 }
1748 }
1749
1750 static void gen_special_dispatch(MacroAssembler* masm,
1751 methodHandle method,
1752 const BasicType* sig_bt,
1753 const VMRegPair* regs) {
1754 verify_oop_args(masm, method, sig_bt, regs);
1755 vmIntrinsics::ID iid = method->intrinsic_id();
1756
1757 // Now write the args into the outgoing interpreter space
1758 bool has_receiver = false;
1759 Register receiver_reg = noreg;
1760 int member_arg_pos = -1;
1761 Register member_reg = noreg;
1762 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid);
1763 if (ref_kind != 0) {
1764 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument
1765 member_reg = rbx; // known to be free at this point
1766 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind);
1767 } else if (iid == vmIntrinsics::_invokeBasic) {
1768 has_receiver = true;
1769 } else {
1770 fatal("unexpected intrinsic id %d", iid);
1771 }
1772
1773 if (member_reg != noreg) {
1774 // Load the member_arg into register, if necessary.
1775 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs);
1776 VMReg r = regs[member_arg_pos].first();
1777 if (r->is_stack()) {
1778 __ movptr(member_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1779 } else {
1780 // no data motion is needed
1781 member_reg = r->as_Register();
1782 }
1783 }
1784
1785 if (has_receiver) {
1786 // Make sure the receiver is loaded into a register.
1787 assert(method->size_of_parameters() > 0, "oob");
1788 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object");
1789 VMReg r = regs[0].first();
1790 assert(r->is_valid(), "bad receiver arg");
1791 if (r->is_stack()) {
1792 // Porting note: This assumes that compiled calling conventions always
1793 // pass the receiver oop in a register. If this is not true on some
1794 // platform, pick a temp and load the receiver from stack.
1795 fatal("receiver always in a register");
1796 receiver_reg = j_rarg0; // known to be free at this point
1797 __ movptr(receiver_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1798 } else {
1799 // no data motion is needed
1800 receiver_reg = r->as_Register();
1801 }
1802 }
1803
1804 // Figure out which address we are really jumping to:
1805 MethodHandles::generate_method_handle_dispatch(masm, iid,
1806 receiver_reg, member_reg, /*for_compiler_entry:*/ true);
1807 }
1808
1809 // ---------------------------------------------------------------------------
1810 // Generate a native wrapper for a given method. The method takes arguments
1811 // in the Java compiled code convention, marshals them to the native
1812 // convention (handlizes oops, etc), transitions to native, makes the call,
1813 // returns to java state (possibly blocking), unhandlizes any result and
1814 // returns.
1815 //
1816 // Critical native functions are a shorthand for the use of
1817 // GetPrimtiveArrayCritical and disallow the use of any other JNI
1818 // functions. The wrapper is expected to unpack the arguments before
1819 // passing them to the callee and perform checks before and after the
1820 // native call to ensure that they GCLocker
1821 // lock_critical/unlock_critical semantics are followed. Some other
1822 // parts of JNI setup are skipped like the tear down of the JNI handle
1823 // block and the check for pending exceptions it's impossible for them
1824 // to be thrown.
1825 //
1826 // They are roughly structured like this:
1827 // if (GCLocker::needs_gc())
1828 // SharedRuntime::block_for_jni_critical();
1829 // tranistion to thread_in_native
1830 // unpack arrray arguments and call native entry point
1831 // check for safepoint in progress
1832 // check if any thread suspend flags are set
1833 // call into JVM and possible unlock the JNI critical
1834 // if a GC was suppressed while in the critical native.
1835 // transition back to thread_in_Java
1836 // return to caller
1837 //
1838 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
1839 const methodHandle& method,
1840 int compile_id,
1841 BasicType* in_sig_bt,
1842 VMRegPair* in_regs,
1843 BasicType ret_type) {
1844 if (method->is_method_handle_intrinsic()) {
1845 vmIntrinsics::ID iid = method->intrinsic_id();
1846 intptr_t start = (intptr_t)__ pc();
1847 int vep_offset = ((intptr_t)__ pc()) - start;
1848 gen_special_dispatch(masm,
1849 method,
1850 in_sig_bt,
1851 in_regs);
1852 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period
1853 __ flush();
1854 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually
1855 return nmethod::new_native_nmethod(method,
1856 compile_id,
1857 masm->code(),
1858 vep_offset,
1859 frame_complete,
1860 stack_slots / VMRegImpl::slots_per_word,
1861 in_ByteSize(-1),
1862 in_ByteSize(-1),
1863 (OopMapSet*)NULL);
1864 }
1865 bool is_critical_native = true;
1866 address native_func = method->critical_native_function();
1867 if (native_func == NULL) {
1868 native_func = method->native_function();
1869 is_critical_native = false;
1870 }
1871 assert(native_func != NULL, "must have function");
1872
1873 // An OopMap for lock (and class if static)
1874 OopMapSet *oop_maps = new OopMapSet();
1875 intptr_t start = (intptr_t)__ pc();
1876
1877 // We have received a description of where all the java arg are located
1878 // on entry to the wrapper. We need to convert these args to where
1879 // the jni function will expect them. To figure out where they go
1880 // we convert the java signature to a C signature by inserting
1881 // the hidden arguments as arg[0] and possibly arg[1] (static method)
1882
1883 const int total_in_args = method->size_of_parameters();
1884 int total_c_args = total_in_args;
1885 if (!is_critical_native) {
1886 total_c_args += 1;
1887 if (method->is_static()) {
1888 total_c_args++;
1889 }
1890 } else {
1891 for (int i = 0; i < total_in_args; i++) {
1892 if (in_sig_bt[i] == T_ARRAY) {
1893 total_c_args++;
1894 }
1895 }
1896 }
1897
1898 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
1899 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
1900 BasicType* in_elem_bt = NULL;
1901
1902 int argc = 0;
1903 if (!is_critical_native) {
1904 out_sig_bt[argc++] = T_ADDRESS;
1905 if (method->is_static()) {
1906 out_sig_bt[argc++] = T_OBJECT;
1907 }
1908
1909 for (int i = 0; i < total_in_args ; i++ ) {
1910 out_sig_bt[argc++] = in_sig_bt[i];
1911 }
1912 } else {
1913 Thread* THREAD = Thread::current();
1914 in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_in_args);
1915 SignatureStream ss(method->signature());
1916 for (int i = 0; i < total_in_args ; i++ ) {
1917 if (in_sig_bt[i] == T_ARRAY) {
1918 // Arrays are passed as int, elem* pair
1919 out_sig_bt[argc++] = T_INT;
1920 out_sig_bt[argc++] = T_ADDRESS;
1921 Symbol* atype = ss.as_symbol(CHECK_NULL);
1922 const char* at = atype->as_C_string();
1923 if (strlen(at) == 2) {
1924 assert(at[0] == '[', "must be");
1925 switch (at[1]) {
1926 case 'B': in_elem_bt[i] = T_BYTE; break;
1927 case 'C': in_elem_bt[i] = T_CHAR; break;
1928 case 'D': in_elem_bt[i] = T_DOUBLE; break;
1929 case 'F': in_elem_bt[i] = T_FLOAT; break;
1930 case 'I': in_elem_bt[i] = T_INT; break;
1931 case 'J': in_elem_bt[i] = T_LONG; break;
1932 case 'S': in_elem_bt[i] = T_SHORT; break;
1933 case 'Z': in_elem_bt[i] = T_BOOLEAN; break;
1934 default: ShouldNotReachHere();
1935 }
1936 }
1937 } else {
1938 out_sig_bt[argc++] = in_sig_bt[i];
1939 in_elem_bt[i] = T_VOID;
1940 }
1941 if (in_sig_bt[i] != T_VOID) {
1942 assert(in_sig_bt[i] == ss.type(), "must match");
1943 ss.next();
1944 }
1945 }
1946 }
1947
1948 // Now figure out where the args must be stored and how much stack space
1949 // they require.
1950 int out_arg_slots;
1951 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, NULL, total_c_args);
1952
1953 // Compute framesize for the wrapper. We need to handlize all oops in
1954 // incoming registers
1955
1956 // Calculate the total number of stack slots we will need.
1957
1958 // First count the abi requirement plus all of the outgoing args
1959 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
1960
1961 // Now the space for the inbound oop handle area
1962 int total_save_slots = 6 * VMRegImpl::slots_per_word; // 6 arguments passed in registers
1963 if (is_critical_native) {
1964 // Critical natives may have to call out so they need a save area
1965 // for register arguments.
1966 int double_slots = 0;
1967 int single_slots = 0;
1968 for ( int i = 0; i < total_in_args; i++) {
1969 if (in_regs[i].first()->is_Register()) {
1970 const Register reg = in_regs[i].first()->as_Register();
1971 switch (in_sig_bt[i]) {
1972 case T_BOOLEAN:
1973 case T_BYTE:
1974 case T_SHORT:
1975 case T_CHAR:
1976 case T_INT: single_slots++; break;
1977 case T_ARRAY: // specific to LP64 (7145024)
1978 case T_LONG: double_slots++; break;
1979 default: ShouldNotReachHere();
1980 }
1981 } else if (in_regs[i].first()->is_XMMRegister()) {
1982 switch (in_sig_bt[i]) {
1983 case T_FLOAT: single_slots++; break;
1984 case T_DOUBLE: double_slots++; break;
1985 default: ShouldNotReachHere();
1986 }
1987 } else if (in_regs[i].first()->is_FloatRegister()) {
1988 ShouldNotReachHere();
1989 }
1990 }
1991 total_save_slots = double_slots * 2 + single_slots;
1992 // align the save area
1993 if (double_slots != 0) {
1994 stack_slots = round_to(stack_slots, 2);
1995 }
1996 }
1997
1998 int oop_handle_offset = stack_slots;
1999 stack_slots += total_save_slots;
2000
2001 // Now any space we need for handlizing a klass if static method
2002
2003 int klass_slot_offset = 0;
2004 int klass_offset = -1;
2005 int lock_slot_offset = 0;
2006 bool is_static = false;
2007
2008 if (method->is_static()) {
2009 klass_slot_offset = stack_slots;
2010 stack_slots += VMRegImpl::slots_per_word;
2011 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size;
2012 is_static = true;
2013 }
2014
2015 // Plus a lock if needed
2016
2017 if (method->is_synchronized()) {
2018 lock_slot_offset = stack_slots;
2019 stack_slots += VMRegImpl::slots_per_word;
2020 }
2021
2022 // Now a place (+2) to save return values or temp during shuffling
2023 // + 4 for return address (which we own) and saved rbp
2024 stack_slots += 6;
2025
2026 // Ok The space we have allocated will look like:
2027 //
2028 //
2029 // FP-> | |
2030 // |---------------------|
2031 // | 2 slots for moves |
2032 // |---------------------|
2033 // | lock box (if sync) |
2034 // |---------------------| <- lock_slot_offset
2035 // | klass (if static) |
2036 // |---------------------| <- klass_slot_offset
2037 // | oopHandle area |
2038 // |---------------------| <- oop_handle_offset (6 java arg registers)
2039 // | outbound memory |
2040 // | based arguments |
2041 // | |
2042 // |---------------------|
2043 // | |
2044 // SP-> | out_preserved_slots |
2045 //
2046 //
2047
2048
2049 // Now compute actual number of stack words we need rounding to make
2050 // stack properly aligned.
2051 stack_slots = round_to(stack_slots, StackAlignmentInSlots);
2052
2053 int stack_size = stack_slots * VMRegImpl::stack_slot_size;
2054
2055 // First thing make an ic check to see if we should even be here
2056
2057 // We are free to use all registers as temps without saving them and
2058 // restoring them except rbp. rbp is the only callee save register
2059 // as far as the interpreter and the compiler(s) are concerned.
2060
2061
2062 const Register ic_reg = rax;
2063 const Register receiver = j_rarg0;
2064
2065 Label hit;
2066 Label exception_pending;
2067
2068 assert_different_registers(ic_reg, receiver, rscratch1);
2069 __ verify_oop(receiver);
2070 __ load_klass(rscratch1, receiver);
2071 __ cmpq(ic_reg, rscratch1);
2072 __ jcc(Assembler::equal, hit);
2073
2074 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
2075
2076 // Verified entry point must be aligned
2077 __ align(8);
2078
2079 __ bind(hit);
2080
2081 int vep_offset = ((intptr_t)__ pc()) - start;
2082
2083 #ifdef COMPILER1
2084 // For Object.hashCode, System.identityHashCode try to pull hashCode from object header if available.
2085 if ((InlineObjectHash && method->intrinsic_id() == vmIntrinsics::_hashCode) || (method->intrinsic_id() == vmIntrinsics::_identityHashCode)) {
2086 inline_check_hashcode_from_object_header(masm, method, j_rarg0 /*obj_reg*/, rax /*result*/);
2087 }
2088 #endif // COMPILER1
2089
2090 // The instruction at the verified entry point must be 5 bytes or longer
2091 // because it can be patched on the fly by make_non_entrant. The stack bang
2092 // instruction fits that requirement.
2093
2094 // Generate stack overflow check
2095
2096 if (UseStackBanging) {
2097 __ bang_stack_with_offset((int)JavaThread::stack_shadow_zone_size());
2098 } else {
2099 // need a 5 byte instruction to allow MT safe patching to non-entrant
2100 __ fat_nop();
2101 }
2102
2103 // Generate a new frame for the wrapper.
2104 __ enter();
2105 // -2 because return address is already present and so is saved rbp
2106 __ subptr(rsp, stack_size - 2*wordSize);
2107
2108 // Frame is now completed as far as size and linkage.
2109 int frame_complete = ((intptr_t)__ pc()) - start;
2110
2111 if (UseRTMLocking) {
2112 // Abort RTM transaction before calling JNI
2113 // because critical section will be large and will be
2114 // aborted anyway. Also nmethod could be deoptimized.
2115 __ xabort(0);
2116 }
2117
2118 #ifdef ASSERT
2119 {
2120 Label L;
2121 __ mov(rax, rsp);
2122 __ andptr(rax, -16); // must be 16 byte boundary (see amd64 ABI)
2123 __ cmpptr(rax, rsp);
2124 __ jcc(Assembler::equal, L);
2125 __ stop("improperly aligned stack");
2126 __ bind(L);
2127 }
2128 #endif /* ASSERT */
2129
2130
2131 // We use r14 as the oop handle for the receiver/klass
2132 // It is callee save so it survives the call to native
2133
2134 const Register oop_handle_reg = r14;
2135
2136 if (is_critical_native) {
2137 check_needs_gc_for_critical_native(masm, stack_slots, total_c_args, total_in_args,
2138 oop_handle_offset, oop_maps, in_regs, in_sig_bt);
2139 }
2140
2141 //
2142 // We immediately shuffle the arguments so that any vm call we have to
2143 // make from here on out (sync slow path, jvmti, etc.) we will have
2144 // captured the oops from our caller and have a valid oopMap for
2145 // them.
2146
2147 // -----------------
2148 // The Grand Shuffle
2149
2150 // The Java calling convention is either equal (linux) or denser (win64) than the
2151 // c calling convention. However the because of the jni_env argument the c calling
2152 // convention always has at least one more (and two for static) arguments than Java.
2153 // Therefore if we move the args from java -> c backwards then we will never have
2154 // a register->register conflict and we don't have to build a dependency graph
2155 // and figure out how to break any cycles.
2156 //
2157
2158 // Record esp-based slot for receiver on stack for non-static methods
2159 int receiver_offset = -1;
2160
2161 // This is a trick. We double the stack slots so we can claim
2162 // the oops in the caller's frame. Since we are sure to have
2163 // more args than the caller doubling is enough to make
2164 // sure we can capture all the incoming oop args from the
2165 // caller.
2166 //
2167 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
2168
2169 // Mark location of rbp (someday)
2170 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, vmreg(rbp));
2171
2172 // Use eax, ebx as temporaries during any memory-memory moves we have to do
2173 // All inbound args are referenced based on rbp and all outbound args via rsp.
2174
2175
2176 #ifdef ASSERT
2177 bool reg_destroyed[RegisterImpl::number_of_registers];
2178 bool freg_destroyed[XMMRegisterImpl::number_of_registers];
2179 for ( int r = 0 ; r < RegisterImpl::number_of_registers ; r++ ) {
2180 reg_destroyed[r] = false;
2181 }
2182 for ( int f = 0 ; f < XMMRegisterImpl::number_of_registers ; f++ ) {
2183 freg_destroyed[f] = false;
2184 }
2185
2186 #endif /* ASSERT */
2187
2188 // This may iterate in two different directions depending on the
2189 // kind of native it is. The reason is that for regular JNI natives
2190 // the incoming and outgoing registers are offset upwards and for
2191 // critical natives they are offset down.
2192 GrowableArray<int> arg_order(2 * total_in_args);
2193 VMRegPair tmp_vmreg;
2194 tmp_vmreg.set1(rbx->as_VMReg());
2195
2196 if (!is_critical_native) {
2197 for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) {
2198 arg_order.push(i);
2199 arg_order.push(c_arg);
2200 }
2201 } else {
2202 // Compute a valid move order, using tmp_vmreg to break any cycles
2203 ComputeMoveOrder cmo(total_in_args, in_regs, total_c_args, out_regs, in_sig_bt, arg_order, tmp_vmreg);
2204 }
2205
2206 int temploc = -1;
2207 for (int ai = 0; ai < arg_order.length(); ai += 2) {
2208 int i = arg_order.at(ai);
2209 int c_arg = arg_order.at(ai + 1);
2210 __ block_comment(err_msg("move %d -> %d", i, c_arg));
2211 if (c_arg == -1) {
2212 assert(is_critical_native, "should only be required for critical natives");
2213 // This arg needs to be moved to a temporary
2214 __ mov(tmp_vmreg.first()->as_Register(), in_regs[i].first()->as_Register());
2215 in_regs[i] = tmp_vmreg;
2216 temploc = i;
2217 continue;
2218 } else if (i == -1) {
2219 assert(is_critical_native, "should only be required for critical natives");
2220 // Read from the temporary location
2221 assert(temploc != -1, "must be valid");
2222 i = temploc;
2223 temploc = -1;
2224 }
2225 #ifdef ASSERT
2226 if (in_regs[i].first()->is_Register()) {
2227 assert(!reg_destroyed[in_regs[i].first()->as_Register()->encoding()], "destroyed reg!");
2228 } else if (in_regs[i].first()->is_XMMRegister()) {
2229 assert(!freg_destroyed[in_regs[i].first()->as_XMMRegister()->encoding()], "destroyed reg!");
2230 }
2231 if (out_regs[c_arg].first()->is_Register()) {
2232 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true;
2233 } else if (out_regs[c_arg].first()->is_XMMRegister()) {
2234 freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true;
2235 }
2236 #endif /* ASSERT */
2237 switch (in_sig_bt[i]) {
2238 case T_ARRAY:
2239 if (is_critical_native) {
2240 unpack_array_argument(masm, in_regs[i], in_elem_bt[i], out_regs[c_arg + 1], out_regs[c_arg]);
2241 c_arg++;
2242 #ifdef ASSERT
2243 if (out_regs[c_arg].first()->is_Register()) {
2244 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true;
2245 } else if (out_regs[c_arg].first()->is_XMMRegister()) {
2246 freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true;
2247 }
2248 #endif
2249 break;
2250 }
2251 case T_OBJECT:
2252 assert(!is_critical_native, "no oop arguments");
2253 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg],
2254 ((i == 0) && (!is_static)),
2255 &receiver_offset);
2256 break;
2257 case T_VOID:
2258 break;
2259
2260 case T_FLOAT:
2261 float_move(masm, in_regs[i], out_regs[c_arg]);
2262 break;
2263
2264 case T_DOUBLE:
2265 assert( i + 1 < total_in_args &&
2266 in_sig_bt[i + 1] == T_VOID &&
2267 out_sig_bt[c_arg+1] == T_VOID, "bad arg list");
2268 double_move(masm, in_regs[i], out_regs[c_arg]);
2269 break;
2270
2271 case T_LONG :
2272 long_move(masm, in_regs[i], out_regs[c_arg]);
2273 break;
2274
2275 case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
2276
2277 default:
2278 move32_64(masm, in_regs[i], out_regs[c_arg]);
2279 }
2280 }
2281
2282 int c_arg;
2283
2284 // Pre-load a static method's oop into r14. Used both by locking code and
2285 // the normal JNI call code.
2286 if (!is_critical_native) {
2287 // point c_arg at the first arg that is already loaded in case we
2288 // need to spill before we call out
2289 c_arg = total_c_args - total_in_args;
2290
2291 if (method->is_static()) {
2292
2293 // load oop into a register
2294 __ movoop(oop_handle_reg, JNIHandles::make_local(method->method_holder()->java_mirror()));
2295
2296 // Now handlize the static class mirror it's known not-null.
2297 __ movptr(Address(rsp, klass_offset), oop_handle_reg);
2298 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
2299
2300 // Now get the handle
2301 __ lea(oop_handle_reg, Address(rsp, klass_offset));
2302 // store the klass handle as second argument
2303 __ movptr(c_rarg1, oop_handle_reg);
2304 // and protect the arg if we must spill
2305 c_arg--;
2306 }
2307 } else {
2308 // For JNI critical methods we need to save all registers in save_args.
2309 c_arg = 0;
2310 }
2311
2312 // Change state to native (we save the return address in the thread, since it might not
2313 // be pushed on the stack when we do a a stack traversal). It is enough that the pc()
2314 // points into the right code segment. It does not have to be the correct return pc.
2315 // We use the same pc/oopMap repeatedly when we call out
2316
2317 intptr_t the_pc = (intptr_t) __ pc();
2318 oop_maps->add_gc_map(the_pc - start, map);
2319
2320 __ set_last_Java_frame(rsp, noreg, (address)the_pc);
2321
2322
2323 // We have all of the arguments setup at this point. We must not touch any register
2324 // argument registers at this point (what if we save/restore them there are no oop?
2325
2326 {
2327 SkipIfEqual skip(masm, &DTraceMethodProbes, false);
2328 // protect the args we've loaded
2329 save_args(masm, total_c_args, c_arg, out_regs);
2330 __ mov_metadata(c_rarg1, method());
2331 __ call_VM_leaf(
2332 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
2333 r15_thread, c_rarg1);
2334 restore_args(masm, total_c_args, c_arg, out_regs);
2335 }
2336
2337 // RedefineClasses() tracing support for obsolete method entry
2338 if (log_is_enabled(Trace, redefine, class, obsolete)) {
2339 // protect the args we've loaded
2340 save_args(masm, total_c_args, c_arg, out_regs);
2341 __ mov_metadata(c_rarg1, method());
2342 __ call_VM_leaf(
2343 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry),
2344 r15_thread, c_rarg1);
2345 restore_args(masm, total_c_args, c_arg, out_regs);
2346 }
2347
2348 // Lock a synchronized method
2349
2350 // Register definitions used by locking and unlocking
2351
2352 const Register swap_reg = rax; // Must use rax for cmpxchg instruction
2353 const Register obj_reg = rbx; // Will contain the oop
2354 const Register lock_reg = r13; // Address of compiler lock object (BasicLock)
2355 const Register old_hdr = r13; // value of old header at unlock time
2356
2357 Label slow_path_lock;
2358 Label lock_done;
2359
2360 if (method->is_synchronized()) {
2361 assert(!is_critical_native, "unhandled");
2362
2363
2364 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes();
2365
2366 // Get the handle (the 2nd argument)
2367 __ mov(oop_handle_reg, c_rarg1);
2368
2369 // Get address of the box
2370
2371 __ lea(lock_reg, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size));
2372
2373 // Load the oop from the handle
2374 __ movptr(obj_reg, Address(oop_handle_reg, 0));
2375
2376 if (UseBiasedLocking) {
2377 __ biased_locking_enter(lock_reg, obj_reg, swap_reg, rscratch1, false, lock_done, &slow_path_lock);
2378 }
2379
2380 // Load immediate 1 into swap_reg %rax
2381 __ movl(swap_reg, 1);
2382
2383 // Load (object->mark() | 1) into swap_reg %rax
2384 __ orptr(swap_reg, Address(obj_reg, 0));
2385
2386 // Save (object->mark() | 1) into BasicLock's displaced header
2387 __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
2388
2389 if (os::is_MP()) {
2390 __ lock();
2391 }
2392
2393 // src -> dest iff dest == rax else rax <- dest
2394 __ cmpxchgptr(lock_reg, Address(obj_reg, 0));
2395 __ jcc(Assembler::equal, lock_done);
2396
2397 // Hmm should this move to the slow path code area???
2398
2399 // Test if the oopMark is an obvious stack pointer, i.e.,
2400 // 1) (mark & 3) == 0, and
2401 // 2) rsp <= mark < mark + os::pagesize()
2402 // These 3 tests can be done by evaluating the following
2403 // expression: ((mark - rsp) & (3 - os::vm_page_size())),
2404 // assuming both stack pointer and pagesize have their
2405 // least significant 2 bits clear.
2406 // NOTE: the oopMark is in swap_reg %rax as the result of cmpxchg
2407
2408 __ subptr(swap_reg, rsp);
2409 __ andptr(swap_reg, 3 - os::vm_page_size());
2410
2411 // Save the test result, for recursive case, the result is zero
2412 __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
2413 __ jcc(Assembler::notEqual, slow_path_lock);
2414
2415 // Slow path will re-enter here
2416
2417 __ bind(lock_done);
2418 }
2419
2420
2421 // Finally just about ready to make the JNI call
2422
2423
2424 // get JNIEnv* which is first argument to native
2425 if (!is_critical_native) {
2426 __ lea(c_rarg0, Address(r15_thread, in_bytes(JavaThread::jni_environment_offset())));
2427 }
2428
2429 // Now set thread in native
2430 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native);
2431
2432 __ call(RuntimeAddress(native_func));
2433
2434 // Verify or restore cpu control state after JNI call
2435 __ restore_cpu_control_state_after_jni();
2436
2437 // Unpack native results.
2438 switch (ret_type) {
2439 case T_BOOLEAN: __ c2bool(rax); break;
2440 case T_CHAR : __ movzwl(rax, rax); break;
2441 case T_BYTE : __ sign_extend_byte (rax); break;
2442 case T_SHORT : __ sign_extend_short(rax); break;
2443 case T_INT : /* nothing to do */ break;
2444 case T_DOUBLE :
2445 case T_FLOAT :
2446 // Result is in xmm0 we'll save as needed
2447 break;
2448 case T_ARRAY: // Really a handle
2449 case T_OBJECT: // Really a handle
2450 break; // can't de-handlize until after safepoint check
2451 case T_VOID: break;
2452 case T_LONG: break;
2453 default : ShouldNotReachHere();
2454 }
2455
2456 // Switch thread to "native transition" state before reading the synchronization state.
2457 // This additional state is necessary because reading and testing the synchronization
2458 // state is not atomic w.r.t. GC, as this scenario demonstrates:
2459 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted.
2460 // VM thread changes sync state to synchronizing and suspends threads for GC.
2461 // Thread A is resumed to finish this native method, but doesn't block here since it
2462 // didn't see any synchronization is progress, and escapes.
2463 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native_trans);
2464
2465 if(os::is_MP()) {
2466 if (UseMembar) {
2467 // Force this write out before the read below
2468 __ membar(Assembler::Membar_mask_bits(
2469 Assembler::LoadLoad | Assembler::LoadStore |
2470 Assembler::StoreLoad | Assembler::StoreStore));
2471 } else {
2472 // Write serialization page so VM thread can do a pseudo remote membar.
2473 // We use the current thread pointer to calculate a thread specific
2474 // offset to write to within the page. This minimizes bus traffic
2475 // due to cache line collision.
2476 __ serialize_memory(r15_thread, rcx);
2477 }
2478 }
2479
2480 Label after_transition;
2481
2482 // check for safepoint operation in progress and/or pending suspend requests
2483 {
2484 Label Continue;
2485
2486 __ cmp32(ExternalAddress((address)SafepointSynchronize::address_of_state()),
2487 SafepointSynchronize::_not_synchronized);
2488
2489 Label L;
2490 __ jcc(Assembler::notEqual, L);
2491 __ cmpl(Address(r15_thread, JavaThread::suspend_flags_offset()), 0);
2492 __ jcc(Assembler::equal, Continue);
2493 __ bind(L);
2494
2495 // Don't use call_VM as it will see a possible pending exception and forward it
2496 // and never return here preventing us from clearing _last_native_pc down below.
2497 // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are
2498 // preserved and correspond to the bcp/locals pointers. So we do a runtime call
2499 // by hand.
2500 //
2501 if (VM_Version::supports_avx()) {
2502 __ vzeroupper();
2503 }
2504 save_native_result(masm, ret_type, stack_slots);
2505 __ mov(c_rarg0, r15_thread);
2506 __ mov(r12, rsp); // remember sp
2507 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows
2508 __ andptr(rsp, -16); // align stack as required by ABI
2509 if (!is_critical_native) {
2510 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans)));
2511 } else {
2512 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans_and_transition)));
2513 }
2514 __ mov(rsp, r12); // restore sp
2515 __ reinit_heapbase();
2516 // Restore any method result value
2517 restore_native_result(masm, ret_type, stack_slots);
2518
2519 if (is_critical_native) {
2520 // The call above performed the transition to thread_in_Java so
2521 // skip the transition logic below.
2522 __ jmpb(after_transition);
2523 }
2524
2525 __ bind(Continue);
2526 }
2527
2528 // change thread state
2529 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_Java);
2530 __ bind(after_transition);
2531
2532 Label reguard;
2533 Label reguard_done;
2534 __ cmpl(Address(r15_thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_reserved_disabled);
2535 __ jcc(Assembler::equal, reguard);
2536 __ bind(reguard_done);
2537
2538 // native result if any is live
2539
2540 // Unlock
2541 Label unlock_done;
2542 Label slow_path_unlock;
2543 if (method->is_synchronized()) {
2544
2545 // Get locked oop from the handle we passed to jni
2546 __ movptr(obj_reg, Address(oop_handle_reg, 0));
2547
2548 Label done;
2549
2550 if (UseBiasedLocking) {
2551 __ biased_locking_exit(obj_reg, old_hdr, done);
2552 }
2553
2554 // Simple recursive lock?
2555
2556 __ cmpptr(Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size), (int32_t)NULL_WORD);
2557 __ jcc(Assembler::equal, done);
2558
2559 // Must save rax if if it is live now because cmpxchg must use it
2560 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
2561 save_native_result(masm, ret_type, stack_slots);
2562 }
2563
2564
2565 // get address of the stack lock
2566 __ lea(rax, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size));
2567 // get old displaced header
2568 __ movptr(old_hdr, Address(rax, 0));
2569
2570 // Atomic swap old header if oop still contains the stack lock
2571 if (os::is_MP()) {
2572 __ lock();
2573 }
2574 __ cmpxchgptr(old_hdr, Address(obj_reg, 0));
2575 __ jcc(Assembler::notEqual, slow_path_unlock);
2576
2577 // slow path re-enters here
2578 __ bind(unlock_done);
2579 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
2580 restore_native_result(masm, ret_type, stack_slots);
2581 }
2582
2583 __ bind(done);
2584
2585 }
2586 {
2587 SkipIfEqual skip(masm, &DTraceMethodProbes, false);
2588 save_native_result(masm, ret_type, stack_slots);
2589 __ mov_metadata(c_rarg1, method());
2590 __ call_VM_leaf(
2591 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
2592 r15_thread, c_rarg1);
2593 restore_native_result(masm, ret_type, stack_slots);
2594 }
2595
2596 __ reset_last_Java_frame(false);
2597
2598 // Unpack oop result
2599 if (ret_type == T_OBJECT || ret_type == T_ARRAY) {
2600 Label L;
2601 __ testptr(rax, rax);
2602 __ jcc(Assembler::zero, L);
2603 __ movptr(rax, Address(rax, 0));
2604 __ bind(L);
2605 __ verify_oop(rax);
2606 }
2607
2608 if (CheckJNICalls) {
2609 // clear_pending_jni_exception_check
2610 __ movptr(Address(r15_thread, JavaThread::pending_jni_exception_check_fn_offset()), NULL_WORD);
2611 }
2612
2613 if (!is_critical_native) {
2614 // reset handle block
2615 __ movptr(rcx, Address(r15_thread, JavaThread::active_handles_offset()));
2616 __ movl(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), (int32_t)NULL_WORD);
2617 }
2618
2619 // pop our frame
2620
2621 __ leave();
2622
2623 if (!is_critical_native) {
2624 // Any exception pending?
2625 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
2626 __ jcc(Assembler::notEqual, exception_pending);
2627 }
2628
2629 // Return
2630
2631 __ ret(0);
2632
2633 // Unexpected paths are out of line and go here
2634
2635 if (!is_critical_native) {
2636 // forward the exception
2637 __ bind(exception_pending);
2638
2639 // and forward the exception
2640 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2641 }
2642
2643 // Slow path locking & unlocking
2644 if (method->is_synchronized()) {
2645
2646 // BEGIN Slow path lock
2647 __ bind(slow_path_lock);
2648
2649 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM
2650 // args are (oop obj, BasicLock* lock, JavaThread* thread)
2651
2652 // protect the args we've loaded
2653 save_args(masm, total_c_args, c_arg, out_regs);
2654
2655 __ mov(c_rarg0, obj_reg);
2656 __ mov(c_rarg1, lock_reg);
2657 __ mov(c_rarg2, r15_thread);
2658
2659 // Not a leaf but we have last_Java_frame setup as we want
2660 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), 3);
2661 restore_args(masm, total_c_args, c_arg, out_regs);
2662
2663 #ifdef ASSERT
2664 { Label L;
2665 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
2666 __ jcc(Assembler::equal, L);
2667 __ stop("no pending exception allowed on exit from monitorenter");
2668 __ bind(L);
2669 }
2670 #endif
2671 __ jmp(lock_done);
2672
2673 // END Slow path lock
2674
2675 // BEGIN Slow path unlock
2676 __ bind(slow_path_unlock);
2677
2678 // If we haven't already saved the native result we must save it now as xmm registers
2679 // are still exposed.
2680 if (VM_Version::supports_avx()) {
2681 __ vzeroupper();
2682 }
2683
2684 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2685 save_native_result(masm, ret_type, stack_slots);
2686 }
2687
2688 __ lea(c_rarg1, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size));
2689
2690 __ mov(c_rarg0, obj_reg);
2691 __ mov(c_rarg2, r15_thread);
2692 __ mov(r12, rsp); // remember sp
2693 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows
2694 __ andptr(rsp, -16); // align stack as required by ABI
2695
2696 // Save pending exception around call to VM (which contains an EXCEPTION_MARK)
2697 // NOTE that obj_reg == rbx currently
2698 __ movptr(rbx, Address(r15_thread, in_bytes(Thread::pending_exception_offset())));
2699 __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
2700
2701 // args are (oop obj, BasicLock* lock, JavaThread* thread)
2702 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C)));
2703 __ mov(rsp, r12); // restore sp
2704 __ reinit_heapbase();
2705 #ifdef ASSERT
2706 {
2707 Label L;
2708 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD);
2709 __ jcc(Assembler::equal, L);
2710 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C");
2711 __ bind(L);
2712 }
2713 #endif /* ASSERT */
2714
2715 __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), rbx);
2716
2717 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2718 restore_native_result(masm, ret_type, stack_slots);
2719 }
2720 __ jmp(unlock_done);
2721
2722 // END Slow path unlock
2723
2724 } // synchronized
2725
2726 // SLOW PATH Reguard the stack if needed
2727
2728 __ bind(reguard);
2729 if (VM_Version::supports_avx()) {
2730 __ vzeroupper();
2731 }
2732 save_native_result(masm, ret_type, stack_slots);
2733 __ mov(r12, rsp); // remember sp
2734 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows
2735 __ andptr(rsp, -16); // align stack as required by ABI
2736 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages)));
2737 __ mov(rsp, r12); // restore sp
2738 __ reinit_heapbase();
2739 restore_native_result(masm, ret_type, stack_slots);
2740 // and continue
2741 __ jmp(reguard_done);
2742
2743
2744
2745 __ flush();
2746
2747 nmethod *nm = nmethod::new_native_nmethod(method,
2748 compile_id,
2749 masm->code(),
2750 vep_offset,
2751 frame_complete,
2752 stack_slots / VMRegImpl::slots_per_word,
2753 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
2754 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size),
2755 oop_maps);
2756
2757 if (is_critical_native) {
2758 nm->set_lazy_critical_native(true);
2759 }
2760
2761 return nm;
2762
2763 }
2764
2765 // this function returns the adjust size (in number of words) to a c2i adapter
2766 // activation for use during deoptimization
2767 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) {
2768 return (callee_locals - callee_parameters) * Interpreter::stackElementWords;
2769 }
2770
2771
2772 uint SharedRuntime::out_preserve_stack_slots() {
2773 return 0;
2774 }
2775
2776 //------------------------------generate_deopt_blob----------------------------
2777 void SharedRuntime::generate_deopt_blob() {
2778 // Allocate space for the code
2779 ResourceMark rm;
2780 // Setup code generation tools
2781 int pad = 0;
2782 #if INCLUDE_JVMCI
2783 if (EnableJVMCI || UseAOT) {
2784 pad += 512; // Increase the buffer size when compiling for JVMCI
2785 }
2786 #endif
2787 CodeBuffer buffer("deopt_blob", 2048+pad, 1024);
2788 MacroAssembler* masm = new MacroAssembler(&buffer);
2789 int frame_size_in_words;
2790 OopMap* map = NULL;
2791 OopMapSet *oop_maps = new OopMapSet();
2792
2793 // -------------
2794 // This code enters when returning to a de-optimized nmethod. A return
2795 // address has been pushed on the the stack, and return values are in
2796 // registers.
2797 // If we are doing a normal deopt then we were called from the patched
2798 // nmethod from the point we returned to the nmethod. So the return
2799 // address on the stack is wrong by NativeCall::instruction_size
2800 // We will adjust the value so it looks like we have the original return
2801 // address on the stack (like when we eagerly deoptimized).
2802 // In the case of an exception pending when deoptimizing, we enter
2803 // with a return address on the stack that points after the call we patched
2804 // into the exception handler. We have the following register state from,
2805 // e.g., the forward exception stub (see stubGenerator_x86_64.cpp).
2806 // rax: exception oop
2807 // rbx: exception handler
2808 // rdx: throwing pc
2809 // So in this case we simply jam rdx into the useless return address and
2810 // the stack looks just like we want.
2811 //
2812 // At this point we need to de-opt. We save the argument return
2813 // registers. We call the first C routine, fetch_unroll_info(). This
2814 // routine captures the return values and returns a structure which
2815 // describes the current frame size and the sizes of all replacement frames.
2816 // The current frame is compiled code and may contain many inlined
2817 // functions, each with their own JVM state. We pop the current frame, then
2818 // push all the new frames. Then we call the C routine unpack_frames() to
2819 // populate these frames. Finally unpack_frames() returns us the new target
2820 // address. Notice that callee-save registers are BLOWN here; they have
2821 // already been captured in the vframeArray at the time the return PC was
2822 // patched.
2823 address start = __ pc();
2824 Label cont;
2825
2826 // Prolog for non exception case!
2827
2828 // Save everything in sight.
2829 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
2830
2831 // Normal deoptimization. Save exec mode for unpack_frames.
2832 __ movl(r14, Deoptimization::Unpack_deopt); // callee-saved
2833 __ jmp(cont);
2834
2835 int reexecute_offset = __ pc() - start;
2836 #if INCLUDE_JVMCI && !defined(COMPILER1)
2837 if (EnableJVMCI && UseJVMCICompiler) {
2838 // JVMCI does not use this kind of deoptimization
2839 __ should_not_reach_here();
2840 }
2841 #endif
2842
2843 // Reexecute case
2844 // return address is the pc describes what bci to do re-execute at
2845
2846 // No need to update map as each call to save_live_registers will produce identical oopmap
2847 (void) RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
2848
2849 __ movl(r14, Deoptimization::Unpack_reexecute); // callee-saved
2850 __ jmp(cont);
2851
2852 #if INCLUDE_JVMCI
2853 Label after_fetch_unroll_info_call;
2854 int implicit_exception_uncommon_trap_offset = 0;
2855 int uncommon_trap_offset = 0;
2856
2857 if (EnableJVMCI || UseAOT) {
2858 implicit_exception_uncommon_trap_offset = __ pc() - start;
2859
2860 __ pushptr(Address(r15_thread, in_bytes(JavaThread::jvmci_implicit_exception_pc_offset())));
2861 __ movptr(Address(r15_thread, in_bytes(JavaThread::jvmci_implicit_exception_pc_offset())), (int32_t)NULL_WORD);
2862
2863 uncommon_trap_offset = __ pc() - start;
2864
2865 // Save everything in sight.
2866 RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
2867 // fetch_unroll_info needs to call last_java_frame()
2868 __ set_last_Java_frame(noreg, noreg, NULL);
2869
2870 __ movl(c_rarg1, Address(r15_thread, in_bytes(JavaThread::pending_deoptimization_offset())));
2871 __ movl(Address(r15_thread, in_bytes(JavaThread::pending_deoptimization_offset())), -1);
2872
2873 __ movl(r14, (int32_t)Deoptimization::Unpack_reexecute);
2874 __ mov(c_rarg0, r15_thread);
2875 __ movl(c_rarg2, r14); // exec mode
2876 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap)));
2877 oop_maps->add_gc_map( __ pc()-start, map->deep_copy());
2878
2879 __ reset_last_Java_frame(false);
2880
2881 __ jmp(after_fetch_unroll_info_call);
2882 } // EnableJVMCI
2883 #endif // INCLUDE_JVMCI
2884
2885 int exception_offset = __ pc() - start;
2886
2887 // Prolog for exception case
2888
2889 // all registers are dead at this entry point, except for rax, and
2890 // rdx which contain the exception oop and exception pc
2891 // respectively. Set them in TLS and fall thru to the
2892 // unpack_with_exception_in_tls entry point.
2893
2894 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx);
2895 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), rax);
2896
2897 int exception_in_tls_offset = __ pc() - start;
2898
2899 // new implementation because exception oop is now passed in JavaThread
2900
2901 // Prolog for exception case
2902 // All registers must be preserved because they might be used by LinearScan
2903 // Exceptiop oop and throwing PC are passed in JavaThread
2904 // tos: stack at point of call to method that threw the exception (i.e. only
2905 // args are on the stack, no return address)
2906
2907 // make room on stack for the return address
2908 // It will be patched later with the throwing pc. The correct value is not
2909 // available now because loading it from memory would destroy registers.
2910 __ push(0);
2911
2912 // Save everything in sight.
2913 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
2914
2915 // Now it is safe to overwrite any register
2916
2917 // Deopt during an exception. Save exec mode for unpack_frames.
2918 __ movl(r14, Deoptimization::Unpack_exception); // callee-saved
2919
2920 // load throwing pc from JavaThread and patch it as the return address
2921 // of the current frame. Then clear the field in JavaThread
2922
2923 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset()));
2924 __ movptr(Address(rbp, wordSize), rdx);
2925 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD);
2926
2927 #ifdef ASSERT
2928 // verify that there is really an exception oop in JavaThread
2929 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset()));
2930 __ verify_oop(rax);
2931
2932 // verify that there is no pending exception
2933 Label no_pending_exception;
2934 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset()));
2935 __ testptr(rax, rax);
2936 __ jcc(Assembler::zero, no_pending_exception);
2937 __ stop("must not have pending exception here");
2938 __ bind(no_pending_exception);
2939 #endif
2940
2941 __ bind(cont);
2942
2943 // Call C code. Need thread and this frame, but NOT official VM entry
2944 // crud. We cannot block on this call, no GC can happen.
2945 //
2946 // UnrollBlock* fetch_unroll_info(JavaThread* thread)
2947
2948 // fetch_unroll_info needs to call last_java_frame().
2949
2950 __ set_last_Java_frame(noreg, noreg, NULL);
2951 #ifdef ASSERT
2952 { Label L;
2953 __ cmpptr(Address(r15_thread,
2954 JavaThread::last_Java_fp_offset()),
2955 (int32_t)0);
2956 __ jcc(Assembler::equal, L);
2957 __ stop("SharedRuntime::generate_deopt_blob: last_Java_fp not cleared");
2958 __ bind(L);
2959 }
2960 #endif // ASSERT
2961 __ mov(c_rarg0, r15_thread);
2962 __ movl(c_rarg1, r14); // exec_mode
2963 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info)));
2964
2965 // Need to have an oopmap that tells fetch_unroll_info where to
2966 // find any register it might need.
2967 oop_maps->add_gc_map(__ pc() - start, map);
2968
2969 __ reset_last_Java_frame(false);
2970
2971 #if INCLUDE_JVMCI
2972 if (EnableJVMCI || UseAOT) {
2973 __ bind(after_fetch_unroll_info_call);
2974 }
2975 #endif
2976
2977 // Load UnrollBlock* into rdi
2978 __ mov(rdi, rax);
2979
2980 __ movl(r14, Address(rdi, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes()));
2981 Label noException;
2982 __ cmpl(r14, Deoptimization::Unpack_exception); // Was exception pending?
2983 __ jcc(Assembler::notEqual, noException);
2984 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset()));
2985 // QQQ this is useless it was NULL above
2986 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset()));
2987 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int32_t)NULL_WORD);
2988 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD);
2989
2990 __ verify_oop(rax);
2991
2992 // Overwrite the result registers with the exception results.
2993 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax);
2994 // I think this is useless
2995 __ movptr(Address(rsp, RegisterSaver::rdx_offset_in_bytes()), rdx);
2996
2997 __ bind(noException);
2998
2999 // Only register save data is on the stack.
3000 // Now restore the result registers. Everything else is either dead
3001 // or captured in the vframeArray.
3002 RegisterSaver::restore_result_registers(masm);
3003
3004 // All of the register save area has been popped of the stack. Only the
3005 // return address remains.
3006
3007 // Pop all the frames we must move/replace.
3008 //
3009 // Frame picture (youngest to oldest)
3010 // 1: self-frame (no frame link)
3011 // 2: deopting frame (no frame link)
3012 // 3: caller of deopting frame (could be compiled/interpreted).
3013 //
3014 // Note: by leaving the return address of self-frame on the stack
3015 // and using the size of frame 2 to adjust the stack
3016 // when we are done the return to frame 3 will still be on the stack.
3017
3018 // Pop deoptimized frame
3019 __ movl(rcx, Address(rdi, Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
3020 __ addptr(rsp, rcx);
3021
3022 // rsp should be pointing at the return address to the caller (3)
3023
3024 // Pick up the initial fp we should save
3025 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved)
3026 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes()));
3027
3028 #ifdef ASSERT
3029 // Compilers generate code that bang the stack by as much as the
3030 // interpreter would need. So this stack banging should never
3031 // trigger a fault. Verify that it does not on non product builds.
3032 if (UseStackBanging) {
3033 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
3034 __ bang_stack_size(rbx, rcx);
3035 }
3036 #endif
3037
3038 // Load address of array of frame pcs into rcx
3039 __ movptr(rcx, Address(rdi, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
3040
3041 // Trash the old pc
3042 __ addptr(rsp, wordSize);
3043
3044 // Load address of array of frame sizes into rsi
3045 __ movptr(rsi, Address(rdi, Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
3046
3047 // Load counter into rdx
3048 __ movl(rdx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
3049
3050 // Now adjust the caller's stack to make up for the extra locals
3051 // but record the original sp so that we can save it in the skeletal interpreter
3052 // frame and the stack walking of interpreter_sender will get the unextended sp
3053 // value and not the "real" sp value.
3054
3055 const Register sender_sp = r8;
3056
3057 __ mov(sender_sp, rsp);
3058 __ movl(rbx, Address(rdi,
3059 Deoptimization::UnrollBlock::
3060 caller_adjustment_offset_in_bytes()));
3061 __ subptr(rsp, rbx);
3062
3063 // Push interpreter frames in a loop
3064 Label loop;
3065 __ bind(loop);
3066 __ movptr(rbx, Address(rsi, 0)); // Load frame size
3067 __ subptr(rbx, 2*wordSize); // We'll push pc and ebp by hand
3068 __ pushptr(Address(rcx, 0)); // Save return address
3069 __ enter(); // Save old & set new ebp
3070 __ subptr(rsp, rbx); // Prolog
3071 // This value is corrected by layout_activation_impl
3072 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD );
3073 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), sender_sp); // Make it walkable
3074 __ mov(sender_sp, rsp); // Pass sender_sp to next frame
3075 __ addptr(rsi, wordSize); // Bump array pointer (sizes)
3076 __ addptr(rcx, wordSize); // Bump array pointer (pcs)
3077 __ decrementl(rdx); // Decrement counter
3078 __ jcc(Assembler::notZero, loop);
3079 __ pushptr(Address(rcx, 0)); // Save final return address
3080
3081 // Re-push self-frame
3082 __ enter(); // Save old & set new ebp
3083
3084 // Allocate a full sized register save area.
3085 // Return address and rbp are in place, so we allocate two less words.
3086 __ subptr(rsp, (frame_size_in_words - 2) * wordSize);
3087
3088 // Restore frame locals after moving the frame
3089 __ movdbl(Address(rsp, RegisterSaver::xmm0_offset_in_bytes()), xmm0);
3090 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax);
3091
3092 // Call C code. Need thread but NOT official VM entry
3093 // crud. We cannot block on this call, no GC can happen. Call should
3094 // restore return values to their stack-slots with the new SP.
3095 //
3096 // void Deoptimization::unpack_frames(JavaThread* thread, int exec_mode)
3097
3098 // Use rbp because the frames look interpreted now
3099 // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP.
3100 // Don't need the precise return PC here, just precise enough to point into this code blob.
3101 address the_pc = __ pc();
3102 __ set_last_Java_frame(noreg, rbp, the_pc);
3103
3104 __ andptr(rsp, -(StackAlignmentInBytes)); // Fix stack alignment as required by ABI
3105 __ mov(c_rarg0, r15_thread);
3106 __ movl(c_rarg1, r14); // second arg: exec_mode
3107 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
3108 // Revert SP alignment after call since we're going to do some SP relative addressing below
3109 __ movptr(rsp, Address(r15_thread, JavaThread::last_Java_sp_offset()));
3110
3111 // Set an oopmap for the call site
3112 // Use the same PC we used for the last java frame
3113 oop_maps->add_gc_map(the_pc - start,
3114 new OopMap( frame_size_in_words, 0 ));
3115
3116 // Clear fp AND pc
3117 __ reset_last_Java_frame(true);
3118
3119 // Collect return values
3120 __ movdbl(xmm0, Address(rsp, RegisterSaver::xmm0_offset_in_bytes()));
3121 __ movptr(rax, Address(rsp, RegisterSaver::rax_offset_in_bytes()));
3122 // I think this is useless (throwing pc?)
3123 __ movptr(rdx, Address(rsp, RegisterSaver::rdx_offset_in_bytes()));
3124
3125 // Pop self-frame.
3126 __ leave(); // Epilog
3127
3128 // Jump to interpreter
3129 __ ret(0);
3130
3131 // Make sure all code is generated
3132 masm->flush();
3133
3134 _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words);
3135 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset);
3136 #if INCLUDE_JVMCI
3137 if (EnableJVMCI || UseAOT) {
3138 _deopt_blob->set_uncommon_trap_offset(uncommon_trap_offset);
3139 _deopt_blob->set_implicit_exception_uncommon_trap_offset(implicit_exception_uncommon_trap_offset);
3140 }
3141 #endif
3142 }
3143
3144 #ifdef COMPILER2
3145 //------------------------------generate_uncommon_trap_blob--------------------
3146 void SharedRuntime::generate_uncommon_trap_blob() {
3147 // Allocate space for the code
3148 ResourceMark rm;
3149 // Setup code generation tools
3150 CodeBuffer buffer("uncommon_trap_blob", 2048, 1024);
3151 MacroAssembler* masm = new MacroAssembler(&buffer);
3152
3153 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned");
3154
3155 address start = __ pc();
3156
3157 if (UseRTMLocking) {
3158 // Abort RTM transaction before possible nmethod deoptimization.
3159 __ xabort(0);
3160 }
3161
3162 // Push self-frame. We get here with a return address on the
3163 // stack, so rsp is 8-byte aligned until we allocate our frame.
3164 __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog!
3165
3166 // No callee saved registers. rbp is assumed implicitly saved
3167 __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp);
3168
3169 // compiler left unloaded_class_index in j_rarg0 move to where the
3170 // runtime expects it.
3171 __ movl(c_rarg1, j_rarg0);
3172
3173 __ set_last_Java_frame(noreg, noreg, NULL);
3174
3175 // Call C code. Need thread but NOT official VM entry
3176 // crud. We cannot block on this call, no GC can happen. Call should
3177 // capture callee-saved registers as well as return values.
3178 // Thread is in rdi already.
3179 //
3180 // UnrollBlock* uncommon_trap(JavaThread* thread, jint unloaded_class_index);
3181
3182 __ mov(c_rarg0, r15_thread);
3183 __ movl(c_rarg2, Deoptimization::Unpack_uncommon_trap);
3184 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap)));
3185
3186 // Set an oopmap for the call site
3187 OopMapSet* oop_maps = new OopMapSet();
3188 OopMap* map = new OopMap(SimpleRuntimeFrame::framesize, 0);
3189
3190 // location of rbp is known implicitly by the frame sender code
3191
3192 oop_maps->add_gc_map(__ pc() - start, map);
3193
3194 __ reset_last_Java_frame(false);
3195
3196 // Load UnrollBlock* into rdi
3197 __ mov(rdi, rax);
3198
3199 #ifdef ASSERT
3200 { Label L;
3201 __ cmpptr(Address(rdi, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes()),
3202 (int32_t)Deoptimization::Unpack_uncommon_trap);
3203 __ jcc(Assembler::equal, L);
3204 __ stop("SharedRuntime::generate_deopt_blob: expected Unpack_uncommon_trap");
3205 __ bind(L);
3206 }
3207 #endif
3208
3209 // Pop all the frames we must move/replace.
3210 //
3211 // Frame picture (youngest to oldest)
3212 // 1: self-frame (no frame link)
3213 // 2: deopting frame (no frame link)
3214 // 3: caller of deopting frame (could be compiled/interpreted).
3215
3216 // Pop self-frame. We have no frame, and must rely only on rax and rsp.
3217 __ addptr(rsp, (SimpleRuntimeFrame::framesize - 2) << LogBytesPerInt); // Epilog!
3218
3219 // Pop deoptimized frame (int)
3220 __ movl(rcx, Address(rdi,
3221 Deoptimization::UnrollBlock::
3222 size_of_deoptimized_frame_offset_in_bytes()));
3223 __ addptr(rsp, rcx);
3224
3225 // rsp should be pointing at the return address to the caller (3)
3226
3227 // Pick up the initial fp we should save
3228 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved)
3229 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes()));
3230
3231 #ifdef ASSERT
3232 // Compilers generate code that bang the stack by as much as the
3233 // interpreter would need. So this stack banging should never
3234 // trigger a fault. Verify that it does not on non product builds.
3235 if (UseStackBanging) {
3236 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
3237 __ bang_stack_size(rbx, rcx);
3238 }
3239 #endif
3240
3241 // Load address of array of frame pcs into rcx (address*)
3242 __ movptr(rcx, Address(rdi, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
3243
3244 // Trash the return pc
3245 __ addptr(rsp, wordSize);
3246
3247 // Load address of array of frame sizes into rsi (intptr_t*)
3248 __ movptr(rsi, Address(rdi, Deoptimization::UnrollBlock:: frame_sizes_offset_in_bytes()));
3249
3250 // Counter
3251 __ movl(rdx, Address(rdi, Deoptimization::UnrollBlock:: number_of_frames_offset_in_bytes())); // (int)
3252
3253 // Now adjust the caller's stack to make up for the extra locals but
3254 // record the original sp so that we can save it in the skeletal
3255 // interpreter frame and the stack walking of interpreter_sender
3256 // will get the unextended sp value and not the "real" sp value.
3257
3258 const Register sender_sp = r8;
3259
3260 __ mov(sender_sp, rsp);
3261 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock:: caller_adjustment_offset_in_bytes())); // (int)
3262 __ subptr(rsp, rbx);
3263
3264 // Push interpreter frames in a loop
3265 Label loop;
3266 __ bind(loop);
3267 __ movptr(rbx, Address(rsi, 0)); // Load frame size
3268 __ subptr(rbx, 2 * wordSize); // We'll push pc and rbp by hand
3269 __ pushptr(Address(rcx, 0)); // Save return address
3270 __ enter(); // Save old & set new rbp
3271 __ subptr(rsp, rbx); // Prolog
3272 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize),
3273 sender_sp); // Make it walkable
3274 // This value is corrected by layout_activation_impl
3275 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD );
3276 __ mov(sender_sp, rsp); // Pass sender_sp to next frame
3277 __ addptr(rsi, wordSize); // Bump array pointer (sizes)
3278 __ addptr(rcx, wordSize); // Bump array pointer (pcs)
3279 __ decrementl(rdx); // Decrement counter
3280 __ jcc(Assembler::notZero, loop);
3281 __ pushptr(Address(rcx, 0)); // Save final return address
3282
3283 // Re-push self-frame
3284 __ enter(); // Save old & set new rbp
3285 __ subptr(rsp, (SimpleRuntimeFrame::framesize - 4) << LogBytesPerInt);
3286 // Prolog
3287
3288 // Use rbp because the frames look interpreted now
3289 // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP.
3290 // Don't need the precise return PC here, just precise enough to point into this code blob.
3291 address the_pc = __ pc();
3292 __ set_last_Java_frame(noreg, rbp, the_pc);
3293
3294 // Call C code. Need thread but NOT official VM entry
3295 // crud. We cannot block on this call, no GC can happen. Call should
3296 // restore return values to their stack-slots with the new SP.
3297 // Thread is in rdi already.
3298 //
3299 // BasicType unpack_frames(JavaThread* thread, int exec_mode);
3300
3301 __ andptr(rsp, -(StackAlignmentInBytes)); // Align SP as required by ABI
3302 __ mov(c_rarg0, r15_thread);
3303 __ movl(c_rarg1, Deoptimization::Unpack_uncommon_trap);
3304 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
3305
3306 // Set an oopmap for the call site
3307 // Use the same PC we used for the last java frame
3308 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0));
3309
3310 // Clear fp AND pc
3311 __ reset_last_Java_frame(true);
3312
3313 // Pop self-frame.
3314 __ leave(); // Epilog
3315
3316 // Jump to interpreter
3317 __ ret(0);
3318
3319 // Make sure all code is generated
3320 masm->flush();
3321
3322 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps,
3323 SimpleRuntimeFrame::framesize >> 1);
3324 }
3325 #endif // COMPILER2
3326
3327
3328 //------------------------------generate_handler_blob------
3329 //
3330 // Generate a special Compile2Runtime blob that saves all registers,
3331 // and setup oopmap.
3332 //
3333 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) {
3334 assert(StubRoutines::forward_exception_entry() != NULL,
3335 "must be generated before");
3336
3337 ResourceMark rm;
3338 OopMapSet *oop_maps = new OopMapSet();
3339 OopMap* map;
3340
3341 // Allocate space for the code. Setup code generation tools.
3342 CodeBuffer buffer("handler_blob", 2048, 1024);
3343 MacroAssembler* masm = new MacroAssembler(&buffer);
3344
3345 address start = __ pc();
3346 address call_pc = NULL;
3347 int frame_size_in_words;
3348 bool cause_return = (poll_type == POLL_AT_RETURN);
3349 bool save_vectors = (poll_type == POLL_AT_VECTOR_LOOP);
3350
3351 if (UseRTMLocking) {
3352 // Abort RTM transaction before calling runtime
3353 // because critical section will be large and will be
3354 // aborted anyway. Also nmethod could be deoptimized.
3355 __ xabort(0);
3356 }
3357
3358 // Make room for return address (or push it again)
3359 if (!cause_return) {
3360 __ push(rbx);
3361 }
3362
3363 // Save registers, fpu state, and flags
3364 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words, save_vectors);
3365
3366 // The following is basically a call_VM. However, we need the precise
3367 // address of the call in order to generate an oopmap. Hence, we do all the
3368 // work outselves.
3369
3370 __ set_last_Java_frame(noreg, noreg, NULL);
3371
3372 // The return address must always be correct so that frame constructor never
3373 // sees an invalid pc.
3374
3375 if (!cause_return) {
3376 // overwrite the dummy value we pushed on entry
3377 __ movptr(c_rarg0, Address(r15_thread, JavaThread::saved_exception_pc_offset()));
3378 __ movptr(Address(rbp, wordSize), c_rarg0);
3379 }
3380
3381 // Do the call
3382 __ mov(c_rarg0, r15_thread);
3383 __ call(RuntimeAddress(call_ptr));
3384
3385 // Set an oopmap for the call site. This oopmap will map all
3386 // oop-registers and debug-info registers as callee-saved. This
3387 // will allow deoptimization at this safepoint to find all possible
3388 // debug-info recordings, as well as let GC find all oops.
3389
3390 oop_maps->add_gc_map( __ pc() - start, map);
3391
3392 Label noException;
3393
3394 __ reset_last_Java_frame(false);
3395
3396 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
3397 __ jcc(Assembler::equal, noException);
3398
3399 // Exception pending
3400
3401 RegisterSaver::restore_live_registers(masm, save_vectors);
3402
3403 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3404
3405 // No exception case
3406 __ bind(noException);
3407
3408 // Normal exit, restore registers and exit.
3409 RegisterSaver::restore_live_registers(masm, save_vectors);
3410
3411 __ ret(0);
3412
3413 // Make sure all code is generated
3414 masm->flush();
3415
3416 // Fill-out other meta info
3417 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words);
3418 }
3419
3420 //
3421 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss
3422 //
3423 // Generate a stub that calls into vm to find out the proper destination
3424 // of a java call. All the argument registers are live at this point
3425 // but since this is generic code we don't know what they are and the caller
3426 // must do any gc of the args.
3427 //
3428 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) {
3429 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
3430
3431 // allocate space for the code
3432 ResourceMark rm;
3433
3434 CodeBuffer buffer(name, 1000, 512);
3435 MacroAssembler* masm = new MacroAssembler(&buffer);
3436
3437 int frame_size_in_words;
3438
3439 OopMapSet *oop_maps = new OopMapSet();
3440 OopMap* map = NULL;
3441
3442 int start = __ offset();
3443
3444 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
3445
3446 int frame_complete = __ offset();
3447
3448 __ set_last_Java_frame(noreg, noreg, NULL);
3449
3450 __ mov(c_rarg0, r15_thread);
3451
3452 __ call(RuntimeAddress(destination));
3453
3454
3455 // Set an oopmap for the call site.
3456 // We need this not only for callee-saved registers, but also for volatile
3457 // registers that the compiler might be keeping live across a safepoint.
3458
3459 oop_maps->add_gc_map( __ offset() - start, map);
3460
3461 // rax contains the address we are going to jump to assuming no exception got installed
3462
3463 // clear last_Java_sp
3464 __ reset_last_Java_frame(false);
3465 // check for pending exceptions
3466 Label pending;
3467 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
3468 __ jcc(Assembler::notEqual, pending);
3469
3470 // get the returned Method*
3471 __ get_vm_result_2(rbx, r15_thread);
3472 __ movptr(Address(rsp, RegisterSaver::rbx_offset_in_bytes()), rbx);
3473
3474 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax);
3475
3476 RegisterSaver::restore_live_registers(masm);
3477
3478 // We are back the the original state on entry and ready to go.
3479
3480 __ jmp(rax);
3481
3482 // Pending exception after the safepoint
3483
3484 __ bind(pending);
3485
3486 RegisterSaver::restore_live_registers(masm);
3487
3488 // exception pending => remove activation and forward to exception handler
3489
3490 __ movptr(Address(r15_thread, JavaThread::vm_result_offset()), (int)NULL_WORD);
3491
3492 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset()));
3493 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3494
3495 // -------------
3496 // make sure all code is generated
3497 masm->flush();
3498
3499 // return the blob
3500 // frame_size_words or bytes??
3501 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_in_words, oop_maps, true);
3502 }
3503
3504
3505 //------------------------------Montgomery multiplication------------------------
3506 //
3507
3508 #ifndef _WINDOWS
3509
3510 #define ASM_SUBTRACT
3511
3512 #ifdef ASM_SUBTRACT
3513 // Subtract 0:b from carry:a. Return carry.
3514 static unsigned long
3515 sub(unsigned long a[], unsigned long b[], unsigned long carry, long len) {
3516 long i = 0, cnt = len;
3517 unsigned long tmp;
3518 asm volatile("clc; "
3519 "0: ; "
3520 "mov (%[b], %[i], 8), %[tmp]; "
3521 "sbb %[tmp], (%[a], %[i], 8); "
3522 "inc %[i]; dec %[cnt]; "
3523 "jne 0b; "
3524 "mov %[carry], %[tmp]; sbb $0, %[tmp]; "
3525 : [i]"+r"(i), [cnt]"+r"(cnt), [tmp]"=&r"(tmp)
3526 : [a]"r"(a), [b]"r"(b), [carry]"r"(carry)
3527 : "memory");
3528 return tmp;
3529 }
3530 #else // ASM_SUBTRACT
3531 typedef int __attribute__((mode(TI))) int128;
3532
3533 // Subtract 0:b from carry:a. Return carry.
3534 static unsigned long
3535 sub(unsigned long a[], unsigned long b[], unsigned long carry, int len) {
3536 int128 tmp = 0;
3537 int i;
3538 for (i = 0; i < len; i++) {
3539 tmp += a[i];
3540 tmp -= b[i];
3541 a[i] = tmp;
3542 tmp >>= 64;
3543 assert(-1 <= tmp && tmp <= 0, "invariant");
3544 }
3545 return tmp + carry;
3546 }
3547 #endif // ! ASM_SUBTRACT
3548
3549 // Multiply (unsigned) Long A by Long B, accumulating the double-
3550 // length result into the accumulator formed of T0, T1, and T2.
3551 #define MACC(A, B, T0, T1, T2) \
3552 do { \
3553 unsigned long hi, lo; \
3554 __asm__ ("mul %5; add %%rax, %2; adc %%rdx, %3; adc $0, %4" \
3555 : "=&d"(hi), "=a"(lo), "+r"(T0), "+r"(T1), "+g"(T2) \
3556 : "r"(A), "a"(B) : "cc"); \
3557 } while(0)
3558
3559 // As above, but add twice the double-length result into the
3560 // accumulator.
3561 #define MACC2(A, B, T0, T1, T2) \
3562 do { \
3563 unsigned long hi, lo; \
3564 __asm__ ("mul %5; add %%rax, %2; adc %%rdx, %3; adc $0, %4; " \
3565 "add %%rax, %2; adc %%rdx, %3; adc $0, %4" \
3566 : "=&d"(hi), "=a"(lo), "+r"(T0), "+r"(T1), "+g"(T2) \
3567 : "r"(A), "a"(B) : "cc"); \
3568 } while(0)
3569
3570 // Fast Montgomery multiplication. The derivation of the algorithm is
3571 // in A Cryptographic Library for the Motorola DSP56000,
3572 // Dusse and Kaliski, Proc. EUROCRYPT 90, pp. 230-237.
3573
3574 static void __attribute__((noinline))
3575 montgomery_multiply(unsigned long a[], unsigned long b[], unsigned long n[],
3576 unsigned long m[], unsigned long inv, int len) {
3577 unsigned long t0 = 0, t1 = 0, t2 = 0; // Triple-precision accumulator
3578 int i;
3579
3580 assert(inv * n[0] == -1UL, "broken inverse in Montgomery multiply");
3581
3582 for (i = 0; i < len; i++) {
3583 int j;
3584 for (j = 0; j < i; j++) {
3585 MACC(a[j], b[i-j], t0, t1, t2);
3586 MACC(m[j], n[i-j], t0, t1, t2);
3587 }
3588 MACC(a[i], b[0], t0, t1, t2);
3589 m[i] = t0 * inv;
3590 MACC(m[i], n[0], t0, t1, t2);
3591
3592 assert(t0 == 0, "broken Montgomery multiply");
3593
3594 t0 = t1; t1 = t2; t2 = 0;
3595 }
3596
3597 for (i = len; i < 2*len; i++) {
3598 int j;
3599 for (j = i-len+1; j < len; j++) {
3600 MACC(a[j], b[i-j], t0, t1, t2);
3601 MACC(m[j], n[i-j], t0, t1, t2);
3602 }
3603 m[i-len] = t0;
3604 t0 = t1; t1 = t2; t2 = 0;
3605 }
3606
3607 while (t0)
3608 t0 = sub(m, n, t0, len);
3609 }
3610
3611 // Fast Montgomery squaring. This uses asymptotically 25% fewer
3612 // multiplies so it should be up to 25% faster than Montgomery
3613 // multiplication. However, its loop control is more complex and it
3614 // may actually run slower on some machines.
3615
3616 static void __attribute__((noinline))
3617 montgomery_square(unsigned long a[], unsigned long n[],
3618 unsigned long m[], unsigned long inv, int len) {
3619 unsigned long t0 = 0, t1 = 0, t2 = 0; // Triple-precision accumulator
3620 int i;
3621
3622 assert(inv * n[0] == -1UL, "broken inverse in Montgomery multiply");
3623
3624 for (i = 0; i < len; i++) {
3625 int j;
3626 int end = (i+1)/2;
3627 for (j = 0; j < end; j++) {
3628 MACC2(a[j], a[i-j], t0, t1, t2);
3629 MACC(m[j], n[i-j], t0, t1, t2);
3630 }
3631 if ((i & 1) == 0) {
3632 MACC(a[j], a[j], t0, t1, t2);
3633 }
3634 for (; j < i; j++) {
3635 MACC(m[j], n[i-j], t0, t1, t2);
3636 }
3637 m[i] = t0 * inv;
3638 MACC(m[i], n[0], t0, t1, t2);
3639
3640 assert(t0 == 0, "broken Montgomery square");
3641
3642 t0 = t1; t1 = t2; t2 = 0;
3643 }
3644
3645 for (i = len; i < 2*len; i++) {
3646 int start = i-len+1;
3647 int end = start + (len - start)/2;
3648 int j;
3649 for (j = start; j < end; j++) {
3650 MACC2(a[j], a[i-j], t0, t1, t2);
3651 MACC(m[j], n[i-j], t0, t1, t2);
3652 }
3653 if ((i & 1) == 0) {
3654 MACC(a[j], a[j], t0, t1, t2);
3655 }
3656 for (; j < len; j++) {
3657 MACC(m[j], n[i-j], t0, t1, t2);
3658 }
3659 m[i-len] = t0;
3660 t0 = t1; t1 = t2; t2 = 0;
3661 }
3662
3663 while (t0)
3664 t0 = sub(m, n, t0, len);
3665 }
3666
3667 // Swap words in a longword.
3668 static unsigned long swap(unsigned long x) {
3669 return (x << 32) | (x >> 32);
3670 }
3671
3672 // Copy len longwords from s to d, word-swapping as we go. The
3673 // destination array is reversed.
3674 static void reverse_words(unsigned long *s, unsigned long *d, int len) {
3675 d += len;
3676 while(len-- > 0) {
3677 d--;
3678 *d = swap(*s);
3679 s++;
3680 }
3681 }
3682
3683 // The threshold at which squaring is advantageous was determined
3684 // experimentally on an i7-3930K (Ivy Bridge) CPU @ 3.5GHz.
3685 #define MONTGOMERY_SQUARING_THRESHOLD 64
3686
3687 void SharedRuntime::montgomery_multiply(jint *a_ints, jint *b_ints, jint *n_ints,
3688 jint len, jlong inv,
3689 jint *m_ints) {
3690 assert(len % 2 == 0, "array length in montgomery_multiply must be even");
3691 int longwords = len/2;
3692
3693 // Make very sure we don't use so much space that the stack might
3694 // overflow. 512 jints corresponds to an 16384-bit integer and
3695 // will use here a total of 8k bytes of stack space.
3696 int total_allocation = longwords * sizeof (unsigned long) * 4;
3697 guarantee(total_allocation <= 8192, "must be");
3698 unsigned long *scratch = (unsigned long *)alloca(total_allocation);
3699
3700 // Local scratch arrays
3701 unsigned long
3702 *a = scratch + 0 * longwords,
3703 *b = scratch + 1 * longwords,
3704 *n = scratch + 2 * longwords,
3705 *m = scratch + 3 * longwords;
3706
3707 reverse_words((unsigned long *)a_ints, a, longwords);
3708 reverse_words((unsigned long *)b_ints, b, longwords);
3709 reverse_words((unsigned long *)n_ints, n, longwords);
3710
3711 ::montgomery_multiply(a, b, n, m, (unsigned long)inv, longwords);
3712
3713 reverse_words(m, (unsigned long *)m_ints, longwords);
3714 }
3715
3716 void SharedRuntime::montgomery_square(jint *a_ints, jint *n_ints,
3717 jint len, jlong inv,
3718 jint *m_ints) {
3719 assert(len % 2 == 0, "array length in montgomery_square must be even");
3720 int longwords = len/2;
3721
3722 // Make very sure we don't use so much space that the stack might
3723 // overflow. 512 jints corresponds to an 16384-bit integer and
3724 // will use here a total of 6k bytes of stack space.
3725 int total_allocation = longwords * sizeof (unsigned long) * 3;
3726 guarantee(total_allocation <= 8192, "must be");
3727 unsigned long *scratch = (unsigned long *)alloca(total_allocation);
3728
3729 // Local scratch arrays
3730 unsigned long
3731 *a = scratch + 0 * longwords,
3732 *n = scratch + 1 * longwords,
3733 *m = scratch + 2 * longwords;
3734
3735 reverse_words((unsigned long *)a_ints, a, longwords);
3736 reverse_words((unsigned long *)n_ints, n, longwords);
3737
3738 if (len >= MONTGOMERY_SQUARING_THRESHOLD) {
3739 ::montgomery_square(a, n, m, (unsigned long)inv, longwords);
3740 } else {
3741 ::montgomery_multiply(a, a, n, m, (unsigned long)inv, longwords);
3742 }
3743
3744 reverse_words(m, (unsigned long *)m_ints, longwords);
3745 }
3746
3747 #endif // WINDOWS
3748
3749 #ifdef COMPILER2
3750 // This is here instead of runtime_x86_64.cpp because it uses SimpleRuntimeFrame
3751 //
3752 //------------------------------generate_exception_blob---------------------------
3753 // creates exception blob at the end
3754 // Using exception blob, this code is jumped from a compiled method.
3755 // (see emit_exception_handler in x86_64.ad file)
3756 //
3757 // Given an exception pc at a call we call into the runtime for the
3758 // handler in this method. This handler might merely restore state
3759 // (i.e. callee save registers) unwind the frame and jump to the
3760 // exception handler for the nmethod if there is no Java level handler
3761 // for the nmethod.
3762 //
3763 // This code is entered with a jmp.
3764 //
3765 // Arguments:
3766 // rax: exception oop
3767 // rdx: exception pc
3768 //
3769 // Results:
3770 // rax: exception oop
3771 // rdx: exception pc in caller or ???
3772 // destination: exception handler of caller
3773 //
3774 // Note: the exception pc MUST be at a call (precise debug information)
3775 // Registers rax, rdx, rcx, rsi, rdi, r8-r11 are not callee saved.
3776 //
3777
3778 void OptoRuntime::generate_exception_blob() {
3779 assert(!OptoRuntime::is_callee_saved_register(RDX_num), "");
3780 assert(!OptoRuntime::is_callee_saved_register(RAX_num), "");
3781 assert(!OptoRuntime::is_callee_saved_register(RCX_num), "");
3782
3783 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned");
3784
3785 // Allocate space for the code
3786 ResourceMark rm;
3787 // Setup code generation tools
3788 CodeBuffer buffer("exception_blob", 2048, 1024);
3789 MacroAssembler* masm = new MacroAssembler(&buffer);
3790
3791
3792 address start = __ pc();
3793
3794 // Exception pc is 'return address' for stack walker
3795 __ push(rdx);
3796 __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Prolog
3797
3798 // Save callee-saved registers. See x86_64.ad.
3799
3800 // rbp is an implicitly saved callee saved register (i.e., the calling
3801 // convention will save/restore it in the prolog/epilog). Other than that
3802 // there are no callee save registers now that adapter frames are gone.
3803
3804 __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp);
3805
3806 // Store exception in Thread object. We cannot pass any arguments to the
3807 // handle_exception call, since we do not want to make any assumption
3808 // about the size of the frame where the exception happened in.
3809 // c_rarg0 is either rdi (Linux) or rcx (Windows).
3810 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()),rax);
3811 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx);
3812
3813 // This call does all the hard work. It checks if an exception handler
3814 // exists in the method.
3815 // If so, it returns the handler address.
3816 // If not, it prepares for stack-unwinding, restoring the callee-save
3817 // registers of the frame being removed.
3818 //
3819 // address OptoRuntime::handle_exception_C(JavaThread* thread)
3820
3821 // At a method handle call, the stack may not be properly aligned
3822 // when returning with an exception.
3823 address the_pc = __ pc();
3824 __ set_last_Java_frame(noreg, noreg, the_pc);
3825 __ mov(c_rarg0, r15_thread);
3826 __ andptr(rsp, -(StackAlignmentInBytes)); // Align stack
3827 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, OptoRuntime::handle_exception_C)));
3828
3829 // Set an oopmap for the call site. This oopmap will only be used if we
3830 // are unwinding the stack. Hence, all locations will be dead.
3831 // Callee-saved registers will be the same as the frame above (i.e.,
3832 // handle_exception_stub), since they were restored when we got the
3833 // exception.
3834
3835 OopMapSet* oop_maps = new OopMapSet();
3836
3837 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0));
3838
3839 __ reset_last_Java_frame(false);
3840
3841 // Restore callee-saved registers
3842
3843 // rbp is an implicitly saved callee-saved register (i.e., the calling
3844 // convention will save restore it in prolog/epilog) Other than that
3845 // there are no callee save registers now that adapter frames are gone.
3846
3847 __ movptr(rbp, Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt));
3848
3849 __ addptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog
3850 __ pop(rdx); // No need for exception pc anymore
3851
3852 // rax: exception handler
3853
3854 // We have a handler in rax (could be deopt blob).
3855 __ mov(r8, rax);
3856
3857 // Get the exception oop
3858 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset()));
3859 // Get the exception pc in case we are deoptimized
3860 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset()));
3861 #ifdef ASSERT
3862 __ movptr(Address(r15_thread, JavaThread::exception_handler_pc_offset()), (int)NULL_WORD);
3863 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int)NULL_WORD);
3864 #endif
3865 // Clear the exception oop so GC no longer processes it as a root.
3866 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int)NULL_WORD);
3867
3868 // rax: exception oop
3869 // r8: exception handler
3870 // rdx: exception pc
3871 // Jump to handler
3872
3873 __ jmp(r8);
3874
3875 // Make sure all code is generated
3876 masm->flush();
3877
3878 // Set exception blob
3879 _exception_blob = ExceptionBlob::create(&buffer, oop_maps, SimpleRuntimeFrame::framesize >> 1);
3880 }
3881 #endif // COMPILER2