src/cpu/x86/vm/x86_32.ad

@@ -288,11 +288,11 @@
   int size = 0;
   Compile* C = Compile::current();
   if (C->in_24_bit_fp_mode()) {
     size += 6; // fldcw
   }
-  if (C->max_vector_size() > 16) {
+  if (UseVzeroupper) {
     size += 3; // vzeroupper
   }
   return size;
 }
 

@@ -1882,24 +1882,21 @@
         __ lea(rsp, Address(rsp,  8));
       }
     }
   %}
 
-
   enc_class pre_call_resets %{
     // If method sets FPU control word restore it here
     debug_only(int off0 = cbuf.insts_size());
     if (ra_->C->in_24_bit_fp_mode()) {
       MacroAssembler _masm(&cbuf);
       __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
     }
-    if (ra_->C->max_vector_size() > 16) {
       // Clear upper bits of YMM registers when current compiled code uses
       // wide vectors to avoid AVX <-> SSE transition penalty during call.
       MacroAssembler _masm(&cbuf);
       __ vzeroupper();
-    }
     debug_only(int off1 = cbuf.insts_size());
     assert(off1 - off0 == pre_call_resets_size(), "correct size prediction");
   %}
 
   enc_class post_call_FPU %{

@@ -13070,11 +13067,11 @@
   effect(USE meth);
 
   ins_cost(300);
   format %{ "CALL_LEAF_NOFP,runtime " %}
   opcode(0xE8); /* E8 cd */
-  ins_encode(Java_To_Runtime(meth));
+  ins_encode(pre_call_resets, Java_To_Runtime(meth));
   ins_pipe( pipe_slow );
 %}
 
 
 // Return Instruction