src/cpu/x86/vm/vm_version_x86.hpp

*** 289,298 ****
--- 289,299 ----
  
  #define CPU_AVX512BW ((uint64_t)UCONST64(0x100000000)) // enums are limited to 31 bit
  #define CPU_AVX512VL ((uint64_t)UCONST64(0x200000000)) // EVEX instructions with smaller vector length
  #define CPU_SHA ((uint64_t)UCONST64(0x400000000))      // SHA instructions
  #define CPU_FMA ((uint64_t)UCONST64(0x800000000))      // FMA instructions
+ #define CPU_VZEROUPPER ((uint64_t)UCONST64(0x1000000000))      // Vzeroupper instruction
  
    enum Extended_Family {
      // AMD
      CPU_FAMILY_AMD_11H       = 0x11,
      // Intel
*** 466,475 ****
--- 467,477 ----
      if (_cpuid_info.std_cpuid1_ecx.bits.avx != 0 &&
          _cpuid_info.std_cpuid1_ecx.bits.osxsave != 0 &&
          _cpuid_info.xem_xcr0_eax.bits.sse != 0 &&
          _cpuid_info.xem_xcr0_eax.bits.ymm != 0) {
        result |= CPU_AVX;
+       result |= CPU_VZEROUPPER;
        if (_cpuid_info.sef_cpuid7_ebx.bits.avx2 != 0)
          result |= CPU_AVX2;
        if (_cpuid_info.sef_cpuid7_ebx.bits.avx512f != 0 &&
            _cpuid_info.xem_xcr0_eax.bits.opmask != 0 &&
            _cpuid_info.xem_xcr0_eax.bits.zmm512 != 0 &&
*** 603,614 ****
    static bool  is_cpuinfo_segv_addr(address pc) { return _cpuinfo_segv_addr == pc; }
    static void set_cpuinfo_cont_addr(address pc) { _cpuinfo_cont_addr = pc; }
    static address  cpuinfo_cont_addr()           { return _cpuinfo_cont_addr; }
  
    static void clean_cpuFeatures()   { _features = 0; }
!   static void set_avx_cpuFeatures() { _features = (CPU_SSE | CPU_SSE2 | CPU_AVX); }
!   static void set_evex_cpuFeatures() { _features = (CPU_AVX512F | CPU_SSE | CPU_SSE2 ); }
  
  
    // Initialization
    static void initialize();
  
--- 605,634 ----
    static bool  is_cpuinfo_segv_addr(address pc) { return _cpuinfo_segv_addr == pc; }
    static void set_cpuinfo_cont_addr(address pc) { _cpuinfo_cont_addr = pc; }
    static address  cpuinfo_cont_addr()           { return _cpuinfo_cont_addr; }
  
    static void clean_cpuFeatures()   { _features = 0; }
!   static void set_avx_cpuFeatures() {
!     _features = (CPU_SSE | CPU_SSE2 | CPU_AVX | CPU_VZEROUPPER );
!     if( is_intel() ) { // Intel cpus specific settings
!       if ((cpu_family() == 0x06) &&
!           ((extended_cpu_model() == 0x57) ||   // Xeon Phi 3200/5200/7200
!           (extended_cpu_model() == 0x85))) {  // Future Xeon Phi
!         _features &= ~CPU_VZEROUPPER;
!       }
!     }
!   }
!   static void set_evex_cpuFeatures() {
!     _features = (CPU_AVX512F | CPU_SSE | CPU_SSE2 | CPU_VZEROUPPER );
!     if( is_intel() ) { // Intel cpus specific settings
!       if ((cpu_family() == 0x06) &&
!           ((extended_cpu_model() == 0x57) ||   // Xeon Phi 3200/5200/7200
!           (extended_cpu_model() == 0x85))) {  // Future Xeon Phi
!         _features &= ~CPU_VZEROUPPER;
!       }
!     }
!   }
  
  
    // Initialization
    static void initialize();
  
*** 729,738 ****
--- 749,760 ----
    static bool supports_avx512nobw() { return (supports_evex() && !supports_avx512bw()); }
    static bool supports_avx256only() { return (supports_avx2() && !supports_evex()); }
    static bool supports_avxonly()    { return ((supports_avx2() || supports_avx()) && !supports_evex()); }
    static bool supports_sha()        { return (_features & CPU_SHA) != 0; }
    static bool supports_fma()        { return (_features & CPU_FMA) != 0; }
+   static bool supports_vzeroupper() { return (_features & CPU_VZEROUPPER) != 0; }
+ 
    // Intel features
    static bool is_intel_family_core() { return is_intel() &&
                                         extended_cpu_family() == CPU_FAMILY_INTEL_CORE; }
  
    static bool is_intel_tsc_synched_at_init()  {