519 reg_class int_rdx_reg(RDX);
520
521 // Singleton class for RCX int register
522 reg_class int_rdi_reg(RDI);
523
524 // Singleton class for instruction pointer
525 // reg_class ip_reg(RIP);
526
527 %}
528
529 //----------SOURCE BLOCK-------------------------------------------------------
530 // This is a block of C++ code which provides values, functions, and
531 // definitions necessary in the rest of the architecture description
532 source %{
533 #define RELOC_IMM64 Assembler::imm_operand
534 #define RELOC_DISP32 Assembler::disp32_operand
535
536 #define __ _masm.
537
538 static int clear_avx_size() {
539 return (Compile::current()->max_vector_size() > 16) ? 3 : 0; // vzeroupper
540 }
541
542 // !!!!! Special hack to get all types of calls to specify the byte offset
543 // from the start of the call to the point where the return address
544 // will point.
545 int MachCallStaticJavaNode::ret_addr_offset()
546 {
547 int offset = 5; // 5 bytes from start of call to where return address points
548 offset += clear_avx_size();
549 return offset;
550 }
551
552 int MachCallDynamicJavaNode::ret_addr_offset()
553 {
554 int offset = 15; // 15 bytes from start of call to where return address points
555 offset += clear_avx_size();
556 return offset;
557 }
558
559 int MachCallRuntimeNode::ret_addr_offset() {
902 constant_table.set_table_base_offset(constant_table.calculate_table_base_offset());
903 }
904 }
905
906 uint MachPrologNode::size(PhaseRegAlloc* ra_) const
907 {
908 return MachNode::size(ra_); // too many variables; just compute it
909 // the hard way
910 }
911
912 int MachPrologNode::reloc() const
913 {
914 return 0; // a large enough number
915 }
916
917 //=============================================================================
918 #ifndef PRODUCT
919 void MachEpilogNode::format(PhaseRegAlloc* ra_, outputStream* st) const
920 {
921 Compile* C = ra_->C;
922 if (C->max_vector_size() > 16) {
923 st->print("vzeroupper");
924 st->cr(); st->print("\t");
925 }
926
927 int framesize = C->frame_size_in_bytes();
928 assert((framesize & (StackAlignmentInBytes-1)) == 0, "frame size not aligned");
929 // Remove word for return adr already pushed
930 // and RBP
931 framesize -= 2*wordSize;
932
933 if (framesize) {
934 st->print_cr("addq rsp, %d\t# Destroy frame", framesize);
935 st->print("\t");
936 }
937
938 st->print_cr("popq rbp");
939 if (do_polling() && C->is_method_compilation()) {
940 st->print("\t");
941 if (Assembler::is_polling_page_far()) {
942 st->print_cr("movq rscratch1, #polling_page_address\n\t"
943 "testl rax, [rscratch1]\t"
944 "# Safepoint: poll for GC");
945 } else {
946 st->print_cr("testl rax, [rip + #offset_to_poll_page]\t"
947 "# Safepoint: poll for GC");
948 }
949 }
950 }
951 #endif
952
953 void MachEpilogNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const
954 {
955 Compile* C = ra_->C;
956 MacroAssembler _masm(&cbuf);
957
958 if (C->max_vector_size() > 16) {
959 // Clear upper bits of YMM registers when current compiled code uses
960 // wide vectors to avoid AVX <-> SSE transition penalty during call.
961 __ vzeroupper();
962 }
963
964 int framesize = C->frame_size_in_bytes();
965 assert((framesize & (StackAlignmentInBytes-1)) == 0, "frame size not aligned");
966 // Remove word for return adr already pushed
967 // and RBP
968 framesize -= 2*wordSize;
969
970 // Note that VerifyStackAtCalls' Majik cookie does not change the frame size popped here
971
972 if (framesize) {
973 emit_opcode(cbuf, Assembler::REX_W);
974 if (framesize < 0x80) {
975 emit_opcode(cbuf, 0x83); // addq rsp, #framesize
976 emit_rm(cbuf, 0x3, 0x00, RSP_enc);
977 emit_d8(cbuf, framesize);
978 } else {
979 emit_opcode(cbuf, 0x81); // addq rsp, #framesize
980 emit_rm(cbuf, 0x3, 0x00, RSP_enc);
981 emit_d32(cbuf, framesize);
982 }
2075 %{
2076 Register Rrdi = as_Register(RDI_enc); // result register
2077 Register Rrax = as_Register(RAX_enc); // super class
2078 Register Rrcx = as_Register(RCX_enc); // killed
2079 Register Rrsi = as_Register(RSI_enc); // sub class
2080 Label miss;
2081 const bool set_cond_codes = true;
2082
2083 MacroAssembler _masm(&cbuf);
2084 __ check_klass_subtype_slow_path(Rrsi, Rrax, Rrcx, Rrdi,
2085 NULL, &miss,
2086 /*set_cond_codes:*/ true);
2087 if ($primary) {
2088 __ xorptr(Rrdi, Rrdi);
2089 }
2090 __ bind(miss);
2091 %}
2092
2093 enc_class clear_avx %{
2094 debug_only(int off0 = cbuf.insts_size());
2095 if (ra_->C->max_vector_size() > 16) {
2096 // Clear upper bits of YMM registers when current compiled code uses
2097 // wide vectors to avoid AVX <-> SSE transition penalty during call.
2098 MacroAssembler _masm(&cbuf);
2099 __ vzeroupper();
2100 }
2101 debug_only(int off1 = cbuf.insts_size());
2102 assert(off1 - off0 == clear_avx_size(), "correct size prediction");
2103 %}
2104
2105 enc_class Java_To_Runtime(method meth) %{
2106 // No relocation needed
2107 MacroAssembler _masm(&cbuf);
2108 __ mov64(r10, (int64_t) $meth$$method);
2109 __ call(r10);
2110 %}
2111
2112 enc_class Java_To_Interpreter(method meth)
2113 %{
2114 // CALL Java_To_Interpreter
2115 // This is the instruction starting address for relocation info.
2116 cbuf.set_insts_mark();
2117 $$$emit8$primary;
2118 // CALL directly to the runtime
2119 emit_d32_reloc(cbuf,
2120 (int) ($meth$$method - ((intptr_t) cbuf.insts_end()) - 4),
12099 // Call runtime without safepoint
12100 instruct CallLeafDirect(method meth)
12101 %{
12102 match(CallLeaf);
12103 effect(USE meth);
12104
12105 ins_cost(300);
12106 format %{ "call_leaf,runtime " %}
12107 ins_encode(clear_avx, Java_To_Runtime(meth));
12108 ins_pipe(pipe_slow);
12109 %}
12110
12111 // Call runtime without safepoint
12112 instruct CallLeafNoFPDirect(method meth)
12113 %{
12114 match(CallLeafNoFP);
12115 effect(USE meth);
12116
12117 ins_cost(300);
12118 format %{ "call_leaf_nofp,runtime " %}
12119 ins_encode(Java_To_Runtime(meth));
12120 ins_pipe(pipe_slow);
12121 %}
12122
12123 // Return Instruction
12124 // Remove the return address & jump to it.
12125 // Notice: We always emit a nop after a ret to make sure there is room
12126 // for safepoint patching
12127 instruct Ret()
12128 %{
12129 match(Return);
12130
12131 format %{ "ret" %}
12132 opcode(0xC3);
12133 ins_encode(OpcP);
12134 ins_pipe(pipe_jmp);
12135 %}
12136
12137 // Tail Call; Jump from runtime stub to Java code.
12138 // Also known as an 'interprocedural jump'.
12139 // Target of jump will eventually return to caller.
|
519 reg_class int_rdx_reg(RDX);
520
521 // Singleton class for RCX int register
522 reg_class int_rdi_reg(RDI);
523
524 // Singleton class for instruction pointer
525 // reg_class ip_reg(RIP);
526
527 %}
528
529 //----------SOURCE BLOCK-------------------------------------------------------
530 // This is a block of C++ code which provides values, functions, and
531 // definitions necessary in the rest of the architecture description
532 source %{
533 #define RELOC_IMM64 Assembler::imm_operand
534 #define RELOC_DISP32 Assembler::disp32_operand
535
536 #define __ _masm.
537
538 static int clear_avx_size() {
539 return (VM_Version::supports_vzeroupper()) ? 3: 0; // vzeroupper
540 }
541
542 // !!!!! Special hack to get all types of calls to specify the byte offset
543 // from the start of the call to the point where the return address
544 // will point.
545 int MachCallStaticJavaNode::ret_addr_offset()
546 {
547 int offset = 5; // 5 bytes from start of call to where return address points
548 offset += clear_avx_size();
549 return offset;
550 }
551
552 int MachCallDynamicJavaNode::ret_addr_offset()
553 {
554 int offset = 15; // 15 bytes from start of call to where return address points
555 offset += clear_avx_size();
556 return offset;
557 }
558
559 int MachCallRuntimeNode::ret_addr_offset() {
902 constant_table.set_table_base_offset(constant_table.calculate_table_base_offset());
903 }
904 }
905
906 uint MachPrologNode::size(PhaseRegAlloc* ra_) const
907 {
908 return MachNode::size(ra_); // too many variables; just compute it
909 // the hard way
910 }
911
912 int MachPrologNode::reloc() const
913 {
914 return 0; // a large enough number
915 }
916
917 //=============================================================================
918 #ifndef PRODUCT
919 void MachEpilogNode::format(PhaseRegAlloc* ra_, outputStream* st) const
920 {
921 Compile* C = ra_->C;
922 if (VM_Version::supports_vzeroupper()) {
923 st->print("vzeroupper");
924 st->cr(); st->print("\t");
925 }
926
927 int framesize = C->frame_size_in_bytes();
928 assert((framesize & (StackAlignmentInBytes-1)) == 0, "frame size not aligned");
929 // Remove word for return adr already pushed
930 // and RBP
931 framesize -= 2*wordSize;
932
933 if (framesize) {
934 st->print_cr("addq rsp, %d\t# Destroy frame", framesize);
935 st->print("\t");
936 }
937
938 st->print_cr("popq rbp");
939 if (do_polling() && C->is_method_compilation()) {
940 st->print("\t");
941 if (Assembler::is_polling_page_far()) {
942 st->print_cr("movq rscratch1, #polling_page_address\n\t"
943 "testl rax, [rscratch1]\t"
944 "# Safepoint: poll for GC");
945 } else {
946 st->print_cr("testl rax, [rip + #offset_to_poll_page]\t"
947 "# Safepoint: poll for GC");
948 }
949 }
950 }
951 #endif
952
953 void MachEpilogNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const
954 {
955 Compile* C = ra_->C;
956 MacroAssembler _masm(&cbuf);
957
958 // Clear upper bits of YMM registers when current compiled code uses
959 // wide vectors to avoid AVX <-> SSE transition penalty during call.
960 __ vzeroupper();
961
962 int framesize = C->frame_size_in_bytes();
963 assert((framesize & (StackAlignmentInBytes-1)) == 0, "frame size not aligned");
964 // Remove word for return adr already pushed
965 // and RBP
966 framesize -= 2*wordSize;
967
968 // Note that VerifyStackAtCalls' Majik cookie does not change the frame size popped here
969
970 if (framesize) {
971 emit_opcode(cbuf, Assembler::REX_W);
972 if (framesize < 0x80) {
973 emit_opcode(cbuf, 0x83); // addq rsp, #framesize
974 emit_rm(cbuf, 0x3, 0x00, RSP_enc);
975 emit_d8(cbuf, framesize);
976 } else {
977 emit_opcode(cbuf, 0x81); // addq rsp, #framesize
978 emit_rm(cbuf, 0x3, 0x00, RSP_enc);
979 emit_d32(cbuf, framesize);
980 }
2073 %{
2074 Register Rrdi = as_Register(RDI_enc); // result register
2075 Register Rrax = as_Register(RAX_enc); // super class
2076 Register Rrcx = as_Register(RCX_enc); // killed
2077 Register Rrsi = as_Register(RSI_enc); // sub class
2078 Label miss;
2079 const bool set_cond_codes = true;
2080
2081 MacroAssembler _masm(&cbuf);
2082 __ check_klass_subtype_slow_path(Rrsi, Rrax, Rrcx, Rrdi,
2083 NULL, &miss,
2084 /*set_cond_codes:*/ true);
2085 if ($primary) {
2086 __ xorptr(Rrdi, Rrdi);
2087 }
2088 __ bind(miss);
2089 %}
2090
2091 enc_class clear_avx %{
2092 debug_only(int off0 = cbuf.insts_size());
2093 // Clear upper bits of YMM registers to avoid AVX <-> SSE transition penalty
2094 // Clear upper bits of YMM registers when current compiled code uses
2095 // wide vectors to avoid AVX <-> SSE transition penalty during call.
2096 MacroAssembler _masm(&cbuf);
2097 __ vzeroupper();
2098 debug_only(int off1 = cbuf.insts_size());
2099 assert(off1 - off0 == clear_avx_size(), "correct size prediction");
2100 %}
2101
2102 enc_class Java_To_Runtime(method meth) %{
2103 // No relocation needed
2104 MacroAssembler _masm(&cbuf);
2105 __ mov64(r10, (int64_t) $meth$$method);
2106 __ call(r10);
2107 %}
2108
2109 enc_class Java_To_Interpreter(method meth)
2110 %{
2111 // CALL Java_To_Interpreter
2112 // This is the instruction starting address for relocation info.
2113 cbuf.set_insts_mark();
2114 $$$emit8$primary;
2115 // CALL directly to the runtime
2116 emit_d32_reloc(cbuf,
2117 (int) ($meth$$method - ((intptr_t) cbuf.insts_end()) - 4),
12096 // Call runtime without safepoint
12097 instruct CallLeafDirect(method meth)
12098 %{
12099 match(CallLeaf);
12100 effect(USE meth);
12101
12102 ins_cost(300);
12103 format %{ "call_leaf,runtime " %}
12104 ins_encode(clear_avx, Java_To_Runtime(meth));
12105 ins_pipe(pipe_slow);
12106 %}
12107
12108 // Call runtime without safepoint
12109 instruct CallLeafNoFPDirect(method meth)
12110 %{
12111 match(CallLeafNoFP);
12112 effect(USE meth);
12113
12114 ins_cost(300);
12115 format %{ "call_leaf_nofp,runtime " %}
12116 ins_encode(clear_avx, Java_To_Runtime(meth));
12117 ins_pipe(pipe_slow);
12118 %}
12119
12120 // Return Instruction
12121 // Remove the return address & jump to it.
12122 // Notice: We always emit a nop after a ret to make sure there is room
12123 // for safepoint patching
12124 instruct Ret()
12125 %{
12126 match(Return);
12127
12128 format %{ "ret" %}
12129 opcode(0xC3);
12130 ins_encode(OpcP);
12131 ins_pipe(pipe_jmp);
12132 %}
12133
12134 // Tail Call; Jump from runtime stub to Java code.
12135 // Also known as an 'interprocedural jump'.
12136 // Target of jump will eventually return to caller.
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