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src/hotspot/cpu/x86/assembler_x86.hpp

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1651   void pinsrb(XMMRegister dst, Address src, int imm8);
1652   // SSE 2 insert
1653   void pinsrw(XMMRegister dst, Register src, int imm8);
1654   void pinsrw(XMMRegister dst, Address src, int imm8);
1655 
1656   // SSE4.1 packed move
1657   void pmovzxbw(XMMRegister dst, XMMRegister src);
1658   void pmovzxbw(XMMRegister dst, Address src);
1659 
1660   void vpmovzxbw( XMMRegister dst, Address src, int vector_len);
1661   void vpmovzxbw(XMMRegister dst, XMMRegister src, int vector_len);
1662   void evpmovzxbw(XMMRegister dst, KRegister mask, Address src, int vector_len);
1663 
1664   void evpmovwb(Address dst, XMMRegister src, int vector_len);
1665   void evpmovwb(Address dst, KRegister mask, XMMRegister src, int vector_len);
1666 
1667   void vpmovzxwd(XMMRegister dst, XMMRegister src, int vector_len);
1668 
1669   void evpmovdb(Address dst, XMMRegister src, int vector_len);
1670 






1671 #ifndef _LP64 // no 32bit push/pop on amd64
1672   void popl(Address dst);
1673 #endif
1674 
1675 #ifdef _LP64
1676   void popq(Address dst);
1677 #endif
1678 
1679   void popcntl(Register dst, Address src);
1680   void popcntl(Register dst, Register src);
1681 
1682   void vpopcntd(XMMRegister dst, XMMRegister src, int vector_len);
1683 
1684 #ifdef _LP64
1685   void popcntq(Register dst, Address src);
1686   void popcntq(Register dst, Register src);
1687 #endif
1688 
1689   // Prefetches (SSE, SSE2, 3DNOW only)
1690 




1651   void pinsrb(XMMRegister dst, Address src, int imm8);
1652   // SSE 2 insert
1653   void pinsrw(XMMRegister dst, Register src, int imm8);
1654   void pinsrw(XMMRegister dst, Address src, int imm8);
1655 
1656   // SSE4.1 packed move
1657   void pmovzxbw(XMMRegister dst, XMMRegister src);
1658   void pmovzxbw(XMMRegister dst, Address src);
1659 
1660   void vpmovzxbw( XMMRegister dst, Address src, int vector_len);
1661   void vpmovzxbw(XMMRegister dst, XMMRegister src, int vector_len);
1662   void evpmovzxbw(XMMRegister dst, KRegister mask, Address src, int vector_len);
1663 
1664   void evpmovwb(Address dst, XMMRegister src, int vector_len);
1665   void evpmovwb(Address dst, KRegister mask, XMMRegister src, int vector_len);
1666 
1667   void vpmovzxwd(XMMRegister dst, XMMRegister src, int vector_len);
1668 
1669   void evpmovdb(Address dst, XMMRegister src, int vector_len);
1670 
1671   // Multiply add
1672   void pmaddwd(XMMRegister dst, XMMRegister src);
1673   void vpmaddwd(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1674   // Multiply add accumulate
1675   void evpdpwssd(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
1676 
1677 #ifndef _LP64 // no 32bit push/pop on amd64
1678   void popl(Address dst);
1679 #endif
1680 
1681 #ifdef _LP64
1682   void popq(Address dst);
1683 #endif
1684 
1685   void popcntl(Register dst, Address src);
1686   void popcntl(Register dst, Register src);
1687 
1688   void vpopcntd(XMMRegister dst, XMMRegister src, int vector_len);
1689 
1690 #ifdef _LP64
1691   void popcntq(Register dst, Address src);
1692   void popcntq(Register dst, Register src);
1693 #endif
1694 
1695   // Prefetches (SSE, SSE2, 3DNOW only)
1696 


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