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src/hotspot/cpu/x86/x86.ad

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9919   match(Set dst (MulAddVS2VI src1 src2));
9920   format %{ "vpmaddwd $dst,$src1,$src2\t! muladd packed32Sto16I" %}
9921   ins_encode %{
9922     int vector_len = 2;
9923     __ vpmaddwd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector_len);
9924   %}
9925   ins_pipe( pipe_slow );
9926 %}
9927 
9928 // --------------------------------- Vector Multiply Add Add ----------------------------------
9929 
9930 instruct vmuladdadd4S2I_reg(vecD dst, vecD src1, vecD src2) %{
9931   predicate(VM_Version::supports_vnni() && UseAVX > 2 && n->as_Vector()->length() == 2);
9932   match(Set dst (AddVI (MulAddVS2VI src1 src2) dst));
9933   format %{ "evpdpwssd $dst,$src1,$src2\t! muladdadd packed4Sto2I" %}
9934   ins_encode %{
9935     int vector_len = 0;
9936     __ evpdpwssd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector_len);
9937   %}
9938   ins_pipe( pipe_slow );

9939 %}
9940 
9941 instruct vmuladdadd8S4I_reg(vecX dst, vecX src1, vecX src2) %{
9942   predicate(VM_Version::supports_vnni() && UseAVX > 2 && n->as_Vector()->length() == 4);
9943   match(Set dst (AddVI (MulAddVS2VI src1 src2) dst));
9944   format %{ "evpdpwssd $dst,$src1,$src2\t! muladdadd packed8Sto4I" %}
9945   ins_encode %{
9946     int vector_len = 0;
9947     __ evpdpwssd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector_len);
9948   %}
9949   ins_pipe( pipe_slow );

9950 %}
9951 
9952 instruct vmuladdadd16S8I_reg(vecY dst, vecY src1, vecY src2) %{
9953   predicate(VM_Version::supports_vnni() && UseAVX > 2 && n->as_Vector()->length() == 8);
9954   match(Set dst (AddVI (MulAddVS2VI src1 src2) dst));
9955   format %{ "evpdpwssd $dst,$src1,$src2\t! muladdadd packed16Sto8I" %}
9956   ins_encode %{
9957     int vector_len = 1;
9958     __ evpdpwssd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector_len);
9959   %}
9960   ins_pipe( pipe_slow );

9961 %}
9962 
9963 instruct vmuladdadd32S16I_reg(vecZ dst, vecZ src1, vecZ src2) %{
9964   predicate(VM_Version::supports_vnni() && UseAVX > 2 && n->as_Vector()->length() == 16);
9965   match(Set dst (AddVI (MulAddVS2VI src1 src2) dst));
9966   format %{ "evpdpwssd $dst,$src1,$src2\t! muladdadd packed32Sto16I" %}
9967   ins_encode %{
9968     int vector_len = 2;
9969     __ evpdpwssd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector_len);
9970   %}
9971   ins_pipe( pipe_slow );

9972 %}
9973 
9974 // --------------------------------- PopCount --------------------------------------
9975 
9976 instruct vpopcount2I(vecD dst, vecD src) %{
9977   predicate(VM_Version::supports_vpopcntdq() && UsePopCountInstruction && n->as_Vector()->length() == 2);
9978   match(Set dst (PopCountVI src));
9979   format %{ "vpopcntd  $dst,$src\t! vector popcount packed2I" %}
9980   ins_encode %{
9981     int vector_len = 0;
9982     __ vpopcntd($dst$$XMMRegister, $src$$XMMRegister, vector_len);
9983   %}
9984   ins_pipe( pipe_slow );
9985 %}
9986 
9987 instruct vpopcount4I(vecX dst, vecX src) %{
9988   predicate(VM_Version::supports_vpopcntdq() && UsePopCountInstruction && n->as_Vector()->length() == 4);
9989   match(Set dst (PopCountVI src));
9990   format %{ "vpopcntd  $dst,$src\t! vector popcount packed4I" %}
9991   ins_encode %{




9919   match(Set dst (MulAddVS2VI src1 src2));
9920   format %{ "vpmaddwd $dst,$src1,$src2\t! muladd packed32Sto16I" %}
9921   ins_encode %{
9922     int vector_len = 2;
9923     __ vpmaddwd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector_len);
9924   %}
9925   ins_pipe( pipe_slow );
9926 %}
9927 
9928 // --------------------------------- Vector Multiply Add Add ----------------------------------
9929 
9930 instruct vmuladdadd4S2I_reg(vecD dst, vecD src1, vecD src2) %{
9931   predicate(VM_Version::supports_vnni() && UseAVX > 2 && n->as_Vector()->length() == 2);
9932   match(Set dst (AddVI (MulAddVS2VI src1 src2) dst));
9933   format %{ "evpdpwssd $dst,$src1,$src2\t! muladdadd packed4Sto2I" %}
9934   ins_encode %{
9935     int vector_len = 0;
9936     __ evpdpwssd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector_len);
9937   %}
9938   ins_pipe( pipe_slow );
9939   ins_cost(10);
9940 %}
9941 
9942 instruct vmuladdadd8S4I_reg(vecX dst, vecX src1, vecX src2) %{
9943   predicate(VM_Version::supports_vnni() && UseAVX > 2 && n->as_Vector()->length() == 4);
9944   match(Set dst (AddVI (MulAddVS2VI src1 src2) dst));
9945   format %{ "evpdpwssd $dst,$src1,$src2\t! muladdadd packed8Sto4I" %}
9946   ins_encode %{
9947     int vector_len = 0;
9948     __ evpdpwssd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector_len);
9949   %}
9950   ins_pipe( pipe_slow );
9951   ins_cost(10);
9952 %}
9953 
9954 instruct vmuladdadd16S8I_reg(vecY dst, vecY src1, vecY src2) %{
9955   predicate(VM_Version::supports_vnni() && UseAVX > 2 && n->as_Vector()->length() == 8);
9956   match(Set dst (AddVI (MulAddVS2VI src1 src2) dst));
9957   format %{ "evpdpwssd $dst,$src1,$src2\t! muladdadd packed16Sto8I" %}
9958   ins_encode %{
9959     int vector_len = 1;
9960     __ evpdpwssd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector_len);
9961   %}
9962   ins_pipe( pipe_slow );
9963   ins_cost(10);
9964 %}
9965 
9966 instruct vmuladdadd32S16I_reg(vecZ dst, vecZ src1, vecZ src2) %{
9967   predicate(VM_Version::supports_vnni() && UseAVX > 2 && n->as_Vector()->length() == 16);
9968   match(Set dst (AddVI (MulAddVS2VI src1 src2) dst));
9969   format %{ "evpdpwssd $dst,$src1,$src2\t! muladdadd packed32Sto16I" %}
9970   ins_encode %{
9971     int vector_len = 2;
9972     __ evpdpwssd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector_len);
9973   %}
9974   ins_pipe( pipe_slow );
9975   ins_cost(10);
9976 %}
9977 
9978 // --------------------------------- PopCount --------------------------------------
9979 
9980 instruct vpopcount2I(vecD dst, vecD src) %{
9981   predicate(VM_Version::supports_vpopcntdq() && UsePopCountInstruction && n->as_Vector()->length() == 2);
9982   match(Set dst (PopCountVI src));
9983   format %{ "vpopcntd  $dst,$src\t! vector popcount packed2I" %}
9984   ins_encode %{
9985     int vector_len = 0;
9986     __ vpopcntd($dst$$XMMRegister, $src$$XMMRegister, vector_len);
9987   %}
9988   ins_pipe( pipe_slow );
9989 %}
9990 
9991 instruct vpopcount4I(vecX dst, vecX src) %{
9992   predicate(VM_Version::supports_vpopcntdq() && UsePopCountInstruction && n->as_Vector()->length() == 4);
9993   match(Set dst (PopCountVI src));
9994   format %{ "vpopcntd  $dst,$src\t! vector popcount packed4I" %}
9995   ins_encode %{


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