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src/cpu/x86/vm/macroAssembler_x86.hpp
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*** 445,462 ****
// same as fcmp2int, but using SSE2
void cmpss2int(XMMRegister opr1, XMMRegister opr2, Register dst, bool unordered_is_less);
void cmpsd2int(XMMRegister opr1, XMMRegister opr2, Register dst, bool unordered_is_less);
! // Inlined sin/cos generator for Java; must not use CPU instruction
! // directly on Intel as it does not have high enough precision
! // outside of the range [-pi/4, pi/4]. Extra argument indicate the
! // number of FPU stack slots in use; all but the topmost will
! // require saving if a slow case is necessary. Assumes argument is
! // on FP TOS; result is on FP TOS. No cpu registers are changed by
! // this code.
! void trigfunc(char trig, int num_fpu_regs_in_use = 1);
// branch to L if FPU flag C2 is set/not set
// tmp is a temporary register, if none is available use noreg
void jC2 (Register tmp, Label& L);
void jnC2(Register tmp, Label& L);
--- 445,455 ----
// same as fcmp2int, but using SSE2
void cmpss2int(XMMRegister opr1, XMMRegister opr2, Register dst, bool unordered_is_less);
void cmpsd2int(XMMRegister opr1, XMMRegister opr2, Register dst, bool unordered_is_less);
! void mathfunc(address runtime_entry);
// branch to L if FPU flag C2 is set/not set
// tmp is a temporary register, if none is available use noreg
void jC2 (Register tmp, Label& L);
void jnC2(Register tmp, Label& L);
*** 989,1001 ****
void increase_precision();
void restore_precision();
private:
- // call runtime as a fallback for trig functions and pow/exp.
- void fp_runtime_fallback(address runtime_entry, int nb_args, int num_fpu_regs_in_use);
-
// these are private because users should be doing movflt/movdbl
void movss(Address dst, XMMRegister src) { Assembler::movss(dst, src); }
void movss(XMMRegister dst, XMMRegister src) { Assembler::movss(dst, src); }
void movss(XMMRegister dst, Address src) { Assembler::movss(dst, src); }
--- 982,991 ----
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