1 /* 2 * Copyright (c) 2005, 2016, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #include "precompiled.hpp" 26 #include "c1/c1_Compilation.hpp" 27 #include "c1/c1_FrameMap.hpp" 28 #include "c1/c1_Instruction.hpp" 29 #include "c1/c1_LIRAssembler.hpp" 30 #include "c1/c1_LIRGenerator.hpp" 31 #include "c1/c1_Runtime1.hpp" 32 #include "c1/c1_ValueStack.hpp" 33 #include "ci/ciArray.hpp" 34 #include "ci/ciObjArrayKlass.hpp" 35 #include "ci/ciTypeArrayKlass.hpp" 36 #include "runtime/sharedRuntime.hpp" 37 #include "runtime/stubRoutines.hpp" 38 #include "vmreg_x86.inline.hpp" 39 40 #ifdef ASSERT 41 #define __ gen()->lir(__FILE__, __LINE__)-> 42 #else 43 #define __ gen()->lir()-> 44 #endif 45 46 // Item will be loaded into a byte register; Intel only 47 void LIRItem::load_byte_item() { 48 load_item(); 49 LIR_Opr res = result(); 50 51 if (!res->is_virtual() || !_gen->is_vreg_flag_set(res, LIRGenerator::byte_reg)) { 52 // make sure that it is a byte register 53 assert(!value()->type()->is_float() && !value()->type()->is_double(), 54 "can't load floats in byte register"); 55 LIR_Opr reg = _gen->rlock_byte(T_BYTE); 56 __ move(res, reg); 57 58 _result = reg; 59 } 60 } 61 62 63 void LIRItem::load_nonconstant() { 64 LIR_Opr r = value()->operand(); 65 if (r->is_constant()) { 66 _result = r; 67 } else { 68 load_item(); 69 } 70 } 71 72 //-------------------------------------------------------------- 73 // LIRGenerator 74 //-------------------------------------------------------------- 75 76 77 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::rax_oop_opr; } 78 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::rdx_opr; } 79 LIR_Opr LIRGenerator::divInOpr() { return FrameMap::rax_opr; } 80 LIR_Opr LIRGenerator::divOutOpr() { return FrameMap::rax_opr; } 81 LIR_Opr LIRGenerator::remOutOpr() { return FrameMap::rdx_opr; } 82 LIR_Opr LIRGenerator::shiftCountOpr() { return FrameMap::rcx_opr; } 83 LIR_Opr LIRGenerator::syncLockOpr() { return new_register(T_INT); } 84 LIR_Opr LIRGenerator::syncTempOpr() { return FrameMap::rax_opr; } 85 LIR_Opr LIRGenerator::getThreadTemp() { return LIR_OprFact::illegalOpr; } 86 87 88 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) { 89 LIR_Opr opr; 90 switch (type->tag()) { 91 case intTag: opr = FrameMap::rax_opr; break; 92 case objectTag: opr = FrameMap::rax_oop_opr; break; 93 case longTag: opr = FrameMap::long0_opr; break; 94 case floatTag: opr = UseSSE >= 1 ? FrameMap::xmm0_float_opr : FrameMap::fpu0_float_opr; break; 95 case doubleTag: opr = UseSSE >= 2 ? FrameMap::xmm0_double_opr : FrameMap::fpu0_double_opr; break; 96 97 case addressTag: 98 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr; 99 } 100 101 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch"); 102 return opr; 103 } 104 105 106 LIR_Opr LIRGenerator::rlock_byte(BasicType type) { 107 LIR_Opr reg = new_register(T_INT); 108 set_vreg_flag(reg, LIRGenerator::byte_reg); 109 return reg; 110 } 111 112 113 //--------- loading items into registers -------------------------------- 114 115 116 // i486 instructions can inline constants 117 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const { 118 if (type == T_SHORT || type == T_CHAR) { 119 // there is no immediate move of word values in asembler_i486.?pp 120 return false; 121 } 122 Constant* c = v->as_Constant(); 123 if (c && c->state_before() == NULL) { 124 // constants of any type can be stored directly, except for 125 // unloaded object constants. 126 return true; 127 } 128 return false; 129 } 130 131 132 bool LIRGenerator::can_inline_as_constant(Value v) const { 133 if (v->type()->tag() == longTag) return false; 134 return v->type()->tag() != objectTag || 135 (v->type()->is_constant() && v->type()->as_ObjectType()->constant_value()->is_null_object()); 136 } 137 138 139 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const { 140 if (c->type() == T_LONG) return false; 141 return c->type() != T_OBJECT || c->as_jobject() == NULL; 142 } 143 144 145 LIR_Opr LIRGenerator::safepoint_poll_register() { 146 return LIR_OprFact::illegalOpr; 147 } 148 149 150 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index, 151 int shift, int disp, BasicType type) { 152 assert(base->is_register(), "must be"); 153 if (index->is_constant()) { 154 return new LIR_Address(base, 155 (index->as_constant_ptr()->as_jint() << shift) + disp, 156 type); 157 } else { 158 return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type); 159 } 160 } 161 162 163 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr, 164 BasicType type, bool needs_card_mark) { 165 int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type); 166 167 LIR_Address* addr; 168 if (index_opr->is_constant()) { 169 int elem_size = type2aelembytes(type); 170 addr = new LIR_Address(array_opr, 171 offset_in_bytes + index_opr->as_jint() * elem_size, type); 172 } else { 173 #ifdef _LP64 174 if (index_opr->type() == T_INT) { 175 LIR_Opr tmp = new_register(T_LONG); 176 __ convert(Bytecodes::_i2l, index_opr, tmp); 177 index_opr = tmp; 178 } 179 #endif // _LP64 180 addr = new LIR_Address(array_opr, 181 index_opr, 182 LIR_Address::scale(type), 183 offset_in_bytes, type); 184 } 185 if (needs_card_mark) { 186 // This store will need a precise card mark, so go ahead and 187 // compute the full adddres instead of computing once for the 188 // store and again for the card mark. 189 LIR_Opr tmp = new_pointer_register(); 190 __ leal(LIR_OprFact::address(addr), tmp); 191 return new LIR_Address(tmp, type); 192 } else { 193 return addr; 194 } 195 } 196 197 198 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) { 199 LIR_Opr r = NULL; 200 if (type == T_LONG) { 201 r = LIR_OprFact::longConst(x); 202 } else if (type == T_INT) { 203 r = LIR_OprFact::intConst(x); 204 } else { 205 ShouldNotReachHere(); 206 } 207 return r; 208 } 209 210 void LIRGenerator::increment_counter(address counter, BasicType type, int step) { 211 LIR_Opr pointer = new_pointer_register(); 212 __ move(LIR_OprFact::intptrConst(counter), pointer); 213 LIR_Address* addr = new LIR_Address(pointer, type); 214 increment_counter(addr, step); 215 } 216 217 218 void LIRGenerator::increment_counter(LIR_Address* addr, int step) { 219 __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr); 220 } 221 222 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) { 223 __ cmp_mem_int(condition, base, disp, c, info); 224 } 225 226 227 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) { 228 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info); 229 } 230 231 232 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, LIR_Opr disp, BasicType type, CodeEmitInfo* info) { 233 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info); 234 } 235 236 237 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) { 238 if (tmp->is_valid()) { 239 if (is_power_of_2(c + 1)) { 240 __ move(left, tmp); 241 __ shift_left(left, log2_intptr(c + 1), left); 242 __ sub(left, tmp, result); 243 return true; 244 } else if (is_power_of_2(c - 1)) { 245 __ move(left, tmp); 246 __ shift_left(left, log2_intptr(c - 1), left); 247 __ add(left, tmp, result); 248 return true; 249 } 250 } 251 return false; 252 } 253 254 255 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) { 256 BasicType type = item->type(); 257 __ store(item, new LIR_Address(FrameMap::rsp_opr, in_bytes(offset_from_sp), type)); 258 } 259 260 //---------------------------------------------------------------------- 261 // visitor functions 262 //---------------------------------------------------------------------- 263 264 265 void LIRGenerator::do_StoreIndexed(StoreIndexed* x) { 266 assert(x->is_pinned(),""); 267 bool needs_range_check = x->compute_needs_range_check(); 268 bool use_length = x->length() != NULL; 269 bool obj_store = x->elt_type() == T_ARRAY || x->elt_type() == T_OBJECT; 270 bool needs_store_check = obj_store && (x->value()->as_Constant() == NULL || 271 !get_jobject_constant(x->value())->is_null_object() || 272 x->should_profile()); 273 274 LIRItem array(x->array(), this); 275 LIRItem index(x->index(), this); 276 LIRItem value(x->value(), this); 277 LIRItem length(this); 278 279 array.load_item(); 280 index.load_nonconstant(); 281 282 if (use_length && needs_range_check) { 283 length.set_instruction(x->length()); 284 length.load_item(); 285 286 } 287 if (needs_store_check || x->check_boolean()) { 288 value.load_item(); 289 } else { 290 value.load_for_store(x->elt_type()); 291 } 292 293 set_no_result(x); 294 295 // the CodeEmitInfo must be duplicated for each different 296 // LIR-instruction because spilling can occur anywhere between two 297 // instructions and so the debug information must be different 298 CodeEmitInfo* range_check_info = state_for(x); 299 CodeEmitInfo* null_check_info = NULL; 300 if (x->needs_null_check()) { 301 null_check_info = new CodeEmitInfo(range_check_info); 302 } 303 304 // emit array address setup early so it schedules better 305 LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), obj_store); 306 307 if (GenerateRangeChecks && needs_range_check) { 308 if (use_length) { 309 __ cmp(lir_cond_belowEqual, length.result(), index.result()); 310 __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result())); 311 } else { 312 array_range_check(array.result(), index.result(), null_check_info, range_check_info); 313 // range_check also does the null check 314 null_check_info = NULL; 315 } 316 } 317 318 if (GenerateArrayStoreCheck && needs_store_check) { 319 LIR_Opr tmp1 = new_register(objectType); 320 LIR_Opr tmp2 = new_register(objectType); 321 LIR_Opr tmp3 = new_register(objectType); 322 323 CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info); 324 __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3, store_check_info, x->profiled_method(), x->profiled_bci()); 325 } 326 327 if (obj_store) { 328 // Needs GC write barriers. 329 pre_barrier(LIR_OprFact::address(array_addr), LIR_OprFact::illegalOpr /* pre_val */, 330 true /* do_load */, false /* patch */, NULL); 331 __ move(value.result(), array_addr, null_check_info); 332 // Seems to be a precise 333 post_barrier(LIR_OprFact::address(array_addr), value.result()); 334 } else { 335 LIR_Opr result = maybe_mask_boolean(x, array.result(), value.result(), null_check_info); 336 __ move(result, array_addr, null_check_info); 337 } 338 } 339 340 341 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) { 342 assert(x->is_pinned(),""); 343 LIRItem obj(x->obj(), this); 344 obj.load_item(); 345 346 set_no_result(x); 347 348 // "lock" stores the address of the monitor stack slot, so this is not an oop 349 LIR_Opr lock = new_register(T_INT); 350 // Need a scratch register for biased locking on x86 351 LIR_Opr scratch = LIR_OprFact::illegalOpr; 352 if (UseBiasedLocking) { 353 scratch = new_register(T_INT); 354 } 355 356 CodeEmitInfo* info_for_exception = NULL; 357 if (x->needs_null_check()) { 358 info_for_exception = state_for(x); 359 } 360 // this CodeEmitInfo must not have the xhandlers because here the 361 // object is already locked (xhandlers expect object to be unlocked) 362 CodeEmitInfo* info = state_for(x, x->state(), true); 363 monitor_enter(obj.result(), lock, syncTempOpr(), scratch, 364 x->monitor_no(), info_for_exception, info); 365 } 366 367 368 void LIRGenerator::do_MonitorExit(MonitorExit* x) { 369 assert(x->is_pinned(),""); 370 371 LIRItem obj(x->obj(), this); 372 obj.dont_load_item(); 373 374 LIR_Opr lock = new_register(T_INT); 375 LIR_Opr obj_temp = new_register(T_INT); 376 set_no_result(x); 377 monitor_exit(obj_temp, lock, syncTempOpr(), LIR_OprFact::illegalOpr, x->monitor_no()); 378 } 379 380 381 // _ineg, _lneg, _fneg, _dneg 382 void LIRGenerator::do_NegateOp(NegateOp* x) { 383 LIRItem value(x->x(), this); 384 value.set_destroys_register(); 385 value.load_item(); 386 LIR_Opr reg = rlock(x); 387 __ negate(value.result(), reg); 388 389 set_result(x, round_item(reg)); 390 } 391 392 393 // for _fadd, _fmul, _fsub, _fdiv, _frem 394 // _dadd, _dmul, _dsub, _ddiv, _drem 395 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) { 396 LIRItem left(x->x(), this); 397 LIRItem right(x->y(), this); 398 LIRItem* left_arg = &left; 399 LIRItem* right_arg = &right; 400 assert(!left.is_stack() || !right.is_stack(), "can't both be memory operands"); 401 bool must_load_both = (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem); 402 if (left.is_register() || x->x()->type()->is_constant() || must_load_both) { 403 left.load_item(); 404 } else { 405 left.dont_load_item(); 406 } 407 408 // do not load right operand if it is a constant. only 0 and 1 are 409 // loaded because there are special instructions for loading them 410 // without memory access (not needed for SSE2 instructions) 411 bool must_load_right = false; 412 if (right.is_constant()) { 413 LIR_Const* c = right.result()->as_constant_ptr(); 414 assert(c != NULL, "invalid constant"); 415 assert(c->type() == T_FLOAT || c->type() == T_DOUBLE, "invalid type"); 416 417 if (c->type() == T_FLOAT) { 418 must_load_right = UseSSE < 1 && (c->is_one_float() || c->is_zero_float()); 419 } else { 420 must_load_right = UseSSE < 2 && (c->is_one_double() || c->is_zero_double()); 421 } 422 } 423 424 if (must_load_both) { 425 // frem and drem destroy also right operand, so move it to a new register 426 right.set_destroys_register(); 427 right.load_item(); 428 } else if (right.is_register() || must_load_right) { 429 right.load_item(); 430 } else { 431 right.dont_load_item(); 432 } 433 LIR_Opr reg = rlock(x); 434 LIR_Opr tmp = LIR_OprFact::illegalOpr; 435 if (x->is_strictfp() && (x->op() == Bytecodes::_dmul || x->op() == Bytecodes::_ddiv)) { 436 tmp = new_register(T_DOUBLE); 437 } 438 439 if ((UseSSE >= 1 && x->op() == Bytecodes::_frem) || (UseSSE >= 2 && x->op() == Bytecodes::_drem)) { 440 // special handling for frem and drem: no SSE instruction, so must use FPU with temporary fpu stack slots 441 LIR_Opr fpu0, fpu1; 442 if (x->op() == Bytecodes::_frem) { 443 fpu0 = LIR_OprFact::single_fpu(0); 444 fpu1 = LIR_OprFact::single_fpu(1); 445 } else { 446 fpu0 = LIR_OprFact::double_fpu(0); 447 fpu1 = LIR_OprFact::double_fpu(1); 448 } 449 __ move(right.result(), fpu1); // order of left and right operand is important! 450 __ move(left.result(), fpu0); 451 __ rem (fpu0, fpu1, fpu0); 452 __ move(fpu0, reg); 453 454 } else { 455 arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), x->is_strictfp(), tmp); 456 } 457 458 set_result(x, round_item(reg)); 459 } 460 461 462 // for _ladd, _lmul, _lsub, _ldiv, _lrem 463 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) { 464 if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem ) { 465 // long division is implemented as a direct call into the runtime 466 LIRItem left(x->x(), this); 467 LIRItem right(x->y(), this); 468 469 // the check for division by zero destroys the right operand 470 right.set_destroys_register(); 471 472 BasicTypeList signature(2); 473 signature.append(T_LONG); 474 signature.append(T_LONG); 475 CallingConvention* cc = frame_map()->c_calling_convention(&signature); 476 477 // check for division by zero (destroys registers of right operand!) 478 CodeEmitInfo* info = state_for(x); 479 480 const LIR_Opr result_reg = result_register_for(x->type()); 481 left.load_item_force(cc->at(1)); 482 right.load_item(); 483 484 __ move(right.result(), cc->at(0)); 485 486 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0)); 487 __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(info)); 488 489 address entry = NULL; 490 switch (x->op()) { 491 case Bytecodes::_lrem: 492 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem); 493 break; // check if dividend is 0 is done elsewhere 494 case Bytecodes::_ldiv: 495 entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv); 496 break; // check if dividend is 0 is done elsewhere 497 case Bytecodes::_lmul: 498 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lmul); 499 break; 500 default: 501 ShouldNotReachHere(); 502 } 503 504 LIR_Opr result = rlock_result(x); 505 __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args()); 506 __ move(result_reg, result); 507 } else if (x->op() == Bytecodes::_lmul) { 508 // missing test if instr is commutative and if we should swap 509 LIRItem left(x->x(), this); 510 LIRItem right(x->y(), this); 511 512 // right register is destroyed by the long mul, so it must be 513 // copied to a new register. 514 right.set_destroys_register(); 515 516 left.load_item(); 517 right.load_item(); 518 519 LIR_Opr reg = FrameMap::long0_opr; 520 arithmetic_op_long(x->op(), reg, left.result(), right.result(), NULL); 521 LIR_Opr result = rlock_result(x); 522 __ move(reg, result); 523 } else { 524 // missing test if instr is commutative and if we should swap 525 LIRItem left(x->x(), this); 526 LIRItem right(x->y(), this); 527 528 left.load_item(); 529 // don't load constants to save register 530 right.load_nonconstant(); 531 rlock_result(x); 532 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL); 533 } 534 } 535 536 537 538 // for: _iadd, _imul, _isub, _idiv, _irem 539 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) { 540 if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) { 541 // The requirements for division and modulo 542 // input : rax,: dividend min_int 543 // reg: divisor (may not be rax,/rdx) -1 544 // 545 // output: rax,: quotient (= rax, idiv reg) min_int 546 // rdx: remainder (= rax, irem reg) 0 547 548 // rax, and rdx will be destroyed 549 550 // Note: does this invalidate the spec ??? 551 LIRItem right(x->y(), this); 552 LIRItem left(x->x() , this); // visit left second, so that the is_register test is valid 553 554 // call state_for before load_item_force because state_for may 555 // force the evaluation of other instructions that are needed for 556 // correct debug info. Otherwise the live range of the fix 557 // register might be too long. 558 CodeEmitInfo* info = state_for(x); 559 560 left.load_item_force(divInOpr()); 561 562 right.load_item(); 563 564 LIR_Opr result = rlock_result(x); 565 LIR_Opr result_reg; 566 if (x->op() == Bytecodes::_idiv) { 567 result_reg = divOutOpr(); 568 } else { 569 result_reg = remOutOpr(); 570 } 571 572 if (!ImplicitDiv0Checks) { 573 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0)); 574 __ branch(lir_cond_equal, T_INT, new DivByZeroStub(info)); 575 } 576 LIR_Opr tmp = FrameMap::rdx_opr; // idiv and irem use rdx in their implementation 577 if (x->op() == Bytecodes::_irem) { 578 __ irem(left.result(), right.result(), result_reg, tmp, info); 579 } else if (x->op() == Bytecodes::_idiv) { 580 __ idiv(left.result(), right.result(), result_reg, tmp, info); 581 } else { 582 ShouldNotReachHere(); 583 } 584 585 __ move(result_reg, result); 586 } else { 587 // missing test if instr is commutative and if we should swap 588 LIRItem left(x->x(), this); 589 LIRItem right(x->y(), this); 590 LIRItem* left_arg = &left; 591 LIRItem* right_arg = &right; 592 if (x->is_commutative() && left.is_stack() && right.is_register()) { 593 // swap them if left is real stack (or cached) and right is real register(not cached) 594 left_arg = &right; 595 right_arg = &left; 596 } 597 598 left_arg->load_item(); 599 600 // do not need to load right, as we can handle stack and constants 601 if (x->op() == Bytecodes::_imul ) { 602 // check if we can use shift instead 603 bool use_constant = false; 604 bool use_tmp = false; 605 if (right_arg->is_constant()) { 606 int iconst = right_arg->get_jint_constant(); 607 if (iconst > 0) { 608 if (is_power_of_2(iconst)) { 609 use_constant = true; 610 } else if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) { 611 use_constant = true; 612 use_tmp = true; 613 } 614 } 615 } 616 if (use_constant) { 617 right_arg->dont_load_item(); 618 } else { 619 right_arg->load_item(); 620 } 621 LIR_Opr tmp = LIR_OprFact::illegalOpr; 622 if (use_tmp) { 623 tmp = new_register(T_INT); 624 } 625 rlock_result(x); 626 627 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp); 628 } else { 629 right_arg->dont_load_item(); 630 rlock_result(x); 631 LIR_Opr tmp = LIR_OprFact::illegalOpr; 632 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp); 633 } 634 } 635 } 636 637 638 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) { 639 // when an operand with use count 1 is the left operand, then it is 640 // likely that no move for 2-operand-LIR-form is necessary 641 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) { 642 x->swap_operands(); 643 } 644 645 ValueTag tag = x->type()->tag(); 646 assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters"); 647 switch (tag) { 648 case floatTag: 649 case doubleTag: do_ArithmeticOp_FPU(x); return; 650 case longTag: do_ArithmeticOp_Long(x); return; 651 case intTag: do_ArithmeticOp_Int(x); return; 652 } 653 ShouldNotReachHere(); 654 } 655 656 657 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr 658 void LIRGenerator::do_ShiftOp(ShiftOp* x) { 659 // count must always be in rcx 660 LIRItem value(x->x(), this); 661 LIRItem count(x->y(), this); 662 663 ValueTag elemType = x->type()->tag(); 664 bool must_load_count = !count.is_constant() || elemType == longTag; 665 if (must_load_count) { 666 // count for long must be in register 667 count.load_item_force(shiftCountOpr()); 668 } else { 669 count.dont_load_item(); 670 } 671 value.load_item(); 672 LIR_Opr reg = rlock_result(x); 673 674 shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr); 675 } 676 677 678 // _iand, _land, _ior, _lor, _ixor, _lxor 679 void LIRGenerator::do_LogicOp(LogicOp* x) { 680 // when an operand with use count 1 is the left operand, then it is 681 // likely that no move for 2-operand-LIR-form is necessary 682 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) { 683 x->swap_operands(); 684 } 685 686 LIRItem left(x->x(), this); 687 LIRItem right(x->y(), this); 688 689 left.load_item(); 690 right.load_nonconstant(); 691 LIR_Opr reg = rlock_result(x); 692 693 logic_op(x->op(), reg, left.result(), right.result()); 694 } 695 696 697 698 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg 699 void LIRGenerator::do_CompareOp(CompareOp* x) { 700 LIRItem left(x->x(), this); 701 LIRItem right(x->y(), this); 702 ValueTag tag = x->x()->type()->tag(); 703 if (tag == longTag) { 704 left.set_destroys_register(); 705 } 706 left.load_item(); 707 right.load_item(); 708 LIR_Opr reg = rlock_result(x); 709 710 if (x->x()->type()->is_float_kind()) { 711 Bytecodes::Code code = x->op(); 712 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl)); 713 } else if (x->x()->type()->tag() == longTag) { 714 __ lcmp2int(left.result(), right.result(), reg); 715 } else { 716 Unimplemented(); 717 } 718 } 719 720 721 void LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) { 722 assert(x->number_of_arguments() == 4, "wrong type"); 723 LIRItem obj (x->argument_at(0), this); // object 724 LIRItem offset(x->argument_at(1), this); // offset of field 725 LIRItem cmp (x->argument_at(2), this); // value to compare with field 726 LIRItem val (x->argument_at(3), this); // replace field with val if matches cmp 727 728 assert(obj.type()->tag() == objectTag, "invalid type"); 729 730 // In 64bit the type can be long, sparc doesn't have this assert 731 // assert(offset.type()->tag() == intTag, "invalid type"); 732 733 assert(cmp.type()->tag() == type->tag(), "invalid type"); 734 assert(val.type()->tag() == type->tag(), "invalid type"); 735 736 // get address of field 737 obj.load_item(); 738 offset.load_nonconstant(); 739 740 LIR_Opr addr = new_pointer_register(); 741 LIR_Address* a; 742 if(offset.result()->is_constant()) { 743 #ifdef _LP64 744 jlong c = offset.result()->as_jlong(); 745 if ((jlong)((jint)c) == c) { 746 a = new LIR_Address(obj.result(), 747 (jint)c, 748 as_BasicType(type)); 749 } else { 750 LIR_Opr tmp = new_register(T_LONG); 751 __ move(offset.result(), tmp); 752 a = new LIR_Address(obj.result(), 753 tmp, 754 as_BasicType(type)); 755 } 756 #else 757 a = new LIR_Address(obj.result(), 758 offset.result()->as_jint(), 759 as_BasicType(type)); 760 #endif 761 } else { 762 a = new LIR_Address(obj.result(), 763 offset.result(), 764 LIR_Address::times_1, 765 0, 766 as_BasicType(type)); 767 } 768 __ leal(LIR_OprFact::address(a), addr); 769 770 if (type == objectType) { // Write-barrier needed for Object fields. 771 // Do the pre-write barrier, if any. 772 pre_barrier(addr, LIR_OprFact::illegalOpr /* pre_val */, 773 true /* do_load */, false /* patch */, NULL); 774 } 775 776 if (type == objectType) { 777 cmp.load_item_force(FrameMap::rax_oop_opr); 778 val.load_item(); 779 } else if (type == intType) { 780 cmp.load_item_force(FrameMap::rax_opr); 781 val.load_item(); 782 } else if (type == longType) { 783 cmp.load_item_force(FrameMap::long0_opr); 784 val.load_item_force(FrameMap::long1_opr); 785 } else { 786 ShouldNotReachHere(); 787 } 788 789 LIR_Opr ill = LIR_OprFact::illegalOpr; // for convenience 790 if (type == objectType) 791 __ cas_obj(addr, cmp.result(), val.result(), ill, ill); 792 else if (type == intType) 793 __ cas_int(addr, cmp.result(), val.result(), ill, ill); 794 else if (type == longType) 795 __ cas_long(addr, cmp.result(), val.result(), ill, ill); 796 else { 797 ShouldNotReachHere(); 798 } 799 800 // generate conditional move of boolean result 801 LIR_Opr result = rlock_result(x); 802 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0), 803 result, as_BasicType(type)); 804 if (type == objectType) { // Write-barrier needed for Object fields. 805 // Seems to be precise 806 post_barrier(addr, val.result()); 807 } 808 } 809 810 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) { 811 assert(x->number_of_arguments() == 3); 812 assert(UseFMA, "Needs FMA instructions support."); 813 LIRItem value(x->argument_at(0), this); 814 LIRItem value1(x->argument_at(1), this); 815 LIRItem value2(x->argument_at(2), this); 816 817 value2.set_destroys_register(); 818 819 value.load_item(); 820 value1.load_item(); 821 value2.load_item(); 822 823 LIR_Opr calc_input = value.result(); 824 LIR_Opr calc_input1 = value1.result(); 825 LIR_Opr calc_input2 = value2.result(); 826 LIR_Opr calc_result = rlock_result(x); 827 828 switch (x->id()) { 829 case vmIntrinsics::_fmaD: __ fmad(calc_input, calc_input1, calc_input2, calc_result); break; 830 case vmIntrinsics::_fmaF: __ fmaf(calc_input, calc_input1, calc_input2, calc_result); break; 831 default: ShouldNotReachHere(); 832 } 833 834 } 835 836 837 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) { 838 assert(x->number_of_arguments() == 1 || (x->number_of_arguments() == 2 && x->id() == vmIntrinsics::_dpow), "wrong type"); 839 840 if (x->id() == vmIntrinsics::_dexp || x->id() == vmIntrinsics::_dlog || 841 x->id() == vmIntrinsics::_dpow || x->id() == vmIntrinsics::_dcos || 842 x->id() == vmIntrinsics::_dsin || x->id() == vmIntrinsics::_dtan || 843 x->id() == vmIntrinsics::_dlog10) { 844 do_LibmIntrinsic(x); 845 return; 846 } 847 848 LIRItem value(x->argument_at(0), this); 849 850 bool use_fpu = false; 851 if (UseSSE < 2) { 852 value.set_destroys_register(); 853 } 854 value.load_item(); 855 856 LIR_Opr calc_input = value.result(); 857 LIR_Opr calc_result = rlock_result(x); 858 859 switch(x->id()) { 860 case vmIntrinsics::_dabs: __ abs (calc_input, calc_result, LIR_OprFact::illegalOpr); break; 861 case vmIntrinsics::_dsqrt: __ sqrt (calc_input, calc_result, LIR_OprFact::illegalOpr); break; 862 default: ShouldNotReachHere(); 863 } 864 865 if (use_fpu) { 866 __ move(calc_result, x->operand()); 867 } 868 } 869 870 void LIRGenerator::do_LibmIntrinsic(Intrinsic* x) { 871 LIRItem value(x->argument_at(0), this); 872 value.set_destroys_register(); 873 874 LIR_Opr calc_result = rlock_result(x); 875 LIR_Opr result_reg = result_register_for(x->type()); 876 877 CallingConvention* cc = NULL; 878 879 if (x->id() == vmIntrinsics::_dpow) { 880 LIRItem value1(x->argument_at(1), this); 881 882 value1.set_destroys_register(); 883 884 BasicTypeList signature(2); 885 signature.append(T_DOUBLE); 886 signature.append(T_DOUBLE); 887 cc = frame_map()->c_calling_convention(&signature); 888 value.load_item_force(cc->at(0)); 889 value1.load_item_force(cc->at(1)); 890 } else { 891 BasicTypeList signature(1); 892 signature.append(T_DOUBLE); 893 cc = frame_map()->c_calling_convention(&signature); 894 value.load_item_force(cc->at(0)); 895 } 896 897 #ifndef _LP64 898 LIR_Opr tmp = FrameMap::fpu0_double_opr; 899 result_reg = tmp; 900 switch(x->id()) { 901 case vmIntrinsics::_dexp: 902 if (StubRoutines::dexp() != NULL) { 903 __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args()); 904 } else { 905 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args()); 906 } 907 break; 908 case vmIntrinsics::_dlog: 909 if (StubRoutines::dlog() != NULL) { 910 __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args()); 911 } else { 912 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args()); 913 } 914 break; 915 case vmIntrinsics::_dlog10: 916 if (StubRoutines::dlog10() != NULL) { 917 __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args()); 918 } else { 919 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args()); 920 } 921 break; 922 case vmIntrinsics::_dpow: 923 if (StubRoutines::dpow() != NULL) { 924 __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args()); 925 } else { 926 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args()); 927 } 928 break; 929 case vmIntrinsics::_dsin: 930 if (VM_Version::supports_sse2() && StubRoutines::dsin() != NULL) { 931 __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args()); 932 } else { 933 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args()); 934 } 935 break; 936 case vmIntrinsics::_dcos: 937 if (VM_Version::supports_sse2() && StubRoutines::dcos() != NULL) { 938 __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args()); 939 } else { 940 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args()); 941 } 942 break; 943 case vmIntrinsics::_dtan: 944 if (StubRoutines::dtan() != NULL) { 945 __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args()); 946 } else { 947 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args()); 948 } 949 break; 950 default: ShouldNotReachHere(); 951 } 952 #else 953 switch (x->id()) { 954 case vmIntrinsics::_dexp: 955 if (StubRoutines::dexp() != NULL) { 956 __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args()); 957 } else { 958 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args()); 959 } 960 break; 961 case vmIntrinsics::_dlog: 962 if (StubRoutines::dlog() != NULL) { 963 __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args()); 964 } else { 965 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args()); 966 } 967 break; 968 case vmIntrinsics::_dlog10: 969 if (StubRoutines::dlog10() != NULL) { 970 __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args()); 971 } else { 972 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args()); 973 } 974 break; 975 case vmIntrinsics::_dpow: 976 if (StubRoutines::dpow() != NULL) { 977 __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args()); 978 } else { 979 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args()); 980 } 981 break; 982 case vmIntrinsics::_dsin: 983 if (StubRoutines::dsin() != NULL) { 984 __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args()); 985 } else { 986 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args()); 987 } 988 break; 989 case vmIntrinsics::_dcos: 990 if (StubRoutines::dcos() != NULL) { 991 __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args()); 992 } else { 993 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args()); 994 } 995 break; 996 case vmIntrinsics::_dtan: 997 if (StubRoutines::dtan() != NULL) { 998 __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args()); 999 } else { 1000 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args()); 1001 } 1002 break; 1003 default: ShouldNotReachHere(); 1004 } 1005 #endif // _LP64 1006 __ move(result_reg, calc_result); 1007 } 1008 1009 void LIRGenerator::do_ArrayCopy(Intrinsic* x) { 1010 assert(x->number_of_arguments() == 5, "wrong type"); 1011 1012 // Make all state_for calls early since they can emit code 1013 CodeEmitInfo* info = state_for(x, x->state()); 1014 1015 LIRItem src(x->argument_at(0), this); 1016 LIRItem src_pos(x->argument_at(1), this); 1017 LIRItem dst(x->argument_at(2), this); 1018 LIRItem dst_pos(x->argument_at(3), this); 1019 LIRItem length(x->argument_at(4), this); 1020 1021 // operands for arraycopy must use fixed registers, otherwise 1022 // LinearScan will fail allocation (because arraycopy always needs a 1023 // call) 1024 1025 #ifndef _LP64 1026 src.load_item_force (FrameMap::rcx_oop_opr); 1027 src_pos.load_item_force (FrameMap::rdx_opr); 1028 dst.load_item_force (FrameMap::rax_oop_opr); 1029 dst_pos.load_item_force (FrameMap::rbx_opr); 1030 length.load_item_force (FrameMap::rdi_opr); 1031 LIR_Opr tmp = (FrameMap::rsi_opr); 1032 #else 1033 1034 // The java calling convention will give us enough registers 1035 // so that on the stub side the args will be perfect already. 1036 // On the other slow/special case side we call C and the arg 1037 // positions are not similar enough to pick one as the best. 1038 // Also because the java calling convention is a "shifted" version 1039 // of the C convention we can process the java args trivially into C 1040 // args without worry of overwriting during the xfer 1041 1042 src.load_item_force (FrameMap::as_oop_opr(j_rarg0)); 1043 src_pos.load_item_force (FrameMap::as_opr(j_rarg1)); 1044 dst.load_item_force (FrameMap::as_oop_opr(j_rarg2)); 1045 dst_pos.load_item_force (FrameMap::as_opr(j_rarg3)); 1046 length.load_item_force (FrameMap::as_opr(j_rarg4)); 1047 1048 LIR_Opr tmp = FrameMap::as_opr(j_rarg5); 1049 #endif // LP64 1050 1051 set_no_result(x); 1052 1053 int flags; 1054 ciArrayKlass* expected_type; 1055 arraycopy_helper(x, &flags, &expected_type); 1056 1057 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint 1058 } 1059 1060 void LIRGenerator::do_update_CRC32(Intrinsic* x) { 1061 assert(UseCRC32Intrinsics, "need AVX and LCMUL instructions support"); 1062 // Make all state_for calls early since they can emit code 1063 LIR_Opr result = rlock_result(x); 1064 int flags = 0; 1065 switch (x->id()) { 1066 case vmIntrinsics::_updateCRC32: { 1067 LIRItem crc(x->argument_at(0), this); 1068 LIRItem val(x->argument_at(1), this); 1069 // val is destroyed by update_crc32 1070 val.set_destroys_register(); 1071 crc.load_item(); 1072 val.load_item(); 1073 __ update_crc32(crc.result(), val.result(), result); 1074 break; 1075 } 1076 case vmIntrinsics::_updateBytesCRC32: 1077 case vmIntrinsics::_updateByteBufferCRC32: { 1078 bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32); 1079 1080 LIRItem crc(x->argument_at(0), this); 1081 LIRItem buf(x->argument_at(1), this); 1082 LIRItem off(x->argument_at(2), this); 1083 LIRItem len(x->argument_at(3), this); 1084 buf.load_item(); 1085 off.load_nonconstant(); 1086 1087 LIR_Opr index = off.result(); 1088 int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0; 1089 if(off.result()->is_constant()) { 1090 index = LIR_OprFact::illegalOpr; 1091 offset += off.result()->as_jint(); 1092 } 1093 LIR_Opr base_op = buf.result(); 1094 1095 #ifndef _LP64 1096 if (!is_updateBytes) { // long b raw address 1097 base_op = new_register(T_INT); 1098 __ convert(Bytecodes::_l2i, buf.result(), base_op); 1099 } 1100 #else 1101 if (index->is_valid()) { 1102 LIR_Opr tmp = new_register(T_LONG); 1103 __ convert(Bytecodes::_i2l, index, tmp); 1104 index = tmp; 1105 } 1106 #endif 1107 1108 LIR_Address* a = new LIR_Address(base_op, 1109 index, 1110 LIR_Address::times_1, 1111 offset, 1112 T_BYTE); 1113 BasicTypeList signature(3); 1114 signature.append(T_INT); 1115 signature.append(T_ADDRESS); 1116 signature.append(T_INT); 1117 CallingConvention* cc = frame_map()->c_calling_convention(&signature); 1118 const LIR_Opr result_reg = result_register_for(x->type()); 1119 1120 LIR_Opr addr = new_pointer_register(); 1121 __ leal(LIR_OprFact::address(a), addr); 1122 1123 crc.load_item_force(cc->at(0)); 1124 __ move(addr, cc->at(1)); 1125 len.load_item_force(cc->at(2)); 1126 1127 __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), getThreadTemp(), result_reg, cc->args()); 1128 __ move(result_reg, result); 1129 1130 break; 1131 } 1132 default: { 1133 ShouldNotReachHere(); 1134 } 1135 } 1136 } 1137 1138 void LIRGenerator::do_update_CRC32C(Intrinsic* x) { 1139 Unimplemented(); 1140 } 1141 1142 void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) { 1143 assert(UseVectorizedMismatchIntrinsic, "need AVX instruction support"); 1144 1145 // Make all state_for calls early since they can emit code 1146 LIR_Opr result = rlock_result(x); 1147 1148 LIRItem a(x->argument_at(0), this); // Object 1149 LIRItem aOffset(x->argument_at(1), this); // long 1150 LIRItem b(x->argument_at(2), this); // Object 1151 LIRItem bOffset(x->argument_at(3), this); // long 1152 LIRItem length(x->argument_at(4), this); // int 1153 LIRItem log2ArrayIndexScale(x->argument_at(5), this); // int 1154 1155 a.load_item(); 1156 aOffset.load_nonconstant(); 1157 b.load_item(); 1158 bOffset.load_nonconstant(); 1159 1160 long constant_aOffset = 0; 1161 LIR_Opr result_aOffset = aOffset.result(); 1162 if (result_aOffset->is_constant()) { 1163 constant_aOffset = result_aOffset->as_jlong(); 1164 result_aOffset = LIR_OprFact::illegalOpr; 1165 } 1166 LIR_Opr result_a = a.result(); 1167 1168 long constant_bOffset = 0; 1169 LIR_Opr result_bOffset = bOffset.result(); 1170 if (result_bOffset->is_constant()) { 1171 constant_bOffset = result_bOffset->as_jlong(); 1172 result_bOffset = LIR_OprFact::illegalOpr; 1173 } 1174 LIR_Opr result_b = b.result(); 1175 1176 #ifndef _LP64 1177 result_a = new_register(T_INT); 1178 __ convert(Bytecodes::_l2i, a.result(), result_a); 1179 result_b = new_register(T_INT); 1180 __ convert(Bytecodes::_l2i, b.result(), result_b); 1181 #endif 1182 1183 1184 LIR_Address* addr_a = new LIR_Address(result_a, 1185 result_aOffset, 1186 LIR_Address::times_1, 1187 constant_aOffset, 1188 T_BYTE); 1189 1190 LIR_Address* addr_b = new LIR_Address(result_b, 1191 result_bOffset, 1192 LIR_Address::times_1, 1193 constant_bOffset, 1194 T_BYTE); 1195 1196 BasicTypeList signature(4); 1197 signature.append(T_ADDRESS); 1198 signature.append(T_ADDRESS); 1199 signature.append(T_INT); 1200 signature.append(T_INT); 1201 CallingConvention* cc = frame_map()->c_calling_convention(&signature); 1202 const LIR_Opr result_reg = result_register_for(x->type()); 1203 1204 LIR_Opr ptr_addr_a = new_pointer_register(); 1205 __ leal(LIR_OprFact::address(addr_a), ptr_addr_a); 1206 1207 LIR_Opr ptr_addr_b = new_pointer_register(); 1208 __ leal(LIR_OprFact::address(addr_b), ptr_addr_b); 1209 1210 __ move(ptr_addr_a, cc->at(0)); 1211 __ move(ptr_addr_b, cc->at(1)); 1212 length.load_item_force(cc->at(2)); 1213 log2ArrayIndexScale.load_item_force(cc->at(3)); 1214 1215 __ call_runtime_leaf(StubRoutines::vectorizedMismatch(), getThreadTemp(), result_reg, cc->args()); 1216 __ move(result_reg, result); 1217 } 1218 1219 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f 1220 // _i2b, _i2c, _i2s 1221 LIR_Opr fixed_register_for(BasicType type) { 1222 switch (type) { 1223 case T_FLOAT: return FrameMap::fpu0_float_opr; 1224 case T_DOUBLE: return FrameMap::fpu0_double_opr; 1225 case T_INT: return FrameMap::rax_opr; 1226 case T_LONG: return FrameMap::long0_opr; 1227 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr; 1228 } 1229 } 1230 1231 void LIRGenerator::do_Convert(Convert* x) { 1232 // flags that vary for the different operations and different SSE-settings 1233 bool fixed_input = false, fixed_result = false, round_result = false, needs_stub = false; 1234 1235 switch (x->op()) { 1236 case Bytecodes::_i2l: // fall through 1237 case Bytecodes::_l2i: // fall through 1238 case Bytecodes::_i2b: // fall through 1239 case Bytecodes::_i2c: // fall through 1240 case Bytecodes::_i2s: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break; 1241 1242 case Bytecodes::_f2d: fixed_input = UseSSE == 1; fixed_result = false; round_result = false; needs_stub = false; break; 1243 case Bytecodes::_d2f: fixed_input = false; fixed_result = UseSSE == 1; round_result = UseSSE < 1; needs_stub = false; break; 1244 case Bytecodes::_i2f: fixed_input = false; fixed_result = false; round_result = UseSSE < 1; needs_stub = false; break; 1245 case Bytecodes::_i2d: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break; 1246 case Bytecodes::_f2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break; 1247 case Bytecodes::_d2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break; 1248 case Bytecodes::_l2f: fixed_input = false; fixed_result = UseSSE >= 1; round_result = UseSSE < 1; needs_stub = false; break; 1249 case Bytecodes::_l2d: fixed_input = false; fixed_result = UseSSE >= 2; round_result = UseSSE < 2; needs_stub = false; break; 1250 case Bytecodes::_f2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break; 1251 case Bytecodes::_d2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break; 1252 default: ShouldNotReachHere(); 1253 } 1254 1255 LIRItem value(x->value(), this); 1256 value.load_item(); 1257 LIR_Opr input = value.result(); 1258 LIR_Opr result = rlock(x); 1259 1260 // arguments of lir_convert 1261 LIR_Opr conv_input = input; 1262 LIR_Opr conv_result = result; 1263 ConversionStub* stub = NULL; 1264 1265 if (fixed_input) { 1266 conv_input = fixed_register_for(input->type()); 1267 __ move(input, conv_input); 1268 } 1269 1270 assert(fixed_result == false || round_result == false, "cannot set both"); 1271 if (fixed_result) { 1272 conv_result = fixed_register_for(result->type()); 1273 } else if (round_result) { 1274 result = new_register(result->type()); 1275 set_vreg_flag(result, must_start_in_memory); 1276 } 1277 1278 if (needs_stub) { 1279 stub = new ConversionStub(x->op(), conv_input, conv_result); 1280 } 1281 1282 __ convert(x->op(), conv_input, conv_result, stub); 1283 1284 if (result != conv_result) { 1285 __ move(conv_result, result); 1286 } 1287 1288 assert(result->is_virtual(), "result must be virtual register"); 1289 set_result(x, result); 1290 } 1291 1292 1293 void LIRGenerator::do_NewInstance(NewInstance* x) { 1294 print_if_not_loaded(x); 1295 1296 CodeEmitInfo* info = state_for(x, x->state()); 1297 LIR_Opr reg = result_register_for(x->type()); 1298 new_instance(reg, x->klass(), x->is_unresolved(), 1299 FrameMap::rcx_oop_opr, 1300 FrameMap::rdi_oop_opr, 1301 FrameMap::rsi_oop_opr, 1302 LIR_OprFact::illegalOpr, 1303 FrameMap::rdx_metadata_opr, info); 1304 LIR_Opr result = rlock_result(x); 1305 __ move(reg, result); 1306 } 1307 1308 1309 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) { 1310 CodeEmitInfo* info = state_for(x, x->state()); 1311 1312 LIRItem length(x->length(), this); 1313 length.load_item_force(FrameMap::rbx_opr); 1314 1315 LIR_Opr reg = result_register_for(x->type()); 1316 LIR_Opr tmp1 = FrameMap::rcx_oop_opr; 1317 LIR_Opr tmp2 = FrameMap::rsi_oop_opr; 1318 LIR_Opr tmp3 = FrameMap::rdi_oop_opr; 1319 LIR_Opr tmp4 = reg; 1320 LIR_Opr klass_reg = FrameMap::rdx_metadata_opr; 1321 LIR_Opr len = length.result(); 1322 BasicType elem_type = x->elt_type(); 1323 1324 __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg); 1325 1326 CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info); 1327 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path); 1328 1329 LIR_Opr result = rlock_result(x); 1330 __ move(reg, result); 1331 } 1332 1333 1334 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) { 1335 LIRItem length(x->length(), this); 1336 // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction 1337 // and therefore provide the state before the parameters have been consumed 1338 CodeEmitInfo* patching_info = NULL; 1339 if (!x->klass()->is_loaded() || PatchALot) { 1340 patching_info = state_for(x, x->state_before()); 1341 } 1342 1343 CodeEmitInfo* info = state_for(x, x->state()); 1344 1345 const LIR_Opr reg = result_register_for(x->type()); 1346 LIR_Opr tmp1 = FrameMap::rcx_oop_opr; 1347 LIR_Opr tmp2 = FrameMap::rsi_oop_opr; 1348 LIR_Opr tmp3 = FrameMap::rdi_oop_opr; 1349 LIR_Opr tmp4 = reg; 1350 LIR_Opr klass_reg = FrameMap::rdx_metadata_opr; 1351 1352 length.load_item_force(FrameMap::rbx_opr); 1353 LIR_Opr len = length.result(); 1354 1355 CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info); 1356 ciKlass* obj = (ciKlass*) ciObjArrayKlass::make(x->klass()); 1357 if (obj == ciEnv::unloaded_ciobjarrayklass()) { 1358 BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error"); 1359 } 1360 klass2reg_with_patching(klass_reg, obj, patching_info); 1361 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path); 1362 1363 LIR_Opr result = rlock_result(x); 1364 __ move(reg, result); 1365 } 1366 1367 1368 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) { 1369 Values* dims = x->dims(); 1370 int i = dims->length(); 1371 LIRItemList* items = new LIRItemList(i, i, NULL); 1372 while (i-- > 0) { 1373 LIRItem* size = new LIRItem(dims->at(i), this); 1374 items->at_put(i, size); 1375 } 1376 1377 // Evaluate state_for early since it may emit code. 1378 CodeEmitInfo* patching_info = NULL; 1379 if (!x->klass()->is_loaded() || PatchALot) { 1380 patching_info = state_for(x, x->state_before()); 1381 1382 // Cannot re-use same xhandlers for multiple CodeEmitInfos, so 1383 // clone all handlers (NOTE: Usually this is handled transparently 1384 // by the CodeEmitInfo cloning logic in CodeStub constructors but 1385 // is done explicitly here because a stub isn't being used). 1386 x->set_exception_handlers(new XHandlers(x->exception_handlers())); 1387 } 1388 CodeEmitInfo* info = state_for(x, x->state()); 1389 1390 i = dims->length(); 1391 while (i-- > 0) { 1392 LIRItem* size = items->at(i); 1393 size->load_nonconstant(); 1394 1395 store_stack_parameter(size->result(), in_ByteSize(i*4)); 1396 } 1397 1398 LIR_Opr klass_reg = FrameMap::rax_metadata_opr; 1399 klass2reg_with_patching(klass_reg, x->klass(), patching_info); 1400 1401 LIR_Opr rank = FrameMap::rbx_opr; 1402 __ move(LIR_OprFact::intConst(x->rank()), rank); 1403 LIR_Opr varargs = FrameMap::rcx_opr; 1404 __ move(FrameMap::rsp_opr, varargs); 1405 LIR_OprList* args = new LIR_OprList(3); 1406 args->append(klass_reg); 1407 args->append(rank); 1408 args->append(varargs); 1409 LIR_Opr reg = result_register_for(x->type()); 1410 __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id), 1411 LIR_OprFact::illegalOpr, 1412 reg, args, info); 1413 1414 LIR_Opr result = rlock_result(x); 1415 __ move(reg, result); 1416 } 1417 1418 1419 void LIRGenerator::do_BlockBegin(BlockBegin* x) { 1420 // nothing to do for now 1421 } 1422 1423 1424 void LIRGenerator::do_CheckCast(CheckCast* x) { 1425 LIRItem obj(x->obj(), this); 1426 1427 CodeEmitInfo* patching_info = NULL; 1428 if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check())) { 1429 // must do this before locking the destination register as an oop register, 1430 // and before the obj is loaded (the latter is for deoptimization) 1431 patching_info = state_for(x, x->state_before()); 1432 } 1433 obj.load_item(); 1434 1435 // info for exceptions 1436 CodeEmitInfo* info_for_exception = state_for(x); 1437 1438 CodeStub* stub; 1439 if (x->is_incompatible_class_change_check()) { 1440 assert(patching_info == NULL, "can't patch this"); 1441 stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception); 1442 } else { 1443 stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception); 1444 } 1445 LIR_Opr reg = rlock_result(x); 1446 LIR_Opr tmp3 = LIR_OprFact::illegalOpr; 1447 if (!x->klass()->is_loaded() || UseCompressedClassPointers) { 1448 tmp3 = new_register(objectType); 1449 } 1450 __ checkcast(reg, obj.result(), x->klass(), 1451 new_register(objectType), new_register(objectType), tmp3, 1452 x->direct_compare(), info_for_exception, patching_info, stub, 1453 x->profiled_method(), x->profiled_bci()); 1454 } 1455 1456 1457 void LIRGenerator::do_InstanceOf(InstanceOf* x) { 1458 LIRItem obj(x->obj(), this); 1459 1460 // result and test object may not be in same register 1461 LIR_Opr reg = rlock_result(x); 1462 CodeEmitInfo* patching_info = NULL; 1463 if ((!x->klass()->is_loaded() || PatchALot)) { 1464 // must do this before locking the destination register as an oop register 1465 patching_info = state_for(x, x->state_before()); 1466 } 1467 obj.load_item(); 1468 LIR_Opr tmp3 = LIR_OprFact::illegalOpr; 1469 if (!x->klass()->is_loaded() || UseCompressedClassPointers) { 1470 tmp3 = new_register(objectType); 1471 } 1472 __ instanceof(reg, obj.result(), x->klass(), 1473 new_register(objectType), new_register(objectType), tmp3, 1474 x->direct_compare(), patching_info, x->profiled_method(), x->profiled_bci()); 1475 } 1476 1477 1478 void LIRGenerator::do_If(If* x) { 1479 assert(x->number_of_sux() == 2, "inconsistency"); 1480 ValueTag tag = x->x()->type()->tag(); 1481 bool is_safepoint = x->is_safepoint(); 1482 1483 If::Condition cond = x->cond(); 1484 1485 LIRItem xitem(x->x(), this); 1486 LIRItem yitem(x->y(), this); 1487 LIRItem* xin = &xitem; 1488 LIRItem* yin = &yitem; 1489 1490 if (tag == longTag) { 1491 // for longs, only conditions "eql", "neq", "lss", "geq" are valid; 1492 // mirror for other conditions 1493 if (cond == If::gtr || cond == If::leq) { 1494 cond = Instruction::mirror(cond); 1495 xin = &yitem; 1496 yin = &xitem; 1497 } 1498 xin->set_destroys_register(); 1499 } 1500 xin->load_item(); 1501 if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) { 1502 // inline long zero 1503 yin->dont_load_item(); 1504 } else if (tag == longTag || tag == floatTag || tag == doubleTag) { 1505 // longs cannot handle constants at right side 1506 yin->load_item(); 1507 } else { 1508 yin->dont_load_item(); 1509 } 1510 1511 // add safepoint before generating condition code so it can be recomputed 1512 if (x->is_safepoint()) { 1513 // increment backedge counter if needed 1514 increment_backedge_counter(state_for(x, x->state_before()), x->profiled_bci()); 1515 __ safepoint(LIR_OprFact::illegalOpr, state_for(x, x->state_before())); 1516 } 1517 set_no_result(x); 1518 1519 LIR_Opr left = xin->result(); 1520 LIR_Opr right = yin->result(); 1521 __ cmp(lir_cond(cond), left, right); 1522 // Generate branch profiling. Profiling code doesn't kill flags. 1523 profile_branch(x, cond); 1524 move_to_phi(x->state()); 1525 if (x->x()->type()->is_float_kind()) { 1526 __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux()); 1527 } else { 1528 __ branch(lir_cond(cond), right->type(), x->tsux()); 1529 } 1530 assert(x->default_sux() == x->fsux(), "wrong destination above"); 1531 __ jump(x->default_sux()); 1532 } 1533 1534 1535 LIR_Opr LIRGenerator::getThreadPointer() { 1536 #ifdef _LP64 1537 return FrameMap::as_pointer_opr(r15_thread); 1538 #else 1539 LIR_Opr result = new_register(T_INT); 1540 __ get_thread(result); 1541 return result; 1542 #endif // 1543 } 1544 1545 void LIRGenerator::trace_block_entry(BlockBegin* block) { 1546 store_stack_parameter(LIR_OprFact::intConst(block->block_id()), in_ByteSize(0)); 1547 LIR_OprList* args = new LIR_OprList(); 1548 address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry); 1549 __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args); 1550 } 1551 1552 1553 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address, 1554 CodeEmitInfo* info) { 1555 if (address->type() == T_LONG) { 1556 address = new LIR_Address(address->base(), 1557 address->index(), address->scale(), 1558 address->disp(), T_DOUBLE); 1559 // Transfer the value atomically by using FP moves. This means 1560 // the value has to be moved between CPU and FPU registers. It 1561 // always has to be moved through spill slot since there's no 1562 // quick way to pack the value into an SSE register. 1563 LIR_Opr temp_double = new_register(T_DOUBLE); 1564 LIR_Opr spill = new_register(T_LONG); 1565 set_vreg_flag(spill, must_start_in_memory); 1566 __ move(value, spill); 1567 __ volatile_move(spill, temp_double, T_LONG); 1568 __ volatile_move(temp_double, LIR_OprFact::address(address), T_LONG, info); 1569 } else { 1570 __ store(value, address, info); 1571 } 1572 } 1573 1574 1575 1576 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result, 1577 CodeEmitInfo* info) { 1578 if (address->type() == T_LONG) { 1579 address = new LIR_Address(address->base(), 1580 address->index(), address->scale(), 1581 address->disp(), T_DOUBLE); 1582 // Transfer the value atomically by using FP moves. This means 1583 // the value has to be moved between CPU and FPU registers. In 1584 // SSE0 and SSE1 mode it has to be moved through spill slot but in 1585 // SSE2+ mode it can be moved directly. 1586 LIR_Opr temp_double = new_register(T_DOUBLE); 1587 __ volatile_move(LIR_OprFact::address(address), temp_double, T_LONG, info); 1588 __ volatile_move(temp_double, result, T_LONG); 1589 if (UseSSE < 2) { 1590 // no spill slot needed in SSE2 mode because xmm->cpu register move is possible 1591 set_vreg_flag(result, must_start_in_memory); 1592 } 1593 } else { 1594 __ load(address, result, info); 1595 } 1596 } 1597 1598 void LIRGenerator::get_Object_unsafe(LIR_Opr dst, LIR_Opr src, LIR_Opr offset, 1599 BasicType type, bool is_volatile) { 1600 if (is_volatile && type == T_LONG) { 1601 LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE); 1602 LIR_Opr tmp = new_register(T_DOUBLE); 1603 __ load(addr, tmp); 1604 LIR_Opr spill = new_register(T_LONG); 1605 set_vreg_flag(spill, must_start_in_memory); 1606 __ move(tmp, spill); 1607 __ move(spill, dst); 1608 } else { 1609 LIR_Address* addr = new LIR_Address(src, offset, type); 1610 __ load(addr, dst); 1611 } 1612 } 1613 1614 1615 void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data, 1616 BasicType type, bool is_volatile) { 1617 if (is_volatile && type == T_LONG) { 1618 LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE); 1619 LIR_Opr tmp = new_register(T_DOUBLE); 1620 LIR_Opr spill = new_register(T_DOUBLE); 1621 set_vreg_flag(spill, must_start_in_memory); 1622 __ move(data, spill); 1623 __ move(spill, tmp); 1624 __ move(tmp, addr); 1625 } else { 1626 LIR_Address* addr = new LIR_Address(src, offset, type); 1627 bool is_obj = (type == T_ARRAY || type == T_OBJECT); 1628 if (is_obj) { 1629 // Do the pre-write barrier, if any. 1630 pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */, 1631 true /* do_load */, false /* patch */, NULL); 1632 __ move(data, addr); 1633 assert(src->is_register(), "must be register"); 1634 // Seems to be a precise address 1635 post_barrier(LIR_OprFact::address(addr), data); 1636 } else { 1637 __ move(data, addr); 1638 } 1639 } 1640 } 1641 1642 void LIRGenerator::do_UnsafeGetAndSetObject(UnsafeGetAndSetObject* x) { 1643 BasicType type = x->basic_type(); 1644 LIRItem src(x->object(), this); 1645 LIRItem off(x->offset(), this); 1646 LIRItem value(x->value(), this); 1647 1648 src.load_item(); 1649 value.load_item(); 1650 off.load_nonconstant(); 1651 1652 LIR_Opr dst = rlock_result(x, type); 1653 LIR_Opr data = value.result(); 1654 bool is_obj = (type == T_ARRAY || type == T_OBJECT); 1655 LIR_Opr offset = off.result(); 1656 1657 assert (type == T_INT || (!x->is_add() && is_obj) LP64_ONLY( || type == T_LONG ), "unexpected type"); 1658 LIR_Address* addr; 1659 if (offset->is_constant()) { 1660 #ifdef _LP64 1661 jlong c = offset->as_jlong(); 1662 if ((jlong)((jint)c) == c) { 1663 addr = new LIR_Address(src.result(), (jint)c, type); 1664 } else { 1665 LIR_Opr tmp = new_register(T_LONG); 1666 __ move(offset, tmp); 1667 addr = new LIR_Address(src.result(), tmp, type); 1668 } 1669 #else 1670 addr = new LIR_Address(src.result(), offset->as_jint(), type); 1671 #endif 1672 } else { 1673 addr = new LIR_Address(src.result(), offset, type); 1674 } 1675 1676 // Because we want a 2-arg form of xchg and xadd 1677 __ move(data, dst); 1678 1679 if (x->is_add()) { 1680 __ xadd(LIR_OprFact::address(addr), dst, dst, LIR_OprFact::illegalOpr); 1681 } else { 1682 if (is_obj) { 1683 // Do the pre-write barrier, if any. 1684 pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */, 1685 true /* do_load */, false /* patch */, NULL); 1686 } 1687 __ xchg(LIR_OprFact::address(addr), dst, dst, LIR_OprFact::illegalOpr); 1688 if (is_obj) { 1689 // Seems to be a precise address 1690 post_barrier(LIR_OprFact::address(addr), data); 1691 } 1692 } 1693 }