1 /*
   2  * Copyright (c) 2005, 2016, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "c1/c1_Compilation.hpp"
  27 #include "c1/c1_FrameMap.hpp"
  28 #include "c1/c1_Instruction.hpp"
  29 #include "c1/c1_LIRAssembler.hpp"
  30 #include "c1/c1_LIRGenerator.hpp"
  31 #include "c1/c1_Runtime1.hpp"
  32 #include "c1/c1_ValueStack.hpp"
  33 #include "ci/ciArray.hpp"
  34 #include "ci/ciObjArrayKlass.hpp"
  35 #include "ci/ciTypeArrayKlass.hpp"
  36 #include "runtime/sharedRuntime.hpp"
  37 #include "runtime/stubRoutines.hpp"
  38 #include "vmreg_x86.inline.hpp"
  39 
  40 #ifdef ASSERT
  41 #define __ gen()->lir(__FILE__, __LINE__)->
  42 #else
  43 #define __ gen()->lir()->
  44 #endif
  45 
  46 // Item will be loaded into a byte register; Intel only
  47 void LIRItem::load_byte_item() {
  48   load_item();
  49   LIR_Opr res = result();
  50 
  51   if (!res->is_virtual() || !_gen->is_vreg_flag_set(res, LIRGenerator::byte_reg)) {
  52     // make sure that it is a byte register
  53     assert(!value()->type()->is_float() && !value()->type()->is_double(),
  54            "can't load floats in byte register");
  55     LIR_Opr reg = _gen->rlock_byte(T_BYTE);
  56     __ move(res, reg);
  57 
  58     _result = reg;
  59   }
  60 }
  61 
  62 
  63 void LIRItem::load_nonconstant() {
  64   LIR_Opr r = value()->operand();
  65   if (r->is_constant()) {
  66     _result = r;
  67   } else {
  68     load_item();
  69   }
  70 }
  71 
  72 //--------------------------------------------------------------
  73 //               LIRGenerator
  74 //--------------------------------------------------------------
  75 
  76 
  77 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::rax_oop_opr; }
  78 LIR_Opr LIRGenerator::exceptionPcOpr()  { return FrameMap::rdx_opr; }
  79 LIR_Opr LIRGenerator::divInOpr()        { return FrameMap::rax_opr; }
  80 LIR_Opr LIRGenerator::divOutOpr()       { return FrameMap::rax_opr; }
  81 LIR_Opr LIRGenerator::remOutOpr()       { return FrameMap::rdx_opr; }
  82 LIR_Opr LIRGenerator::shiftCountOpr()   { return FrameMap::rcx_opr; }
  83 LIR_Opr LIRGenerator::syncLockOpr()     { return new_register(T_INT); }
  84 LIR_Opr LIRGenerator::syncTempOpr()     { return FrameMap::rax_opr; }
  85 LIR_Opr LIRGenerator::getThreadTemp()   { return LIR_OprFact::illegalOpr; }
  86 
  87 
  88 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
  89   LIR_Opr opr;
  90   switch (type->tag()) {
  91     case intTag:     opr = FrameMap::rax_opr;          break;
  92     case objectTag:  opr = FrameMap::rax_oop_opr;      break;
  93     case longTag:    opr = FrameMap::long0_opr;        break;
  94     case floatTag:   opr = UseSSE >= 1 ? FrameMap::xmm0_float_opr  : FrameMap::fpu0_float_opr;  break;
  95     case doubleTag:  opr = UseSSE >= 2 ? FrameMap::xmm0_double_opr : FrameMap::fpu0_double_opr;  break;
  96 
  97     case addressTag:
  98     default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
  99   }
 100 
 101   assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
 102   return opr;
 103 }
 104 
 105 
 106 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
 107   LIR_Opr reg = new_register(T_INT);
 108   set_vreg_flag(reg, LIRGenerator::byte_reg);
 109   return reg;
 110 }
 111 
 112 
 113 //--------- loading items into registers --------------------------------
 114 
 115 
 116 // i486 instructions can inline constants
 117 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
 118   if (type == T_SHORT || type == T_CHAR) {
 119     // there is no immediate move of word values in asembler_i486.?pp
 120     return false;
 121   }
 122   Constant* c = v->as_Constant();
 123   if (c && c->state_before() == NULL) {
 124     // constants of any type can be stored directly, except for
 125     // unloaded object constants.
 126     return true;
 127   }
 128   return false;
 129 }
 130 
 131 
 132 bool LIRGenerator::can_inline_as_constant(Value v) const {
 133   if (v->type()->tag() == longTag) return false;
 134   return v->type()->tag() != objectTag ||
 135     (v->type()->is_constant() && v->type()->as_ObjectType()->constant_value()->is_null_object());
 136 }
 137 
 138 
 139 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const {
 140   if (c->type() == T_LONG) return false;
 141   return c->type() != T_OBJECT || c->as_jobject() == NULL;
 142 }
 143 
 144 
 145 LIR_Opr LIRGenerator::safepoint_poll_register() {
 146   return LIR_OprFact::illegalOpr;
 147 }
 148 
 149 
 150 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
 151                                             int shift, int disp, BasicType type) {
 152   assert(base->is_register(), "must be");
 153   if (index->is_constant()) {
 154     return new LIR_Address(base,
 155                            (index->as_constant_ptr()->as_jint() << shift) + disp,
 156                            type);
 157   } else {
 158     return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type);
 159   }
 160 }
 161 
 162 
 163 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
 164                                               BasicType type, bool needs_card_mark) {
 165   int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type);
 166 
 167   LIR_Address* addr;
 168   if (index_opr->is_constant()) {
 169     int elem_size = type2aelembytes(type);
 170     addr = new LIR_Address(array_opr,
 171                            offset_in_bytes + index_opr->as_jint() * elem_size, type);
 172   } else {
 173 #ifdef _LP64
 174     if (index_opr->type() == T_INT) {
 175       LIR_Opr tmp = new_register(T_LONG);
 176       __ convert(Bytecodes::_i2l, index_opr, tmp);
 177       index_opr = tmp;
 178     }
 179 #endif // _LP64
 180     addr =  new LIR_Address(array_opr,
 181                             index_opr,
 182                             LIR_Address::scale(type),
 183                             offset_in_bytes, type);
 184   }
 185   if (needs_card_mark) {
 186     // This store will need a precise card mark, so go ahead and
 187     // compute the full adddres instead of computing once for the
 188     // store and again for the card mark.
 189     LIR_Opr tmp = new_pointer_register();
 190     __ leal(LIR_OprFact::address(addr), tmp);
 191     return new LIR_Address(tmp, type);
 192   } else {
 193     return addr;
 194   }
 195 }
 196 
 197 
 198 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) {
 199   LIR_Opr r = NULL;
 200   if (type == T_LONG) {
 201     r = LIR_OprFact::longConst(x);
 202   } else if (type == T_INT) {
 203     r = LIR_OprFact::intConst(x);
 204   } else {
 205     ShouldNotReachHere();
 206   }
 207   return r;
 208 }
 209 
 210 void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
 211   LIR_Opr pointer = new_pointer_register();
 212   __ move(LIR_OprFact::intptrConst(counter), pointer);
 213   LIR_Address* addr = new LIR_Address(pointer, type);
 214   increment_counter(addr, step);
 215 }
 216 
 217 
 218 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
 219   __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr);
 220 }
 221 
 222 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
 223   __ cmp_mem_int(condition, base, disp, c, info);
 224 }
 225 
 226 
 227 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {
 228   __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
 229 }
 230 
 231 
 232 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, LIR_Opr disp, BasicType type, CodeEmitInfo* info) {
 233   __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
 234 }
 235 
 236 
 237 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) {
 238   if (tmp->is_valid()) {
 239     if (is_power_of_2(c + 1)) {
 240       __ move(left, tmp);
 241       __ shift_left(left, log2_intptr(c + 1), left);
 242       __ sub(left, tmp, result);
 243       return true;
 244     } else if (is_power_of_2(c - 1)) {
 245       __ move(left, tmp);
 246       __ shift_left(left, log2_intptr(c - 1), left);
 247       __ add(left, tmp, result);
 248       return true;
 249     }
 250   }
 251   return false;
 252 }
 253 
 254 
 255 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) {
 256   BasicType type = item->type();
 257   __ store(item, new LIR_Address(FrameMap::rsp_opr, in_bytes(offset_from_sp), type));
 258 }
 259 
 260 //----------------------------------------------------------------------
 261 //             visitor functions
 262 //----------------------------------------------------------------------
 263 
 264 
 265 void LIRGenerator::do_StoreIndexed(StoreIndexed* x) {
 266   assert(x->is_pinned(),"");
 267   bool needs_range_check = x->compute_needs_range_check();
 268   bool use_length = x->length() != NULL;
 269   bool obj_store = x->elt_type() == T_ARRAY || x->elt_type() == T_OBJECT;
 270   bool needs_store_check = obj_store && (x->value()->as_Constant() == NULL ||
 271                                          !get_jobject_constant(x->value())->is_null_object() ||
 272                                          x->should_profile());
 273 
 274   LIRItem array(x->array(), this);
 275   LIRItem index(x->index(), this);
 276   LIRItem value(x->value(), this);
 277   LIRItem length(this);
 278 
 279   array.load_item();
 280   index.load_nonconstant();
 281 
 282   if (use_length && needs_range_check) {
 283     length.set_instruction(x->length());
 284     length.load_item();
 285 
 286   }
 287   if (needs_store_check || x->check_boolean()) {
 288     value.load_item();
 289   } else {
 290     value.load_for_store(x->elt_type());
 291   }
 292 
 293   set_no_result(x);
 294 
 295   // the CodeEmitInfo must be duplicated for each different
 296   // LIR-instruction because spilling can occur anywhere between two
 297   // instructions and so the debug information must be different
 298   CodeEmitInfo* range_check_info = state_for(x);
 299   CodeEmitInfo* null_check_info = NULL;
 300   if (x->needs_null_check()) {
 301     null_check_info = new CodeEmitInfo(range_check_info);
 302   }
 303 
 304   // emit array address setup early so it schedules better
 305   LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), obj_store);
 306 
 307   if (GenerateRangeChecks && needs_range_check) {
 308     if (use_length) {
 309       __ cmp(lir_cond_belowEqual, length.result(), index.result());
 310       __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result()));
 311     } else {
 312       array_range_check(array.result(), index.result(), null_check_info, range_check_info);
 313       // range_check also does the null check
 314       null_check_info = NULL;
 315     }
 316   }
 317 
 318   if (GenerateArrayStoreCheck && needs_store_check) {
 319     LIR_Opr tmp1 = new_register(objectType);
 320     LIR_Opr tmp2 = new_register(objectType);
 321     LIR_Opr tmp3 = new_register(objectType);
 322 
 323     CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info);
 324     __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3, store_check_info, x->profiled_method(), x->profiled_bci());
 325   }
 326 
 327   if (obj_store) {
 328     // Needs GC write barriers.
 329     pre_barrier(LIR_OprFact::address(array_addr), LIR_OprFact::illegalOpr /* pre_val */,
 330                 true /* do_load */, false /* patch */, NULL);
 331     __ move(value.result(), array_addr, null_check_info);
 332     // Seems to be a precise
 333     post_barrier(LIR_OprFact::address(array_addr), value.result());
 334   } else {
 335     LIR_Opr result = maybe_mask_boolean(x, array.result(), value.result(), null_check_info);
 336     __ move(result, array_addr, null_check_info);
 337   }
 338 }
 339 
 340 
 341 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
 342   assert(x->is_pinned(),"");
 343   LIRItem obj(x->obj(), this);
 344   obj.load_item();
 345 
 346   set_no_result(x);
 347 
 348   // "lock" stores the address of the monitor stack slot, so this is not an oop
 349   LIR_Opr lock = new_register(T_INT);
 350   // Need a scratch register for biased locking on x86
 351   LIR_Opr scratch = LIR_OprFact::illegalOpr;
 352   if (UseBiasedLocking) {
 353     scratch = new_register(T_INT);
 354   }
 355 
 356   CodeEmitInfo* info_for_exception = NULL;
 357   if (x->needs_null_check()) {
 358     info_for_exception = state_for(x);
 359   }
 360   // this CodeEmitInfo must not have the xhandlers because here the
 361   // object is already locked (xhandlers expect object to be unlocked)
 362   CodeEmitInfo* info = state_for(x, x->state(), true);
 363   monitor_enter(obj.result(), lock, syncTempOpr(), scratch,
 364                         x->monitor_no(), info_for_exception, info);
 365 }
 366 
 367 
 368 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
 369   assert(x->is_pinned(),"");
 370 
 371   LIRItem obj(x->obj(), this);
 372   obj.dont_load_item();
 373 
 374   LIR_Opr lock = new_register(T_INT);
 375   LIR_Opr obj_temp = new_register(T_INT);
 376   set_no_result(x);
 377   monitor_exit(obj_temp, lock, syncTempOpr(), LIR_OprFact::illegalOpr, x->monitor_no());
 378 }
 379 
 380 
 381 // _ineg, _lneg, _fneg, _dneg
 382 void LIRGenerator::do_NegateOp(NegateOp* x) {
 383   LIRItem value(x->x(), this);
 384   value.set_destroys_register();
 385   value.load_item();
 386   LIR_Opr reg = rlock(x);
 387   __ negate(value.result(), reg);
 388 
 389   set_result(x, round_item(reg));
 390 }
 391 
 392 
 393 // for  _fadd, _fmul, _fsub, _fdiv, _frem
 394 //      _dadd, _dmul, _dsub, _ddiv, _drem
 395 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
 396   LIRItem left(x->x(),  this);
 397   LIRItem right(x->y(), this);
 398   LIRItem* left_arg  = &left;
 399   LIRItem* right_arg = &right;
 400   assert(!left.is_stack() || !right.is_stack(), "can't both be memory operands");
 401   bool must_load_both = (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem);
 402   if (left.is_register() || x->x()->type()->is_constant() || must_load_both) {
 403     left.load_item();
 404   } else {
 405     left.dont_load_item();
 406   }
 407 
 408   // do not load right operand if it is a constant.  only 0 and 1 are
 409   // loaded because there are special instructions for loading them
 410   // without memory access (not needed for SSE2 instructions)
 411   bool must_load_right = false;
 412   if (right.is_constant()) {
 413     LIR_Const* c = right.result()->as_constant_ptr();
 414     assert(c != NULL, "invalid constant");
 415     assert(c->type() == T_FLOAT || c->type() == T_DOUBLE, "invalid type");
 416 
 417     if (c->type() == T_FLOAT) {
 418       must_load_right = UseSSE < 1 && (c->is_one_float() || c->is_zero_float());
 419     } else {
 420       must_load_right = UseSSE < 2 && (c->is_one_double() || c->is_zero_double());
 421     }
 422   }
 423 
 424   if (must_load_both) {
 425     // frem and drem destroy also right operand, so move it to a new register
 426     right.set_destroys_register();
 427     right.load_item();
 428   } else if (right.is_register() || must_load_right) {
 429     right.load_item();
 430   } else {
 431     right.dont_load_item();
 432   }
 433   LIR_Opr reg = rlock(x);
 434   LIR_Opr tmp = LIR_OprFact::illegalOpr;
 435   if (x->is_strictfp() && (x->op() == Bytecodes::_dmul || x->op() == Bytecodes::_ddiv)) {
 436     tmp = new_register(T_DOUBLE);
 437   }
 438 
 439   if ((UseSSE >= 1 && x->op() == Bytecodes::_frem) || (UseSSE >= 2 && x->op() == Bytecodes::_drem)) {
 440     // special handling for frem and drem: no SSE instruction, so must use FPU with temporary fpu stack slots
 441     LIR_Opr fpu0, fpu1;
 442     if (x->op() == Bytecodes::_frem) {
 443       fpu0 = LIR_OprFact::single_fpu(0);
 444       fpu1 = LIR_OprFact::single_fpu(1);
 445     } else {
 446       fpu0 = LIR_OprFact::double_fpu(0);
 447       fpu1 = LIR_OprFact::double_fpu(1);
 448     }
 449     __ move(right.result(), fpu1); // order of left and right operand is important!
 450     __ move(left.result(), fpu0);
 451     __ rem (fpu0, fpu1, fpu0);
 452     __ move(fpu0, reg);
 453 
 454   } else {
 455     arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), x->is_strictfp(), tmp);
 456   }
 457 
 458   set_result(x, round_item(reg));
 459 }
 460 
 461 
 462 // for  _ladd, _lmul, _lsub, _ldiv, _lrem
 463 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
 464   if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem ) {
 465     // long division is implemented as a direct call into the runtime
 466     LIRItem left(x->x(), this);
 467     LIRItem right(x->y(), this);
 468 
 469     // the check for division by zero destroys the right operand
 470     right.set_destroys_register();
 471 
 472     BasicTypeList signature(2);
 473     signature.append(T_LONG);
 474     signature.append(T_LONG);
 475     CallingConvention* cc = frame_map()->c_calling_convention(&signature);
 476 
 477     // check for division by zero (destroys registers of right operand!)
 478     CodeEmitInfo* info = state_for(x);
 479 
 480     const LIR_Opr result_reg = result_register_for(x->type());
 481     left.load_item_force(cc->at(1));
 482     right.load_item();
 483 
 484     __ move(right.result(), cc->at(0));
 485 
 486     __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0));
 487     __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(info));
 488 
 489     address entry = NULL;
 490     switch (x->op()) {
 491     case Bytecodes::_lrem:
 492       entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem);
 493       break; // check if dividend is 0 is done elsewhere
 494     case Bytecodes::_ldiv:
 495       entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv);
 496       break; // check if dividend is 0 is done elsewhere
 497     case Bytecodes::_lmul:
 498       entry = CAST_FROM_FN_PTR(address, SharedRuntime::lmul);
 499       break;
 500     default:
 501       ShouldNotReachHere();
 502     }
 503 
 504     LIR_Opr result = rlock_result(x);
 505     __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args());
 506     __ move(result_reg, result);
 507   } else if (x->op() == Bytecodes::_lmul) {
 508     // missing test if instr is commutative and if we should swap
 509     LIRItem left(x->x(), this);
 510     LIRItem right(x->y(), this);
 511 
 512     // right register is destroyed by the long mul, so it must be
 513     // copied to a new register.
 514     right.set_destroys_register();
 515 
 516     left.load_item();
 517     right.load_item();
 518 
 519     LIR_Opr reg = FrameMap::long0_opr;
 520     arithmetic_op_long(x->op(), reg, left.result(), right.result(), NULL);
 521     LIR_Opr result = rlock_result(x);
 522     __ move(reg, result);
 523   } else {
 524     // missing test if instr is commutative and if we should swap
 525     LIRItem left(x->x(), this);
 526     LIRItem right(x->y(), this);
 527 
 528     left.load_item();
 529     // don't load constants to save register
 530     right.load_nonconstant();
 531     rlock_result(x);
 532     arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
 533   }
 534 }
 535 
 536 
 537 
 538 // for: _iadd, _imul, _isub, _idiv, _irem
 539 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
 540   if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) {
 541     // The requirements for division and modulo
 542     // input : rax,: dividend                         min_int
 543     //         reg: divisor   (may not be rax,/rdx)   -1
 544     //
 545     // output: rax,: quotient  (= rax, idiv reg)       min_int
 546     //         rdx: remainder (= rax, irem reg)       0
 547 
 548     // rax, and rdx will be destroyed
 549 
 550     // Note: does this invalidate the spec ???
 551     LIRItem right(x->y(), this);
 552     LIRItem left(x->x() , this);   // visit left second, so that the is_register test is valid
 553 
 554     // call state_for before load_item_force because state_for may
 555     // force the evaluation of other instructions that are needed for
 556     // correct debug info.  Otherwise the live range of the fix
 557     // register might be too long.
 558     CodeEmitInfo* info = state_for(x);
 559 
 560     left.load_item_force(divInOpr());
 561 
 562     right.load_item();
 563 
 564     LIR_Opr result = rlock_result(x);
 565     LIR_Opr result_reg;
 566     if (x->op() == Bytecodes::_idiv) {
 567       result_reg = divOutOpr();
 568     } else {
 569       result_reg = remOutOpr();
 570     }
 571 
 572     if (!ImplicitDiv0Checks) {
 573       __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0));
 574       __ branch(lir_cond_equal, T_INT, new DivByZeroStub(info));
 575     }
 576     LIR_Opr tmp = FrameMap::rdx_opr; // idiv and irem use rdx in their implementation
 577     if (x->op() == Bytecodes::_irem) {
 578       __ irem(left.result(), right.result(), result_reg, tmp, info);
 579     } else if (x->op() == Bytecodes::_idiv) {
 580       __ idiv(left.result(), right.result(), result_reg, tmp, info);
 581     } else {
 582       ShouldNotReachHere();
 583     }
 584 
 585     __ move(result_reg, result);
 586   } else {
 587     // missing test if instr is commutative and if we should swap
 588     LIRItem left(x->x(),  this);
 589     LIRItem right(x->y(), this);
 590     LIRItem* left_arg = &left;
 591     LIRItem* right_arg = &right;
 592     if (x->is_commutative() && left.is_stack() && right.is_register()) {
 593       // swap them if left is real stack (or cached) and right is real register(not cached)
 594       left_arg = &right;
 595       right_arg = &left;
 596     }
 597 
 598     left_arg->load_item();
 599 
 600     // do not need to load right, as we can handle stack and constants
 601     if (x->op() == Bytecodes::_imul ) {
 602       // check if we can use shift instead
 603       bool use_constant = false;
 604       bool use_tmp = false;
 605       if (right_arg->is_constant()) {
 606         int iconst = right_arg->get_jint_constant();
 607         if (iconst > 0) {
 608           if (is_power_of_2(iconst)) {
 609             use_constant = true;
 610           } else if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) {
 611             use_constant = true;
 612             use_tmp = true;
 613           }
 614         }
 615       }
 616       if (use_constant) {
 617         right_arg->dont_load_item();
 618       } else {
 619         right_arg->load_item();
 620       }
 621       LIR_Opr tmp = LIR_OprFact::illegalOpr;
 622       if (use_tmp) {
 623         tmp = new_register(T_INT);
 624       }
 625       rlock_result(x);
 626 
 627       arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
 628     } else {
 629       right_arg->dont_load_item();
 630       rlock_result(x);
 631       LIR_Opr tmp = LIR_OprFact::illegalOpr;
 632       arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
 633     }
 634   }
 635 }
 636 
 637 
 638 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
 639   // when an operand with use count 1 is the left operand, then it is
 640   // likely that no move for 2-operand-LIR-form is necessary
 641   if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
 642     x->swap_operands();
 643   }
 644 
 645   ValueTag tag = x->type()->tag();
 646   assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
 647   switch (tag) {
 648     case floatTag:
 649     case doubleTag:  do_ArithmeticOp_FPU(x);  return;
 650     case longTag:    do_ArithmeticOp_Long(x); return;
 651     case intTag:     do_ArithmeticOp_Int(x);  return;
 652   }
 653   ShouldNotReachHere();
 654 }
 655 
 656 
 657 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
 658 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
 659   // count must always be in rcx
 660   LIRItem value(x->x(), this);
 661   LIRItem count(x->y(), this);
 662 
 663   ValueTag elemType = x->type()->tag();
 664   bool must_load_count = !count.is_constant() || elemType == longTag;
 665   if (must_load_count) {
 666     // count for long must be in register
 667     count.load_item_force(shiftCountOpr());
 668   } else {
 669     count.dont_load_item();
 670   }
 671   value.load_item();
 672   LIR_Opr reg = rlock_result(x);
 673 
 674   shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr);
 675 }
 676 
 677 
 678 // _iand, _land, _ior, _lor, _ixor, _lxor
 679 void LIRGenerator::do_LogicOp(LogicOp* x) {
 680   // when an operand with use count 1 is the left operand, then it is
 681   // likely that no move for 2-operand-LIR-form is necessary
 682   if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
 683     x->swap_operands();
 684   }
 685 
 686   LIRItem left(x->x(), this);
 687   LIRItem right(x->y(), this);
 688 
 689   left.load_item();
 690   right.load_nonconstant();
 691   LIR_Opr reg = rlock_result(x);
 692 
 693   logic_op(x->op(), reg, left.result(), right.result());
 694 }
 695 
 696 
 697 
 698 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
 699 void LIRGenerator::do_CompareOp(CompareOp* x) {
 700   LIRItem left(x->x(), this);
 701   LIRItem right(x->y(), this);
 702   ValueTag tag = x->x()->type()->tag();
 703   if (tag == longTag) {
 704     left.set_destroys_register();
 705   }
 706   left.load_item();
 707   right.load_item();
 708   LIR_Opr reg = rlock_result(x);
 709 
 710   if (x->x()->type()->is_float_kind()) {
 711     Bytecodes::Code code = x->op();
 712     __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
 713   } else if (x->x()->type()->tag() == longTag) {
 714     __ lcmp2int(left.result(), right.result(), reg);
 715   } else {
 716     Unimplemented();
 717   }
 718 }
 719 
 720 
 721 void LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) {
 722   assert(x->number_of_arguments() == 4, "wrong type");
 723   LIRItem obj   (x->argument_at(0), this);  // object
 724   LIRItem offset(x->argument_at(1), this);  // offset of field
 725   LIRItem cmp   (x->argument_at(2), this);  // value to compare with field
 726   LIRItem val   (x->argument_at(3), this);  // replace field with val if matches cmp
 727 
 728   assert(obj.type()->tag() == objectTag, "invalid type");
 729 
 730   // In 64bit the type can be long, sparc doesn't have this assert
 731   // assert(offset.type()->tag() == intTag, "invalid type");
 732 
 733   assert(cmp.type()->tag() == type->tag(), "invalid type");
 734   assert(val.type()->tag() == type->tag(), "invalid type");
 735 
 736   // get address of field
 737   obj.load_item();
 738   offset.load_nonconstant();
 739 
 740   LIR_Opr addr = new_pointer_register();
 741   LIR_Address* a;
 742   if(offset.result()->is_constant()) {
 743 #ifdef _LP64
 744     jlong c = offset.result()->as_jlong();
 745     if ((jlong)((jint)c) == c) {
 746       a = new LIR_Address(obj.result(),
 747                           (jint)c,
 748                           as_BasicType(type));
 749     } else {
 750       LIR_Opr tmp = new_register(T_LONG);
 751       __ move(offset.result(), tmp);
 752       a = new LIR_Address(obj.result(),
 753                           tmp,
 754                           as_BasicType(type));
 755     }
 756 #else
 757     a = new LIR_Address(obj.result(),
 758                         offset.result()->as_jint(),
 759                         as_BasicType(type));
 760 #endif
 761   } else {
 762     a = new LIR_Address(obj.result(),
 763                         offset.result(),
 764                         LIR_Address::times_1,
 765                         0,
 766                         as_BasicType(type));
 767   }
 768   __ leal(LIR_OprFact::address(a), addr);
 769 
 770   if (type == objectType) {  // Write-barrier needed for Object fields.
 771     // Do the pre-write barrier, if any.
 772     pre_barrier(addr, LIR_OprFact::illegalOpr /* pre_val */,
 773                 true /* do_load */, false /* patch */, NULL);
 774   }
 775 
 776   if (type == objectType) {
 777     cmp.load_item_force(FrameMap::rax_oop_opr);
 778     val.load_item();
 779   } else if (type == intType) {
 780     cmp.load_item_force(FrameMap::rax_opr);
 781     val.load_item();
 782   } else if (type == longType) {
 783     cmp.load_item_force(FrameMap::long0_opr);
 784     val.load_item_force(FrameMap::long1_opr);
 785   } else {
 786     ShouldNotReachHere();
 787   }
 788 
 789   LIR_Opr ill = LIR_OprFact::illegalOpr;  // for convenience
 790   if (type == objectType)
 791     __ cas_obj(addr, cmp.result(), val.result(), ill, ill);
 792   else if (type == intType)
 793     __ cas_int(addr, cmp.result(), val.result(), ill, ill);
 794   else if (type == longType)
 795     __ cas_long(addr, cmp.result(), val.result(), ill, ill);
 796   else {
 797     ShouldNotReachHere();
 798   }
 799 
 800   // generate conditional move of boolean result
 801   LIR_Opr result = rlock_result(x);
 802   __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
 803            result, as_BasicType(type));
 804   if (type == objectType) {   // Write-barrier needed for Object fields.
 805     // Seems to be precise
 806     post_barrier(addr, val.result());
 807   }
 808 }
 809 


























 810 
 811 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
 812   assert(x->number_of_arguments() == 1 || (x->number_of_arguments() == 2 && x->id() == vmIntrinsics::_dpow), "wrong type");
 813 
 814   if (x->id() == vmIntrinsics::_dexp || x->id() == vmIntrinsics::_dlog ||
 815       x->id() == vmIntrinsics::_dpow || x->id() == vmIntrinsics::_dcos ||
 816       x->id() == vmIntrinsics::_dsin || x->id() == vmIntrinsics::_dtan ||
 817       x->id() == vmIntrinsics::_dlog10) {
 818     do_LibmIntrinsic(x);
 819     return;
 820   }
 821 
 822   LIRItem value(x->argument_at(0), this);
 823 
 824   bool use_fpu = false;
 825   if (UseSSE < 2) {
 826     value.set_destroys_register();
 827   }
 828   value.load_item();
 829 
 830   LIR_Opr calc_input = value.result();
 831   LIR_Opr calc_result = rlock_result(x);
 832 
 833   switch(x->id()) {
 834     case vmIntrinsics::_dabs:   __ abs  (calc_input, calc_result, LIR_OprFact::illegalOpr); break;
 835     case vmIntrinsics::_dsqrt:  __ sqrt (calc_input, calc_result, LIR_OprFact::illegalOpr); break;
 836     default:                    ShouldNotReachHere();
 837   }
 838 
 839   if (use_fpu) {
 840     __ move(calc_result, x->operand());
 841   }
 842 }
 843 
 844 void LIRGenerator::do_LibmIntrinsic(Intrinsic* x) {
 845   LIRItem value(x->argument_at(0), this);
 846   value.set_destroys_register();
 847 
 848   LIR_Opr calc_result = rlock_result(x);
 849   LIR_Opr result_reg = result_register_for(x->type());
 850 
 851   CallingConvention* cc = NULL;
 852 
 853   if (x->id() == vmIntrinsics::_dpow) {
 854     LIRItem value1(x->argument_at(1), this);
 855 
 856     value1.set_destroys_register();
 857 
 858     BasicTypeList signature(2);
 859     signature.append(T_DOUBLE);
 860     signature.append(T_DOUBLE);
 861     cc = frame_map()->c_calling_convention(&signature);
 862     value.load_item_force(cc->at(0));
 863     value1.load_item_force(cc->at(1));
 864   } else {
 865     BasicTypeList signature(1);
 866     signature.append(T_DOUBLE);
 867     cc = frame_map()->c_calling_convention(&signature);
 868     value.load_item_force(cc->at(0));
 869   }
 870 
 871 #ifndef _LP64
 872   LIR_Opr tmp = FrameMap::fpu0_double_opr;
 873   result_reg = tmp;
 874   switch(x->id()) {
 875     case vmIntrinsics::_dexp:
 876       if (StubRoutines::dexp() != NULL) {
 877         __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args());
 878       } else {
 879         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args());
 880       }
 881       break;
 882     case vmIntrinsics::_dlog:
 883       if (StubRoutines::dlog() != NULL) {
 884         __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args());
 885       } else {
 886         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args());
 887       }
 888       break;
 889     case vmIntrinsics::_dlog10:
 890       if (StubRoutines::dlog10() != NULL) {
 891        __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args());
 892       } else {
 893         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args());
 894       }
 895       break;
 896     case vmIntrinsics::_dpow:
 897       if (StubRoutines::dpow() != NULL) {
 898         __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args());
 899       } else {
 900         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args());
 901       }
 902       break;
 903     case vmIntrinsics::_dsin:
 904       if (VM_Version::supports_sse2() && StubRoutines::dsin() != NULL) {
 905         __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args());
 906       } else {
 907         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args());
 908       }
 909       break;
 910     case vmIntrinsics::_dcos:
 911       if (VM_Version::supports_sse2() && StubRoutines::dcos() != NULL) {
 912         __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args());
 913       } else {
 914         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args());
 915       }
 916       break;
 917     case vmIntrinsics::_dtan:
 918       if (StubRoutines::dtan() != NULL) {
 919         __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args());
 920       } else {
 921         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args());
 922       }
 923       break;
 924     default:  ShouldNotReachHere();
 925   }
 926 #else
 927   switch (x->id()) {
 928     case vmIntrinsics::_dexp:
 929       if (StubRoutines::dexp() != NULL) {
 930         __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args());
 931       } else {
 932         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args());
 933       }
 934       break;
 935     case vmIntrinsics::_dlog:
 936       if (StubRoutines::dlog() != NULL) {
 937       __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args());
 938       } else {
 939         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args());
 940       }
 941       break;
 942     case vmIntrinsics::_dlog10:
 943       if (StubRoutines::dlog10() != NULL) {
 944       __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args());
 945       } else {
 946         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args());
 947       }
 948       break;
 949     case vmIntrinsics::_dpow:
 950        if (StubRoutines::dpow() != NULL) {
 951       __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args());
 952       } else {
 953         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args());
 954       }
 955       break;
 956     case vmIntrinsics::_dsin:
 957       if (StubRoutines::dsin() != NULL) {
 958         __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args());
 959       } else {
 960         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args());
 961       }
 962       break;
 963     case vmIntrinsics::_dcos:
 964       if (StubRoutines::dcos() != NULL) {
 965         __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args());
 966       } else {
 967         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args());
 968       }
 969       break;
 970     case vmIntrinsics::_dtan:
 971        if (StubRoutines::dtan() != NULL) {
 972       __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args());
 973       } else {
 974         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args());
 975       }
 976       break;
 977     default:  ShouldNotReachHere();
 978   }
 979 #endif // _LP64
 980   __ move(result_reg, calc_result);
 981 }
 982 
 983 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
 984   assert(x->number_of_arguments() == 5, "wrong type");
 985 
 986   // Make all state_for calls early since they can emit code
 987   CodeEmitInfo* info = state_for(x, x->state());
 988 
 989   LIRItem src(x->argument_at(0), this);
 990   LIRItem src_pos(x->argument_at(1), this);
 991   LIRItem dst(x->argument_at(2), this);
 992   LIRItem dst_pos(x->argument_at(3), this);
 993   LIRItem length(x->argument_at(4), this);
 994 
 995   // operands for arraycopy must use fixed registers, otherwise
 996   // LinearScan will fail allocation (because arraycopy always needs a
 997   // call)
 998 
 999 #ifndef _LP64
1000   src.load_item_force     (FrameMap::rcx_oop_opr);
1001   src_pos.load_item_force (FrameMap::rdx_opr);
1002   dst.load_item_force     (FrameMap::rax_oop_opr);
1003   dst_pos.load_item_force (FrameMap::rbx_opr);
1004   length.load_item_force  (FrameMap::rdi_opr);
1005   LIR_Opr tmp =           (FrameMap::rsi_opr);
1006 #else
1007 
1008   // The java calling convention will give us enough registers
1009   // so that on the stub side the args will be perfect already.
1010   // On the other slow/special case side we call C and the arg
1011   // positions are not similar enough to pick one as the best.
1012   // Also because the java calling convention is a "shifted" version
1013   // of the C convention we can process the java args trivially into C
1014   // args without worry of overwriting during the xfer
1015 
1016   src.load_item_force     (FrameMap::as_oop_opr(j_rarg0));
1017   src_pos.load_item_force (FrameMap::as_opr(j_rarg1));
1018   dst.load_item_force     (FrameMap::as_oop_opr(j_rarg2));
1019   dst_pos.load_item_force (FrameMap::as_opr(j_rarg3));
1020   length.load_item_force  (FrameMap::as_opr(j_rarg4));
1021 
1022   LIR_Opr tmp =           FrameMap::as_opr(j_rarg5);
1023 #endif // LP64
1024 
1025   set_no_result(x);
1026 
1027   int flags;
1028   ciArrayKlass* expected_type;
1029   arraycopy_helper(x, &flags, &expected_type);
1030 
1031   __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint
1032 }
1033 
1034 void LIRGenerator::do_update_CRC32(Intrinsic* x) {
1035   assert(UseCRC32Intrinsics, "need AVX and LCMUL instructions support");
1036   // Make all state_for calls early since they can emit code
1037   LIR_Opr result = rlock_result(x);
1038   int flags = 0;
1039   switch (x->id()) {
1040     case vmIntrinsics::_updateCRC32: {
1041       LIRItem crc(x->argument_at(0), this);
1042       LIRItem val(x->argument_at(1), this);
1043       // val is destroyed by update_crc32
1044       val.set_destroys_register();
1045       crc.load_item();
1046       val.load_item();
1047       __ update_crc32(crc.result(), val.result(), result);
1048       break;
1049     }
1050     case vmIntrinsics::_updateBytesCRC32:
1051     case vmIntrinsics::_updateByteBufferCRC32: {
1052       bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32);
1053 
1054       LIRItem crc(x->argument_at(0), this);
1055       LIRItem buf(x->argument_at(1), this);
1056       LIRItem off(x->argument_at(2), this);
1057       LIRItem len(x->argument_at(3), this);
1058       buf.load_item();
1059       off.load_nonconstant();
1060 
1061       LIR_Opr index = off.result();
1062       int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
1063       if(off.result()->is_constant()) {
1064         index = LIR_OprFact::illegalOpr;
1065        offset += off.result()->as_jint();
1066       }
1067       LIR_Opr base_op = buf.result();
1068 
1069 #ifndef _LP64
1070       if (!is_updateBytes) { // long b raw address
1071          base_op = new_register(T_INT);
1072          __ convert(Bytecodes::_l2i, buf.result(), base_op);
1073       }
1074 #else
1075       if (index->is_valid()) {
1076         LIR_Opr tmp = new_register(T_LONG);
1077         __ convert(Bytecodes::_i2l, index, tmp);
1078         index = tmp;
1079       }
1080 #endif
1081 
1082       LIR_Address* a = new LIR_Address(base_op,
1083                                        index,
1084                                        LIR_Address::times_1,
1085                                        offset,
1086                                        T_BYTE);
1087       BasicTypeList signature(3);
1088       signature.append(T_INT);
1089       signature.append(T_ADDRESS);
1090       signature.append(T_INT);
1091       CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1092       const LIR_Opr result_reg = result_register_for(x->type());
1093 
1094       LIR_Opr addr = new_pointer_register();
1095       __ leal(LIR_OprFact::address(a), addr);
1096 
1097       crc.load_item_force(cc->at(0));
1098       __ move(addr, cc->at(1));
1099       len.load_item_force(cc->at(2));
1100 
1101       __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), getThreadTemp(), result_reg, cc->args());
1102       __ move(result_reg, result);
1103 
1104       break;
1105     }
1106     default: {
1107       ShouldNotReachHere();
1108     }
1109   }
1110 }
1111 
1112 void LIRGenerator::do_update_CRC32C(Intrinsic* x) {
1113   Unimplemented();
1114 }
1115 
1116 void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) {
1117   assert(UseVectorizedMismatchIntrinsic, "need AVX instruction support");
1118 
1119   // Make all state_for calls early since they can emit code
1120   LIR_Opr result = rlock_result(x);
1121 
1122   LIRItem a(x->argument_at(0), this); // Object
1123   LIRItem aOffset(x->argument_at(1), this); // long
1124   LIRItem b(x->argument_at(2), this); // Object
1125   LIRItem bOffset(x->argument_at(3), this); // long
1126   LIRItem length(x->argument_at(4), this); // int
1127   LIRItem log2ArrayIndexScale(x->argument_at(5), this); // int
1128 
1129   a.load_item();
1130   aOffset.load_nonconstant();
1131   b.load_item();
1132   bOffset.load_nonconstant();
1133 
1134   long constant_aOffset = 0;
1135   LIR_Opr result_aOffset = aOffset.result();
1136   if (result_aOffset->is_constant()) {
1137     constant_aOffset = result_aOffset->as_jlong();
1138     result_aOffset = LIR_OprFact::illegalOpr;
1139   }
1140   LIR_Opr result_a = a.result();
1141 
1142   long constant_bOffset = 0;
1143   LIR_Opr result_bOffset = bOffset.result();
1144   if (result_bOffset->is_constant()) {
1145     constant_bOffset = result_bOffset->as_jlong();
1146     result_bOffset = LIR_OprFact::illegalOpr;
1147   }
1148   LIR_Opr result_b = b.result();
1149 
1150 #ifndef _LP64
1151   result_a = new_register(T_INT);
1152   __ convert(Bytecodes::_l2i, a.result(), result_a);
1153   result_b = new_register(T_INT);
1154   __ convert(Bytecodes::_l2i, b.result(), result_b);
1155 #endif
1156 
1157 
1158   LIR_Address* addr_a = new LIR_Address(result_a,
1159                                         result_aOffset,
1160                                         LIR_Address::times_1,
1161                                         constant_aOffset,
1162                                         T_BYTE);
1163 
1164   LIR_Address* addr_b = new LIR_Address(result_b,
1165                                         result_bOffset,
1166                                         LIR_Address::times_1,
1167                                         constant_bOffset,
1168                                         T_BYTE);
1169 
1170   BasicTypeList signature(4);
1171   signature.append(T_ADDRESS);
1172   signature.append(T_ADDRESS);
1173   signature.append(T_INT);
1174   signature.append(T_INT);
1175   CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1176   const LIR_Opr result_reg = result_register_for(x->type());
1177 
1178   LIR_Opr ptr_addr_a = new_pointer_register();
1179   __ leal(LIR_OprFact::address(addr_a), ptr_addr_a);
1180 
1181   LIR_Opr ptr_addr_b = new_pointer_register();
1182   __ leal(LIR_OprFact::address(addr_b), ptr_addr_b);
1183 
1184   __ move(ptr_addr_a, cc->at(0));
1185   __ move(ptr_addr_b, cc->at(1));
1186   length.load_item_force(cc->at(2));
1187   log2ArrayIndexScale.load_item_force(cc->at(3));
1188 
1189   __ call_runtime_leaf(StubRoutines::vectorizedMismatch(), getThreadTemp(), result_reg, cc->args());
1190   __ move(result_reg, result);
1191 }
1192 
1193 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
1194 // _i2b, _i2c, _i2s
1195 LIR_Opr fixed_register_for(BasicType type) {
1196   switch (type) {
1197     case T_FLOAT:  return FrameMap::fpu0_float_opr;
1198     case T_DOUBLE: return FrameMap::fpu0_double_opr;
1199     case T_INT:    return FrameMap::rax_opr;
1200     case T_LONG:   return FrameMap::long0_opr;
1201     default:       ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
1202   }
1203 }
1204 
1205 void LIRGenerator::do_Convert(Convert* x) {
1206   // flags that vary for the different operations and different SSE-settings
1207   bool fixed_input = false, fixed_result = false, round_result = false, needs_stub = false;
1208 
1209   switch (x->op()) {
1210     case Bytecodes::_i2l: // fall through
1211     case Bytecodes::_l2i: // fall through
1212     case Bytecodes::_i2b: // fall through
1213     case Bytecodes::_i2c: // fall through
1214     case Bytecodes::_i2s: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = false; break;
1215 
1216     case Bytecodes::_f2d: fixed_input = UseSSE == 1; fixed_result = false;       round_result = false;      needs_stub = false; break;
1217     case Bytecodes::_d2f: fixed_input = false;       fixed_result = UseSSE == 1; round_result = UseSSE < 1; needs_stub = false; break;
1218     case Bytecodes::_i2f: fixed_input = false;       fixed_result = false;       round_result = UseSSE < 1; needs_stub = false; break;
1219     case Bytecodes::_i2d: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = false; break;
1220     case Bytecodes::_f2i: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = true;  break;
1221     case Bytecodes::_d2i: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = true;  break;
1222     case Bytecodes::_l2f: fixed_input = false;       fixed_result = UseSSE >= 1; round_result = UseSSE < 1; needs_stub = false; break;
1223     case Bytecodes::_l2d: fixed_input = false;       fixed_result = UseSSE >= 2; round_result = UseSSE < 2; needs_stub = false; break;
1224     case Bytecodes::_f2l: fixed_input = true;        fixed_result = true;        round_result = false;      needs_stub = false; break;
1225     case Bytecodes::_d2l: fixed_input = true;        fixed_result = true;        round_result = false;      needs_stub = false; break;
1226     default: ShouldNotReachHere();
1227   }
1228 
1229   LIRItem value(x->value(), this);
1230   value.load_item();
1231   LIR_Opr input = value.result();
1232   LIR_Opr result = rlock(x);
1233 
1234   // arguments of lir_convert
1235   LIR_Opr conv_input = input;
1236   LIR_Opr conv_result = result;
1237   ConversionStub* stub = NULL;
1238 
1239   if (fixed_input) {
1240     conv_input = fixed_register_for(input->type());
1241     __ move(input, conv_input);
1242   }
1243 
1244   assert(fixed_result == false || round_result == false, "cannot set both");
1245   if (fixed_result) {
1246     conv_result = fixed_register_for(result->type());
1247   } else if (round_result) {
1248     result = new_register(result->type());
1249     set_vreg_flag(result, must_start_in_memory);
1250   }
1251 
1252   if (needs_stub) {
1253     stub = new ConversionStub(x->op(), conv_input, conv_result);
1254   }
1255 
1256   __ convert(x->op(), conv_input, conv_result, stub);
1257 
1258   if (result != conv_result) {
1259     __ move(conv_result, result);
1260   }
1261 
1262   assert(result->is_virtual(), "result must be virtual register");
1263   set_result(x, result);
1264 }
1265 
1266 
1267 void LIRGenerator::do_NewInstance(NewInstance* x) {
1268   print_if_not_loaded(x);
1269 
1270   CodeEmitInfo* info = state_for(x, x->state());
1271   LIR_Opr reg = result_register_for(x->type());
1272   new_instance(reg, x->klass(), x->is_unresolved(),
1273                        FrameMap::rcx_oop_opr,
1274                        FrameMap::rdi_oop_opr,
1275                        FrameMap::rsi_oop_opr,
1276                        LIR_OprFact::illegalOpr,
1277                        FrameMap::rdx_metadata_opr, info);
1278   LIR_Opr result = rlock_result(x);
1279   __ move(reg, result);
1280 }
1281 
1282 
1283 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
1284   CodeEmitInfo* info = state_for(x, x->state());
1285 
1286   LIRItem length(x->length(), this);
1287   length.load_item_force(FrameMap::rbx_opr);
1288 
1289   LIR_Opr reg = result_register_for(x->type());
1290   LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1291   LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1292   LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1293   LIR_Opr tmp4 = reg;
1294   LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1295   LIR_Opr len = length.result();
1296   BasicType elem_type = x->elt_type();
1297 
1298   __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
1299 
1300   CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
1301   __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path);
1302 
1303   LIR_Opr result = rlock_result(x);
1304   __ move(reg, result);
1305 }
1306 
1307 
1308 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
1309   LIRItem length(x->length(), this);
1310   // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction
1311   // and therefore provide the state before the parameters have been consumed
1312   CodeEmitInfo* patching_info = NULL;
1313   if (!x->klass()->is_loaded() || PatchALot) {
1314     patching_info =  state_for(x, x->state_before());
1315   }
1316 
1317   CodeEmitInfo* info = state_for(x, x->state());
1318 
1319   const LIR_Opr reg = result_register_for(x->type());
1320   LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1321   LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1322   LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1323   LIR_Opr tmp4 = reg;
1324   LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1325 
1326   length.load_item_force(FrameMap::rbx_opr);
1327   LIR_Opr len = length.result();
1328 
1329   CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info);
1330   ciKlass* obj = (ciKlass*) ciObjArrayKlass::make(x->klass());
1331   if (obj == ciEnv::unloaded_ciobjarrayklass()) {
1332     BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
1333   }
1334   klass2reg_with_patching(klass_reg, obj, patching_info);
1335   __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);
1336 
1337   LIR_Opr result = rlock_result(x);
1338   __ move(reg, result);
1339 }
1340 
1341 
1342 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
1343   Values* dims = x->dims();
1344   int i = dims->length();
1345   LIRItemList* items = new LIRItemList(i, i, NULL);
1346   while (i-- > 0) {
1347     LIRItem* size = new LIRItem(dims->at(i), this);
1348     items->at_put(i, size);
1349   }
1350 
1351   // Evaluate state_for early since it may emit code.
1352   CodeEmitInfo* patching_info = NULL;
1353   if (!x->klass()->is_loaded() || PatchALot) {
1354     patching_info = state_for(x, x->state_before());
1355 
1356     // Cannot re-use same xhandlers for multiple CodeEmitInfos, so
1357     // clone all handlers (NOTE: Usually this is handled transparently
1358     // by the CodeEmitInfo cloning logic in CodeStub constructors but
1359     // is done explicitly here because a stub isn't being used).
1360     x->set_exception_handlers(new XHandlers(x->exception_handlers()));
1361   }
1362   CodeEmitInfo* info = state_for(x, x->state());
1363 
1364   i = dims->length();
1365   while (i-- > 0) {
1366     LIRItem* size = items->at(i);
1367     size->load_nonconstant();
1368 
1369     store_stack_parameter(size->result(), in_ByteSize(i*4));
1370   }
1371 
1372   LIR_Opr klass_reg = FrameMap::rax_metadata_opr;
1373   klass2reg_with_patching(klass_reg, x->klass(), patching_info);
1374 
1375   LIR_Opr rank = FrameMap::rbx_opr;
1376   __ move(LIR_OprFact::intConst(x->rank()), rank);
1377   LIR_Opr varargs = FrameMap::rcx_opr;
1378   __ move(FrameMap::rsp_opr, varargs);
1379   LIR_OprList* args = new LIR_OprList(3);
1380   args->append(klass_reg);
1381   args->append(rank);
1382   args->append(varargs);
1383   LIR_Opr reg = result_register_for(x->type());
1384   __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id),
1385                   LIR_OprFact::illegalOpr,
1386                   reg, args, info);
1387 
1388   LIR_Opr result = rlock_result(x);
1389   __ move(reg, result);
1390 }
1391 
1392 
1393 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
1394   // nothing to do for now
1395 }
1396 
1397 
1398 void LIRGenerator::do_CheckCast(CheckCast* x) {
1399   LIRItem obj(x->obj(), this);
1400 
1401   CodeEmitInfo* patching_info = NULL;
1402   if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check())) {
1403     // must do this before locking the destination register as an oop register,
1404     // and before the obj is loaded (the latter is for deoptimization)
1405     patching_info = state_for(x, x->state_before());
1406   }
1407   obj.load_item();
1408 
1409   // info for exceptions
1410   CodeEmitInfo* info_for_exception = state_for(x);
1411 
1412   CodeStub* stub;
1413   if (x->is_incompatible_class_change_check()) {
1414     assert(patching_info == NULL, "can't patch this");
1415     stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception);
1416   } else {
1417     stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception);
1418   }
1419   LIR_Opr reg = rlock_result(x);
1420   LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1421   if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1422     tmp3 = new_register(objectType);
1423   }
1424   __ checkcast(reg, obj.result(), x->klass(),
1425                new_register(objectType), new_register(objectType), tmp3,
1426                x->direct_compare(), info_for_exception, patching_info, stub,
1427                x->profiled_method(), x->profiled_bci());
1428 }
1429 
1430 
1431 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
1432   LIRItem obj(x->obj(), this);
1433 
1434   // result and test object may not be in same register
1435   LIR_Opr reg = rlock_result(x);
1436   CodeEmitInfo* patching_info = NULL;
1437   if ((!x->klass()->is_loaded() || PatchALot)) {
1438     // must do this before locking the destination register as an oop register
1439     patching_info = state_for(x, x->state_before());
1440   }
1441   obj.load_item();
1442   LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1443   if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1444     tmp3 = new_register(objectType);
1445   }
1446   __ instanceof(reg, obj.result(), x->klass(),
1447                 new_register(objectType), new_register(objectType), tmp3,
1448                 x->direct_compare(), patching_info, x->profiled_method(), x->profiled_bci());
1449 }
1450 
1451 
1452 void LIRGenerator::do_If(If* x) {
1453   assert(x->number_of_sux() == 2, "inconsistency");
1454   ValueTag tag = x->x()->type()->tag();
1455   bool is_safepoint = x->is_safepoint();
1456 
1457   If::Condition cond = x->cond();
1458 
1459   LIRItem xitem(x->x(), this);
1460   LIRItem yitem(x->y(), this);
1461   LIRItem* xin = &xitem;
1462   LIRItem* yin = &yitem;
1463 
1464   if (tag == longTag) {
1465     // for longs, only conditions "eql", "neq", "lss", "geq" are valid;
1466     // mirror for other conditions
1467     if (cond == If::gtr || cond == If::leq) {
1468       cond = Instruction::mirror(cond);
1469       xin = &yitem;
1470       yin = &xitem;
1471     }
1472     xin->set_destroys_register();
1473   }
1474   xin->load_item();
1475   if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) {
1476     // inline long zero
1477     yin->dont_load_item();
1478   } else if (tag == longTag || tag == floatTag || tag == doubleTag) {
1479     // longs cannot handle constants at right side
1480     yin->load_item();
1481   } else {
1482     yin->dont_load_item();
1483   }
1484 
1485   // add safepoint before generating condition code so it can be recomputed
1486   if (x->is_safepoint()) {
1487     // increment backedge counter if needed
1488     increment_backedge_counter(state_for(x, x->state_before()), x->profiled_bci());
1489     __ safepoint(LIR_OprFact::illegalOpr, state_for(x, x->state_before()));
1490   }
1491   set_no_result(x);
1492 
1493   LIR_Opr left = xin->result();
1494   LIR_Opr right = yin->result();
1495   __ cmp(lir_cond(cond), left, right);
1496   // Generate branch profiling. Profiling code doesn't kill flags.
1497   profile_branch(x, cond);
1498   move_to_phi(x->state());
1499   if (x->x()->type()->is_float_kind()) {
1500     __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux());
1501   } else {
1502     __ branch(lir_cond(cond), right->type(), x->tsux());
1503   }
1504   assert(x->default_sux() == x->fsux(), "wrong destination above");
1505   __ jump(x->default_sux());
1506 }
1507 
1508 
1509 LIR_Opr LIRGenerator::getThreadPointer() {
1510 #ifdef _LP64
1511   return FrameMap::as_pointer_opr(r15_thread);
1512 #else
1513   LIR_Opr result = new_register(T_INT);
1514   __ get_thread(result);
1515   return result;
1516 #endif //
1517 }
1518 
1519 void LIRGenerator::trace_block_entry(BlockBegin* block) {
1520   store_stack_parameter(LIR_OprFact::intConst(block->block_id()), in_ByteSize(0));
1521   LIR_OprList* args = new LIR_OprList();
1522   address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
1523   __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args);
1524 }
1525 
1526 
1527 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
1528                                         CodeEmitInfo* info) {
1529   if (address->type() == T_LONG) {
1530     address = new LIR_Address(address->base(),
1531                               address->index(), address->scale(),
1532                               address->disp(), T_DOUBLE);
1533     // Transfer the value atomically by using FP moves.  This means
1534     // the value has to be moved between CPU and FPU registers.  It
1535     // always has to be moved through spill slot since there's no
1536     // quick way to pack the value into an SSE register.
1537     LIR_Opr temp_double = new_register(T_DOUBLE);
1538     LIR_Opr spill = new_register(T_LONG);
1539     set_vreg_flag(spill, must_start_in_memory);
1540     __ move(value, spill);
1541     __ volatile_move(spill, temp_double, T_LONG);
1542     __ volatile_move(temp_double, LIR_OprFact::address(address), T_LONG, info);
1543   } else {
1544     __ store(value, address, info);
1545   }
1546 }
1547 
1548 
1549 
1550 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
1551                                        CodeEmitInfo* info) {
1552   if (address->type() == T_LONG) {
1553     address = new LIR_Address(address->base(),
1554                               address->index(), address->scale(),
1555                               address->disp(), T_DOUBLE);
1556     // Transfer the value atomically by using FP moves.  This means
1557     // the value has to be moved between CPU and FPU registers.  In
1558     // SSE0 and SSE1 mode it has to be moved through spill slot but in
1559     // SSE2+ mode it can be moved directly.
1560     LIR_Opr temp_double = new_register(T_DOUBLE);
1561     __ volatile_move(LIR_OprFact::address(address), temp_double, T_LONG, info);
1562     __ volatile_move(temp_double, result, T_LONG);
1563     if (UseSSE < 2) {
1564       // no spill slot needed in SSE2 mode because xmm->cpu register move is possible
1565       set_vreg_flag(result, must_start_in_memory);
1566     }
1567   } else {
1568     __ load(address, result, info);
1569   }
1570 }
1571 
1572 void LIRGenerator::get_Object_unsafe(LIR_Opr dst, LIR_Opr src, LIR_Opr offset,
1573                                      BasicType type, bool is_volatile) {
1574   if (is_volatile && type == T_LONG) {
1575     LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE);
1576     LIR_Opr tmp = new_register(T_DOUBLE);
1577     __ load(addr, tmp);
1578     LIR_Opr spill = new_register(T_LONG);
1579     set_vreg_flag(spill, must_start_in_memory);
1580     __ move(tmp, spill);
1581     __ move(spill, dst);
1582   } else {
1583     LIR_Address* addr = new LIR_Address(src, offset, type);
1584     __ load(addr, dst);
1585   }
1586 }
1587 
1588 
1589 void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data,
1590                                      BasicType type, bool is_volatile) {
1591   if (is_volatile && type == T_LONG) {
1592     LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE);
1593     LIR_Opr tmp = new_register(T_DOUBLE);
1594     LIR_Opr spill = new_register(T_DOUBLE);
1595     set_vreg_flag(spill, must_start_in_memory);
1596     __ move(data, spill);
1597     __ move(spill, tmp);
1598     __ move(tmp, addr);
1599   } else {
1600     LIR_Address* addr = new LIR_Address(src, offset, type);
1601     bool is_obj = (type == T_ARRAY || type == T_OBJECT);
1602     if (is_obj) {
1603       // Do the pre-write barrier, if any.
1604       pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */,
1605                   true /* do_load */, false /* patch */, NULL);
1606       __ move(data, addr);
1607       assert(src->is_register(), "must be register");
1608       // Seems to be a precise address
1609       post_barrier(LIR_OprFact::address(addr), data);
1610     } else {
1611       __ move(data, addr);
1612     }
1613   }
1614 }
1615 
1616 void LIRGenerator::do_UnsafeGetAndSetObject(UnsafeGetAndSetObject* x) {
1617   BasicType type = x->basic_type();
1618   LIRItem src(x->object(), this);
1619   LIRItem off(x->offset(), this);
1620   LIRItem value(x->value(), this);
1621 
1622   src.load_item();
1623   value.load_item();
1624   off.load_nonconstant();
1625 
1626   LIR_Opr dst = rlock_result(x, type);
1627   LIR_Opr data = value.result();
1628   bool is_obj = (type == T_ARRAY || type == T_OBJECT);
1629   LIR_Opr offset = off.result();
1630 
1631   assert (type == T_INT || (!x->is_add() && is_obj) LP64_ONLY( || type == T_LONG ), "unexpected type");
1632   LIR_Address* addr;
1633   if (offset->is_constant()) {
1634 #ifdef _LP64
1635     jlong c = offset->as_jlong();
1636     if ((jlong)((jint)c) == c) {
1637       addr = new LIR_Address(src.result(), (jint)c, type);
1638     } else {
1639       LIR_Opr tmp = new_register(T_LONG);
1640       __ move(offset, tmp);
1641       addr = new LIR_Address(src.result(), tmp, type);
1642     }
1643 #else
1644     addr = new LIR_Address(src.result(), offset->as_jint(), type);
1645 #endif
1646   } else {
1647     addr = new LIR_Address(src.result(), offset, type);
1648   }
1649 
1650   // Because we want a 2-arg form of xchg and xadd
1651   __ move(data, dst);
1652 
1653   if (x->is_add()) {
1654     __ xadd(LIR_OprFact::address(addr), dst, dst, LIR_OprFact::illegalOpr);
1655   } else {
1656     if (is_obj) {
1657       // Do the pre-write barrier, if any.
1658       pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */,
1659                   true /* do_load */, false /* patch */, NULL);
1660     }
1661     __ xchg(LIR_OprFact::address(addr), dst, dst, LIR_OprFact::illegalOpr);
1662     if (is_obj) {
1663       // Seems to be a precise address
1664       post_barrier(LIR_OprFact::address(addr), data);
1665     }
1666   }
1667 }
--- EOF ---