1 /* 2 * Copyright (c) 2000, 2015, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #include "precompiled.hpp" 26 #include "c1/c1_InstructionPrinter.hpp" 27 #include "c1/c1_LIR.hpp" 28 #include "c1/c1_LIRAssembler.hpp" 29 #include "c1/c1_ValueStack.hpp" 30 #include "ci/ciInstance.hpp" 31 #include "runtime/sharedRuntime.hpp" 32 33 Register LIR_OprDesc::as_register() const { 34 return FrameMap::cpu_rnr2reg(cpu_regnr()); 35 } 36 37 Register LIR_OprDesc::as_register_lo() const { 38 return FrameMap::cpu_rnr2reg(cpu_regnrLo()); 39 } 40 41 Register LIR_OprDesc::as_register_hi() const { 42 return FrameMap::cpu_rnr2reg(cpu_regnrHi()); 43 } 44 45 #if defined(X86) 46 47 XMMRegister LIR_OprDesc::as_xmm_float_reg() const { 48 return FrameMap::nr2xmmreg(xmm_regnr()); 49 } 50 51 XMMRegister LIR_OprDesc::as_xmm_double_reg() const { 52 assert(xmm_regnrLo() == xmm_regnrHi(), "assumed in calculation"); 53 return FrameMap::nr2xmmreg(xmm_regnrLo()); 54 } 55 56 #endif // X86 57 58 #if defined(SPARC) || defined(PPC32) 59 60 FloatRegister LIR_OprDesc::as_float_reg() const { 61 return FrameMap::nr2floatreg(fpu_regnr()); 62 } 63 64 FloatRegister LIR_OprDesc::as_double_reg() const { 65 return FrameMap::nr2floatreg(fpu_regnrHi()); 66 } 67 68 #endif 69 70 #if defined(ARM) || defined(AARCH64) || defined(PPC64) 71 72 FloatRegister LIR_OprDesc::as_float_reg() const { 73 return as_FloatRegister(fpu_regnr()); 74 } 75 76 FloatRegister LIR_OprDesc::as_double_reg() const { 77 return as_FloatRegister(fpu_regnrLo()); 78 } 79 80 #endif 81 82 83 LIR_Opr LIR_OprFact::illegalOpr = LIR_OprFact::illegal(); 84 85 LIR_Opr LIR_OprFact::value_type(ValueType* type) { 86 ValueTag tag = type->tag(); 87 switch (tag) { 88 case metaDataTag : { 89 ClassConstant* c = type->as_ClassConstant(); 90 if (c != NULL && !c->value()->is_loaded()) { 91 return LIR_OprFact::metadataConst(NULL); 92 } else if (c != NULL) { 93 return LIR_OprFact::metadataConst(c->value()->constant_encoding()); 94 } else { 95 MethodConstant* m = type->as_MethodConstant(); 96 assert (m != NULL, "not a class or a method?"); 97 return LIR_OprFact::metadataConst(m->value()->constant_encoding()); 98 } 99 } 100 case objectTag : { 101 return LIR_OprFact::oopConst(type->as_ObjectType()->encoding()); 102 } 103 case addressTag: return LIR_OprFact::addressConst(type->as_AddressConstant()->value()); 104 case intTag : return LIR_OprFact::intConst(type->as_IntConstant()->value()); 105 case floatTag : return LIR_OprFact::floatConst(type->as_FloatConstant()->value()); 106 case longTag : return LIR_OprFact::longConst(type->as_LongConstant()->value()); 107 case doubleTag : return LIR_OprFact::doubleConst(type->as_DoubleConstant()->value()); 108 default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1); 109 } 110 } 111 112 113 LIR_Opr LIR_OprFact::dummy_value_type(ValueType* type) { 114 switch (type->tag()) { 115 case objectTag: return LIR_OprFact::oopConst(NULL); 116 case addressTag:return LIR_OprFact::addressConst(0); 117 case intTag: return LIR_OprFact::intConst(0); 118 case floatTag: return LIR_OprFact::floatConst(0.0); 119 case longTag: return LIR_OprFact::longConst(0); 120 case doubleTag: return LIR_OprFact::doubleConst(0.0); 121 default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1); 122 } 123 return illegalOpr; 124 } 125 126 127 128 //--------------------------------------------------- 129 130 131 LIR_Address::Scale LIR_Address::scale(BasicType type) { 132 int elem_size = type2aelembytes(type); 133 switch (elem_size) { 134 case 1: return LIR_Address::times_1; 135 case 2: return LIR_Address::times_2; 136 case 4: return LIR_Address::times_4; 137 case 8: return LIR_Address::times_8; 138 } 139 ShouldNotReachHere(); 140 return LIR_Address::times_1; 141 } 142 143 144 #ifndef PRODUCT 145 void LIR_Address::verify0() const { 146 #if defined(SPARC) || defined(PPC) 147 assert(scale() == times_1, "Scaled addressing mode not available on SPARC/PPC and should not be used"); 148 assert(disp() == 0 || index()->is_illegal(), "can't have both"); 149 #endif 150 #ifdef _LP64 151 assert(base()->is_cpu_register(), "wrong base operand"); 152 #ifndef AARCH64 153 assert(index()->is_illegal() || index()->is_double_cpu(), "wrong index operand"); 154 #else 155 assert(index()->is_illegal() || index()->is_double_cpu() || index()->is_single_cpu(), "wrong index operand"); 156 #endif 157 assert(base()->type() == T_OBJECT || base()->type() == T_LONG || base()->type() == T_METADATA, 158 "wrong type for addresses"); 159 #else 160 assert(base()->is_single_cpu(), "wrong base operand"); 161 assert(index()->is_illegal() || index()->is_single_cpu(), "wrong index operand"); 162 assert(base()->type() == T_OBJECT || base()->type() == T_INT || base()->type() == T_METADATA, 163 "wrong type for addresses"); 164 #endif 165 } 166 #endif 167 168 169 //--------------------------------------------------- 170 171 char LIR_OprDesc::type_char(BasicType t) { 172 switch (t) { 173 case T_ARRAY: 174 t = T_OBJECT; 175 case T_BOOLEAN: 176 case T_CHAR: 177 case T_FLOAT: 178 case T_DOUBLE: 179 case T_BYTE: 180 case T_SHORT: 181 case T_INT: 182 case T_LONG: 183 case T_OBJECT: 184 case T_ADDRESS: 185 case T_VOID: 186 return ::type2char(t); 187 case T_METADATA: 188 return 'M'; 189 case T_ILLEGAL: 190 return '?'; 191 192 default: 193 ShouldNotReachHere(); 194 return '?'; 195 } 196 } 197 198 #ifndef PRODUCT 199 void LIR_OprDesc::validate_type() const { 200 201 #ifdef ASSERT 202 if (!is_pointer() && !is_illegal()) { 203 OprKind kindfield = kind_field(); // Factored out because of compiler bug, see 8002160 204 switch (as_BasicType(type_field())) { 205 case T_LONG: 206 assert((kindfield == cpu_register || kindfield == stack_value) && 207 size_field() == double_size, "must match"); 208 break; 209 case T_FLOAT: 210 // FP return values can be also in CPU registers on ARM and PPC32 (softfp ABI) 211 assert((kindfield == fpu_register || kindfield == stack_value 212 ARM_ONLY(|| kindfield == cpu_register) 213 PPC32_ONLY(|| kindfield == cpu_register) ) && 214 size_field() == single_size, "must match"); 215 break; 216 case T_DOUBLE: 217 // FP return values can be also in CPU registers on ARM and PPC32 (softfp ABI) 218 assert((kindfield == fpu_register || kindfield == stack_value 219 ARM_ONLY(|| kindfield == cpu_register) 220 PPC32_ONLY(|| kindfield == cpu_register) ) && 221 size_field() == double_size, "must match"); 222 break; 223 case T_BOOLEAN: 224 case T_CHAR: 225 case T_BYTE: 226 case T_SHORT: 227 case T_INT: 228 case T_ADDRESS: 229 case T_OBJECT: 230 case T_METADATA: 231 case T_ARRAY: 232 assert((kindfield == cpu_register || kindfield == stack_value) && 233 size_field() == single_size, "must match"); 234 break; 235 236 case T_ILLEGAL: 237 // XXX TKR also means unknown right now 238 // assert(is_illegal(), "must match"); 239 break; 240 241 default: 242 ShouldNotReachHere(); 243 } 244 } 245 #endif 246 247 } 248 #endif // PRODUCT 249 250 251 bool LIR_OprDesc::is_oop() const { 252 if (is_pointer()) { 253 return pointer()->is_oop_pointer(); 254 } else { 255 OprType t= type_field(); 256 assert(t != unknown_type, "not set"); 257 return t == object_type; 258 } 259 } 260 261 262 263 void LIR_Op2::verify() const { 264 #ifdef ASSERT 265 switch (code()) { 266 case lir_cmove: 267 case lir_xchg: 268 break; 269 270 default: 271 assert(!result_opr()->is_register() || !result_opr()->is_oop_register(), 272 "can't produce oops from arith"); 273 } 274 275 if (TwoOperandLIRForm) { 276 switch (code()) { 277 case lir_add: 278 case lir_sub: 279 case lir_mul: 280 case lir_mul_strictfp: 281 case lir_div: 282 case lir_div_strictfp: 283 case lir_rem: 284 case lir_logic_and: 285 case lir_logic_or: 286 case lir_logic_xor: 287 case lir_shl: 288 case lir_shr: 289 assert(in_opr1() == result_opr(), "opr1 and result must match"); 290 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid"); 291 break; 292 293 // special handling for lir_ushr because of write barriers 294 case lir_ushr: 295 assert(in_opr1() == result_opr() || in_opr2()->is_constant(), "opr1 and result must match or shift count is constant"); 296 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid"); 297 break; 298 299 } 300 } 301 #endif 302 } 303 304 305 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block) 306 : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL) 307 , _cond(cond) 308 , _type(type) 309 , _label(block->label()) 310 , _block(block) 311 , _ublock(NULL) 312 , _stub(NULL) { 313 } 314 315 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub) : 316 LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL) 317 , _cond(cond) 318 , _type(type) 319 , _label(stub->entry()) 320 , _block(NULL) 321 , _ublock(NULL) 322 , _stub(stub) { 323 } 324 325 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock) 326 : LIR_Op(lir_cond_float_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL) 327 , _cond(cond) 328 , _type(type) 329 , _label(block->label()) 330 , _block(block) 331 , _ublock(ublock) 332 , _stub(NULL) 333 { 334 } 335 336 void LIR_OpBranch::change_block(BlockBegin* b) { 337 assert(_block != NULL, "must have old block"); 338 assert(_block->label() == label(), "must be equal"); 339 340 _block = b; 341 _label = b->label(); 342 } 343 344 void LIR_OpBranch::change_ublock(BlockBegin* b) { 345 assert(_ublock != NULL, "must have old block"); 346 _ublock = b; 347 } 348 349 void LIR_OpBranch::negate_cond() { 350 switch (_cond) { 351 case lir_cond_equal: _cond = lir_cond_notEqual; break; 352 case lir_cond_notEqual: _cond = lir_cond_equal; break; 353 case lir_cond_less: _cond = lir_cond_greaterEqual; break; 354 case lir_cond_lessEqual: _cond = lir_cond_greater; break; 355 case lir_cond_greaterEqual: _cond = lir_cond_less; break; 356 case lir_cond_greater: _cond = lir_cond_lessEqual; break; 357 default: ShouldNotReachHere(); 358 } 359 } 360 361 362 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass, 363 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, 364 bool fast_check, CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, 365 CodeStub* stub) 366 367 : LIR_Op(code, result, NULL) 368 , _object(object) 369 , _array(LIR_OprFact::illegalOpr) 370 , _klass(klass) 371 , _tmp1(tmp1) 372 , _tmp2(tmp2) 373 , _tmp3(tmp3) 374 , _fast_check(fast_check) 375 , _stub(stub) 376 , _info_for_patch(info_for_patch) 377 , _info_for_exception(info_for_exception) 378 , _profiled_method(NULL) 379 , _profiled_bci(-1) 380 , _should_profile(false) 381 { 382 if (code == lir_checkcast) { 383 assert(info_for_exception != NULL, "checkcast throws exceptions"); 384 } else if (code == lir_instanceof) { 385 assert(info_for_exception == NULL, "instanceof throws no exceptions"); 386 } else { 387 ShouldNotReachHere(); 388 } 389 } 390 391 392 393 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception) 394 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) 395 , _object(object) 396 , _array(array) 397 , _klass(NULL) 398 , _tmp1(tmp1) 399 , _tmp2(tmp2) 400 , _tmp3(tmp3) 401 , _fast_check(false) 402 , _stub(NULL) 403 , _info_for_patch(NULL) 404 , _info_for_exception(info_for_exception) 405 , _profiled_method(NULL) 406 , _profiled_bci(-1) 407 , _should_profile(false) 408 { 409 if (code == lir_store_check) { 410 _stub = new ArrayStoreExceptionStub(object, info_for_exception); 411 assert(info_for_exception != NULL, "store_check throws exceptions"); 412 } else { 413 ShouldNotReachHere(); 414 } 415 } 416 417 418 LIR_OpArrayCopy::LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, 419 LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info) 420 : LIR_Op(lir_arraycopy, LIR_OprFact::illegalOpr, info) 421 , _tmp(tmp) 422 , _src(src) 423 , _src_pos(src_pos) 424 , _dst(dst) 425 , _dst_pos(dst_pos) 426 , _flags(flags) 427 , _expected_type(expected_type) 428 , _length(length) { 429 _stub = new ArrayCopyStub(this); 430 } 431 432 LIR_OpUpdateCRC32::LIR_OpUpdateCRC32(LIR_Opr crc, LIR_Opr val, LIR_Opr res) 433 : LIR_Op(lir_updatecrc32, res, NULL) 434 , _crc(crc) 435 , _val(val) { 436 } 437 438 //-------------------verify-------------------------- 439 440 void LIR_Op1::verify() const { 441 switch(code()) { 442 case lir_move: 443 assert(in_opr()->is_valid() && result_opr()->is_valid(), "must be"); 444 break; 445 case lir_null_check: 446 assert(in_opr()->is_register(), "must be"); 447 break; 448 case lir_return: 449 assert(in_opr()->is_register() || in_opr()->is_illegal(), "must be"); 450 break; 451 } 452 } 453 454 void LIR_OpRTCall::verify() const { 455 assert(strcmp(Runtime1::name_for_address(addr()), "<unknown function>") != 0, "unknown function"); 456 } 457 458 //-------------------visits-------------------------- 459 460 // complete rework of LIR instruction visitor. 461 // The virtual call for each instruction type is replaced by a big 462 // switch that adds the operands for each instruction 463 464 void LIR_OpVisitState::visit(LIR_Op* op) { 465 // copy information from the LIR_Op 466 reset(); 467 set_op(op); 468 469 switch (op->code()) { 470 471 // LIR_Op0 472 case lir_word_align: // result and info always invalid 473 case lir_backwardbranch_target: // result and info always invalid 474 case lir_build_frame: // result and info always invalid 475 case lir_fpop_raw: // result and info always invalid 476 case lir_24bit_FPU: // result and info always invalid 477 case lir_reset_FPU: // result and info always invalid 478 case lir_breakpoint: // result and info always invalid 479 case lir_membar: // result and info always invalid 480 case lir_membar_acquire: // result and info always invalid 481 case lir_membar_release: // result and info always invalid 482 case lir_membar_loadload: // result and info always invalid 483 case lir_membar_storestore: // result and info always invalid 484 case lir_membar_loadstore: // result and info always invalid 485 case lir_membar_storeload: // result and info always invalid 486 case lir_on_spin_wait: 487 { 488 assert(op->as_Op0() != NULL, "must be"); 489 assert(op->_info == NULL, "info not used by this instruction"); 490 assert(op->_result->is_illegal(), "not used"); 491 break; 492 } 493 494 case lir_nop: // may have info, result always invalid 495 case lir_std_entry: // may have result, info always invalid 496 case lir_osr_entry: // may have result, info always invalid 497 case lir_get_thread: // may have result, info always invalid 498 { 499 assert(op->as_Op0() != NULL, "must be"); 500 if (op->_info != NULL) do_info(op->_info); 501 if (op->_result->is_valid()) do_output(op->_result); 502 break; 503 } 504 505 506 // LIR_OpLabel 507 case lir_label: // result and info always invalid 508 { 509 assert(op->as_OpLabel() != NULL, "must be"); 510 assert(op->_info == NULL, "info not used by this instruction"); 511 assert(op->_result->is_illegal(), "not used"); 512 break; 513 } 514 515 516 // LIR_Op1 517 case lir_fxch: // input always valid, result and info always invalid 518 case lir_fld: // input always valid, result and info always invalid 519 case lir_ffree: // input always valid, result and info always invalid 520 case lir_push: // input always valid, result and info always invalid 521 case lir_pop: // input always valid, result and info always invalid 522 case lir_return: // input always valid, result and info always invalid 523 case lir_leal: // input and result always valid, info always invalid 524 case lir_neg: // input and result always valid, info always invalid 525 case lir_monaddr: // input and result always valid, info always invalid 526 case lir_null_check: // input and info always valid, result always invalid 527 case lir_move: // input and result always valid, may have info 528 case lir_pack64: // input and result always valid 529 case lir_unpack64: // input and result always valid 530 { 531 assert(op->as_Op1() != NULL, "must be"); 532 LIR_Op1* op1 = (LIR_Op1*)op; 533 534 if (op1->_info) do_info(op1->_info); 535 if (op1->_opr->is_valid()) do_input(op1->_opr); 536 if (op1->_result->is_valid()) do_output(op1->_result); 537 538 break; 539 } 540 541 case lir_safepoint: 542 { 543 assert(op->as_Op1() != NULL, "must be"); 544 LIR_Op1* op1 = (LIR_Op1*)op; 545 546 assert(op1->_info != NULL, ""); do_info(op1->_info); 547 if (op1->_opr->is_valid()) do_temp(op1->_opr); // safepoints on SPARC need temporary register 548 assert(op1->_result->is_illegal(), "safepoint does not produce value"); 549 550 break; 551 } 552 553 // LIR_OpConvert; 554 case lir_convert: // input and result always valid, info always invalid 555 { 556 assert(op->as_OpConvert() != NULL, "must be"); 557 LIR_OpConvert* opConvert = (LIR_OpConvert*)op; 558 559 assert(opConvert->_info == NULL, "must be"); 560 if (opConvert->_opr->is_valid()) do_input(opConvert->_opr); 561 if (opConvert->_result->is_valid()) do_output(opConvert->_result); 562 #ifdef PPC32 563 if (opConvert->_tmp1->is_valid()) do_temp(opConvert->_tmp1); 564 if (opConvert->_tmp2->is_valid()) do_temp(opConvert->_tmp2); 565 #endif 566 do_stub(opConvert->_stub); 567 568 break; 569 } 570 571 // LIR_OpBranch; 572 case lir_branch: // may have info, input and result register always invalid 573 case lir_cond_float_branch: // may have info, input and result register always invalid 574 { 575 assert(op->as_OpBranch() != NULL, "must be"); 576 LIR_OpBranch* opBranch = (LIR_OpBranch*)op; 577 578 if (opBranch->_info != NULL) do_info(opBranch->_info); 579 assert(opBranch->_result->is_illegal(), "not used"); 580 if (opBranch->_stub != NULL) opBranch->stub()->visit(this); 581 582 break; 583 } 584 585 586 // LIR_OpAllocObj 587 case lir_alloc_object: 588 { 589 assert(op->as_OpAllocObj() != NULL, "must be"); 590 LIR_OpAllocObj* opAllocObj = (LIR_OpAllocObj*)op; 591 592 if (opAllocObj->_info) do_info(opAllocObj->_info); 593 if (opAllocObj->_opr->is_valid()) { do_input(opAllocObj->_opr); 594 do_temp(opAllocObj->_opr); 595 } 596 if (opAllocObj->_tmp1->is_valid()) do_temp(opAllocObj->_tmp1); 597 if (opAllocObj->_tmp2->is_valid()) do_temp(opAllocObj->_tmp2); 598 if (opAllocObj->_tmp3->is_valid()) do_temp(opAllocObj->_tmp3); 599 if (opAllocObj->_tmp4->is_valid()) do_temp(opAllocObj->_tmp4); 600 if (opAllocObj->_result->is_valid()) do_output(opAllocObj->_result); 601 do_stub(opAllocObj->_stub); 602 break; 603 } 604 605 606 // LIR_OpRoundFP; 607 case lir_roundfp: { 608 assert(op->as_OpRoundFP() != NULL, "must be"); 609 LIR_OpRoundFP* opRoundFP = (LIR_OpRoundFP*)op; 610 611 assert(op->_info == NULL, "info not used by this instruction"); 612 assert(opRoundFP->_tmp->is_illegal(), "not used"); 613 do_input(opRoundFP->_opr); 614 do_output(opRoundFP->_result); 615 616 break; 617 } 618 619 620 // LIR_Op2 621 case lir_cmp: 622 case lir_cmp_l2i: 623 case lir_ucmp_fd2i: 624 case lir_cmp_fd2i: 625 case lir_add: 626 case lir_sub: 627 case lir_mul: 628 case lir_div: 629 case lir_rem: 630 case lir_sqrt: 631 case lir_abs: 632 case lir_logic_and: 633 case lir_logic_or: 634 case lir_logic_xor: 635 case lir_shl: 636 case lir_shr: 637 case lir_ushr: 638 case lir_xadd: 639 case lir_xchg: 640 case lir_assert: 641 { 642 assert(op->as_Op2() != NULL, "must be"); 643 LIR_Op2* op2 = (LIR_Op2*)op; 644 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() && 645 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used"); 646 647 if (op2->_info) do_info(op2->_info); 648 if (op2->_opr1->is_valid()) do_input(op2->_opr1); 649 if (op2->_opr2->is_valid()) do_input(op2->_opr2); 650 if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1); 651 if (op2->_result->is_valid()) do_output(op2->_result); 652 if (op->code() == lir_xchg || op->code() == lir_xadd) { 653 // on ARM and PPC, return value is loaded first so could 654 // destroy inputs. On other platforms that implement those 655 // (x86, sparc), the extra constrainsts are harmless. 656 if (op2->_opr1->is_valid()) do_temp(op2->_opr1); 657 if (op2->_opr2->is_valid()) do_temp(op2->_opr2); 658 } 659 660 break; 661 } 662 663 // special handling for cmove: right input operand must not be equal 664 // to the result operand, otherwise the backend fails 665 case lir_cmove: 666 { 667 assert(op->as_Op2() != NULL, "must be"); 668 LIR_Op2* op2 = (LIR_Op2*)op; 669 670 assert(op2->_info == NULL && op2->_tmp1->is_illegal() && op2->_tmp2->is_illegal() && 671 op2->_tmp3->is_illegal() && op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used"); 672 assert(op2->_opr1->is_valid() && op2->_opr2->is_valid() && op2->_result->is_valid(), "used"); 673 674 do_input(op2->_opr1); 675 do_input(op2->_opr2); 676 do_temp(op2->_opr2); 677 do_output(op2->_result); 678 679 break; 680 } 681 682 // vspecial handling for strict operations: register input operands 683 // as temp to guarantee that they do not overlap with other 684 // registers 685 case lir_mul_strictfp: 686 case lir_div_strictfp: 687 { 688 assert(op->as_Op2() != NULL, "must be"); 689 LIR_Op2* op2 = (LIR_Op2*)op; 690 691 assert(op2->_info == NULL, "not used"); 692 assert(op2->_opr1->is_valid(), "used"); 693 assert(op2->_opr2->is_valid(), "used"); 694 assert(op2->_result->is_valid(), "used"); 695 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() && 696 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used"); 697 698 do_input(op2->_opr1); do_temp(op2->_opr1); 699 do_input(op2->_opr2); do_temp(op2->_opr2); 700 if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1); 701 do_output(op2->_result); 702 703 break; 704 } 705 706 case lir_throw: { 707 assert(op->as_Op2() != NULL, "must be"); 708 LIR_Op2* op2 = (LIR_Op2*)op; 709 710 if (op2->_info) do_info(op2->_info); 711 if (op2->_opr1->is_valid()) do_temp(op2->_opr1); 712 if (op2->_opr2->is_valid()) do_input(op2->_opr2); // exception object is input parameter 713 assert(op2->_result->is_illegal(), "no result"); 714 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() && 715 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used"); 716 717 break; 718 } 719 720 case lir_unwind: { 721 assert(op->as_Op1() != NULL, "must be"); 722 LIR_Op1* op1 = (LIR_Op1*)op; 723 724 assert(op1->_info == NULL, "no info"); 725 assert(op1->_opr->is_valid(), "exception oop"); do_input(op1->_opr); 726 assert(op1->_result->is_illegal(), "no result"); 727 728 break; 729 } 730 731 // LIR_Op3 732 case lir_idiv: 733 case lir_irem: 734 case lir_fmad: 735 case lir_fmaf: { 736 assert(op->as_Op3() != NULL, "must be"); 737 LIR_Op3* op3= (LIR_Op3*)op; 738 739 if (op3->_info) do_info(op3->_info); 740 if (op3->_opr1->is_valid()) do_input(op3->_opr1); 741 742 // second operand is input and temp, so ensure that second operand 743 // and third operand get not the same register 744 if (op3->_opr2->is_valid()) do_input(op3->_opr2); 745 if (op3->_opr2->is_valid()) do_temp(op3->_opr2); 746 if (op3->_opr3->is_valid()) do_temp(op3->_opr3); 747 748 if (op3->_result->is_valid()) do_output(op3->_result); 749 750 break; 751 } 752 753 754 // LIR_OpJavaCall 755 case lir_static_call: 756 case lir_optvirtual_call: 757 case lir_icvirtual_call: 758 case lir_virtual_call: 759 case lir_dynamic_call: { 760 LIR_OpJavaCall* opJavaCall = op->as_OpJavaCall(); 761 assert(opJavaCall != NULL, "must be"); 762 763 if (opJavaCall->_receiver->is_valid()) do_input(opJavaCall->_receiver); 764 765 // only visit register parameters 766 int n = opJavaCall->_arguments->length(); 767 for (int i = opJavaCall->_receiver->is_valid() ? 1 : 0; i < n; i++) { 768 if (!opJavaCall->_arguments->at(i)->is_pointer()) { 769 do_input(*opJavaCall->_arguments->adr_at(i)); 770 } 771 } 772 773 if (opJavaCall->_info) do_info(opJavaCall->_info); 774 if (FrameMap::method_handle_invoke_SP_save_opr() != LIR_OprFact::illegalOpr && 775 opJavaCall->is_method_handle_invoke()) { 776 opJavaCall->_method_handle_invoke_SP_save_opr = FrameMap::method_handle_invoke_SP_save_opr(); 777 do_temp(opJavaCall->_method_handle_invoke_SP_save_opr); 778 } 779 do_call(); 780 if (opJavaCall->_result->is_valid()) do_output(opJavaCall->_result); 781 782 break; 783 } 784 785 786 // LIR_OpRTCall 787 case lir_rtcall: { 788 assert(op->as_OpRTCall() != NULL, "must be"); 789 LIR_OpRTCall* opRTCall = (LIR_OpRTCall*)op; 790 791 // only visit register parameters 792 int n = opRTCall->_arguments->length(); 793 for (int i = 0; i < n; i++) { 794 if (!opRTCall->_arguments->at(i)->is_pointer()) { 795 do_input(*opRTCall->_arguments->adr_at(i)); 796 } 797 } 798 if (opRTCall->_info) do_info(opRTCall->_info); 799 if (opRTCall->_tmp->is_valid()) do_temp(opRTCall->_tmp); 800 do_call(); 801 if (opRTCall->_result->is_valid()) do_output(opRTCall->_result); 802 803 break; 804 } 805 806 807 // LIR_OpArrayCopy 808 case lir_arraycopy: { 809 assert(op->as_OpArrayCopy() != NULL, "must be"); 810 LIR_OpArrayCopy* opArrayCopy = (LIR_OpArrayCopy*)op; 811 812 assert(opArrayCopy->_result->is_illegal(), "unused"); 813 assert(opArrayCopy->_src->is_valid(), "used"); do_input(opArrayCopy->_src); do_temp(opArrayCopy->_src); 814 assert(opArrayCopy->_src_pos->is_valid(), "used"); do_input(opArrayCopy->_src_pos); do_temp(opArrayCopy->_src_pos); 815 assert(opArrayCopy->_dst->is_valid(), "used"); do_input(opArrayCopy->_dst); do_temp(opArrayCopy->_dst); 816 assert(opArrayCopy->_dst_pos->is_valid(), "used"); do_input(opArrayCopy->_dst_pos); do_temp(opArrayCopy->_dst_pos); 817 assert(opArrayCopy->_length->is_valid(), "used"); do_input(opArrayCopy->_length); do_temp(opArrayCopy->_length); 818 assert(opArrayCopy->_tmp->is_valid(), "used"); do_temp(opArrayCopy->_tmp); 819 if (opArrayCopy->_info) do_info(opArrayCopy->_info); 820 821 // the implementation of arraycopy always has a call into the runtime 822 do_call(); 823 824 break; 825 } 826 827 828 // LIR_OpUpdateCRC32 829 case lir_updatecrc32: { 830 assert(op->as_OpUpdateCRC32() != NULL, "must be"); 831 LIR_OpUpdateCRC32* opUp = (LIR_OpUpdateCRC32*)op; 832 833 assert(opUp->_crc->is_valid(), "used"); do_input(opUp->_crc); do_temp(opUp->_crc); 834 assert(opUp->_val->is_valid(), "used"); do_input(opUp->_val); do_temp(opUp->_val); 835 assert(opUp->_result->is_valid(), "used"); do_output(opUp->_result); 836 assert(opUp->_info == NULL, "no info for LIR_OpUpdateCRC32"); 837 838 break; 839 } 840 841 842 // LIR_OpLock 843 case lir_lock: 844 case lir_unlock: { 845 assert(op->as_OpLock() != NULL, "must be"); 846 LIR_OpLock* opLock = (LIR_OpLock*)op; 847 848 if (opLock->_info) do_info(opLock->_info); 849 850 // TODO: check if these operands really have to be temp 851 // (or if input is sufficient). This may have influence on the oop map! 852 assert(opLock->_lock->is_valid(), "used"); do_temp(opLock->_lock); 853 assert(opLock->_hdr->is_valid(), "used"); do_temp(opLock->_hdr); 854 assert(opLock->_obj->is_valid(), "used"); do_temp(opLock->_obj); 855 856 if (opLock->_scratch->is_valid()) do_temp(opLock->_scratch); 857 assert(opLock->_result->is_illegal(), "unused"); 858 859 do_stub(opLock->_stub); 860 861 break; 862 } 863 864 865 // LIR_OpDelay 866 case lir_delay_slot: { 867 assert(op->as_OpDelay() != NULL, "must be"); 868 LIR_OpDelay* opDelay = (LIR_OpDelay*)op; 869 870 visit(opDelay->delay_op()); 871 break; 872 } 873 874 // LIR_OpTypeCheck 875 case lir_instanceof: 876 case lir_checkcast: 877 case lir_store_check: { 878 assert(op->as_OpTypeCheck() != NULL, "must be"); 879 LIR_OpTypeCheck* opTypeCheck = (LIR_OpTypeCheck*)op; 880 881 if (opTypeCheck->_info_for_exception) do_info(opTypeCheck->_info_for_exception); 882 if (opTypeCheck->_info_for_patch) do_info(opTypeCheck->_info_for_patch); 883 if (opTypeCheck->_object->is_valid()) do_input(opTypeCheck->_object); 884 if (op->code() == lir_store_check && opTypeCheck->_object->is_valid()) { 885 do_temp(opTypeCheck->_object); 886 } 887 if (opTypeCheck->_array->is_valid()) do_input(opTypeCheck->_array); 888 if (opTypeCheck->_tmp1->is_valid()) do_temp(opTypeCheck->_tmp1); 889 if (opTypeCheck->_tmp2->is_valid()) do_temp(opTypeCheck->_tmp2); 890 if (opTypeCheck->_tmp3->is_valid()) do_temp(opTypeCheck->_tmp3); 891 if (opTypeCheck->_result->is_valid()) do_output(opTypeCheck->_result); 892 do_stub(opTypeCheck->_stub); 893 break; 894 } 895 896 // LIR_OpCompareAndSwap 897 case lir_cas_long: 898 case lir_cas_obj: 899 case lir_cas_int: { 900 assert(op->as_OpCompareAndSwap() != NULL, "must be"); 901 LIR_OpCompareAndSwap* opCompareAndSwap = (LIR_OpCompareAndSwap*)op; 902 903 assert(opCompareAndSwap->_addr->is_valid(), "used"); 904 assert(opCompareAndSwap->_cmp_value->is_valid(), "used"); 905 assert(opCompareAndSwap->_new_value->is_valid(), "used"); 906 if (opCompareAndSwap->_info) do_info(opCompareAndSwap->_info); 907 do_input(opCompareAndSwap->_addr); 908 do_temp(opCompareAndSwap->_addr); 909 do_input(opCompareAndSwap->_cmp_value); 910 do_temp(opCompareAndSwap->_cmp_value); 911 do_input(opCompareAndSwap->_new_value); 912 do_temp(opCompareAndSwap->_new_value); 913 if (opCompareAndSwap->_tmp1->is_valid()) do_temp(opCompareAndSwap->_tmp1); 914 if (opCompareAndSwap->_tmp2->is_valid()) do_temp(opCompareAndSwap->_tmp2); 915 if (opCompareAndSwap->_result->is_valid()) do_output(opCompareAndSwap->_result); 916 917 break; 918 } 919 920 921 // LIR_OpAllocArray; 922 case lir_alloc_array: { 923 assert(op->as_OpAllocArray() != NULL, "must be"); 924 LIR_OpAllocArray* opAllocArray = (LIR_OpAllocArray*)op; 925 926 if (opAllocArray->_info) do_info(opAllocArray->_info); 927 if (opAllocArray->_klass->is_valid()) do_input(opAllocArray->_klass); do_temp(opAllocArray->_klass); 928 if (opAllocArray->_len->is_valid()) do_input(opAllocArray->_len); do_temp(opAllocArray->_len); 929 if (opAllocArray->_tmp1->is_valid()) do_temp(opAllocArray->_tmp1); 930 if (opAllocArray->_tmp2->is_valid()) do_temp(opAllocArray->_tmp2); 931 if (opAllocArray->_tmp3->is_valid()) do_temp(opAllocArray->_tmp3); 932 if (opAllocArray->_tmp4->is_valid()) do_temp(opAllocArray->_tmp4); 933 if (opAllocArray->_result->is_valid()) do_output(opAllocArray->_result); 934 do_stub(opAllocArray->_stub); 935 break; 936 } 937 938 // LIR_OpProfileCall: 939 case lir_profile_call: { 940 assert(op->as_OpProfileCall() != NULL, "must be"); 941 LIR_OpProfileCall* opProfileCall = (LIR_OpProfileCall*)op; 942 943 if (opProfileCall->_recv->is_valid()) do_temp(opProfileCall->_recv); 944 assert(opProfileCall->_mdo->is_valid(), "used"); do_temp(opProfileCall->_mdo); 945 assert(opProfileCall->_tmp1->is_valid(), "used"); do_temp(opProfileCall->_tmp1); 946 break; 947 } 948 949 // LIR_OpProfileType: 950 case lir_profile_type: { 951 assert(op->as_OpProfileType() != NULL, "must be"); 952 LIR_OpProfileType* opProfileType = (LIR_OpProfileType*)op; 953 954 do_input(opProfileType->_mdp); do_temp(opProfileType->_mdp); 955 do_input(opProfileType->_obj); 956 do_temp(opProfileType->_tmp); 957 break; 958 } 959 default: 960 ShouldNotReachHere(); 961 } 962 } 963 964 965 void LIR_OpVisitState::do_stub(CodeStub* stub) { 966 if (stub != NULL) { 967 stub->visit(this); 968 } 969 } 970 971 XHandlers* LIR_OpVisitState::all_xhandler() { 972 XHandlers* result = NULL; 973 974 int i; 975 for (i = 0; i < info_count(); i++) { 976 if (info_at(i)->exception_handlers() != NULL) { 977 result = info_at(i)->exception_handlers(); 978 break; 979 } 980 } 981 982 #ifdef ASSERT 983 for (i = 0; i < info_count(); i++) { 984 assert(info_at(i)->exception_handlers() == NULL || 985 info_at(i)->exception_handlers() == result, 986 "only one xhandler list allowed per LIR-operation"); 987 } 988 #endif 989 990 if (result != NULL) { 991 return result; 992 } else { 993 return new XHandlers(); 994 } 995 996 return result; 997 } 998 999 1000 #ifdef ASSERT 1001 bool LIR_OpVisitState::no_operands(LIR_Op* op) { 1002 visit(op); 1003 1004 return opr_count(inputMode) == 0 && 1005 opr_count(outputMode) == 0 && 1006 opr_count(tempMode) == 0 && 1007 info_count() == 0 && 1008 !has_call() && 1009 !has_slow_case(); 1010 } 1011 #endif 1012 1013 //--------------------------------------------------- 1014 1015 1016 void LIR_OpJavaCall::emit_code(LIR_Assembler* masm) { 1017 masm->emit_call(this); 1018 } 1019 1020 void LIR_OpRTCall::emit_code(LIR_Assembler* masm) { 1021 masm->emit_rtcall(this); 1022 } 1023 1024 void LIR_OpLabel::emit_code(LIR_Assembler* masm) { 1025 masm->emit_opLabel(this); 1026 } 1027 1028 void LIR_OpArrayCopy::emit_code(LIR_Assembler* masm) { 1029 masm->emit_arraycopy(this); 1030 masm->append_code_stub(stub()); 1031 } 1032 1033 void LIR_OpUpdateCRC32::emit_code(LIR_Assembler* masm) { 1034 masm->emit_updatecrc32(this); 1035 } 1036 1037 void LIR_Op0::emit_code(LIR_Assembler* masm) { 1038 masm->emit_op0(this); 1039 } 1040 1041 void LIR_Op1::emit_code(LIR_Assembler* masm) { 1042 masm->emit_op1(this); 1043 } 1044 1045 void LIR_OpAllocObj::emit_code(LIR_Assembler* masm) { 1046 masm->emit_alloc_obj(this); 1047 masm->append_code_stub(stub()); 1048 } 1049 1050 void LIR_OpBranch::emit_code(LIR_Assembler* masm) { 1051 masm->emit_opBranch(this); 1052 if (stub()) { 1053 masm->append_code_stub(stub()); 1054 } 1055 } 1056 1057 void LIR_OpConvert::emit_code(LIR_Assembler* masm) { 1058 masm->emit_opConvert(this); 1059 if (stub() != NULL) { 1060 masm->append_code_stub(stub()); 1061 } 1062 } 1063 1064 void LIR_Op2::emit_code(LIR_Assembler* masm) { 1065 masm->emit_op2(this); 1066 } 1067 1068 void LIR_OpAllocArray::emit_code(LIR_Assembler* masm) { 1069 masm->emit_alloc_array(this); 1070 masm->append_code_stub(stub()); 1071 } 1072 1073 void LIR_OpTypeCheck::emit_code(LIR_Assembler* masm) { 1074 masm->emit_opTypeCheck(this); 1075 if (stub()) { 1076 masm->append_code_stub(stub()); 1077 } 1078 } 1079 1080 void LIR_OpCompareAndSwap::emit_code(LIR_Assembler* masm) { 1081 masm->emit_compare_and_swap(this); 1082 } 1083 1084 void LIR_Op3::emit_code(LIR_Assembler* masm) { 1085 masm->emit_op3(this); 1086 } 1087 1088 void LIR_OpLock::emit_code(LIR_Assembler* masm) { 1089 masm->emit_lock(this); 1090 if (stub()) { 1091 masm->append_code_stub(stub()); 1092 } 1093 } 1094 1095 #ifdef ASSERT 1096 void LIR_OpAssert::emit_code(LIR_Assembler* masm) { 1097 masm->emit_assert(this); 1098 } 1099 #endif 1100 1101 void LIR_OpDelay::emit_code(LIR_Assembler* masm) { 1102 masm->emit_delay(this); 1103 } 1104 1105 void LIR_OpProfileCall::emit_code(LIR_Assembler* masm) { 1106 masm->emit_profile_call(this); 1107 } 1108 1109 void LIR_OpProfileType::emit_code(LIR_Assembler* masm) { 1110 masm->emit_profile_type(this); 1111 } 1112 1113 // LIR_List 1114 LIR_List::LIR_List(Compilation* compilation, BlockBegin* block) 1115 : _operations(8) 1116 , _compilation(compilation) 1117 #ifndef PRODUCT 1118 , _block(block) 1119 #endif 1120 #ifdef ASSERT 1121 , _file(NULL) 1122 , _line(0) 1123 #endif 1124 { } 1125 1126 1127 #ifdef ASSERT 1128 void LIR_List::set_file_and_line(const char * file, int line) { 1129 const char * f = strrchr(file, '/'); 1130 if (f == NULL) f = strrchr(file, '\\'); 1131 if (f == NULL) { 1132 f = file; 1133 } else { 1134 f++; 1135 } 1136 _file = f; 1137 _line = line; 1138 } 1139 #endif 1140 1141 1142 void LIR_List::append(LIR_InsertionBuffer* buffer) { 1143 assert(this == buffer->lir_list(), "wrong lir list"); 1144 const int n = _operations.length(); 1145 1146 if (buffer->number_of_ops() > 0) { 1147 // increase size of instructions list 1148 _operations.at_grow(n + buffer->number_of_ops() - 1, NULL); 1149 // insert ops from buffer into instructions list 1150 int op_index = buffer->number_of_ops() - 1; 1151 int ip_index = buffer->number_of_insertion_points() - 1; 1152 int from_index = n - 1; 1153 int to_index = _operations.length() - 1; 1154 for (; ip_index >= 0; ip_index --) { 1155 int index = buffer->index_at(ip_index); 1156 // make room after insertion point 1157 while (index < from_index) { 1158 _operations.at_put(to_index --, _operations.at(from_index --)); 1159 } 1160 // insert ops from buffer 1161 for (int i = buffer->count_at(ip_index); i > 0; i --) { 1162 _operations.at_put(to_index --, buffer->op_at(op_index --)); 1163 } 1164 } 1165 } 1166 1167 buffer->finish(); 1168 } 1169 1170 1171 void LIR_List::oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info) { 1172 assert(reg->type() == T_OBJECT, "bad reg"); 1173 append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg, T_OBJECT, lir_patch_normal, info)); 1174 } 1175 1176 void LIR_List::klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info) { 1177 assert(reg->type() == T_METADATA, "bad reg"); 1178 append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg, T_METADATA, lir_patch_normal, info)); 1179 } 1180 1181 void LIR_List::load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1182 append(new LIR_Op1( 1183 lir_move, 1184 LIR_OprFact::address(addr), 1185 src, 1186 addr->type(), 1187 patch_code, 1188 info)); 1189 } 1190 1191 1192 void LIR_List::volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1193 append(new LIR_Op1( 1194 lir_move, 1195 LIR_OprFact::address(address), 1196 dst, 1197 address->type(), 1198 patch_code, 1199 info, lir_move_volatile)); 1200 } 1201 1202 void LIR_List::volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1203 append(new LIR_Op1( 1204 lir_move, 1205 LIR_OprFact::address(new LIR_Address(base, offset, type)), 1206 dst, 1207 type, 1208 patch_code, 1209 info, lir_move_volatile)); 1210 } 1211 1212 1213 void LIR_List::store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1214 append(new LIR_Op1( 1215 lir_move, 1216 LIR_OprFact::intConst(v), 1217 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)), 1218 type, 1219 patch_code, 1220 info)); 1221 } 1222 1223 1224 void LIR_List::store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1225 append(new LIR_Op1( 1226 lir_move, 1227 LIR_OprFact::oopConst(o), 1228 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)), 1229 type, 1230 patch_code, 1231 info)); 1232 } 1233 1234 1235 void LIR_List::store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1236 append(new LIR_Op1( 1237 lir_move, 1238 src, 1239 LIR_OprFact::address(addr), 1240 addr->type(), 1241 patch_code, 1242 info)); 1243 } 1244 1245 1246 void LIR_List::volatile_store_mem_reg(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1247 append(new LIR_Op1( 1248 lir_move, 1249 src, 1250 LIR_OprFact::address(addr), 1251 addr->type(), 1252 patch_code, 1253 info, 1254 lir_move_volatile)); 1255 } 1256 1257 void LIR_List::volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1258 append(new LIR_Op1( 1259 lir_move, 1260 src, 1261 LIR_OprFact::address(new LIR_Address(base, offset, type)), 1262 type, 1263 patch_code, 1264 info, lir_move_volatile)); 1265 } 1266 1267 1268 void LIR_List::idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { 1269 append(new LIR_Op3( 1270 lir_idiv, 1271 left, 1272 right, 1273 tmp, 1274 res, 1275 info)); 1276 } 1277 1278 1279 void LIR_List::idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { 1280 append(new LIR_Op3( 1281 lir_idiv, 1282 left, 1283 LIR_OprFact::intConst(right), 1284 tmp, 1285 res, 1286 info)); 1287 } 1288 1289 1290 void LIR_List::irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { 1291 append(new LIR_Op3( 1292 lir_irem, 1293 left, 1294 right, 1295 tmp, 1296 res, 1297 info)); 1298 } 1299 1300 1301 void LIR_List::irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { 1302 append(new LIR_Op3( 1303 lir_irem, 1304 left, 1305 LIR_OprFact::intConst(right), 1306 tmp, 1307 res, 1308 info)); 1309 } 1310 1311 1312 void LIR_List::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) { 1313 append(new LIR_Op2( 1314 lir_cmp, 1315 condition, 1316 LIR_OprFact::address(new LIR_Address(base, disp, T_INT)), 1317 LIR_OprFact::intConst(c), 1318 info)); 1319 } 1320 1321 1322 void LIR_List::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info) { 1323 append(new LIR_Op2( 1324 lir_cmp, 1325 condition, 1326 reg, 1327 LIR_OprFact::address(addr), 1328 info)); 1329 } 1330 1331 void LIR_List::allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, 1332 int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub) { 1333 append(new LIR_OpAllocObj( 1334 klass, 1335 dst, 1336 t1, 1337 t2, 1338 t3, 1339 t4, 1340 header_size, 1341 object_size, 1342 init_check, 1343 stub)); 1344 } 1345 1346 void LIR_List::allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub) { 1347 append(new LIR_OpAllocArray( 1348 klass, 1349 len, 1350 dst, 1351 t1, 1352 t2, 1353 t3, 1354 t4, 1355 type, 1356 stub)); 1357 } 1358 1359 void LIR_List::shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) { 1360 append(new LIR_Op2( 1361 lir_shl, 1362 value, 1363 count, 1364 dst, 1365 tmp)); 1366 } 1367 1368 void LIR_List::shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) { 1369 append(new LIR_Op2( 1370 lir_shr, 1371 value, 1372 count, 1373 dst, 1374 tmp)); 1375 } 1376 1377 1378 void LIR_List::unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) { 1379 append(new LIR_Op2( 1380 lir_ushr, 1381 value, 1382 count, 1383 dst, 1384 tmp)); 1385 } 1386 1387 void LIR_List::fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less) { 1388 append(new LIR_Op2(is_unordered_less ? lir_ucmp_fd2i : lir_cmp_fd2i, 1389 left, 1390 right, 1391 dst)); 1392 } 1393 1394 void LIR_List::lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info) { 1395 append(new LIR_OpLock( 1396 lir_lock, 1397 hdr, 1398 obj, 1399 lock, 1400 scratch, 1401 stub, 1402 info)); 1403 } 1404 1405 void LIR_List::unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub) { 1406 append(new LIR_OpLock( 1407 lir_unlock, 1408 hdr, 1409 obj, 1410 lock, 1411 scratch, 1412 stub, 1413 NULL)); 1414 } 1415 1416 1417 void check_LIR() { 1418 // cannot do the proper checking as PRODUCT and other modes return different results 1419 // guarantee(sizeof(LIR_OprDesc) == wordSize, "may not have a v-table"); 1420 } 1421 1422 1423 1424 void LIR_List::checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass, 1425 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, 1426 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub, 1427 ciMethod* profiled_method, int profiled_bci) { 1428 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_checkcast, result, object, klass, 1429 tmp1, tmp2, tmp3, fast_check, info_for_exception, info_for_patch, stub); 1430 if (profiled_method != NULL) { 1431 c->set_profiled_method(profiled_method); 1432 c->set_profiled_bci(profiled_bci); 1433 c->set_should_profile(true); 1434 } 1435 append(c); 1436 } 1437 1438 void LIR_List::instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci) { 1439 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_instanceof, result, object, klass, tmp1, tmp2, tmp3, fast_check, NULL, info_for_patch, NULL); 1440 if (profiled_method != NULL) { 1441 c->set_profiled_method(profiled_method); 1442 c->set_profiled_bci(profiled_bci); 1443 c->set_should_profile(true); 1444 } 1445 append(c); 1446 } 1447 1448 1449 void LIR_List::store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, 1450 CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci) { 1451 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_store_check, object, array, tmp1, tmp2, tmp3, info_for_exception); 1452 if (profiled_method != NULL) { 1453 c->set_profiled_method(profiled_method); 1454 c->set_profiled_bci(profiled_bci); 1455 c->set_should_profile(true); 1456 } 1457 append(c); 1458 } 1459 1460 1461 void LIR_List::cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, 1462 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) { 1463 append(new LIR_OpCompareAndSwap(lir_cas_long, addr, cmp_value, new_value, t1, t2, result)); 1464 } 1465 1466 void LIR_List::cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, 1467 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) { 1468 append(new LIR_OpCompareAndSwap(lir_cas_obj, addr, cmp_value, new_value, t1, t2, result)); 1469 } 1470 1471 void LIR_List::cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, 1472 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) { 1473 append(new LIR_OpCompareAndSwap(lir_cas_int, addr, cmp_value, new_value, t1, t2, result)); 1474 } 1475 1476 1477 #ifdef PRODUCT 1478 1479 void print_LIR(BlockList* blocks) { 1480 } 1481 1482 #else 1483 // LIR_OprDesc 1484 void LIR_OprDesc::print() const { 1485 print(tty); 1486 } 1487 1488 void LIR_OprDesc::print(outputStream* out) const { 1489 if (is_illegal()) { 1490 return; 1491 } 1492 1493 out->print("["); 1494 if (is_pointer()) { 1495 pointer()->print_value_on(out); 1496 } else if (is_single_stack()) { 1497 out->print("stack:%d", single_stack_ix()); 1498 } else if (is_double_stack()) { 1499 out->print("dbl_stack:%d",double_stack_ix()); 1500 } else if (is_virtual()) { 1501 out->print("R%d", vreg_number()); 1502 } else if (is_single_cpu()) { 1503 out->print("%s", as_register()->name()); 1504 } else if (is_double_cpu()) { 1505 out->print("%s", as_register_hi()->name()); 1506 out->print("%s", as_register_lo()->name()); 1507 #if defined(X86) 1508 } else if (is_single_xmm()) { 1509 out->print("%s", as_xmm_float_reg()->name()); 1510 } else if (is_double_xmm()) { 1511 out->print("%s", as_xmm_double_reg()->name()); 1512 } else if (is_single_fpu()) { 1513 out->print("fpu%d", fpu_regnr()); 1514 } else if (is_double_fpu()) { 1515 out->print("fpu%d", fpu_regnrLo()); 1516 #elif defined(AARCH64) 1517 } else if (is_single_fpu()) { 1518 out->print("fpu%d", fpu_regnr()); 1519 } else if (is_double_fpu()) { 1520 out->print("fpu%d", fpu_regnrLo()); 1521 #elif defined(ARM) 1522 } else if (is_single_fpu()) { 1523 out->print("s%d", fpu_regnr()); 1524 } else if (is_double_fpu()) { 1525 out->print("d%d", fpu_regnrLo() >> 1); 1526 #else 1527 } else if (is_single_fpu()) { 1528 out->print("%s", as_float_reg()->name()); 1529 } else if (is_double_fpu()) { 1530 out->print("%s", as_double_reg()->name()); 1531 #endif 1532 1533 } else if (is_illegal()) { 1534 out->print("-"); 1535 } else { 1536 out->print("Unknown Operand"); 1537 } 1538 if (!is_illegal()) { 1539 out->print("|%c", type_char()); 1540 } 1541 if (is_register() && is_last_use()) { 1542 out->print("(last_use)"); 1543 } 1544 out->print("]"); 1545 } 1546 1547 1548 // LIR_Address 1549 void LIR_Const::print_value_on(outputStream* out) const { 1550 switch (type()) { 1551 case T_ADDRESS:out->print("address:%d",as_jint()); break; 1552 case T_INT: out->print("int:%d", as_jint()); break; 1553 case T_LONG: out->print("lng:" JLONG_FORMAT, as_jlong()); break; 1554 case T_FLOAT: out->print("flt:%f", as_jfloat()); break; 1555 case T_DOUBLE: out->print("dbl:%f", as_jdouble()); break; 1556 case T_OBJECT: out->print("obj:" INTPTR_FORMAT, p2i(as_jobject())); break; 1557 case T_METADATA: out->print("metadata:" INTPTR_FORMAT, p2i(as_metadata()));break; 1558 default: out->print("%3d:0x" UINT64_FORMAT_X, type(), (uint64_t)as_jlong()); break; 1559 } 1560 } 1561 1562 // LIR_Address 1563 void LIR_Address::print_value_on(outputStream* out) const { 1564 out->print("Base:"); _base->print(out); 1565 if (!_index->is_illegal()) { 1566 out->print(" Index:"); _index->print(out); 1567 switch (scale()) { 1568 case times_1: break; 1569 case times_2: out->print(" * 2"); break; 1570 case times_4: out->print(" * 4"); break; 1571 case times_8: out->print(" * 8"); break; 1572 } 1573 } 1574 out->print(" Disp: " INTX_FORMAT, _disp); 1575 } 1576 1577 // debug output of block header without InstructionPrinter 1578 // (because phi functions are not necessary for LIR) 1579 static void print_block(BlockBegin* x) { 1580 // print block id 1581 BlockEnd* end = x->end(); 1582 tty->print("B%d ", x->block_id()); 1583 1584 // print flags 1585 if (x->is_set(BlockBegin::std_entry_flag)) tty->print("std "); 1586 if (x->is_set(BlockBegin::osr_entry_flag)) tty->print("osr "); 1587 if (x->is_set(BlockBegin::exception_entry_flag)) tty->print("ex "); 1588 if (x->is_set(BlockBegin::subroutine_entry_flag)) tty->print("jsr "); 1589 if (x->is_set(BlockBegin::backward_branch_target_flag)) tty->print("bb "); 1590 if (x->is_set(BlockBegin::linear_scan_loop_header_flag)) tty->print("lh "); 1591 if (x->is_set(BlockBegin::linear_scan_loop_end_flag)) tty->print("le "); 1592 1593 // print block bci range 1594 tty->print("[%d, %d] ", x->bci(), (end == NULL ? -1 : end->printable_bci())); 1595 1596 // print predecessors and successors 1597 if (x->number_of_preds() > 0) { 1598 tty->print("preds: "); 1599 for (int i = 0; i < x->number_of_preds(); i ++) { 1600 tty->print("B%d ", x->pred_at(i)->block_id()); 1601 } 1602 } 1603 1604 if (x->number_of_sux() > 0) { 1605 tty->print("sux: "); 1606 for (int i = 0; i < x->number_of_sux(); i ++) { 1607 tty->print("B%d ", x->sux_at(i)->block_id()); 1608 } 1609 } 1610 1611 // print exception handlers 1612 if (x->number_of_exception_handlers() > 0) { 1613 tty->print("xhandler: "); 1614 for (int i = 0; i < x->number_of_exception_handlers(); i++) { 1615 tty->print("B%d ", x->exception_handler_at(i)->block_id()); 1616 } 1617 } 1618 1619 tty->cr(); 1620 } 1621 1622 void print_LIR(BlockList* blocks) { 1623 tty->print_cr("LIR:"); 1624 int i; 1625 for (i = 0; i < blocks->length(); i++) { 1626 BlockBegin* bb = blocks->at(i); 1627 print_block(bb); 1628 tty->print("__id_Instruction___________________________________________"); tty->cr(); 1629 bb->lir()->print_instructions(); 1630 } 1631 } 1632 1633 void LIR_List::print_instructions() { 1634 for (int i = 0; i < _operations.length(); i++) { 1635 _operations.at(i)->print(); tty->cr(); 1636 } 1637 tty->cr(); 1638 } 1639 1640 // LIR_Ops printing routines 1641 // LIR_Op 1642 void LIR_Op::print_on(outputStream* out) const { 1643 if (id() != -1 || PrintCFGToFile) { 1644 out->print("%4d ", id()); 1645 } else { 1646 out->print(" "); 1647 } 1648 out->print("%s ", name()); 1649 print_instr(out); 1650 if (info() != NULL) out->print(" [bci:%d]", info()->stack()->bci()); 1651 #ifdef ASSERT 1652 if (Verbose && _file != NULL) { 1653 out->print(" (%s:%d)", _file, _line); 1654 } 1655 #endif 1656 } 1657 1658 const char * LIR_Op::name() const { 1659 const char* s = NULL; 1660 switch(code()) { 1661 // LIR_Op0 1662 case lir_membar: s = "membar"; break; 1663 case lir_membar_acquire: s = "membar_acquire"; break; 1664 case lir_membar_release: s = "membar_release"; break; 1665 case lir_membar_loadload: s = "membar_loadload"; break; 1666 case lir_membar_storestore: s = "membar_storestore"; break; 1667 case lir_membar_loadstore: s = "membar_loadstore"; break; 1668 case lir_membar_storeload: s = "membar_storeload"; break; 1669 case lir_word_align: s = "word_align"; break; 1670 case lir_label: s = "label"; break; 1671 case lir_nop: s = "nop"; break; 1672 case lir_on_spin_wait: s = "on_spin_wait"; break; 1673 case lir_backwardbranch_target: s = "backbranch"; break; 1674 case lir_std_entry: s = "std_entry"; break; 1675 case lir_osr_entry: s = "osr_entry"; break; 1676 case lir_build_frame: s = "build_frm"; break; 1677 case lir_fpop_raw: s = "fpop_raw"; break; 1678 case lir_24bit_FPU: s = "24bit_FPU"; break; 1679 case lir_reset_FPU: s = "reset_FPU"; break; 1680 case lir_breakpoint: s = "breakpoint"; break; 1681 case lir_get_thread: s = "get_thread"; break; 1682 // LIR_Op1 1683 case lir_fxch: s = "fxch"; break; 1684 case lir_fld: s = "fld"; break; 1685 case lir_ffree: s = "ffree"; break; 1686 case lir_push: s = "push"; break; 1687 case lir_pop: s = "pop"; break; 1688 case lir_null_check: s = "null_check"; break; 1689 case lir_return: s = "return"; break; 1690 case lir_safepoint: s = "safepoint"; break; 1691 case lir_neg: s = "neg"; break; 1692 case lir_leal: s = "leal"; break; 1693 case lir_branch: s = "branch"; break; 1694 case lir_cond_float_branch: s = "flt_cond_br"; break; 1695 case lir_move: s = "move"; break; 1696 case lir_roundfp: s = "roundfp"; break; 1697 case lir_rtcall: s = "rtcall"; break; 1698 case lir_throw: s = "throw"; break; 1699 case lir_unwind: s = "unwind"; break; 1700 case lir_convert: s = "convert"; break; 1701 case lir_alloc_object: s = "alloc_obj"; break; 1702 case lir_monaddr: s = "mon_addr"; break; 1703 case lir_pack64: s = "pack64"; break; 1704 case lir_unpack64: s = "unpack64"; break; 1705 // LIR_Op2 1706 case lir_cmp: s = "cmp"; break; 1707 case lir_cmp_l2i: s = "cmp_l2i"; break; 1708 case lir_ucmp_fd2i: s = "ucomp_fd2i"; break; 1709 case lir_cmp_fd2i: s = "comp_fd2i"; break; 1710 case lir_cmove: s = "cmove"; break; 1711 case lir_add: s = "add"; break; 1712 case lir_sub: s = "sub"; break; 1713 case lir_mul: s = "mul"; break; 1714 case lir_mul_strictfp: s = "mul_strictfp"; break; 1715 case lir_div: s = "div"; break; 1716 case lir_div_strictfp: s = "div_strictfp"; break; 1717 case lir_rem: s = "rem"; break; 1718 case lir_abs: s = "abs"; break; 1719 case lir_sqrt: s = "sqrt"; break; 1720 case lir_logic_and: s = "logic_and"; break; 1721 case lir_logic_or: s = "logic_or"; break; 1722 case lir_logic_xor: s = "logic_xor"; break; 1723 case lir_shl: s = "shift_left"; break; 1724 case lir_shr: s = "shift_right"; break; 1725 case lir_ushr: s = "ushift_right"; break; 1726 case lir_alloc_array: s = "alloc_array"; break; 1727 case lir_xadd: s = "xadd"; break; 1728 case lir_xchg: s = "xchg"; break; 1729 // LIR_Op3 1730 case lir_idiv: s = "idiv"; break; 1731 case lir_irem: s = "irem"; break; 1732 case lir_fmad: s = "fmad"; break; 1733 case lir_fmaf: s = "fmaf"; break; 1734 // LIR_OpJavaCall 1735 case lir_static_call: s = "static"; break; 1736 case lir_optvirtual_call: s = "optvirtual"; break; 1737 case lir_icvirtual_call: s = "icvirtual"; break; 1738 case lir_virtual_call: s = "virtual"; break; 1739 case lir_dynamic_call: s = "dynamic"; break; 1740 // LIR_OpArrayCopy 1741 case lir_arraycopy: s = "arraycopy"; break; 1742 // LIR_OpUpdateCRC32 1743 case lir_updatecrc32: s = "updatecrc32"; break; 1744 // LIR_OpLock 1745 case lir_lock: s = "lock"; break; 1746 case lir_unlock: s = "unlock"; break; 1747 // LIR_OpDelay 1748 case lir_delay_slot: s = "delay"; break; 1749 // LIR_OpTypeCheck 1750 case lir_instanceof: s = "instanceof"; break; 1751 case lir_checkcast: s = "checkcast"; break; 1752 case lir_store_check: s = "store_check"; break; 1753 // LIR_OpCompareAndSwap 1754 case lir_cas_long: s = "cas_long"; break; 1755 case lir_cas_obj: s = "cas_obj"; break; 1756 case lir_cas_int: s = "cas_int"; break; 1757 // LIR_OpProfileCall 1758 case lir_profile_call: s = "profile_call"; break; 1759 // LIR_OpProfileType 1760 case lir_profile_type: s = "profile_type"; break; 1761 // LIR_OpAssert 1762 #ifdef ASSERT 1763 case lir_assert: s = "assert"; break; 1764 #endif 1765 case lir_none: ShouldNotReachHere();break; 1766 default: s = "illegal_op"; break; 1767 } 1768 return s; 1769 } 1770 1771 // LIR_OpJavaCall 1772 void LIR_OpJavaCall::print_instr(outputStream* out) const { 1773 out->print("call: "); 1774 out->print("[addr: " INTPTR_FORMAT "]", p2i(address())); 1775 if (receiver()->is_valid()) { 1776 out->print(" [recv: "); receiver()->print(out); out->print("]"); 1777 } 1778 if (result_opr()->is_valid()) { 1779 out->print(" [result: "); result_opr()->print(out); out->print("]"); 1780 } 1781 } 1782 1783 // LIR_OpLabel 1784 void LIR_OpLabel::print_instr(outputStream* out) const { 1785 out->print("[label:" INTPTR_FORMAT "]", p2i(_label)); 1786 } 1787 1788 // LIR_OpArrayCopy 1789 void LIR_OpArrayCopy::print_instr(outputStream* out) const { 1790 src()->print(out); out->print(" "); 1791 src_pos()->print(out); out->print(" "); 1792 dst()->print(out); out->print(" "); 1793 dst_pos()->print(out); out->print(" "); 1794 length()->print(out); out->print(" "); 1795 tmp()->print(out); out->print(" "); 1796 } 1797 1798 // LIR_OpUpdateCRC32 1799 void LIR_OpUpdateCRC32::print_instr(outputStream* out) const { 1800 crc()->print(out); out->print(" "); 1801 val()->print(out); out->print(" "); 1802 result_opr()->print(out); out->print(" "); 1803 } 1804 1805 // LIR_OpCompareAndSwap 1806 void LIR_OpCompareAndSwap::print_instr(outputStream* out) const { 1807 addr()->print(out); out->print(" "); 1808 cmp_value()->print(out); out->print(" "); 1809 new_value()->print(out); out->print(" "); 1810 tmp1()->print(out); out->print(" "); 1811 tmp2()->print(out); out->print(" "); 1812 1813 } 1814 1815 // LIR_Op0 1816 void LIR_Op0::print_instr(outputStream* out) const { 1817 result_opr()->print(out); 1818 } 1819 1820 // LIR_Op1 1821 const char * LIR_Op1::name() const { 1822 if (code() == lir_move) { 1823 switch (move_kind()) { 1824 case lir_move_normal: 1825 return "move"; 1826 case lir_move_unaligned: 1827 return "unaligned move"; 1828 case lir_move_volatile: 1829 return "volatile_move"; 1830 case lir_move_wide: 1831 return "wide_move"; 1832 default: 1833 ShouldNotReachHere(); 1834 return "illegal_op"; 1835 } 1836 } else { 1837 return LIR_Op::name(); 1838 } 1839 } 1840 1841 1842 void LIR_Op1::print_instr(outputStream* out) const { 1843 _opr->print(out); out->print(" "); 1844 result_opr()->print(out); out->print(" "); 1845 print_patch_code(out, patch_code()); 1846 } 1847 1848 1849 // LIR_Op1 1850 void LIR_OpRTCall::print_instr(outputStream* out) const { 1851 intx a = (intx)addr(); 1852 out->print("%s", Runtime1::name_for_address(addr())); 1853 out->print(" "); 1854 tmp()->print(out); 1855 } 1856 1857 void LIR_Op1::print_patch_code(outputStream* out, LIR_PatchCode code) { 1858 switch(code) { 1859 case lir_patch_none: break; 1860 case lir_patch_low: out->print("[patch_low]"); break; 1861 case lir_patch_high: out->print("[patch_high]"); break; 1862 case lir_patch_normal: out->print("[patch_normal]"); break; 1863 default: ShouldNotReachHere(); 1864 } 1865 } 1866 1867 // LIR_OpBranch 1868 void LIR_OpBranch::print_instr(outputStream* out) const { 1869 print_condition(out, cond()); out->print(" "); 1870 if (block() != NULL) { 1871 out->print("[B%d] ", block()->block_id()); 1872 } else if (stub() != NULL) { 1873 out->print("["); 1874 stub()->print_name(out); 1875 out->print(": " INTPTR_FORMAT "]", p2i(stub())); 1876 if (stub()->info() != NULL) out->print(" [bci:%d]", stub()->info()->stack()->bci()); 1877 } else { 1878 out->print("[label:" INTPTR_FORMAT "] ", p2i(label())); 1879 } 1880 if (ublock() != NULL) { 1881 out->print("unordered: [B%d] ", ublock()->block_id()); 1882 } 1883 } 1884 1885 void LIR_Op::print_condition(outputStream* out, LIR_Condition cond) { 1886 switch(cond) { 1887 case lir_cond_equal: out->print("[EQ]"); break; 1888 case lir_cond_notEqual: out->print("[NE]"); break; 1889 case lir_cond_less: out->print("[LT]"); break; 1890 case lir_cond_lessEqual: out->print("[LE]"); break; 1891 case lir_cond_greaterEqual: out->print("[GE]"); break; 1892 case lir_cond_greater: out->print("[GT]"); break; 1893 case lir_cond_belowEqual: out->print("[BE]"); break; 1894 case lir_cond_aboveEqual: out->print("[AE]"); break; 1895 case lir_cond_always: out->print("[AL]"); break; 1896 default: out->print("[%d]",cond); break; 1897 } 1898 } 1899 1900 // LIR_OpConvert 1901 void LIR_OpConvert::print_instr(outputStream* out) const { 1902 print_bytecode(out, bytecode()); 1903 in_opr()->print(out); out->print(" "); 1904 result_opr()->print(out); out->print(" "); 1905 #ifdef PPC32 1906 if(tmp1()->is_valid()) { 1907 tmp1()->print(out); out->print(" "); 1908 tmp2()->print(out); out->print(" "); 1909 } 1910 #endif 1911 } 1912 1913 void LIR_OpConvert::print_bytecode(outputStream* out, Bytecodes::Code code) { 1914 switch(code) { 1915 case Bytecodes::_d2f: out->print("[d2f] "); break; 1916 case Bytecodes::_d2i: out->print("[d2i] "); break; 1917 case Bytecodes::_d2l: out->print("[d2l] "); break; 1918 case Bytecodes::_f2d: out->print("[f2d] "); break; 1919 case Bytecodes::_f2i: out->print("[f2i] "); break; 1920 case Bytecodes::_f2l: out->print("[f2l] "); break; 1921 case Bytecodes::_i2b: out->print("[i2b] "); break; 1922 case Bytecodes::_i2c: out->print("[i2c] "); break; 1923 case Bytecodes::_i2d: out->print("[i2d] "); break; 1924 case Bytecodes::_i2f: out->print("[i2f] "); break; 1925 case Bytecodes::_i2l: out->print("[i2l] "); break; 1926 case Bytecodes::_i2s: out->print("[i2s] "); break; 1927 case Bytecodes::_l2i: out->print("[l2i] "); break; 1928 case Bytecodes::_l2f: out->print("[l2f] "); break; 1929 case Bytecodes::_l2d: out->print("[l2d] "); break; 1930 default: 1931 out->print("[?%d]",code); 1932 break; 1933 } 1934 } 1935 1936 void LIR_OpAllocObj::print_instr(outputStream* out) const { 1937 klass()->print(out); out->print(" "); 1938 obj()->print(out); out->print(" "); 1939 tmp1()->print(out); out->print(" "); 1940 tmp2()->print(out); out->print(" "); 1941 tmp3()->print(out); out->print(" "); 1942 tmp4()->print(out); out->print(" "); 1943 out->print("[hdr:%d]", header_size()); out->print(" "); 1944 out->print("[obj:%d]", object_size()); out->print(" "); 1945 out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry())); 1946 } 1947 1948 void LIR_OpRoundFP::print_instr(outputStream* out) const { 1949 _opr->print(out); out->print(" "); 1950 tmp()->print(out); out->print(" "); 1951 result_opr()->print(out); out->print(" "); 1952 } 1953 1954 // LIR_Op2 1955 void LIR_Op2::print_instr(outputStream* out) const { 1956 if (code() == lir_cmove || code() == lir_cmp) { 1957 print_condition(out, condition()); out->print(" "); 1958 } 1959 in_opr1()->print(out); out->print(" "); 1960 in_opr2()->print(out); out->print(" "); 1961 if (tmp1_opr()->is_valid()) { tmp1_opr()->print(out); out->print(" "); } 1962 if (tmp2_opr()->is_valid()) { tmp2_opr()->print(out); out->print(" "); } 1963 if (tmp3_opr()->is_valid()) { tmp3_opr()->print(out); out->print(" "); } 1964 if (tmp4_opr()->is_valid()) { tmp4_opr()->print(out); out->print(" "); } 1965 if (tmp5_opr()->is_valid()) { tmp5_opr()->print(out); out->print(" "); } 1966 result_opr()->print(out); 1967 } 1968 1969 void LIR_OpAllocArray::print_instr(outputStream* out) const { 1970 klass()->print(out); out->print(" "); 1971 len()->print(out); out->print(" "); 1972 obj()->print(out); out->print(" "); 1973 tmp1()->print(out); out->print(" "); 1974 tmp2()->print(out); out->print(" "); 1975 tmp3()->print(out); out->print(" "); 1976 tmp4()->print(out); out->print(" "); 1977 out->print("[type:0x%x]", type()); out->print(" "); 1978 out->print("[label:" INTPTR_FORMAT "]", p2i(stub()->entry())); 1979 } 1980 1981 1982 void LIR_OpTypeCheck::print_instr(outputStream* out) const { 1983 object()->print(out); out->print(" "); 1984 if (code() == lir_store_check) { 1985 array()->print(out); out->print(" "); 1986 } 1987 if (code() != lir_store_check) { 1988 klass()->print_name_on(out); out->print(" "); 1989 if (fast_check()) out->print("fast_check "); 1990 } 1991 tmp1()->print(out); out->print(" "); 1992 tmp2()->print(out); out->print(" "); 1993 tmp3()->print(out); out->print(" "); 1994 result_opr()->print(out); out->print(" "); 1995 if (info_for_exception() != NULL) out->print(" [bci:%d]", info_for_exception()->stack()->bci()); 1996 } 1997 1998 1999 // LIR_Op3 2000 void LIR_Op3::print_instr(outputStream* out) const { 2001 in_opr1()->print(out); out->print(" "); 2002 in_opr2()->print(out); out->print(" "); 2003 in_opr3()->print(out); out->print(" "); 2004 result_opr()->print(out); 2005 } 2006 2007 2008 void LIR_OpLock::print_instr(outputStream* out) const { 2009 hdr_opr()->print(out); out->print(" "); 2010 obj_opr()->print(out); out->print(" "); 2011 lock_opr()->print(out); out->print(" "); 2012 if (_scratch->is_valid()) { 2013 _scratch->print(out); out->print(" "); 2014 } 2015 out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry())); 2016 } 2017 2018 #ifdef ASSERT 2019 void LIR_OpAssert::print_instr(outputStream* out) const { 2020 print_condition(out, condition()); out->print(" "); 2021 in_opr1()->print(out); out->print(" "); 2022 in_opr2()->print(out); out->print(", \""); 2023 out->print("%s", msg()); out->print("\""); 2024 } 2025 #endif 2026 2027 2028 void LIR_OpDelay::print_instr(outputStream* out) const { 2029 _op->print_on(out); 2030 } 2031 2032 2033 // LIR_OpProfileCall 2034 void LIR_OpProfileCall::print_instr(outputStream* out) const { 2035 profiled_method()->name()->print_symbol_on(out); 2036 out->print("."); 2037 profiled_method()->holder()->name()->print_symbol_on(out); 2038 out->print(" @ %d ", profiled_bci()); 2039 mdo()->print(out); out->print(" "); 2040 recv()->print(out); out->print(" "); 2041 tmp1()->print(out); out->print(" "); 2042 } 2043 2044 // LIR_OpProfileType 2045 void LIR_OpProfileType::print_instr(outputStream* out) const { 2046 out->print("exact = "); 2047 if (exact_klass() == NULL) { 2048 out->print("unknown"); 2049 } else { 2050 exact_klass()->print_name_on(out); 2051 } 2052 out->print(" current = "); ciTypeEntries::print_ciklass(out, current_klass()); 2053 out->print(" "); 2054 mdp()->print(out); out->print(" "); 2055 obj()->print(out); out->print(" "); 2056 tmp()->print(out); out->print(" "); 2057 } 2058 2059 #endif // PRODUCT 2060 2061 // Implementation of LIR_InsertionBuffer 2062 2063 void LIR_InsertionBuffer::append(int index, LIR_Op* op) { 2064 assert(_index_and_count.length() % 2 == 0, "must have a count for each index"); 2065 2066 int i = number_of_insertion_points() - 1; 2067 if (i < 0 || index_at(i) < index) { 2068 append_new(index, 1); 2069 } else { 2070 assert(index_at(i) == index, "can append LIR_Ops in ascending order only"); 2071 assert(count_at(i) > 0, "check"); 2072 set_count_at(i, count_at(i) + 1); 2073 } 2074 _ops.push(op); 2075 2076 DEBUG_ONLY(verify()); 2077 } 2078 2079 #ifdef ASSERT 2080 void LIR_InsertionBuffer::verify() { 2081 int sum = 0; 2082 int prev_idx = -1; 2083 2084 for (int i = 0; i < number_of_insertion_points(); i++) { 2085 assert(prev_idx < index_at(i), "index must be ordered ascending"); 2086 sum += count_at(i); 2087 } 2088 assert(sum == number_of_ops(), "wrong total sum"); 2089 } 2090 #endif