1 /*
2 * Copyright (c) 2000, 2016, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #ifndef SHARE_VM_C1_C1_LIR_HPP
26 #define SHARE_VM_C1_C1_LIR_HPP
27
28 #include "c1/c1_Defs.hpp"
29 #include "c1/c1_ValueType.hpp"
30 #include "oops/method.hpp"
31
32 class BlockBegin;
33 class BlockList;
34 class LIR_Assembler;
35 class CodeEmitInfo;
36 class CodeStub;
37 class CodeStubList;
38 class ArrayCopyStub;
39 class LIR_Op;
40 class ciType;
41 class ValueType;
42 class LIR_OpVisitState;
43 class FpuStackSim;
44
45 //---------------------------------------------------------------------
46 // LIR Operands
47 // LIR_OprDesc
48 // LIR_OprPtr
49 // LIR_Const
50 // LIR_Address
51 //---------------------------------------------------------------------
52 class LIR_OprDesc;
53 class LIR_OprPtr;
54 class LIR_Const;
55 class LIR_Address;
56 class LIR_OprVisitor;
57
58
59 typedef LIR_OprDesc* LIR_Opr;
60 typedef int RegNr;
61
62 typedef GrowableArray<LIR_Opr> LIR_OprList;
63 typedef GrowableArray<LIR_Op*> LIR_OpArray;
64 typedef GrowableArray<LIR_Op*> LIR_OpList;
65
66 // define LIR_OprPtr early so LIR_OprDesc can refer to it
67 class LIR_OprPtr: public CompilationResourceObj {
68 public:
69 bool is_oop_pointer() const { return (type() == T_OBJECT); }
70 bool is_float_kind() const { BasicType t = type(); return (t == T_FLOAT) || (t == T_DOUBLE); }
71
72 virtual LIR_Const* as_constant() { return NULL; }
73 virtual LIR_Address* as_address() { return NULL; }
74 virtual BasicType type() const = 0;
75 virtual void print_value_on(outputStream* out) const = 0;
76 };
77
78
79
80 // LIR constants
81 class LIR_Const: public LIR_OprPtr {
82 private:
83 JavaValue _value;
84
85 void type_check(BasicType t) const { assert(type() == t, "type check"); }
86 void type_check(BasicType t1, BasicType t2) const { assert(type() == t1 || type() == t2, "type check"); }
87 void type_check(BasicType t1, BasicType t2, BasicType t3) const { assert(type() == t1 || type() == t2 || type() == t3, "type check"); }
88
89 public:
90 LIR_Const(jint i, bool is_address=false) { _value.set_type(is_address?T_ADDRESS:T_INT); _value.set_jint(i); }
91 LIR_Const(jlong l) { _value.set_type(T_LONG); _value.set_jlong(l); }
92 LIR_Const(jfloat f) { _value.set_type(T_FLOAT); _value.set_jfloat(f); }
93 LIR_Const(jdouble d) { _value.set_type(T_DOUBLE); _value.set_jdouble(d); }
94 LIR_Const(jobject o) { _value.set_type(T_OBJECT); _value.set_jobject(o); }
95 LIR_Const(void* p) {
96 #ifdef _LP64
97 assert(sizeof(jlong) >= sizeof(p), "too small");;
98 _value.set_type(T_LONG); _value.set_jlong((jlong)p);
99 #else
100 assert(sizeof(jint) >= sizeof(p), "too small");;
101 _value.set_type(T_INT); _value.set_jint((jint)p);
102 #endif
103 }
104 LIR_Const(Metadata* m) {
105 _value.set_type(T_METADATA);
106 #ifdef _LP64
107 _value.set_jlong((jlong)m);
108 #else
109 _value.set_jint((jint)m);
110 #endif // _LP64
111 }
112
113 virtual BasicType type() const { return _value.get_type(); }
114 virtual LIR_Const* as_constant() { return this; }
115
116 jint as_jint() const { type_check(T_INT, T_ADDRESS); return _value.get_jint(); }
117 jlong as_jlong() const { type_check(T_LONG ); return _value.get_jlong(); }
118 jfloat as_jfloat() const { type_check(T_FLOAT ); return _value.get_jfloat(); }
119 jdouble as_jdouble() const { type_check(T_DOUBLE); return _value.get_jdouble(); }
120 jobject as_jobject() const { type_check(T_OBJECT); return _value.get_jobject(); }
121 jint as_jint_lo() const { type_check(T_LONG ); return low(_value.get_jlong()); }
122 jint as_jint_hi() const { type_check(T_LONG ); return high(_value.get_jlong()); }
123
124 #ifdef _LP64
125 address as_pointer() const { type_check(T_LONG ); return (address)_value.get_jlong(); }
126 Metadata* as_metadata() const { type_check(T_METADATA); return (Metadata*)_value.get_jlong(); }
127 #else
128 address as_pointer() const { type_check(T_INT ); return (address)_value.get_jint(); }
129 Metadata* as_metadata() const { type_check(T_METADATA); return (Metadata*)_value.get_jint(); }
130 #endif
131
132
133 jint as_jint_bits() const { type_check(T_FLOAT, T_INT, T_ADDRESS); return _value.get_jint(); }
134 jint as_jint_lo_bits() const {
135 if (type() == T_DOUBLE) {
136 return low(jlong_cast(_value.get_jdouble()));
137 } else {
138 return as_jint_lo();
139 }
140 }
141 jint as_jint_hi_bits() const {
142 if (type() == T_DOUBLE) {
143 return high(jlong_cast(_value.get_jdouble()));
144 } else {
145 return as_jint_hi();
146 }
147 }
148 jlong as_jlong_bits() const {
149 if (type() == T_DOUBLE) {
150 return jlong_cast(_value.get_jdouble());
151 } else {
152 return as_jlong();
153 }
154 }
155
156 virtual void print_value_on(outputStream* out) const PRODUCT_RETURN;
157
158
159 bool is_zero_float() {
160 jfloat f = as_jfloat();
161 jfloat ok = 0.0f;
162 return jint_cast(f) == jint_cast(ok);
163 }
164
165 bool is_one_float() {
166 jfloat f = as_jfloat();
167 return !g_isnan(f) && g_isfinite(f) && f == 1.0;
168 }
169
170 bool is_zero_double() {
171 jdouble d = as_jdouble();
172 jdouble ok = 0.0;
173 return jlong_cast(d) == jlong_cast(ok);
174 }
175
176 bool is_one_double() {
177 jdouble d = as_jdouble();
178 return !g_isnan(d) && g_isfinite(d) && d == 1.0;
179 }
180 };
181
182
183 //---------------------LIR Operand descriptor------------------------------------
184 //
185 // The class LIR_OprDesc represents a LIR instruction operand;
186 // it can be a register (ALU/FPU), stack location or a constant;
187 // Constants and addresses are represented as resource area allocated
188 // structures (see above).
189 // Registers and stack locations are inlined into the this pointer
190 // (see value function).
191
192 class LIR_OprDesc: public CompilationResourceObj {
193 public:
194 // value structure:
195 // data opr-type opr-kind
196 // +--------------+-------+-------+
197 // [max...........|7 6 5 4|3 2 1 0]
198 // ^
199 // is_pointer bit
200 //
201 // lowest bit cleared, means it is a structure pointer
202 // we need 4 bits to represent types
203
204 private:
205 friend class LIR_OprFact;
206
207 // Conversion
208 intptr_t value() const { return (intptr_t) this; }
209
210 bool check_value_mask(intptr_t mask, intptr_t masked_value) const {
211 return (value() & mask) == masked_value;
212 }
213
214 enum OprKind {
215 pointer_value = 0
216 , stack_value = 1
217 , cpu_register = 3
218 , fpu_register = 5
219 , illegal_value = 7
220 };
221
222 enum OprBits {
223 pointer_bits = 1
224 , kind_bits = 3
225 , type_bits = 4
226 , size_bits = 2
227 , destroys_bits = 1
228 , virtual_bits = 1
229 , is_xmm_bits = 1
230 , last_use_bits = 1
231 , is_fpu_stack_offset_bits = 1 // used in assertion checking on x86 for FPU stack slot allocation
232 , non_data_bits = kind_bits + type_bits + size_bits + destroys_bits + last_use_bits +
233 is_fpu_stack_offset_bits + virtual_bits + is_xmm_bits
234 , data_bits = BitsPerInt - non_data_bits
235 , reg_bits = data_bits / 2 // for two registers in one value encoding
236 };
237
238 enum OprShift {
239 kind_shift = 0
240 , type_shift = kind_shift + kind_bits
241 , size_shift = type_shift + type_bits
242 , destroys_shift = size_shift + size_bits
243 , last_use_shift = destroys_shift + destroys_bits
244 , is_fpu_stack_offset_shift = last_use_shift + last_use_bits
245 , virtual_shift = is_fpu_stack_offset_shift + is_fpu_stack_offset_bits
246 , is_xmm_shift = virtual_shift + virtual_bits
247 , data_shift = is_xmm_shift + is_xmm_bits
248 , reg1_shift = data_shift
249 , reg2_shift = data_shift + reg_bits
250
251 };
252
253 enum OprSize {
254 single_size = 0 << size_shift
255 , double_size = 1 << size_shift
256 };
257
258 enum OprMask {
259 kind_mask = right_n_bits(kind_bits)
260 , type_mask = right_n_bits(type_bits) << type_shift
261 , size_mask = right_n_bits(size_bits) << size_shift
262 , last_use_mask = right_n_bits(last_use_bits) << last_use_shift
263 , is_fpu_stack_offset_mask = right_n_bits(is_fpu_stack_offset_bits) << is_fpu_stack_offset_shift
264 , virtual_mask = right_n_bits(virtual_bits) << virtual_shift
265 , is_xmm_mask = right_n_bits(is_xmm_bits) << is_xmm_shift
266 , pointer_mask = right_n_bits(pointer_bits)
267 , lower_reg_mask = right_n_bits(reg_bits)
268 , no_type_mask = (int)(~(type_mask | last_use_mask | is_fpu_stack_offset_mask))
269 };
270
271 uintptr_t data() const { return value() >> data_shift; }
272 int lo_reg_half() const { return data() & lower_reg_mask; }
273 int hi_reg_half() const { return (data() >> reg_bits) & lower_reg_mask; }
274 OprKind kind_field() const { return (OprKind)(value() & kind_mask); }
275 OprSize size_field() const { return (OprSize)(value() & size_mask); }
276
277 static char type_char(BasicType t);
278
279 public:
280 enum {
281 vreg_base = ConcreteRegisterImpl::number_of_registers,
282 vreg_max = (1 << data_bits) - 1
283 };
284
285 static inline LIR_Opr illegalOpr();
286
287 enum OprType {
288 unknown_type = 0 << type_shift // means: not set (catch uninitialized types)
289 , int_type = 1 << type_shift
290 , long_type = 2 << type_shift
291 , object_type = 3 << type_shift
292 , address_type = 4 << type_shift
293 , float_type = 5 << type_shift
294 , double_type = 6 << type_shift
295 , metadata_type = 7 << type_shift
296 };
297 friend OprType as_OprType(BasicType t);
298 friend BasicType as_BasicType(OprType t);
299
300 OprType type_field_valid() const { assert(is_register() || is_stack(), "should not be called otherwise"); return (OprType)(value() & type_mask); }
301 OprType type_field() const { return is_illegal() ? unknown_type : (OprType)(value() & type_mask); }
302
303 static OprSize size_for(BasicType t) {
304 switch (t) {
305 case T_LONG:
306 case T_DOUBLE:
307 return double_size;
308 break;
309
310 case T_FLOAT:
311 case T_BOOLEAN:
312 case T_CHAR:
313 case T_BYTE:
314 case T_SHORT:
315 case T_INT:
316 case T_ADDRESS:
317 case T_OBJECT:
318 case T_ARRAY:
319 case T_METADATA:
320 return single_size;
321 break;
322
323 default:
324 ShouldNotReachHere();
325 return single_size;
326 }
327 }
328
329
330 void validate_type() const PRODUCT_RETURN;
331
332 BasicType type() const {
333 if (is_pointer()) {
334 return pointer()->type();
335 }
336 return as_BasicType(type_field());
337 }
338
339
340 ValueType* value_type() const { return as_ValueType(type()); }
341
342 char type_char() const { return type_char((is_pointer()) ? pointer()->type() : type()); }
343
344 bool is_equal(LIR_Opr opr) const { return this == opr; }
345 // checks whether types are same
346 bool is_same_type(LIR_Opr opr) const {
347 assert(type_field() != unknown_type &&
348 opr->type_field() != unknown_type, "shouldn't see unknown_type");
349 return type_field() == opr->type_field();
350 }
351 bool is_same_register(LIR_Opr opr) {
352 return (is_register() && opr->is_register() &&
353 kind_field() == opr->kind_field() &&
354 (value() & no_type_mask) == (opr->value() & no_type_mask));
355 }
356
357 bool is_pointer() const { return check_value_mask(pointer_mask, pointer_value); }
358 bool is_illegal() const { return kind_field() == illegal_value; }
359 bool is_valid() const { return kind_field() != illegal_value; }
360
361 bool is_register() const { return is_cpu_register() || is_fpu_register(); }
362 bool is_virtual() const { return is_virtual_cpu() || is_virtual_fpu(); }
363
364 bool is_constant() const { return is_pointer() && pointer()->as_constant() != NULL; }
365 bool is_address() const { return is_pointer() && pointer()->as_address() != NULL; }
366
367 bool is_float_kind() const { return is_pointer() ? pointer()->is_float_kind() : (kind_field() == fpu_register); }
368 bool is_oop() const;
369
370 // semantic for fpu- and xmm-registers:
371 // * is_float and is_double return true for xmm_registers
372 // (so is_single_fpu and is_single_xmm are true)
373 // * So you must always check for is_???_xmm prior to is_???_fpu to
374 // distinguish between fpu- and xmm-registers
375
376 bool is_stack() const { validate_type(); return check_value_mask(kind_mask, stack_value); }
377 bool is_single_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | single_size); }
378 bool is_double_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | double_size); }
379
380 bool is_cpu_register() const { validate_type(); return check_value_mask(kind_mask, cpu_register); }
381 bool is_virtual_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register | virtual_mask); }
382 bool is_fixed_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register); }
383 bool is_single_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | single_size); }
384 bool is_double_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | double_size); }
385
386 bool is_fpu_register() const { validate_type(); return check_value_mask(kind_mask, fpu_register); }
387 bool is_virtual_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register | virtual_mask); }
388 bool is_fixed_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register); }
389 bool is_single_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | single_size); }
390 bool is_double_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | double_size); }
391
392 bool is_xmm_register() const { validate_type(); return check_value_mask(kind_mask | is_xmm_mask, fpu_register | is_xmm_mask); }
393 bool is_single_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | single_size | is_xmm_mask); }
394 bool is_double_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | double_size | is_xmm_mask); }
395
396 // fast accessor functions for special bits that do not work for pointers
397 // (in this functions, the check for is_pointer() is omitted)
398 bool is_single_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, single_size); }
399 bool is_double_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, double_size); }
400 bool is_virtual_register() const { assert(is_register(), "type check"); return check_value_mask(virtual_mask, virtual_mask); }
401 bool is_oop_register() const { assert(is_register() || is_stack(), "type check"); return type_field_valid() == object_type; }
402 BasicType type_register() const { assert(is_register() || is_stack(), "type check"); return as_BasicType(type_field_valid()); }
403
404 bool is_last_use() const { assert(is_register(), "only works for registers"); return (value() & last_use_mask) != 0; }
405 bool is_fpu_stack_offset() const { assert(is_register(), "only works for registers"); return (value() & is_fpu_stack_offset_mask) != 0; }
406 LIR_Opr make_last_use() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | last_use_mask); }
407 LIR_Opr make_fpu_stack_offset() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | is_fpu_stack_offset_mask); }
408
409
410 int single_stack_ix() const { assert(is_single_stack() && !is_virtual(), "type check"); return (int)data(); }
411 int double_stack_ix() const { assert(is_double_stack() && !is_virtual(), "type check"); return (int)data(); }
412 RegNr cpu_regnr() const { assert(is_single_cpu() && !is_virtual(), "type check"); return (RegNr)data(); }
413 RegNr cpu_regnrLo() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
414 RegNr cpu_regnrHi() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
415 RegNr fpu_regnr() const { assert(is_single_fpu() && !is_virtual(), "type check"); return (RegNr)data(); }
416 RegNr fpu_regnrLo() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
417 RegNr fpu_regnrHi() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
418 RegNr xmm_regnr() const { assert(is_single_xmm() && !is_virtual(), "type check"); return (RegNr)data(); }
419 RegNr xmm_regnrLo() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
420 RegNr xmm_regnrHi() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
421 int vreg_number() const { assert(is_virtual(), "type check"); return (RegNr)data(); }
422
423 LIR_OprPtr* pointer() const { assert(is_pointer(), "type check"); return (LIR_OprPtr*)this; }
424 LIR_Const* as_constant_ptr() const { return pointer()->as_constant(); }
425 LIR_Address* as_address_ptr() const { return pointer()->as_address(); }
426
427 Register as_register() const;
428 Register as_register_lo() const;
429 Register as_register_hi() const;
430
431 Register as_pointer_register() {
432 #ifdef _LP64
433 if (is_double_cpu()) {
434 assert(as_register_lo() == as_register_hi(), "should be a single register");
435 return as_register_lo();
436 }
437 #endif
438 return as_register();
439 }
440
441 #ifdef X86
442 XMMRegister as_xmm_float_reg() const;
443 XMMRegister as_xmm_double_reg() const;
444 // for compatibility with RInfo
445 int fpu () const { return lo_reg_half(); }
446 #endif
447 #if defined(SPARC) || defined(ARM) || defined(PPC) || defined(AARCH64)
448 FloatRegister as_float_reg () const;
449 FloatRegister as_double_reg () const;
450 #endif
451
452 jint as_jint() const { return as_constant_ptr()->as_jint(); }
453 jlong as_jlong() const { return as_constant_ptr()->as_jlong(); }
454 jfloat as_jfloat() const { return as_constant_ptr()->as_jfloat(); }
455 jdouble as_jdouble() const { return as_constant_ptr()->as_jdouble(); }
456 jobject as_jobject() const { return as_constant_ptr()->as_jobject(); }
457
458 void print() const PRODUCT_RETURN;
459 void print(outputStream* out) const PRODUCT_RETURN;
460 };
461
462
463 inline LIR_OprDesc::OprType as_OprType(BasicType type) {
464 switch (type) {
465 case T_INT: return LIR_OprDesc::int_type;
466 case T_LONG: return LIR_OprDesc::long_type;
467 case T_FLOAT: return LIR_OprDesc::float_type;
468 case T_DOUBLE: return LIR_OprDesc::double_type;
469 case T_OBJECT:
470 case T_ARRAY: return LIR_OprDesc::object_type;
471 case T_ADDRESS: return LIR_OprDesc::address_type;
472 case T_METADATA: return LIR_OprDesc::metadata_type;
473 case T_ILLEGAL: // fall through
474 default: ShouldNotReachHere(); return LIR_OprDesc::unknown_type;
475 }
476 }
477
478 inline BasicType as_BasicType(LIR_OprDesc::OprType t) {
479 switch (t) {
480 case LIR_OprDesc::int_type: return T_INT;
481 case LIR_OprDesc::long_type: return T_LONG;
482 case LIR_OprDesc::float_type: return T_FLOAT;
483 case LIR_OprDesc::double_type: return T_DOUBLE;
484 case LIR_OprDesc::object_type: return T_OBJECT;
485 case LIR_OprDesc::address_type: return T_ADDRESS;
486 case LIR_OprDesc::metadata_type:return T_METADATA;
487 case LIR_OprDesc::unknown_type: // fall through
488 default: ShouldNotReachHere(); return T_ILLEGAL;
489 }
490 }
491
492
493 // LIR_Address
494 class LIR_Address: public LIR_OprPtr {
495 friend class LIR_OpVisitState;
496
497 public:
498 // NOTE: currently these must be the log2 of the scale factor (and
499 // must also be equivalent to the ScaleFactor enum in
500 // assembler_i486.hpp)
501 enum Scale {
502 times_1 = 0,
503 times_2 = 1,
504 times_4 = 2,
505 times_8 = 3
506 };
507
508 private:
509 LIR_Opr _base;
510 LIR_Opr _index;
511 Scale _scale;
512 intx _disp;
513 BasicType _type;
514
515 public:
516 LIR_Address(LIR_Opr base, LIR_Opr index, BasicType type):
517 _base(base)
518 , _index(index)
519 , _scale(times_1)
520 , _type(type)
521 , _disp(0) { verify(); }
522
523 LIR_Address(LIR_Opr base, intx disp, BasicType type):
524 _base(base)
525 , _index(LIR_OprDesc::illegalOpr())
526 , _scale(times_1)
527 , _type(type)
528 , _disp(disp) { verify(); }
529
530 LIR_Address(LIR_Opr base, BasicType type):
531 _base(base)
532 , _index(LIR_OprDesc::illegalOpr())
533 , _scale(times_1)
534 , _type(type)
535 , _disp(0) { verify(); }
536
537 #if defined(X86) || defined(ARM) || defined(AARCH64)
538 LIR_Address(LIR_Opr base, LIR_Opr index, Scale scale, intx disp, BasicType type):
539 _base(base)
540 , _index(index)
541 , _scale(scale)
542 , _type(type)
543 , _disp(disp) { verify(); }
544 #endif // X86 || ARM
545
546 LIR_Opr base() const { return _base; }
547 LIR_Opr index() const { return _index; }
548 Scale scale() const { return _scale; }
549 intx disp() const { return _disp; }
550
551 bool equals(LIR_Address* other) const { return base() == other->base() && index() == other->index() && disp() == other->disp() && scale() == other->scale(); }
552
553 virtual LIR_Address* as_address() { return this; }
554 virtual BasicType type() const { return _type; }
555 virtual void print_value_on(outputStream* out) const PRODUCT_RETURN;
556
557 void verify0() const PRODUCT_RETURN;
558 #if defined(LIR_ADDRESS_PD_VERIFY) && !defined(PRODUCT)
559 void pd_verify() const;
560 void verify() const { pd_verify(); }
561 #else
562 void verify() const { verify0(); }
563 #endif
564
565 static Scale scale(BasicType type);
566 };
567
568
569 // operand factory
570 class LIR_OprFact: public AllStatic {
571 public:
572
573 static LIR_Opr illegalOpr;
574
575 static LIR_Opr single_cpu(int reg) {
576 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
577 LIR_OprDesc::int_type |
578 LIR_OprDesc::cpu_register |
579 LIR_OprDesc::single_size);
580 }
581 static LIR_Opr single_cpu_oop(int reg) {
582 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
583 LIR_OprDesc::object_type |
584 LIR_OprDesc::cpu_register |
585 LIR_OprDesc::single_size);
586 }
587 static LIR_Opr single_cpu_address(int reg) {
588 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
589 LIR_OprDesc::address_type |
590 LIR_OprDesc::cpu_register |
591 LIR_OprDesc::single_size);
592 }
593 static LIR_Opr single_cpu_metadata(int reg) {
594 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
595 LIR_OprDesc::metadata_type |
596 LIR_OprDesc::cpu_register |
597 LIR_OprDesc::single_size);
598 }
599 static LIR_Opr double_cpu(int reg1, int reg2) {
600 LP64_ONLY(assert(reg1 == reg2, "must be identical"));
601 return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
602 (reg2 << LIR_OprDesc::reg2_shift) |
603 LIR_OprDesc::long_type |
604 LIR_OprDesc::cpu_register |
605 LIR_OprDesc::double_size);
606 }
607
608 static LIR_Opr single_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
609 LIR_OprDesc::float_type |
610 LIR_OprDesc::fpu_register |
611 LIR_OprDesc::single_size); }
612 #if defined(ARM32)
613 static LIR_Opr double_fpu(int reg1, int reg2) { return (LIR_Opr)((reg1 << LIR_OprDesc::reg1_shift) | (reg2 << LIR_OprDesc::reg2_shift) | LIR_OprDesc::double_type | LIR_OprDesc::fpu_register | LIR_OprDesc::double_size); }
614 static LIR_Opr single_softfp(int reg) { return (LIR_Opr)((reg << LIR_OprDesc::reg1_shift) | LIR_OprDesc::float_type | LIR_OprDesc::cpu_register | LIR_OprDesc::single_size); }
615 static LIR_Opr double_softfp(int reg1, int reg2) { return (LIR_Opr)((reg1 << LIR_OprDesc::reg1_shift) | (reg2 << LIR_OprDesc::reg2_shift) | LIR_OprDesc::double_type | LIR_OprDesc::cpu_register | LIR_OprDesc::double_size); }
616 #endif
617 #ifdef SPARC
618 static LIR_Opr double_fpu(int reg1, int reg2) { return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
619 (reg2 << LIR_OprDesc::reg2_shift) |
620 LIR_OprDesc::double_type |
621 LIR_OprDesc::fpu_register |
622 LIR_OprDesc::double_size); }
623 #endif
624 #if defined(X86) || defined(AARCH64)
625 static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
626 (reg << LIR_OprDesc::reg2_shift) |
627 LIR_OprDesc::double_type |
628 LIR_OprDesc::fpu_register |
629 LIR_OprDesc::double_size); }
630
631 static LIR_Opr single_xmm(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
632 LIR_OprDesc::float_type |
633 LIR_OprDesc::fpu_register |
634 LIR_OprDesc::single_size |
635 LIR_OprDesc::is_xmm_mask); }
636 static LIR_Opr double_xmm(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
637 (reg << LIR_OprDesc::reg2_shift) |
638 LIR_OprDesc::double_type |
639 LIR_OprDesc::fpu_register |
640 LIR_OprDesc::double_size |
641 LIR_OprDesc::is_xmm_mask); }
642 #endif // X86
643 #if defined(PPC)
644 static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
645 (reg << LIR_OprDesc::reg2_shift) |
646 LIR_OprDesc::double_type |
647 LIR_OprDesc::fpu_register |
648 LIR_OprDesc::double_size); }
649 #endif
650 #ifdef PPC32
651 static LIR_Opr single_softfp(int reg) { return (LIR_Opr)((reg << LIR_OprDesc::reg1_shift) |
652 LIR_OprDesc::float_type |
653 LIR_OprDesc::cpu_register |
654 LIR_OprDesc::single_size); }
655 static LIR_Opr double_softfp(int reg1, int reg2) { return (LIR_Opr)((reg2 << LIR_OprDesc::reg1_shift) |
656 (reg1 << LIR_OprDesc::reg2_shift) |
657 LIR_OprDesc::double_type |
658 LIR_OprDesc::cpu_register |
659 LIR_OprDesc::double_size); }
660 #endif // PPC32
661
662 static LIR_Opr virtual_register(int index, BasicType type) {
663 LIR_Opr res;
664 switch (type) {
665 case T_OBJECT: // fall through
666 case T_ARRAY:
667 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
668 LIR_OprDesc::object_type |
669 LIR_OprDesc::cpu_register |
670 LIR_OprDesc::single_size |
671 LIR_OprDesc::virtual_mask);
672 break;
673
674 case T_METADATA:
675 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
676 LIR_OprDesc::metadata_type|
677 LIR_OprDesc::cpu_register |
678 LIR_OprDesc::single_size |
679 LIR_OprDesc::virtual_mask);
680 break;
681
682 case T_INT:
683 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
684 LIR_OprDesc::int_type |
685 LIR_OprDesc::cpu_register |
686 LIR_OprDesc::single_size |
687 LIR_OprDesc::virtual_mask);
688 break;
689
690 case T_ADDRESS:
691 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
692 LIR_OprDesc::address_type |
693 LIR_OprDesc::cpu_register |
694 LIR_OprDesc::single_size |
695 LIR_OprDesc::virtual_mask);
696 break;
697
698 case T_LONG:
699 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
700 LIR_OprDesc::long_type |
701 LIR_OprDesc::cpu_register |
702 LIR_OprDesc::double_size |
703 LIR_OprDesc::virtual_mask);
704 break;
705
706 #ifdef __SOFTFP__
707 case T_FLOAT:
708 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
709 LIR_OprDesc::float_type |
710 LIR_OprDesc::cpu_register |
711 LIR_OprDesc::single_size |
712 LIR_OprDesc::virtual_mask);
713 break;
714 case T_DOUBLE:
715 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
716 LIR_OprDesc::double_type |
717 LIR_OprDesc::cpu_register |
718 LIR_OprDesc::double_size |
719 LIR_OprDesc::virtual_mask);
720 break;
721 #else // __SOFTFP__
722 case T_FLOAT:
723 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
724 LIR_OprDesc::float_type |
725 LIR_OprDesc::fpu_register |
726 LIR_OprDesc::single_size |
727 LIR_OprDesc::virtual_mask);
728 break;
729
730 case
731 T_DOUBLE: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
732 LIR_OprDesc::double_type |
733 LIR_OprDesc::fpu_register |
734 LIR_OprDesc::double_size |
735 LIR_OprDesc::virtual_mask);
736 break;
737 #endif // __SOFTFP__
738 default: ShouldNotReachHere(); res = illegalOpr;
739 }
740
741 #ifdef ASSERT
742 res->validate_type();
743 assert(res->vreg_number() == index, "conversion check");
744 assert(index >= LIR_OprDesc::vreg_base, "must start at vreg_base");
745 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big");
746
747 // old-style calculation; check if old and new method are equal
748 LIR_OprDesc::OprType t = as_OprType(type);
749 #ifdef __SOFTFP__
750 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
751 t |
752 LIR_OprDesc::cpu_register |
753 LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask);
754 #else // __SOFTFP__
755 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | t |
756 ((type == T_FLOAT || type == T_DOUBLE) ? LIR_OprDesc::fpu_register : LIR_OprDesc::cpu_register) |
757 LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask);
758 assert(res == old_res, "old and new method not equal");
759 #endif // __SOFTFP__
760 #endif // ASSERT
761
762 return res;
763 }
764
765 // 'index' is computed by FrameMap::local_stack_pos(index); do not use other parameters as
766 // the index is platform independent; a double stack useing indeces 2 and 3 has always
767 // index 2.
768 static LIR_Opr stack(int index, BasicType type) {
769 LIR_Opr res;
770 switch (type) {
771 case T_OBJECT: // fall through
772 case T_ARRAY:
773 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
774 LIR_OprDesc::object_type |
775 LIR_OprDesc::stack_value |
776 LIR_OprDesc::single_size);
777 break;
778
779 case T_METADATA:
780 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
781 LIR_OprDesc::metadata_type |
782 LIR_OprDesc::stack_value |
783 LIR_OprDesc::single_size);
784 break;
785 case T_INT:
786 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
787 LIR_OprDesc::int_type |
788 LIR_OprDesc::stack_value |
789 LIR_OprDesc::single_size);
790 break;
791
792 case T_ADDRESS:
793 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
794 LIR_OprDesc::address_type |
795 LIR_OprDesc::stack_value |
796 LIR_OprDesc::single_size);
797 break;
798
799 case T_LONG:
800 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
801 LIR_OprDesc::long_type |
802 LIR_OprDesc::stack_value |
803 LIR_OprDesc::double_size);
804 break;
805
806 case T_FLOAT:
807 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
808 LIR_OprDesc::float_type |
809 LIR_OprDesc::stack_value |
810 LIR_OprDesc::single_size);
811 break;
812 case T_DOUBLE:
813 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
814 LIR_OprDesc::double_type |
815 LIR_OprDesc::stack_value |
816 LIR_OprDesc::double_size);
817 break;
818
819 default: ShouldNotReachHere(); res = illegalOpr;
820 }
821
822 #ifdef ASSERT
823 assert(index >= 0, "index must be positive");
824 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big");
825
826 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
827 LIR_OprDesc::stack_value |
828 as_OprType(type) |
829 LIR_OprDesc::size_for(type));
830 assert(res == old_res, "old and new method not equal");
831 #endif
832
833 return res;
834 }
835
836 static LIR_Opr intConst(jint i) { return (LIR_Opr)(new LIR_Const(i)); }
837 static LIR_Opr longConst(jlong l) { return (LIR_Opr)(new LIR_Const(l)); }
838 static LIR_Opr floatConst(jfloat f) { return (LIR_Opr)(new LIR_Const(f)); }
839 static LIR_Opr doubleConst(jdouble d) { return (LIR_Opr)(new LIR_Const(d)); }
840 static LIR_Opr oopConst(jobject o) { return (LIR_Opr)(new LIR_Const(o)); }
841 static LIR_Opr address(LIR_Address* a) { return (LIR_Opr)a; }
842 static LIR_Opr intptrConst(void* p) { return (LIR_Opr)(new LIR_Const(p)); }
843 static LIR_Opr intptrConst(intptr_t v) { return (LIR_Opr)(new LIR_Const((void*)v)); }
844 static LIR_Opr illegal() { return (LIR_Opr)-1; }
845 static LIR_Opr addressConst(jint i) { return (LIR_Opr)(new LIR_Const(i, true)); }
846 static LIR_Opr metadataConst(Metadata* m) { return (LIR_Opr)(new LIR_Const(m)); }
847
848 static LIR_Opr value_type(ValueType* type);
849 static LIR_Opr dummy_value_type(ValueType* type);
850 };
851
852
853 //-------------------------------------------------------------------------------
854 // LIR Instructions
855 //-------------------------------------------------------------------------------
856 //
857 // Note:
858 // - every instruction has a result operand
859 // - every instruction has an CodeEmitInfo operand (can be revisited later)
860 // - every instruction has a LIR_OpCode operand
861 // - LIR_OpN, means an instruction that has N input operands
862 //
863 // class hierarchy:
864 //
865 class LIR_Op;
866 class LIR_Op0;
867 class LIR_OpLabel;
868 class LIR_Op1;
869 class LIR_OpBranch;
870 class LIR_OpConvert;
871 class LIR_OpAllocObj;
872 class LIR_OpRoundFP;
873 class LIR_Op2;
874 class LIR_OpDelay;
875 class LIR_Op3;
876 class LIR_OpAllocArray;
877 class LIR_OpCall;
878 class LIR_OpJavaCall;
879 class LIR_OpRTCall;
880 class LIR_OpArrayCopy;
881 class LIR_OpUpdateCRC32;
882 class LIR_OpLock;
883 class LIR_OpTypeCheck;
884 class LIR_OpCompareAndSwap;
885 class LIR_OpProfileCall;
886 class LIR_OpProfileType;
887 #ifdef ASSERT
888 class LIR_OpAssert;
889 #endif
890
891 // LIR operation codes
892 enum LIR_Code {
893 lir_none
894 , begin_op0
895 , lir_word_align
896 , lir_label
897 , lir_nop
898 , lir_backwardbranch_target
899 , lir_std_entry
900 , lir_osr_entry
901 , lir_build_frame
902 , lir_fpop_raw
903 , lir_24bit_FPU
904 , lir_reset_FPU
905 , lir_breakpoint
906 , lir_rtcall
907 , lir_membar
908 , lir_membar_acquire
909 , lir_membar_release
910 , lir_membar_loadload
911 , lir_membar_storestore
912 , lir_membar_loadstore
913 , lir_membar_storeload
914 , lir_get_thread
915 , lir_on_spin_wait
916 , end_op0
917 , begin_op1
918 , lir_fxch
919 , lir_fld
920 , lir_ffree
921 , lir_push
922 , lir_pop
923 , lir_null_check
924 , lir_return
925 , lir_leal
926 , lir_neg
927 , lir_branch
928 , lir_cond_float_branch
929 , lir_move
930 , lir_convert
931 , lir_alloc_object
932 , lir_monaddr
933 , lir_roundfp
934 , lir_safepoint
935 , lir_pack64
936 , lir_unpack64
937 , lir_unwind
938 , end_op1
939 , begin_op2
940 , lir_cmp
941 , lir_cmp_l2i
942 , lir_ucmp_fd2i
943 , lir_cmp_fd2i
944 , lir_cmove
945 , lir_add
946 , lir_sub
947 , lir_mul
948 , lir_mul_strictfp
949 , lir_div
950 , lir_div_strictfp
951 , lir_rem
952 , lir_sqrt
953 , lir_abs
954 , lir_tan
955 , lir_log10
956 , lir_logic_and
957 , lir_logic_or
958 , lir_logic_xor
959 , lir_shl
960 , lir_shr
961 , lir_ushr
962 , lir_alloc_array
963 , lir_throw
964 , lir_compare_to
965 , lir_xadd
966 , lir_xchg
967 , end_op2
968 , begin_op3
969 , lir_idiv
970 , lir_irem
971 , lir_fmad
972 , lir_fmaf
973 , end_op3
974 , begin_opJavaCall
975 , lir_static_call
976 , lir_optvirtual_call
977 , lir_icvirtual_call
978 , lir_virtual_call
979 , lir_dynamic_call
980 , end_opJavaCall
981 , begin_opArrayCopy
982 , lir_arraycopy
983 , end_opArrayCopy
984 , begin_opUpdateCRC32
985 , lir_updatecrc32
986 , end_opUpdateCRC32
987 , begin_opLock
988 , lir_lock
989 , lir_unlock
990 , end_opLock
991 , begin_delay_slot
992 , lir_delay_slot
993 , end_delay_slot
994 , begin_opTypeCheck
995 , lir_instanceof
996 , lir_checkcast
997 , lir_store_check
998 , end_opTypeCheck
999 , begin_opCompareAndSwap
1000 , lir_cas_long
1001 , lir_cas_obj
1002 , lir_cas_int
1003 , end_opCompareAndSwap
1004 , begin_opMDOProfile
1005 , lir_profile_call
1006 , lir_profile_type
1007 , end_opMDOProfile
1008 , begin_opAssert
1009 , lir_assert
1010 , end_opAssert
1011 };
1012
1013
1014 enum LIR_Condition {
1015 lir_cond_equal
1016 , lir_cond_notEqual
1017 , lir_cond_less
1018 , lir_cond_lessEqual
1019 , lir_cond_greaterEqual
1020 , lir_cond_greater
1021 , lir_cond_belowEqual
1022 , lir_cond_aboveEqual
1023 , lir_cond_always
1024 , lir_cond_unknown = -1
1025 };
1026
1027
1028 enum LIR_PatchCode {
1029 lir_patch_none,
1030 lir_patch_low,
1031 lir_patch_high,
1032 lir_patch_normal
1033 };
1034
1035
1036 enum LIR_MoveKind {
1037 lir_move_normal,
1038 lir_move_volatile,
1039 lir_move_unaligned,
1040 lir_move_wide,
1041 lir_move_max_flag
1042 };
1043
1044
1045 // --------------------------------------------------
1046 // LIR_Op
1047 // --------------------------------------------------
1048 class LIR_Op: public CompilationResourceObj {
1049 friend class LIR_OpVisitState;
1050
1051 #ifdef ASSERT
1052 private:
1053 const char * _file;
1054 int _line;
1055 #endif
1056
1057 protected:
1058 LIR_Opr _result;
1059 unsigned short _code;
1060 unsigned short _flags;
1061 CodeEmitInfo* _info;
1062 int _id; // value id for register allocation
1063 int _fpu_pop_count;
1064 Instruction* _source; // for debugging
1065
1066 static void print_condition(outputStream* out, LIR_Condition cond) PRODUCT_RETURN;
1067
1068 protected:
1069 static bool is_in_range(LIR_Code test, LIR_Code start, LIR_Code end) { return start < test && test < end; }
1070
1071 public:
1072 LIR_Op()
1073 : _result(LIR_OprFact::illegalOpr)
1074 , _code(lir_none)
1075 , _flags(0)
1076 , _info(NULL)
1077 #ifdef ASSERT
1078 , _file(NULL)
1079 , _line(0)
1080 #endif
1081 , _fpu_pop_count(0)
1082 , _source(NULL)
1083 , _id(-1) {}
1084
1085 LIR_Op(LIR_Code code, LIR_Opr result, CodeEmitInfo* info)
1086 : _result(result)
1087 , _code(code)
1088 , _flags(0)
1089 , _info(info)
1090 #ifdef ASSERT
1091 , _file(NULL)
1092 , _line(0)
1093 #endif
1094 , _fpu_pop_count(0)
1095 , _source(NULL)
1096 , _id(-1) {}
1097
1098 CodeEmitInfo* info() const { return _info; }
1099 LIR_Code code() const { return (LIR_Code)_code; }
1100 LIR_Opr result_opr() const { return _result; }
1101 void set_result_opr(LIR_Opr opr) { _result = opr; }
1102
1103 #ifdef ASSERT
1104 void set_file_and_line(const char * file, int line) {
1105 _file = file;
1106 _line = line;
1107 }
1108 #endif
1109
1110 virtual const char * name() const PRODUCT_RETURN0;
1111
1112 int id() const { return _id; }
1113 void set_id(int id) { _id = id; }
1114
1115 // FPU stack simulation helpers -- only used on Intel
1116 void set_fpu_pop_count(int count) { assert(count >= 0 && count <= 1, "currently only 0 and 1 are valid"); _fpu_pop_count = count; }
1117 int fpu_pop_count() const { return _fpu_pop_count; }
1118 bool pop_fpu_stack() { return _fpu_pop_count > 0; }
1119
1120 Instruction* source() const { return _source; }
1121 void set_source(Instruction* ins) { _source = ins; }
1122
1123 virtual void emit_code(LIR_Assembler* masm) = 0;
1124 virtual void print_instr(outputStream* out) const = 0;
1125 virtual void print_on(outputStream* st) const PRODUCT_RETURN;
1126
1127 virtual bool is_patching() { return false; }
1128 virtual LIR_OpCall* as_OpCall() { return NULL; }
1129 virtual LIR_OpJavaCall* as_OpJavaCall() { return NULL; }
1130 virtual LIR_OpLabel* as_OpLabel() { return NULL; }
1131 virtual LIR_OpDelay* as_OpDelay() { return NULL; }
1132 virtual LIR_OpLock* as_OpLock() { return NULL; }
1133 virtual LIR_OpAllocArray* as_OpAllocArray() { return NULL; }
1134 virtual LIR_OpAllocObj* as_OpAllocObj() { return NULL; }
1135 virtual LIR_OpRoundFP* as_OpRoundFP() { return NULL; }
1136 virtual LIR_OpBranch* as_OpBranch() { return NULL; }
1137 virtual LIR_OpRTCall* as_OpRTCall() { return NULL; }
1138 virtual LIR_OpConvert* as_OpConvert() { return NULL; }
1139 virtual LIR_Op0* as_Op0() { return NULL; }
1140 virtual LIR_Op1* as_Op1() { return NULL; }
1141 virtual LIR_Op2* as_Op2() { return NULL; }
1142 virtual LIR_Op3* as_Op3() { return NULL; }
1143 virtual LIR_OpArrayCopy* as_OpArrayCopy() { return NULL; }
1144 virtual LIR_OpUpdateCRC32* as_OpUpdateCRC32() { return NULL; }
1145 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return NULL; }
1146 virtual LIR_OpCompareAndSwap* as_OpCompareAndSwap() { return NULL; }
1147 virtual LIR_OpProfileCall* as_OpProfileCall() { return NULL; }
1148 virtual LIR_OpProfileType* as_OpProfileType() { return NULL; }
1149 #ifdef ASSERT
1150 virtual LIR_OpAssert* as_OpAssert() { return NULL; }
1151 #endif
1152
1153 virtual void verify() const {}
1154 };
1155
1156 // for calls
1157 class LIR_OpCall: public LIR_Op {
1158 friend class LIR_OpVisitState;
1159
1160 protected:
1161 address _addr;
1162 LIR_OprList* _arguments;
1163 protected:
1164 LIR_OpCall(LIR_Code code, address addr, LIR_Opr result,
1165 LIR_OprList* arguments, CodeEmitInfo* info = NULL)
1166 : LIR_Op(code, result, info)
1167 , _arguments(arguments)
1168 , _addr(addr) {}
1169
1170 public:
1171 address addr() const { return _addr; }
1172 const LIR_OprList* arguments() const { return _arguments; }
1173 virtual LIR_OpCall* as_OpCall() { return this; }
1174 };
1175
1176
1177 // --------------------------------------------------
1178 // LIR_OpJavaCall
1179 // --------------------------------------------------
1180 class LIR_OpJavaCall: public LIR_OpCall {
1181 friend class LIR_OpVisitState;
1182
1183 private:
1184 ciMethod* _method;
1185 LIR_Opr _receiver;
1186 LIR_Opr _method_handle_invoke_SP_save_opr; // Used in LIR_OpVisitState::visit to store the reference to FrameMap::method_handle_invoke_SP_save_opr.
1187
1188 public:
1189 LIR_OpJavaCall(LIR_Code code, ciMethod* method,
1190 LIR_Opr receiver, LIR_Opr result,
1191 address addr, LIR_OprList* arguments,
1192 CodeEmitInfo* info)
1193 : LIR_OpCall(code, addr, result, arguments, info)
1194 , _receiver(receiver)
1195 , _method(method)
1196 , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr)
1197 { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); }
1198
1199 LIR_OpJavaCall(LIR_Code code, ciMethod* method,
1200 LIR_Opr receiver, LIR_Opr result, intptr_t vtable_offset,
1201 LIR_OprList* arguments, CodeEmitInfo* info)
1202 : LIR_OpCall(code, (address)vtable_offset, result, arguments, info)
1203 , _receiver(receiver)
1204 , _method(method)
1205 , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr)
1206 { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); }
1207
1208 LIR_Opr receiver() const { return _receiver; }
1209 ciMethod* method() const { return _method; }
1210
1211 // JSR 292 support.
1212 bool is_invokedynamic() const { return code() == lir_dynamic_call; }
1213 bool is_method_handle_invoke() const {
1214 return method()->is_compiled_lambda_form() || // Java-generated lambda form
1215 method()->is_method_handle_intrinsic(); // JVM-generated MH intrinsic
1216 }
1217
1218 intptr_t vtable_offset() const {
1219 assert(_code == lir_virtual_call, "only have vtable for real vcall");
1220 return (intptr_t) addr();
1221 }
1222
1223 virtual void emit_code(LIR_Assembler* masm);
1224 virtual LIR_OpJavaCall* as_OpJavaCall() { return this; }
1225 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1226 };
1227
1228 // --------------------------------------------------
1229 // LIR_OpLabel
1230 // --------------------------------------------------
1231 // Location where a branch can continue
1232 class LIR_OpLabel: public LIR_Op {
1233 friend class LIR_OpVisitState;
1234
1235 private:
1236 Label* _label;
1237 public:
1238 LIR_OpLabel(Label* lbl)
1239 : LIR_Op(lir_label, LIR_OprFact::illegalOpr, NULL)
1240 , _label(lbl) {}
1241 Label* label() const { return _label; }
1242
1243 virtual void emit_code(LIR_Assembler* masm);
1244 virtual LIR_OpLabel* as_OpLabel() { return this; }
1245 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1246 };
1247
1248 // LIR_OpArrayCopy
1249 class LIR_OpArrayCopy: public LIR_Op {
1250 friend class LIR_OpVisitState;
1251
1252 private:
1253 ArrayCopyStub* _stub;
1254 LIR_Opr _src;
1255 LIR_Opr _src_pos;
1256 LIR_Opr _dst;
1257 LIR_Opr _dst_pos;
1258 LIR_Opr _length;
1259 LIR_Opr _tmp;
1260 ciArrayKlass* _expected_type;
1261 int _flags;
1262
1263 public:
1264 enum Flags {
1265 src_null_check = 1 << 0,
1266 dst_null_check = 1 << 1,
1267 src_pos_positive_check = 1 << 2,
1268 dst_pos_positive_check = 1 << 3,
1269 length_positive_check = 1 << 4,
1270 src_range_check = 1 << 5,
1271 dst_range_check = 1 << 6,
1272 type_check = 1 << 7,
1273 overlapping = 1 << 8,
1274 unaligned = 1 << 9,
1275 src_objarray = 1 << 10,
1276 dst_objarray = 1 << 11,
1277 all_flags = (1 << 12) - 1
1278 };
1279
1280 LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp,
1281 ciArrayKlass* expected_type, int flags, CodeEmitInfo* info);
1282
1283 LIR_Opr src() const { return _src; }
1284 LIR_Opr src_pos() const { return _src_pos; }
1285 LIR_Opr dst() const { return _dst; }
1286 LIR_Opr dst_pos() const { return _dst_pos; }
1287 LIR_Opr length() const { return _length; }
1288 LIR_Opr tmp() const { return _tmp; }
1289 int flags() const { return _flags; }
1290 ciArrayKlass* expected_type() const { return _expected_type; }
1291 ArrayCopyStub* stub() const { return _stub; }
1292
1293 virtual void emit_code(LIR_Assembler* masm);
1294 virtual LIR_OpArrayCopy* as_OpArrayCopy() { return this; }
1295 void print_instr(outputStream* out) const PRODUCT_RETURN;
1296 };
1297
1298 // LIR_OpUpdateCRC32
1299 class LIR_OpUpdateCRC32: public LIR_Op {
1300 friend class LIR_OpVisitState;
1301
1302 private:
1303 LIR_Opr _crc;
1304 LIR_Opr _val;
1305
1306 public:
1307
1308 LIR_OpUpdateCRC32(LIR_Opr crc, LIR_Opr val, LIR_Opr res);
1309
1310 LIR_Opr crc() const { return _crc; }
1311 LIR_Opr val() const { return _val; }
1312
1313 virtual void emit_code(LIR_Assembler* masm);
1314 virtual LIR_OpUpdateCRC32* as_OpUpdateCRC32() { return this; }
1315 void print_instr(outputStream* out) const PRODUCT_RETURN;
1316 };
1317
1318 // --------------------------------------------------
1319 // LIR_Op0
1320 // --------------------------------------------------
1321 class LIR_Op0: public LIR_Op {
1322 friend class LIR_OpVisitState;
1323
1324 public:
1325 LIR_Op0(LIR_Code code)
1326 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) { assert(is_in_range(code, begin_op0, end_op0), "code check"); }
1327 LIR_Op0(LIR_Code code, LIR_Opr result, CodeEmitInfo* info = NULL)
1328 : LIR_Op(code, result, info) { assert(is_in_range(code, begin_op0, end_op0), "code check"); }
1329
1330 virtual void emit_code(LIR_Assembler* masm);
1331 virtual LIR_Op0* as_Op0() { return this; }
1332 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1333 };
1334
1335
1336 // --------------------------------------------------
1337 // LIR_Op1
1338 // --------------------------------------------------
1339
1340 class LIR_Op1: public LIR_Op {
1341 friend class LIR_OpVisitState;
1342
1343 protected:
1344 LIR_Opr _opr; // input operand
1345 BasicType _type; // Operand types
1346 LIR_PatchCode _patch; // only required with patchin (NEEDS_CLEANUP: do we want a special instruction for patching?)
1347
1348 static void print_patch_code(outputStream* out, LIR_PatchCode code);
1349
1350 void set_kind(LIR_MoveKind kind) {
1351 assert(code() == lir_move, "must be");
1352 _flags = kind;
1353 }
1354
1355 public:
1356 LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result = LIR_OprFact::illegalOpr, BasicType type = T_ILLEGAL, LIR_PatchCode patch = lir_patch_none, CodeEmitInfo* info = NULL)
1357 : LIR_Op(code, result, info)
1358 , _opr(opr)
1359 , _patch(patch)
1360 , _type(type) { assert(is_in_range(code, begin_op1, end_op1), "code check"); }
1361
1362 LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result, BasicType type, LIR_PatchCode patch, CodeEmitInfo* info, LIR_MoveKind kind)
1363 : LIR_Op(code, result, info)
1364 , _opr(opr)
1365 , _patch(patch)
1366 , _type(type) {
1367 assert(code == lir_move, "must be");
1368 set_kind(kind);
1369 }
1370
1371 LIR_Op1(LIR_Code code, LIR_Opr opr, CodeEmitInfo* info)
1372 : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1373 , _opr(opr)
1374 , _patch(lir_patch_none)
1375 , _type(T_ILLEGAL) { assert(is_in_range(code, begin_op1, end_op1), "code check"); }
1376
1377 LIR_Opr in_opr() const { return _opr; }
1378 LIR_PatchCode patch_code() const { return _patch; }
1379 BasicType type() const { return _type; }
1380
1381 LIR_MoveKind move_kind() const {
1382 assert(code() == lir_move, "must be");
1383 return (LIR_MoveKind)_flags;
1384 }
1385
1386 virtual bool is_patching() { return _patch != lir_patch_none; }
1387 virtual void emit_code(LIR_Assembler* masm);
1388 virtual LIR_Op1* as_Op1() { return this; }
1389 virtual const char * name() const PRODUCT_RETURN0;
1390
1391 void set_in_opr(LIR_Opr opr) { _opr = opr; }
1392
1393 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1394 virtual void verify() const;
1395 };
1396
1397
1398 // for runtime calls
1399 class LIR_OpRTCall: public LIR_OpCall {
1400 friend class LIR_OpVisitState;
1401
1402 private:
1403 LIR_Opr _tmp;
1404 public:
1405 LIR_OpRTCall(address addr, LIR_Opr tmp,
1406 LIR_Opr result, LIR_OprList* arguments, CodeEmitInfo* info = NULL)
1407 : LIR_OpCall(lir_rtcall, addr, result, arguments, info)
1408 , _tmp(tmp) {}
1409
1410 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1411 virtual void emit_code(LIR_Assembler* masm);
1412 virtual LIR_OpRTCall* as_OpRTCall() { return this; }
1413
1414 LIR_Opr tmp() const { return _tmp; }
1415
1416 virtual void verify() const;
1417 };
1418
1419
1420 class LIR_OpBranch: public LIR_Op {
1421 friend class LIR_OpVisitState;
1422
1423 private:
1424 LIR_Condition _cond;
1425 BasicType _type;
1426 Label* _label;
1427 BlockBegin* _block; // if this is a branch to a block, this is the block
1428 BlockBegin* _ublock; // if this is a float-branch, this is the unorderd block
1429 CodeStub* _stub; // if this is a branch to a stub, this is the stub
1430
1431 public:
1432 LIR_OpBranch(LIR_Condition cond, BasicType type, Label* lbl)
1433 : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*) NULL)
1434 , _cond(cond)
1435 , _type(type)
1436 , _label(lbl)
1437 , _block(NULL)
1438 , _ublock(NULL)
1439 , _stub(NULL) { }
1440
1441 LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block);
1442 LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub);
1443
1444 // for unordered comparisons
1445 LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock);
1446
1447 LIR_Condition cond() const { return _cond; }
1448 BasicType type() const { return _type; }
1449 Label* label() const { return _label; }
1450 BlockBegin* block() const { return _block; }
1451 BlockBegin* ublock() const { return _ublock; }
1452 CodeStub* stub() const { return _stub; }
1453
1454 void change_block(BlockBegin* b);
1455 void change_ublock(BlockBegin* b);
1456 void negate_cond();
1457
1458 virtual void emit_code(LIR_Assembler* masm);
1459 virtual LIR_OpBranch* as_OpBranch() { return this; }
1460 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1461 };
1462
1463
1464 class ConversionStub;
1465
1466 class LIR_OpConvert: public LIR_Op1 {
1467 friend class LIR_OpVisitState;
1468
1469 private:
1470 Bytecodes::Code _bytecode;
1471 ConversionStub* _stub;
1472 #ifdef PPC32
1473 LIR_Opr _tmp1;
1474 LIR_Opr _tmp2;
1475 #endif
1476
1477 public:
1478 LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub)
1479 : LIR_Op1(lir_convert, opr, result)
1480 , _stub(stub)
1481 #ifdef PPC32
1482 , _tmp1(LIR_OprDesc::illegalOpr())
1483 , _tmp2(LIR_OprDesc::illegalOpr())
1484 #endif
1485 , _bytecode(code) {}
1486
1487 #ifdef PPC32
1488 LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub
1489 ,LIR_Opr tmp1, LIR_Opr tmp2)
1490 : LIR_Op1(lir_convert, opr, result)
1491 , _stub(stub)
1492 , _tmp1(tmp1)
1493 , _tmp2(tmp2)
1494 , _bytecode(code) {}
1495 #endif
1496
1497 Bytecodes::Code bytecode() const { return _bytecode; }
1498 ConversionStub* stub() const { return _stub; }
1499 #ifdef PPC32
1500 LIR_Opr tmp1() const { return _tmp1; }
1501 LIR_Opr tmp2() const { return _tmp2; }
1502 #endif
1503
1504 virtual void emit_code(LIR_Assembler* masm);
1505 virtual LIR_OpConvert* as_OpConvert() { return this; }
1506 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1507
1508 static void print_bytecode(outputStream* out, Bytecodes::Code code) PRODUCT_RETURN;
1509 };
1510
1511
1512 // LIR_OpAllocObj
1513 class LIR_OpAllocObj : public LIR_Op1 {
1514 friend class LIR_OpVisitState;
1515
1516 private:
1517 LIR_Opr _tmp1;
1518 LIR_Opr _tmp2;
1519 LIR_Opr _tmp3;
1520 LIR_Opr _tmp4;
1521 int _hdr_size;
1522 int _obj_size;
1523 CodeStub* _stub;
1524 bool _init_check;
1525
1526 public:
1527 LIR_OpAllocObj(LIR_Opr klass, LIR_Opr result,
1528 LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,
1529 int hdr_size, int obj_size, bool init_check, CodeStub* stub)
1530 : LIR_Op1(lir_alloc_object, klass, result)
1531 , _tmp1(t1)
1532 , _tmp2(t2)
1533 , _tmp3(t3)
1534 , _tmp4(t4)
1535 , _hdr_size(hdr_size)
1536 , _obj_size(obj_size)
1537 , _init_check(init_check)
1538 , _stub(stub) { }
1539
1540 LIR_Opr klass() const { return in_opr(); }
1541 LIR_Opr obj() const { return result_opr(); }
1542 LIR_Opr tmp1() const { return _tmp1; }
1543 LIR_Opr tmp2() const { return _tmp2; }
1544 LIR_Opr tmp3() const { return _tmp3; }
1545 LIR_Opr tmp4() const { return _tmp4; }
1546 int header_size() const { return _hdr_size; }
1547 int object_size() const { return _obj_size; }
1548 bool init_check() const { return _init_check; }
1549 CodeStub* stub() const { return _stub; }
1550
1551 virtual void emit_code(LIR_Assembler* masm);
1552 virtual LIR_OpAllocObj * as_OpAllocObj () { return this; }
1553 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1554 };
1555
1556
1557 // LIR_OpRoundFP
1558 class LIR_OpRoundFP : public LIR_Op1 {
1559 friend class LIR_OpVisitState;
1560
1561 private:
1562 LIR_Opr _tmp;
1563
1564 public:
1565 LIR_OpRoundFP(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result)
1566 : LIR_Op1(lir_roundfp, reg, result)
1567 , _tmp(stack_loc_temp) {}
1568
1569 LIR_Opr tmp() const { return _tmp; }
1570 virtual LIR_OpRoundFP* as_OpRoundFP() { return this; }
1571 void print_instr(outputStream* out) const PRODUCT_RETURN;
1572 };
1573
1574 // LIR_OpTypeCheck
1575 class LIR_OpTypeCheck: public LIR_Op {
1576 friend class LIR_OpVisitState;
1577
1578 private:
1579 LIR_Opr _object;
1580 LIR_Opr _array;
1581 ciKlass* _klass;
1582 LIR_Opr _tmp1;
1583 LIR_Opr _tmp2;
1584 LIR_Opr _tmp3;
1585 bool _fast_check;
1586 CodeEmitInfo* _info_for_patch;
1587 CodeEmitInfo* _info_for_exception;
1588 CodeStub* _stub;
1589 ciMethod* _profiled_method;
1590 int _profiled_bci;
1591 bool _should_profile;
1592
1593 public:
1594 LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass,
1595 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
1596 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub);
1597 LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array,
1598 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception);
1599
1600 LIR_Opr object() const { return _object; }
1601 LIR_Opr array() const { assert(code() == lir_store_check, "not valid"); return _array; }
1602 LIR_Opr tmp1() const { return _tmp1; }
1603 LIR_Opr tmp2() const { return _tmp2; }
1604 LIR_Opr tmp3() const { return _tmp3; }
1605 ciKlass* klass() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _klass; }
1606 bool fast_check() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _fast_check; }
1607 CodeEmitInfo* info_for_patch() const { return _info_for_patch; }
1608 CodeEmitInfo* info_for_exception() const { return _info_for_exception; }
1609 CodeStub* stub() const { return _stub; }
1610
1611 // MethodData* profiling
1612 void set_profiled_method(ciMethod *method) { _profiled_method = method; }
1613 void set_profiled_bci(int bci) { _profiled_bci = bci; }
1614 void set_should_profile(bool b) { _should_profile = b; }
1615 ciMethod* profiled_method() const { return _profiled_method; }
1616 int profiled_bci() const { return _profiled_bci; }
1617 bool should_profile() const { return _should_profile; }
1618
1619 virtual bool is_patching() { return _info_for_patch != NULL; }
1620 virtual void emit_code(LIR_Assembler* masm);
1621 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return this; }
1622 void print_instr(outputStream* out) const PRODUCT_RETURN;
1623 };
1624
1625 // LIR_Op2
1626 class LIR_Op2: public LIR_Op {
1627 friend class LIR_OpVisitState;
1628
1629 int _fpu_stack_size; // for sin/cos implementation on Intel
1630
1631 protected:
1632 LIR_Opr _opr1;
1633 LIR_Opr _opr2;
1634 BasicType _type;
1635 LIR_Opr _tmp1;
1636 LIR_Opr _tmp2;
1637 LIR_Opr _tmp3;
1638 LIR_Opr _tmp4;
1639 LIR_Opr _tmp5;
1640 LIR_Condition _condition;
1641
1642 void verify() const;
1643
1644 public:
1645 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, CodeEmitInfo* info = NULL)
1646 : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1647 , _opr1(opr1)
1648 , _opr2(opr2)
1649 , _type(T_ILLEGAL)
1650 , _condition(condition)
1651 , _fpu_stack_size(0)
1652 , _tmp1(LIR_OprFact::illegalOpr)
1653 , _tmp2(LIR_OprFact::illegalOpr)
1654 , _tmp3(LIR_OprFact::illegalOpr)
1655 , _tmp4(LIR_OprFact::illegalOpr)
1656 , _tmp5(LIR_OprFact::illegalOpr) {
1657 assert(code == lir_cmp || code == lir_assert, "code check");
1658 }
1659
1660 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, BasicType type)
1661 : LIR_Op(code, result, NULL)
1662 , _opr1(opr1)
1663 , _opr2(opr2)
1664 , _type(type)
1665 , _condition(condition)
1666 , _fpu_stack_size(0)
1667 , _tmp1(LIR_OprFact::illegalOpr)
1668 , _tmp2(LIR_OprFact::illegalOpr)
1669 , _tmp3(LIR_OprFact::illegalOpr)
1670 , _tmp4(LIR_OprFact::illegalOpr)
1671 , _tmp5(LIR_OprFact::illegalOpr) {
1672 assert(code == lir_cmove, "code check");
1673 assert(type != T_ILLEGAL, "cmove should have type");
1674 }
1675
1676 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result = LIR_OprFact::illegalOpr,
1677 CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL)
1678 : LIR_Op(code, result, info)
1679 , _opr1(opr1)
1680 , _opr2(opr2)
1681 , _type(type)
1682 , _condition(lir_cond_unknown)
1683 , _fpu_stack_size(0)
1684 , _tmp1(LIR_OprFact::illegalOpr)
1685 , _tmp2(LIR_OprFact::illegalOpr)
1686 , _tmp3(LIR_OprFact::illegalOpr)
1687 , _tmp4(LIR_OprFact::illegalOpr)
1688 , _tmp5(LIR_OprFact::illegalOpr) {
1689 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check");
1690 }
1691
1692 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, LIR_Opr tmp1, LIR_Opr tmp2 = LIR_OprFact::illegalOpr,
1693 LIR_Opr tmp3 = LIR_OprFact::illegalOpr, LIR_Opr tmp4 = LIR_OprFact::illegalOpr, LIR_Opr tmp5 = LIR_OprFact::illegalOpr)
1694 : LIR_Op(code, result, NULL)
1695 , _opr1(opr1)
1696 , _opr2(opr2)
1697 , _type(T_ILLEGAL)
1698 , _condition(lir_cond_unknown)
1699 , _fpu_stack_size(0)
1700 , _tmp1(tmp1)
1701 , _tmp2(tmp2)
1702 , _tmp3(tmp3)
1703 , _tmp4(tmp4)
1704 , _tmp5(tmp5) {
1705 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check");
1706 }
1707
1708 LIR_Opr in_opr1() const { return _opr1; }
1709 LIR_Opr in_opr2() const { return _opr2; }
1710 BasicType type() const { return _type; }
1711 LIR_Opr tmp1_opr() const { return _tmp1; }
1712 LIR_Opr tmp2_opr() const { return _tmp2; }
1713 LIR_Opr tmp3_opr() const { return _tmp3; }
1714 LIR_Opr tmp4_opr() const { return _tmp4; }
1715 LIR_Opr tmp5_opr() const { return _tmp5; }
1716 LIR_Condition condition() const {
1717 assert(code() == lir_cmp || code() == lir_cmove || code() == lir_assert, "only valid for cmp and cmove and assert"); return _condition;
1718 }
1719 void set_condition(LIR_Condition condition) {
1720 assert(code() == lir_cmp || code() == lir_cmove, "only valid for cmp and cmove"); _condition = condition;
1721 }
1722
1723 void set_fpu_stack_size(int size) { _fpu_stack_size = size; }
1724 int fpu_stack_size() const { return _fpu_stack_size; }
1725
1726 void set_in_opr1(LIR_Opr opr) { _opr1 = opr; }
1727 void set_in_opr2(LIR_Opr opr) { _opr2 = opr; }
1728
1729 virtual void emit_code(LIR_Assembler* masm);
1730 virtual LIR_Op2* as_Op2() { return this; }
1731 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1732 };
1733
1734 class LIR_OpAllocArray : public LIR_Op {
1735 friend class LIR_OpVisitState;
1736
1737 private:
1738 LIR_Opr _klass;
1739 LIR_Opr _len;
1740 LIR_Opr _tmp1;
1741 LIR_Opr _tmp2;
1742 LIR_Opr _tmp3;
1743 LIR_Opr _tmp4;
1744 BasicType _type;
1745 CodeStub* _stub;
1746
1747 public:
1748 LIR_OpAllocArray(LIR_Opr klass, LIR_Opr len, LIR_Opr result, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, BasicType type, CodeStub* stub)
1749 : LIR_Op(lir_alloc_array, result, NULL)
1750 , _klass(klass)
1751 , _len(len)
1752 , _tmp1(t1)
1753 , _tmp2(t2)
1754 , _tmp3(t3)
1755 , _tmp4(t4)
1756 , _type(type)
1757 , _stub(stub) {}
1758
1759 LIR_Opr klass() const { return _klass; }
1760 LIR_Opr len() const { return _len; }
1761 LIR_Opr obj() const { return result_opr(); }
1762 LIR_Opr tmp1() const { return _tmp1; }
1763 LIR_Opr tmp2() const { return _tmp2; }
1764 LIR_Opr tmp3() const { return _tmp3; }
1765 LIR_Opr tmp4() const { return _tmp4; }
1766 BasicType type() const { return _type; }
1767 CodeStub* stub() const { return _stub; }
1768
1769 virtual void emit_code(LIR_Assembler* masm);
1770 virtual LIR_OpAllocArray * as_OpAllocArray () { return this; }
1771 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1772 };
1773
1774
1775 class LIR_Op3: public LIR_Op {
1776 friend class LIR_OpVisitState;
1777
1778 private:
1779 LIR_Opr _opr1;
1780 LIR_Opr _opr2;
1781 LIR_Opr _opr3;
1782 public:
1783 LIR_Op3(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr opr3, LIR_Opr result, CodeEmitInfo* info = NULL)
1784 : LIR_Op(code, result, info)
1785 , _opr1(opr1)
1786 , _opr2(opr2)
1787 , _opr3(opr3) { assert(is_in_range(code, begin_op3, end_op3), "code check"); }
1788 LIR_Opr in_opr1() const { return _opr1; }
1789 LIR_Opr in_opr2() const { return _opr2; }
1790 LIR_Opr in_opr3() const { return _opr3; }
1791
1792 virtual void emit_code(LIR_Assembler* masm);
1793 virtual LIR_Op3* as_Op3() { return this; }
1794 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1795 };
1796
1797
1798 //--------------------------------
1799 class LabelObj: public CompilationResourceObj {
1800 private:
1801 Label _label;
1802 public:
1803 LabelObj() {}
1804 Label* label() { return &_label; }
1805 };
1806
1807
1808 class LIR_OpLock: public LIR_Op {
1809 friend class LIR_OpVisitState;
1810
1811 private:
1812 LIR_Opr _hdr;
1813 LIR_Opr _obj;
1814 LIR_Opr _lock;
1815 LIR_Opr _scratch;
1816 CodeStub* _stub;
1817 public:
1818 LIR_OpLock(LIR_Code code, LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info)
1819 : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1820 , _hdr(hdr)
1821 , _obj(obj)
1822 , _lock(lock)
1823 , _scratch(scratch)
1824 , _stub(stub) {}
1825
1826 LIR_Opr hdr_opr() const { return _hdr; }
1827 LIR_Opr obj_opr() const { return _obj; }
1828 LIR_Opr lock_opr() const { return _lock; }
1829 LIR_Opr scratch_opr() const { return _scratch; }
1830 CodeStub* stub() const { return _stub; }
1831
1832 virtual void emit_code(LIR_Assembler* masm);
1833 virtual LIR_OpLock* as_OpLock() { return this; }
1834 void print_instr(outputStream* out) const PRODUCT_RETURN;
1835 };
1836
1837
1838 class LIR_OpDelay: public LIR_Op {
1839 friend class LIR_OpVisitState;
1840
1841 private:
1842 LIR_Op* _op;
1843
1844 public:
1845 LIR_OpDelay(LIR_Op* op, CodeEmitInfo* info):
1846 LIR_Op(lir_delay_slot, LIR_OprFact::illegalOpr, info),
1847 _op(op) {
1848 assert(op->code() == lir_nop || LIRFillDelaySlots, "should be filling with nops");
1849 }
1850 virtual void emit_code(LIR_Assembler* masm);
1851 virtual LIR_OpDelay* as_OpDelay() { return this; }
1852 void print_instr(outputStream* out) const PRODUCT_RETURN;
1853 LIR_Op* delay_op() const { return _op; }
1854 CodeEmitInfo* call_info() const { return info(); }
1855 };
1856
1857 #ifdef ASSERT
1858 // LIR_OpAssert
1859 class LIR_OpAssert : public LIR_Op2 {
1860 friend class LIR_OpVisitState;
1861
1862 private:
1863 const char* _msg;
1864 bool _halt;
1865
1866 public:
1867 LIR_OpAssert(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, const char* msg, bool halt)
1868 : LIR_Op2(lir_assert, condition, opr1, opr2)
1869 , _halt(halt)
1870 , _msg(msg) {
1871 }
1872
1873 const char* msg() const { return _msg; }
1874 bool halt() const { return _halt; }
1875
1876 virtual void emit_code(LIR_Assembler* masm);
1877 virtual LIR_OpAssert* as_OpAssert() { return this; }
1878 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1879 };
1880 #endif
1881
1882 // LIR_OpCompareAndSwap
1883 class LIR_OpCompareAndSwap : public LIR_Op {
1884 friend class LIR_OpVisitState;
1885
1886 private:
1887 LIR_Opr _addr;
1888 LIR_Opr _cmp_value;
1889 LIR_Opr _new_value;
1890 LIR_Opr _tmp1;
1891 LIR_Opr _tmp2;
1892
1893 public:
1894 LIR_OpCompareAndSwap(LIR_Code code, LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1895 LIR_Opr t1, LIR_Opr t2, LIR_Opr result)
1896 : LIR_Op(code, result, NULL) // no result, no info
1897 , _addr(addr)
1898 , _cmp_value(cmp_value)
1899 , _new_value(new_value)
1900 , _tmp1(t1)
1901 , _tmp2(t2) { }
1902
1903 LIR_Opr addr() const { return _addr; }
1904 LIR_Opr cmp_value() const { return _cmp_value; }
1905 LIR_Opr new_value() const { return _new_value; }
1906 LIR_Opr tmp1() const { return _tmp1; }
1907 LIR_Opr tmp2() const { return _tmp2; }
1908
1909 virtual void emit_code(LIR_Assembler* masm);
1910 virtual LIR_OpCompareAndSwap * as_OpCompareAndSwap () { return this; }
1911 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1912 };
1913
1914 // LIR_OpProfileCall
1915 class LIR_OpProfileCall : public LIR_Op {
1916 friend class LIR_OpVisitState;
1917
1918 private:
1919 ciMethod* _profiled_method;
1920 int _profiled_bci;
1921 ciMethod* _profiled_callee;
1922 LIR_Opr _mdo;
1923 LIR_Opr _recv;
1924 LIR_Opr _tmp1;
1925 ciKlass* _known_holder;
1926
1927 public:
1928 // Destroys recv
1929 LIR_OpProfileCall(ciMethod* profiled_method, int profiled_bci, ciMethod* profiled_callee, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* known_holder)
1930 : LIR_Op(lir_profile_call, LIR_OprFact::illegalOpr, NULL) // no result, no info
1931 , _profiled_method(profiled_method)
1932 , _profiled_bci(profiled_bci)
1933 , _profiled_callee(profiled_callee)
1934 , _mdo(mdo)
1935 , _recv(recv)
1936 , _tmp1(t1)
1937 , _known_holder(known_holder) { }
1938
1939 ciMethod* profiled_method() const { return _profiled_method; }
1940 int profiled_bci() const { return _profiled_bci; }
1941 ciMethod* profiled_callee() const { return _profiled_callee; }
1942 LIR_Opr mdo() const { return _mdo; }
1943 LIR_Opr recv() const { return _recv; }
1944 LIR_Opr tmp1() const { return _tmp1; }
1945 ciKlass* known_holder() const { return _known_holder; }
1946
1947 virtual void emit_code(LIR_Assembler* masm);
1948 virtual LIR_OpProfileCall* as_OpProfileCall() { return this; }
1949 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1950 };
1951
1952 // LIR_OpProfileType
1953 class LIR_OpProfileType : public LIR_Op {
1954 friend class LIR_OpVisitState;
1955
1956 private:
1957 LIR_Opr _mdp;
1958 LIR_Opr _obj;
1959 LIR_Opr _tmp;
1960 ciKlass* _exact_klass; // non NULL if we know the klass statically (no need to load it from _obj)
1961 intptr_t _current_klass; // what the profiling currently reports
1962 bool _not_null; // true if we know statically that _obj cannot be null
1963 bool _no_conflict; // true if we're profling parameters, _exact_klass is not NULL and we know
1964 // _exact_klass it the only possible type for this parameter in any context.
1965
1966 public:
1967 // Destroys recv
1968 LIR_OpProfileType(LIR_Opr mdp, LIR_Opr obj, ciKlass* exact_klass, intptr_t current_klass, LIR_Opr tmp, bool not_null, bool no_conflict)
1969 : LIR_Op(lir_profile_type, LIR_OprFact::illegalOpr, NULL) // no result, no info
1970 , _mdp(mdp)
1971 , _obj(obj)
1972 , _exact_klass(exact_klass)
1973 , _current_klass(current_klass)
1974 , _tmp(tmp)
1975 , _not_null(not_null)
1976 , _no_conflict(no_conflict) { }
1977
1978 LIR_Opr mdp() const { return _mdp; }
1979 LIR_Opr obj() const { return _obj; }
1980 LIR_Opr tmp() const { return _tmp; }
1981 ciKlass* exact_klass() const { return _exact_klass; }
1982 intptr_t current_klass() const { return _current_klass; }
1983 bool not_null() const { return _not_null; }
1984 bool no_conflict() const { return _no_conflict; }
1985
1986 virtual void emit_code(LIR_Assembler* masm);
1987 virtual LIR_OpProfileType* as_OpProfileType() { return this; }
1988 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1989 };
1990
1991 class LIR_InsertionBuffer;
1992
1993 //--------------------------------LIR_List---------------------------------------------------
1994 // Maintains a list of LIR instructions (one instance of LIR_List per basic block)
1995 // The LIR instructions are appended by the LIR_List class itself;
1996 //
1997 // Notes:
1998 // - all offsets are(should be) in bytes
1999 // - local positions are specified with an offset, with offset 0 being local 0
2000
2001 class LIR_List: public CompilationResourceObj {
2002 private:
2003 LIR_OpList _operations;
2004
2005 Compilation* _compilation;
2006 #ifndef PRODUCT
2007 BlockBegin* _block;
2008 #endif
2009 #ifdef ASSERT
2010 const char * _file;
2011 int _line;
2012 #endif
2013
2014 void append(LIR_Op* op) {
2015 if (op->source() == NULL)
2016 op->set_source(_compilation->current_instruction());
2017 #ifndef PRODUCT
2018 if (PrintIRWithLIR) {
2019 _compilation->maybe_print_current_instruction();
2020 op->print(); tty->cr();
2021 }
2022 #endif // PRODUCT
2023
2024 _operations.append(op);
2025
2026 #ifdef ASSERT
2027 op->verify();
2028 op->set_file_and_line(_file, _line);
2029 _file = NULL;
2030 _line = 0;
2031 #endif
2032 }
2033
2034 public:
2035 LIR_List(Compilation* compilation, BlockBegin* block = NULL);
2036
2037 #ifdef ASSERT
2038 void set_file_and_line(const char * file, int line);
2039 #endif
2040
2041 //---------- accessors ---------------
2042 LIR_OpList* instructions_list() { return &_operations; }
2043 int length() const { return _operations.length(); }
2044 LIR_Op* at(int i) const { return _operations.at(i); }
2045
2046 NOT_PRODUCT(BlockBegin* block() const { return _block; });
2047
2048 // insert LIR_Ops in buffer to right places in LIR_List
2049 void append(LIR_InsertionBuffer* buffer);
2050
2051 //---------- mutators ---------------
2052 void insert_before(int i, LIR_List* op_list) { _operations.insert_before(i, op_list->instructions_list()); }
2053 void insert_before(int i, LIR_Op* op) { _operations.insert_before(i, op); }
2054 void remove_at(int i) { _operations.remove_at(i); }
2055
2056 //---------- printing -------------
2057 void print_instructions() PRODUCT_RETURN;
2058
2059
2060 //---------- instructions -------------
2061 void call_opt_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
2062 address dest, LIR_OprList* arguments,
2063 CodeEmitInfo* info) {
2064 append(new LIR_OpJavaCall(lir_optvirtual_call, method, receiver, result, dest, arguments, info));
2065 }
2066 void call_static(ciMethod* method, LIR_Opr result,
2067 address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
2068 append(new LIR_OpJavaCall(lir_static_call, method, LIR_OprFact::illegalOpr, result, dest, arguments, info));
2069 }
2070 void call_icvirtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
2071 address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
2072 append(new LIR_OpJavaCall(lir_icvirtual_call, method, receiver, result, dest, arguments, info));
2073 }
2074 void call_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
2075 intptr_t vtable_offset, LIR_OprList* arguments, CodeEmitInfo* info) {
2076 append(new LIR_OpJavaCall(lir_virtual_call, method, receiver, result, vtable_offset, arguments, info));
2077 }
2078 void call_dynamic(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
2079 address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
2080 append(new LIR_OpJavaCall(lir_dynamic_call, method, receiver, result, dest, arguments, info));
2081 }
2082
2083 void get_thread(LIR_Opr result) { append(new LIR_Op0(lir_get_thread, result)); }
2084 void word_align() { append(new LIR_Op0(lir_word_align)); }
2085 void membar() { append(new LIR_Op0(lir_membar)); }
2086 void membar_acquire() { append(new LIR_Op0(lir_membar_acquire)); }
2087 void membar_release() { append(new LIR_Op0(lir_membar_release)); }
2088 void membar_loadload() { append(new LIR_Op0(lir_membar_loadload)); }
2089 void membar_storestore() { append(new LIR_Op0(lir_membar_storestore)); }
2090 void membar_loadstore() { append(new LIR_Op0(lir_membar_loadstore)); }
2091 void membar_storeload() { append(new LIR_Op0(lir_membar_storeload)); }
2092
2093 void nop() { append(new LIR_Op0(lir_nop)); }
2094 void build_frame() { append(new LIR_Op0(lir_build_frame)); }
2095
2096 void std_entry(LIR_Opr receiver) { append(new LIR_Op0(lir_std_entry, receiver)); }
2097 void osr_entry(LIR_Opr osrPointer) { append(new LIR_Op0(lir_osr_entry, osrPointer)); }
2098
2099 void on_spin_wait() { append(new LIR_Op0(lir_on_spin_wait)); }
2100
2101 void branch_destination(Label* lbl) { append(new LIR_OpLabel(lbl)); }
2102
2103 void negate(LIR_Opr from, LIR_Opr to) { append(new LIR_Op1(lir_neg, from, to)); }
2104 void leal(LIR_Opr from, LIR_Opr result_reg) { append(new LIR_Op1(lir_leal, from, result_reg)); }
2105
2106 // result is a stack location for old backend and vreg for UseLinearScan
2107 // stack_loc_temp is an illegal register for old backend
2108 void roundfp(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result) { append(new LIR_OpRoundFP(reg, stack_loc_temp, result)); }
2109 void unaligned_move(LIR_Address* src, LIR_Opr dst) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); }
2110 void unaligned_move(LIR_Opr src, LIR_Address* dst) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), src->type(), lir_patch_none, NULL, lir_move_unaligned)); }
2111 void unaligned_move(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); }
2112 void move(LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); }
2113 void move(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info)); }
2114 void move(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info)); }
2115 void move_wide(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) {
2116 if (UseCompressedOops) {
2117 append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info, lir_move_wide));
2118 } else {
2119 move(src, dst, info);
2120 }
2121 }
2122 void move_wide(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) {
2123 if (UseCompressedOops) {
2124 append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info, lir_move_wide));
2125 } else {
2126 move(src, dst, info);
2127 }
2128 }
2129 void volatile_move(LIR_Opr src, LIR_Opr dst, BasicType type, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none) { append(new LIR_Op1(lir_move, src, dst, type, patch_code, info, lir_move_volatile)); }
2130
2131 void oop2reg (jobject o, LIR_Opr reg) { assert(reg->type() == T_OBJECT, "bad reg"); append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg)); }
2132 void oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info);
2133
2134 void metadata2reg (Metadata* o, LIR_Opr reg) { assert(reg->type() == T_METADATA, "bad reg"); append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg)); }
2135 void klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info);
2136
2137 void return_op(LIR_Opr result) { append(new LIR_Op1(lir_return, result)); }
2138
2139 void safepoint(LIR_Opr tmp, CodeEmitInfo* info) { append(new LIR_Op1(lir_safepoint, tmp, info)); }
2140
2141 #ifdef PPC32
2142 void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_OpConvert(code, left, dst, NULL, tmp1, tmp2)); }
2143 #endif
2144 void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, ConversionStub* stub = NULL/*, bool is_32bit = false*/) { append(new LIR_OpConvert(code, left, dst, stub)); }
2145
2146 void logical_and (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_and, left, right, dst)); }
2147 void logical_or (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_or, left, right, dst)); }
2148 void logical_xor (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_xor, left, right, dst)); }
2149
2150 void pack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_pack64, src, dst, T_LONG, lir_patch_none, NULL)); }
2151 void unpack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_unpack64, src, dst, T_LONG, lir_patch_none, NULL)); }
2152
2153 void null_check(LIR_Opr opr, CodeEmitInfo* info) { append(new LIR_Op1(lir_null_check, opr, info)); }
2154 void throw_exception(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info) {
2155 append(new LIR_Op2(lir_throw, exceptionPC, exceptionOop, LIR_OprFact::illegalOpr, info));
2156 }
2157 void unwind_exception(LIR_Opr exceptionOop) {
2158 append(new LIR_Op1(lir_unwind, exceptionOop));
2159 }
2160
2161 void compare_to (LIR_Opr left, LIR_Opr right, LIR_Opr dst) {
2162 append(new LIR_Op2(lir_compare_to, left, right, dst));
2163 }
2164
2165 void push(LIR_Opr opr) { append(new LIR_Op1(lir_push, opr)); }
2166 void pop(LIR_Opr reg) { append(new LIR_Op1(lir_pop, reg)); }
2167
2168 void cmp(LIR_Condition condition, LIR_Opr left, LIR_Opr right, CodeEmitInfo* info = NULL) {
2169 append(new LIR_Op2(lir_cmp, condition, left, right, info));
2170 }
2171 void cmp(LIR_Condition condition, LIR_Opr left, int right, CodeEmitInfo* info = NULL) {
2172 cmp(condition, left, LIR_OprFact::intConst(right), info);
2173 }
2174
2175 void cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info);
2176 void cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info);
2177
2178 void cmove(LIR_Condition condition, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst, BasicType type) {
2179 append(new LIR_Op2(lir_cmove, condition, src1, src2, dst, type));
2180 }
2181
2182 void cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2183 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2184 void cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2185 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2186 void cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2187 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2188
2189 void abs (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_abs , from, tmp, to)); }
2190 void sqrt(LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_sqrt, from, tmp, to)); }
2191 void fmad(LIR_Opr from, LIR_Opr from1, LIR_Opr from2, LIR_Opr to) { append(new LIR_Op3(lir_fmad, from, from1, from2, to)); }
2192 void fmaf(LIR_Opr from, LIR_Opr from1, LIR_Opr from2, LIR_Opr to) { append(new LIR_Op3(lir_fmaf, from, from1, from2, to)); }
2193 void log10 (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log10, from, LIR_OprFact::illegalOpr, to, tmp)); }
2194 void tan (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_tan , from, tmp1, to, tmp2)); }
2195
2196 void add (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_add, left, right, res)); }
2197 void sub (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_sub, left, right, res, info)); }
2198 void mul (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_mul, left, right, res)); }
2199 void mul_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_mul_strictfp, left, right, res, tmp)); }
2200 void div (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_div, left, right, res, info)); }
2201 void div_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_div_strictfp, left, right, res, tmp)); }
2202 void rem (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_rem, left, right, res, info)); }
2203
2204 void volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2205 void volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code);
2206
2207 void load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none);
2208
2209 void store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2210 void store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2211 void store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none);
2212 void volatile_store_mem_reg(LIR_Opr src, LIR_Address* address, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2213 void volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code);
2214
2215 void idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2216 void idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2217 void irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2218 void irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2219
2220 void allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub);
2221 void allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub);
2222
2223 // jump is an unconditional branch
2224 void jump(BlockBegin* block) {
2225 append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, block));
2226 }
2227 void jump(CodeStub* stub) {
2228 append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, stub));
2229 }
2230 void branch(LIR_Condition cond, BasicType type, Label* lbl) { append(new LIR_OpBranch(cond, type, lbl)); }
2231 void branch(LIR_Condition cond, BasicType type, BlockBegin* block) {
2232 assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons");
2233 append(new LIR_OpBranch(cond, type, block));
2234 }
2235 void branch(LIR_Condition cond, BasicType type, CodeStub* stub) {
2236 assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons");
2237 append(new LIR_OpBranch(cond, type, stub));
2238 }
2239 void branch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* unordered) {
2240 assert(type == T_FLOAT || type == T_DOUBLE, "fp comparisons only");
2241 append(new LIR_OpBranch(cond, type, block, unordered));
2242 }
2243
2244 void shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
2245 void shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
2246 void unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
2247
2248 void shift_left(LIR_Opr value, int count, LIR_Opr dst) { shift_left(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }
2249 void shift_right(LIR_Opr value, int count, LIR_Opr dst) { shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }
2250 void unsigned_shift_right(LIR_Opr value, int count, LIR_Opr dst) { unsigned_shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }
2251
2252 void lcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_cmp_l2i, left, right, dst)); }
2253 void fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less);
2254
2255 void call_runtime_leaf(address routine, LIR_Opr tmp, LIR_Opr result, LIR_OprList* arguments) {
2256 append(new LIR_OpRTCall(routine, tmp, result, arguments));
2257 }
2258
2259 void call_runtime(address routine, LIR_Opr tmp, LIR_Opr result,
2260 LIR_OprList* arguments, CodeEmitInfo* info) {
2261 append(new LIR_OpRTCall(routine, tmp, result, arguments, info));
2262 }
2263
2264 void load_stack_address_monitor(int monitor_ix, LIR_Opr dst) { append(new LIR_Op1(lir_monaddr, LIR_OprFact::intConst(monitor_ix), dst)); }
2265 void unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub);
2266 void lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info);
2267
2268 void set_24bit_fpu() { append(new LIR_Op0(lir_24bit_FPU )); }
2269 void restore_fpu() { append(new LIR_Op0(lir_reset_FPU )); }
2270 void breakpoint() { append(new LIR_Op0(lir_breakpoint)); }
2271
2272 void arraycopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info) { append(new LIR_OpArrayCopy(src, src_pos, dst, dst_pos, length, tmp, expected_type, flags, info)); }
2273
2274 void update_crc32(LIR_Opr crc, LIR_Opr val, LIR_Opr res) { append(new LIR_OpUpdateCRC32(crc, val, res)); }
2275
2276 void fpop_raw() { append(new LIR_Op0(lir_fpop_raw)); }
2277
2278 void instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci);
2279 void store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci);
2280
2281 void checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass,
2282 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
2283 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub,
2284 ciMethod* profiled_method, int profiled_bci);
2285 // MethodData* profiling
2286 void profile_call(ciMethod* method, int bci, ciMethod* callee, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* cha_klass) {
2287 append(new LIR_OpProfileCall(method, bci, callee, mdo, recv, t1, cha_klass));
2288 }
2289 void profile_type(LIR_Address* mdp, LIR_Opr obj, ciKlass* exact_klass, intptr_t current_klass, LIR_Opr tmp, bool not_null, bool no_conflict) {
2290 append(new LIR_OpProfileType(LIR_OprFact::address(mdp), obj, exact_klass, current_klass, tmp, not_null, no_conflict));
2291 }
2292
2293 void xadd(LIR_Opr src, LIR_Opr add, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_xadd, src, add, res, tmp)); }
2294 void xchg(LIR_Opr src, LIR_Opr set, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_xchg, src, set, res, tmp)); }
2295 #ifdef ASSERT
2296 void lir_assert(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, const char* msg, bool halt) { append(new LIR_OpAssert(condition, opr1, opr2, msg, halt)); }
2297 #endif
2298 };
2299
2300 void print_LIR(BlockList* blocks);
2301
2302 class LIR_InsertionBuffer : public CompilationResourceObj {
2303 private:
2304 LIR_List* _lir; // the lir list where ops of this buffer should be inserted later (NULL when uninitialized)
2305
2306 // list of insertion points. index and count are stored alternately:
2307 // _index_and_count[i * 2]: the index into lir list where "count" ops should be inserted
2308 // _index_and_count[i * 2 + 1]: the number of ops to be inserted at index
2309 intStack _index_and_count;
2310
2311 // the LIR_Ops to be inserted
2312 LIR_OpList _ops;
2313
2314 void append_new(int index, int count) { _index_and_count.append(index); _index_and_count.append(count); }
2315 void set_index_at(int i, int value) { _index_and_count.at_put((i << 1), value); }
2316 void set_count_at(int i, int value) { _index_and_count.at_put((i << 1) + 1, value); }
2317
2318 #ifdef ASSERT
2319 void verify();
2320 #endif
2321 public:
2322 LIR_InsertionBuffer() : _lir(NULL), _index_and_count(8), _ops(8) { }
2323
2324 // must be called before using the insertion buffer
2325 void init(LIR_List* lir) { assert(!initialized(), "already initialized"); _lir = lir; _index_and_count.clear(); _ops.clear(); }
2326 bool initialized() const { return _lir != NULL; }
2327 // called automatically when the buffer is appended to the LIR_List
2328 void finish() { _lir = NULL; }
2329
2330 // accessors
2331 LIR_List* lir_list() const { return _lir; }
2332 int number_of_insertion_points() const { return _index_and_count.length() >> 1; }
2333 int index_at(int i) const { return _index_and_count.at((i << 1)); }
2334 int count_at(int i) const { return _index_and_count.at((i << 1) + 1); }
2335
2336 int number_of_ops() const { return _ops.length(); }
2337 LIR_Op* op_at(int i) const { return _ops.at(i); }
2338
2339 // append an instruction to the buffer
2340 void append(int index, LIR_Op* op);
2341
2342 // instruction
2343 void move(int index, LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(index, new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); }
2344 };
2345
2346
2347 //
2348 // LIR_OpVisitState is used for manipulating LIR_Ops in an abstract way.
2349 // Calling a LIR_Op's visit function with a LIR_OpVisitState causes
2350 // information about the input, output and temporaries used by the
2351 // op to be recorded. It also records whether the op has call semantics
2352 // and also records all the CodeEmitInfos used by this op.
2353 //
2354
2355
2356 class LIR_OpVisitState: public StackObj {
2357 public:
2358 typedef enum { inputMode, firstMode = inputMode, tempMode, outputMode, numModes, invalidMode = -1 } OprMode;
2359
2360 enum {
2361 maxNumberOfOperands = 20,
2362 maxNumberOfInfos = 4
2363 };
2364
2365 private:
2366 LIR_Op* _op;
2367
2368 // optimization: the operands and infos are not stored in a variable-length
2369 // list, but in a fixed-size array to save time of size checks and resizing
2370 int _oprs_len[numModes];
2371 LIR_Opr* _oprs_new[numModes][maxNumberOfOperands];
2372 int _info_len;
2373 CodeEmitInfo* _info_new[maxNumberOfInfos];
2374
2375 bool _has_call;
2376 bool _has_slow_case;
2377
2378
2379 // only include register operands
2380 // addresses are decomposed to the base and index registers
2381 // constants and stack operands are ignored
2382 void append(LIR_Opr& opr, OprMode mode) {
2383 assert(opr->is_valid(), "should not call this otherwise");
2384 assert(mode >= 0 && mode < numModes, "bad mode");
2385
2386 if (opr->is_register()) {
2387 assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow");
2388 _oprs_new[mode][_oprs_len[mode]++] = &opr;
2389
2390 } else if (opr->is_pointer()) {
2391 LIR_Address* address = opr->as_address_ptr();
2392 if (address != NULL) {
2393 // special handling for addresses: add base and index register of the address
2394 // both are always input operands or temp if we want to extend
2395 // their liveness!
2396 if (mode == outputMode) {
2397 mode = inputMode;
2398 }
2399 assert (mode == inputMode || mode == tempMode, "input or temp only for addresses");
2400 if (address->_base->is_valid()) {
2401 assert(address->_base->is_register(), "must be");
2402 assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow");
2403 _oprs_new[mode][_oprs_len[mode]++] = &address->_base;
2404 }
2405 if (address->_index->is_valid()) {
2406 assert(address->_index->is_register(), "must be");
2407 assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow");
2408 _oprs_new[mode][_oprs_len[mode]++] = &address->_index;
2409 }
2410
2411 } else {
2412 assert(opr->is_constant(), "constant operands are not processed");
2413 }
2414 } else {
2415 assert(opr->is_stack(), "stack operands are not processed");
2416 }
2417 }
2418
2419 void append(CodeEmitInfo* info) {
2420 assert(info != NULL, "should not call this otherwise");
2421 assert(_info_len < maxNumberOfInfos, "array overflow");
2422 _info_new[_info_len++] = info;
2423 }
2424
2425 public:
2426 LIR_OpVisitState() { reset(); }
2427
2428 LIR_Op* op() const { return _op; }
2429 void set_op(LIR_Op* op) { reset(); _op = op; }
2430
2431 bool has_call() const { return _has_call; }
2432 bool has_slow_case() const { return _has_slow_case; }
2433
2434 void reset() {
2435 _op = NULL;
2436 _has_call = false;
2437 _has_slow_case = false;
2438
2439 _oprs_len[inputMode] = 0;
2440 _oprs_len[tempMode] = 0;
2441 _oprs_len[outputMode] = 0;
2442 _info_len = 0;
2443 }
2444
2445
2446 int opr_count(OprMode mode) const {
2447 assert(mode >= 0 && mode < numModes, "bad mode");
2448 return _oprs_len[mode];
2449 }
2450
2451 LIR_Opr opr_at(OprMode mode, int index) const {
2452 assert(mode >= 0 && mode < numModes, "bad mode");
2453 assert(index >= 0 && index < _oprs_len[mode], "index out of bound");
2454 return *_oprs_new[mode][index];
2455 }
2456
2457 void set_opr_at(OprMode mode, int index, LIR_Opr opr) const {
2458 assert(mode >= 0 && mode < numModes, "bad mode");
2459 assert(index >= 0 && index < _oprs_len[mode], "index out of bound");
2460 *_oprs_new[mode][index] = opr;
2461 }
2462
2463 int info_count() const {
2464 return _info_len;
2465 }
2466
2467 CodeEmitInfo* info_at(int index) const {
2468 assert(index < _info_len, "index out of bounds");
2469 return _info_new[index];
2470 }
2471
2472 XHandlers* all_xhandler();
2473
2474 // collects all register operands of the instruction
2475 void visit(LIR_Op* op);
2476
2477 #ifdef ASSERT
2478 // check that an operation has no operands
2479 bool no_operands(LIR_Op* op);
2480 #endif
2481
2482 // LIR_Op visitor functions use these to fill in the state
2483 void do_input(LIR_Opr& opr) { append(opr, LIR_OpVisitState::inputMode); }
2484 void do_output(LIR_Opr& opr) { append(opr, LIR_OpVisitState::outputMode); }
2485 void do_temp(LIR_Opr& opr) { append(opr, LIR_OpVisitState::tempMode); }
2486 void do_info(CodeEmitInfo* info) { append(info); }
2487
2488 void do_stub(CodeStub* stub);
2489 void do_call() { _has_call = true; }
2490 void do_slow_case() { _has_slow_case = true; }
2491 void do_slow_case(CodeEmitInfo* info) {
2492 _has_slow_case = true;
2493 append(info);
2494 }
2495 };
2496
2497
2498 inline LIR_Opr LIR_OprDesc::illegalOpr() { return LIR_OprFact::illegalOpr; };
2499
2500 #endif // SHARE_VM_C1_C1_LIR_HPP