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src/cpu/x86/vm/vm_version_x86.cpp

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 560     _features &= ~CPU_AVX512CD;
 561     _features &= ~CPU_AVX512BW;
 562     _features &= ~CPU_AVX512VL;
 563   }
 564 
 565   if (UseAVX < 2)
 566     _features &= ~CPU_AVX2;
 567 
 568   if (UseAVX < 1)
 569     _features &= ~CPU_AVX;
 570 
 571   if (!UseAES && !FLAG_IS_DEFAULT(UseAES))
 572     _features &= ~CPU_AES;
 573 
 574   if (logical_processors_per_package() == 1) {
 575     // HT processor could be installed on a system which doesn't support HT.
 576     _features &= ~CPU_HT;
 577   }
 578 
 579   char buf[256];
 580   jio_snprintf(buf, sizeof(buf), "(%u cores per cpu, %u threads per core) family %d model %d stepping %d%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
 581                cores_per_cpu(), threads_per_core(),
 582                cpu_family(), _model, _stepping,
 583                (supports_cmov() ? ", cmov" : ""),
 584                (supports_cmpxchg8() ? ", cx8" : ""),
 585                (supports_fxsr() ? ", fxsr" : ""),
 586                (supports_mmx()  ? ", mmx"  : ""),
 587                (supports_sse()  ? ", sse"  : ""),
 588                (supports_sse2() ? ", sse2" : ""),
 589                (supports_sse3() ? ", sse3" : ""),
 590                (supports_ssse3()? ", ssse3": ""),
 591                (supports_sse4_1() ? ", sse4.1" : ""),
 592                (supports_sse4_2() ? ", sse4.2" : ""),
 593                (supports_popcnt() ? ", popcnt" : ""),
 594                (supports_avx()    ? ", avx" : ""),
 595                (supports_avx2()   ? ", avx2" : ""),
 596                (supports_aes()    ? ", aes" : ""),
 597                (supports_clmul()  ? ", clmul" : ""),
 598                (supports_erms()   ? ", erms" : ""),
 599                (supports_rtm()    ? ", rtm" : ""),
 600                (supports_mmx_ext() ? ", mmxext" : ""),
 601                (supports_3dnow_prefetch() ? ", 3dnowpref" : ""),
 602                (supports_lzcnt()   ? ", lzcnt": ""),
 603                (supports_sse4a()   ? ", sse4a": ""),
 604                (supports_ht() ? ", ht": ""),
 605                (supports_tsc() ? ", tsc": ""),
 606                (supports_tscinv_bit() ? ", tscinvbit": ""),
 607                (supports_tscinv() ? ", tscinv": ""),
 608                (supports_bmi1() ? ", bmi1" : ""),
 609                (supports_bmi2() ? ", bmi2" : ""),
 610                (supports_adx() ? ", adx" : ""),
 611                (supports_evex() ? ", evex" : ""));

 612   _features_string = os::strdup(buf);
 613 
 614   // UseSSE is set to the smaller of what hardware supports and what
 615   // the command line requires.  I.e., you cannot set UseSSE to 2 on
 616   // older Pentiums which do not support it.
 617   if (UseSSE > 4) UseSSE=4;
 618   if (UseSSE < 0) UseSSE=0;
 619   if (!supports_sse4_1()) // Drop to 3 if no SSE4 support
 620     UseSSE = MIN2((intx)3,UseSSE);
 621   if (!supports_sse3()) // Drop to 2 if no SSE3 support
 622     UseSSE = MIN2((intx)2,UseSSE);
 623   if (!supports_sse2()) // Drop to 1 if no SSE2 support
 624     UseSSE = MIN2((intx)1,UseSSE);
 625   if (!supports_sse ()) // Drop to 0 if no SSE  support
 626     UseSSE = 0;
 627 
 628   // Use AES instructions if available.
 629   if (supports_aes()) {
 630     if (FLAG_IS_DEFAULT(UseAES)) {
 631       FLAG_SET_DEFAULT(UseAES, true);


 713     }
 714   }
 715   else if (UseCRC32CIntrinsics) {
 716     if (!FLAG_IS_DEFAULT(UseCRC32CIntrinsics)) {
 717       warning("CRC32C intrinsics are not available on this CPU");
 718     }
 719     FLAG_SET_DEFAULT(UseCRC32CIntrinsics, false);
 720   }
 721 
 722   // GHASH/GCM intrinsics
 723   if (UseCLMUL && (UseSSE > 2)) {
 724     if (FLAG_IS_DEFAULT(UseGHASHIntrinsics)) {
 725       UseGHASHIntrinsics = true;
 726     }
 727   } else if (UseGHASHIntrinsics) {
 728     if (!FLAG_IS_DEFAULT(UseGHASHIntrinsics))
 729       warning("GHASH intrinsic requires CLMUL and SSE2 instructions on this CPU");
 730     FLAG_SET_DEFAULT(UseGHASHIntrinsics, false);
 731   }
 732 
 733   if (UseSHA) {






 734     warning("SHA instructions are not available on this CPU");
 735     FLAG_SET_DEFAULT(UseSHA, false);
 736   }
 737 
 738   if (UseSHA1Intrinsics) {




 739     warning("Intrinsics for SHA-1 crypto hash functions not available on this CPU.");
 740     FLAG_SET_DEFAULT(UseSHA1Intrinsics, false);
 741   }
 742 
 743   if (UseSHA256Intrinsics) {




 744     warning("Intrinsics for SHA-224 and SHA-256 crypto hash functions not available on this CPU.");
 745     FLAG_SET_DEFAULT(UseSHA256Intrinsics, false);
 746   }
 747 
 748   if (UseSHA512Intrinsics) {
 749     warning("Intrinsics for SHA-384 and SHA-512 crypto hash functions not available on this CPU.");
 750     FLAG_SET_DEFAULT(UseSHA512Intrinsics, false);
 751   }
 752 
 753   if (UseAdler32Intrinsics) {
 754     warning("Adler32Intrinsics not available on this CPU.");
 755     FLAG_SET_DEFAULT(UseAdler32Intrinsics, false);
 756   }
 757 
 758   // Adjust RTM (Restricted Transactional Memory) flags
 759   if (!supports_rtm() && UseRTMLocking) {
 760     // Can't continue because UseRTMLocking affects UseBiasedLocking flag
 761     // setting during arguments processing. See use_biased_locking().
 762     // VM_Version_init() is executed after UseBiasedLocking is used
 763     // in Thread::allocate().




 560     _features &= ~CPU_AVX512CD;
 561     _features &= ~CPU_AVX512BW;
 562     _features &= ~CPU_AVX512VL;
 563   }
 564 
 565   if (UseAVX < 2)
 566     _features &= ~CPU_AVX2;
 567 
 568   if (UseAVX < 1)
 569     _features &= ~CPU_AVX;
 570 
 571   if (!UseAES && !FLAG_IS_DEFAULT(UseAES))
 572     _features &= ~CPU_AES;
 573 
 574   if (logical_processors_per_package() == 1) {
 575     // HT processor could be installed on a system which doesn't support HT.
 576     _features &= ~CPU_HT;
 577   }
 578 
 579   char buf[256];
 580   jio_snprintf(buf, sizeof(buf), "(%u cores per cpu, %u threads per core) family %d model %d stepping %d%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
 581                cores_per_cpu(), threads_per_core(),
 582                cpu_family(), _model, _stepping,
 583                (supports_cmov() ? ", cmov" : ""),
 584                (supports_cmpxchg8() ? ", cx8" : ""),
 585                (supports_fxsr() ? ", fxsr" : ""),
 586                (supports_mmx()  ? ", mmx"  : ""),
 587                (supports_sse()  ? ", sse"  : ""),
 588                (supports_sse2() ? ", sse2" : ""),
 589                (supports_sse3() ? ", sse3" : ""),
 590                (supports_ssse3()? ", ssse3": ""),
 591                (supports_sse4_1() ? ", sse4.1" : ""),
 592                (supports_sse4_2() ? ", sse4.2" : ""),
 593                (supports_popcnt() ? ", popcnt" : ""),
 594                (supports_avx()    ? ", avx" : ""),
 595                (supports_avx2()   ? ", avx2" : ""),
 596                (supports_aes()    ? ", aes" : ""),
 597                (supports_clmul()  ? ", clmul" : ""),
 598                (supports_erms()   ? ", erms" : ""),
 599                (supports_rtm()    ? ", rtm" : ""),
 600                (supports_mmx_ext() ? ", mmxext" : ""),
 601                (supports_3dnow_prefetch() ? ", 3dnowpref" : ""),
 602                (supports_lzcnt()   ? ", lzcnt": ""),
 603                (supports_sse4a()   ? ", sse4a": ""),
 604                (supports_ht() ? ", ht": ""),
 605                (supports_tsc() ? ", tsc": ""),
 606                (supports_tscinv_bit() ? ", tscinvbit": ""),
 607                (supports_tscinv() ? ", tscinv": ""),
 608                (supports_bmi1() ? ", bmi1" : ""),
 609                (supports_bmi2() ? ", bmi2" : ""),
 610                (supports_adx() ? ", adx" : ""),
 611                (supports_evex() ? ", evex" : ""),
 612                (supports_sha() ? ", sha" : ""));
 613   _features_string = os::strdup(buf);
 614 
 615   // UseSSE is set to the smaller of what hardware supports and what
 616   // the command line requires.  I.e., you cannot set UseSSE to 2 on
 617   // older Pentiums which do not support it.
 618   if (UseSSE > 4) UseSSE=4;
 619   if (UseSSE < 0) UseSSE=0;
 620   if (!supports_sse4_1()) // Drop to 3 if no SSE4 support
 621     UseSSE = MIN2((intx)3,UseSSE);
 622   if (!supports_sse3()) // Drop to 2 if no SSE3 support
 623     UseSSE = MIN2((intx)2,UseSSE);
 624   if (!supports_sse2()) // Drop to 1 if no SSE2 support
 625     UseSSE = MIN2((intx)1,UseSSE);
 626   if (!supports_sse ()) // Drop to 0 if no SSE  support
 627     UseSSE = 0;
 628 
 629   // Use AES instructions if available.
 630   if (supports_aes()) {
 631     if (FLAG_IS_DEFAULT(UseAES)) {
 632       FLAG_SET_DEFAULT(UseAES, true);


 714     }
 715   }
 716   else if (UseCRC32CIntrinsics) {
 717     if (!FLAG_IS_DEFAULT(UseCRC32CIntrinsics)) {
 718       warning("CRC32C intrinsics are not available on this CPU");
 719     }
 720     FLAG_SET_DEFAULT(UseCRC32CIntrinsics, false);
 721   }
 722 
 723   // GHASH/GCM intrinsics
 724   if (UseCLMUL && (UseSSE > 2)) {
 725     if (FLAG_IS_DEFAULT(UseGHASHIntrinsics)) {
 726       UseGHASHIntrinsics = true;
 727     }
 728   } else if (UseGHASHIntrinsics) {
 729     if (!FLAG_IS_DEFAULT(UseGHASHIntrinsics))
 730       warning("GHASH intrinsic requires CLMUL and SSE2 instructions on this CPU");
 731     FLAG_SET_DEFAULT(UseGHASHIntrinsics, false);
 732   }
 733 
 734   if (supports_sha()) {
 735     if (FLAG_IS_DEFAULT(UseSHA)) {
 736       UseSHA = true;
 737     }
 738   }
 739   else if (UseSHA) {
 740     if (!FLAG_IS_DEFAULT(UseSHA))
 741       warning("SHA instructions are not available on this CPU");
 742     FLAG_SET_DEFAULT(UseSHA, false);
 743   }
 744 
 745   if (UseSHA && supports_sha()) {
 746     if (FLAG_IS_DEFAULT(UseSHA1Intrinsics)) {
 747       FLAG_SET_DEFAULT(UseSHA1Intrinsics, true);
 748     }
 749   } else if (UseSHA1Intrinsics) {
 750     warning("Intrinsics for SHA-1 crypto hash functions not available on this CPU.");
 751     FLAG_SET_DEFAULT(UseSHA1Intrinsics, false);
 752   }
 753 
 754   if (UseSHA && supports_sha()) {
 755     if (FLAG_IS_DEFAULT(UseSHA256Intrinsics)) {
 756       FLAG_SET_DEFAULT(UseSHA256Intrinsics, true);
 757     }
 758   } else if (UseSHA256Intrinsics) {
 759     warning("Intrinsics for SHA-224 and SHA-256 crypto hash functions not available on this CPU.");
 760     FLAG_SET_DEFAULT(UseSHA256Intrinsics, false);
 761   }
 762 
 763   if (UseSHA512Intrinsics) {
 764     warning("Intrinsics for SHA-384 and SHA-512 crypto hash functions not available on this CPU.");
 765     FLAG_SET_DEFAULT(UseSHA512Intrinsics, false);
 766   }
 767 
 768   if (UseAdler32Intrinsics) {
 769     warning("Adler32Intrinsics not available on this CPU.");
 770     FLAG_SET_DEFAULT(UseAdler32Intrinsics, false);
 771   }
 772 
 773   // Adjust RTM (Restricted Transactional Memory) flags
 774   if (!supports_rtm() && UseRTMLocking) {
 775     // Can't continue because UseRTMLocking affects UseBiasedLocking flag
 776     // setting during arguments processing. See use_biased_locking().
 777     // VM_Version_init() is executed after UseBiasedLocking is used
 778     // in Thread::allocate().


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