955 }
956
957 void MacroAssembler::addsd(XMMRegister dst, AddressLiteral src) {
958 if (reachable(src)) {
959 Assembler::addsd(dst, as_Address(src));
960 } else {
961 lea(rscratch1, src);
962 Assembler::addsd(dst, Address(rscratch1, 0));
963 }
964 }
965
966 void MacroAssembler::addss(XMMRegister dst, AddressLiteral src) {
967 if (reachable(src)) {
968 addss(dst, as_Address(src));
969 } else {
970 lea(rscratch1, src);
971 addss(dst, Address(rscratch1, 0));
972 }
973 }
974
975 void MacroAssembler::align(int modulus) {
976 align(modulus, offset());
977 }
978
979 void MacroAssembler::align(int modulus, int target) {
980 if (target % modulus != 0) {
981 nop(modulus - (target % modulus));
982 }
983 }
984
985 void MacroAssembler::andpd(XMMRegister dst, AddressLiteral src) {
986 // Used in sign-masking with aligned address.
987 assert((UseAVX > 0) || (((intptr_t)src.target() & 15) == 0), "SSE mode requires address alignment 16 bytes");
988 if (reachable(src)) {
989 Assembler::andpd(dst, as_Address(src));
990 } else {
991 lea(rscratch1, src);
992 Assembler::andpd(dst, Address(rscratch1, 0));
993 }
994 }
5715 popa();
5716 }
5717
5718 static const double pi_4 = 0.7853981633974483;
5719
5720 void MacroAssembler::trigfunc(char trig, int num_fpu_regs_in_use) {
5721 // A hand-coded argument reduction for values in fabs(pi/4, pi/2)
5722 // was attempted in this code; unfortunately it appears that the
5723 // switch to 80-bit precision and back causes this to be
5724 // unprofitable compared with simply performing a runtime call if
5725 // the argument is out of the (-pi/4, pi/4) range.
5726
5727 Register tmp = noreg;
5728 if (!VM_Version::supports_cmov()) {
5729 // fcmp needs a temporary so preserve rbx,
5730 tmp = rbx;
5731 push(tmp);
5732 }
5733
5734 Label slow_case, done;
5735
5736 ExternalAddress pi4_adr = (address)&pi_4;
5737 if (reachable(pi4_adr)) {
5738 // x ?<= pi/4
5739 fld_d(pi4_adr);
5740 fld_s(1); // Stack: X PI/4 X
5741 fabs(); // Stack: |X| PI/4 X
5742 fcmp(tmp);
5743 jcc(Assembler::above, slow_case);
5744
5745 // fastest case: -pi/4 <= x <= pi/4
5746 switch(trig) {
5747 case 's':
5748 fsin();
5749 break;
5750 case 'c':
5751 fcos();
5752 break;
5753 case 't':
5754 ftan();
5755 break;
5756 default:
5757 assert(false, "bad intrinsic");
5758 break;
5759 }
5760 jmp(done);
5761 }
5762
5763 // slow case: runtime call
5764 bind(slow_case);
5765
5766 switch(trig) {
5767 case 's':
5768 {
5769 fp_runtime_fallback(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), 1, num_fpu_regs_in_use);
5770 }
5771 break;
5772 case 'c':
5773 {
5774 fp_runtime_fallback(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), 1, num_fpu_regs_in_use);
5775 }
5776 break;
5777 case 't':
5778 {
5779 fp_runtime_fallback(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), 1, num_fpu_regs_in_use);
5780 }
5781 break;
5782 default:
5783 assert(false, "bad intrinsic");
5784 break;
5785 }
5786
5787 // Come here with result in F-TOS
5788 bind(done);
5789
5790 if (tmp != noreg) {
5791 pop(tmp);
5792 }
5793 }
5794
5795
5796 // Look up the method for a megamorphic invokeinterface call.
5797 // The target method is determined by <intf_klass, itable_index>.
5798 // The receiver klass is in recv_klass.
5799 // On success, the result will be in method_result, and execution falls through.
5800 // On failure, execution transfers to the given label.
5801 void MacroAssembler::lookup_interface_method(Register recv_klass,
5802 Register intf_klass,
5803 RegisterOrConstant itable_index,
5804 Register method_result,
5805 Register scan_temp,
5806 Label& L_no_such_interface) {
5807 assert_different_registers(recv_klass, intf_klass, method_result, scan_temp);
5808 assert(itable_index.is_constant() || itable_index.as_register() == method_result,
5809 "caller must use same register for non-constant itable index as for method");
5810
5811 // Compute start of first itableOffsetEntry (which is at the end of the vtable)
5812 int vtable_base = InstanceKlass::vtable_start_offset() * wordSize;
5813 int itentry_off = itableMethodEntry::method_offset_in_bytes();
5814 int scan_step = itableOffsetEntry::size() * wordSize;
|
955 }
956
957 void MacroAssembler::addsd(XMMRegister dst, AddressLiteral src) {
958 if (reachable(src)) {
959 Assembler::addsd(dst, as_Address(src));
960 } else {
961 lea(rscratch1, src);
962 Assembler::addsd(dst, Address(rscratch1, 0));
963 }
964 }
965
966 void MacroAssembler::addss(XMMRegister dst, AddressLiteral src) {
967 if (reachable(src)) {
968 addss(dst, as_Address(src));
969 } else {
970 lea(rscratch1, src);
971 addss(dst, Address(rscratch1, 0));
972 }
973 }
974
975 void MacroAssembler::addpd(XMMRegister dst, AddressLiteral src) {
976 if (reachable(src)) {
977 Assembler::addpd(dst, as_Address(src));
978 } else {
979 lea(rscratch1, src);
980 Assembler::addpd(dst, Address(rscratch1, 0));
981 }
982 }
983
984 void MacroAssembler::align(int modulus) {
985 align(modulus, offset());
986 }
987
988 void MacroAssembler::align(int modulus, int target) {
989 if (target % modulus != 0) {
990 nop(modulus - (target % modulus));
991 }
992 }
993
994 void MacroAssembler::andpd(XMMRegister dst, AddressLiteral src) {
995 // Used in sign-masking with aligned address.
996 assert((UseAVX > 0) || (((intptr_t)src.target() & 15) == 0), "SSE mode requires address alignment 16 bytes");
997 if (reachable(src)) {
998 Assembler::andpd(dst, as_Address(src));
999 } else {
1000 lea(rscratch1, src);
1001 Assembler::andpd(dst, Address(rscratch1, 0));
1002 }
1003 }
5724 popa();
5725 }
5726
5727 static const double pi_4 = 0.7853981633974483;
5728
5729 void MacroAssembler::trigfunc(char trig, int num_fpu_regs_in_use) {
5730 // A hand-coded argument reduction for values in fabs(pi/4, pi/2)
5731 // was attempted in this code; unfortunately it appears that the
5732 // switch to 80-bit precision and back causes this to be
5733 // unprofitable compared with simply performing a runtime call if
5734 // the argument is out of the (-pi/4, pi/4) range.
5735
5736 Register tmp = noreg;
5737 if (!VM_Version::supports_cmov()) {
5738 // fcmp needs a temporary so preserve rbx,
5739 tmp = rbx;
5740 push(tmp);
5741 }
5742
5743 Label slow_case, done;
5744 if (trig == 't') {
5745 ExternalAddress pi4_adr = (address)&pi_4;
5746 if (reachable(pi4_adr)) {
5747 // x ?<= pi/4
5748 fld_d(pi4_adr);
5749 fld_s(1); // Stack: X PI/4 X
5750 fabs(); // Stack: |X| PI/4 X
5751 fcmp(tmp);
5752 jcc(Assembler::above, slow_case);
5753
5754 // fastest case: -pi/4 <= x <= pi/4
5755 ftan();
5756
5757 jmp(done);
5758 }
5759 }
5760 // slow case: runtime call
5761 bind(slow_case);
5762
5763 switch(trig) {
5764 case 's':
5765 {
5766 fp_runtime_fallback(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), 1, num_fpu_regs_in_use);
5767 }
5768 break;
5769 case 'c':
5770 {
5771 fp_runtime_fallback(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), 1, num_fpu_regs_in_use);
5772 }
5773 break;
5774 case 't':
5775 {
5776 fp_runtime_fallback(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), 1, num_fpu_regs_in_use);
5777 }
5778 break;
5779 default:
5780 assert(false, "bad intrinsic");
5781 break;
5782 }
5783
5784 // Come here with result in F-TOS
5785 bind(done);
5786
5787 if (tmp != noreg) {
5788 pop(tmp);
5789 }
5790 }
5791
5792 // Look up the method for a megamorphic invokeinterface call.
5793 // The target method is determined by <intf_klass, itable_index>.
5794 // The receiver klass is in recv_klass.
5795 // On success, the result will be in method_result, and execution falls through.
5796 // On failure, execution transfers to the given label.
5797 void MacroAssembler::lookup_interface_method(Register recv_klass,
5798 Register intf_klass,
5799 RegisterOrConstant itable_index,
5800 Register method_result,
5801 Register scan_temp,
5802 Label& L_no_such_interface) {
5803 assert_different_registers(recv_klass, intf_klass, method_result, scan_temp);
5804 assert(itable_index.is_constant() || itable_index.as_register() == method_result,
5805 "caller must use same register for non-constant itable index as for method");
5806
5807 // Compute start of first itableOffsetEntry (which is at the end of the vtable)
5808 int vtable_base = InstanceKlass::vtable_start_offset() * wordSize;
5809 int itentry_off = itableMethodEntry::method_offset_in_bytes();
5810 int scan_step = itableOffsetEntry::size() * wordSize;
|