src/cpu/x86/vm/macroAssembler_x86.hpp

@@ -870,10 +870,11 @@
 
   // Floating
 
   void andpd(XMMRegister dst, Address src) { Assembler::andpd(dst, src); }
   void andpd(XMMRegister dst, AddressLiteral src);
+  void andpd(XMMRegister dst, XMMRegister src) { Assembler::andpd(dst, src); }
 
   void andps(XMMRegister dst, XMMRegister src) { Assembler::andps(dst, src); }
   void andps(XMMRegister dst, Address src) { Assembler::andps(dst, src); }
   void andps(XMMRegister dst, AddressLiteral src);
 

@@ -905,26 +906,43 @@
   void fmul_s(AddressLiteral src) { Assembler::fmul_s(as_Address(src)); }
 
   void ldmxcsr(Address src) { Assembler::ldmxcsr(src); }
   void ldmxcsr(AddressLiteral src);
 
-  // compute pow(x,y) and exp(x) with x86 instructions. Don't cover
-  // all corner cases and may result in NaN and require fallback to a
-  // runtime call.
-  void fast_pow();
   void fast_exp(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3,
                 XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7,
                 Register rax, Register rcx, Register rdx, Register tmp);
 
   void fast_log(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3,
                 XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7,
                 Register rax, Register rcx, Register rdx, Register tmp1 LP64_ONLY(COMMA Register tmp2));
+
   void fast_pow(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3, XMMRegister xmm4,
                 XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7, Register rax, Register rcx,
                 Register rdx NOT_LP64(COMMA  Register tmp) LP64_ONLY(COMMA  Register tmp1)
                 LP64_ONLY(COMMA  Register tmp2) LP64_ONLY(COMMA  Register tmp3) LP64_ONLY(COMMA  Register tmp4));
 
+  void fast_sin(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3,
+                XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7,
+                Register rax, Register rbx LP64_ONLY(COMMA  Register rcx), Register rdx
+                LP64_ONLY(COMMA Register tmp1) LP64_ONLY(COMMA Register tmp2)
+                LP64_ONLY(COMMA Register tmp3) LP64_ONLY(COMMA Register tmp4));
+
+  void fast_cos(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3,
+                XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7,
+                Register rax, Register rcx, Register rdx NOT_LP64(COMMA Register tmp)
+                LP64_ONLY(COMMA Register r8) LP64_ONLY(COMMA Register r9)
+                LP64_ONLY(COMMA Register r10) LP64_ONLY(COMMA Register r11));
+
+#ifndef _LP64
+  void libm_sincos_huge(XMMRegister xmm0, XMMRegister xmm1, Register eax, Register ecx,
+                        Register edx, Register ebx, Register esi, Register edi,
+                        Register ebp, Register esp);
+  void libm_reduce_pi04l(Register eax, Register ecx, Register edx, Register ebx,
+                         Register esi, Register edi, Register ebp, Register esp);
+#endif
+
   void increase_precision();
   void restore_precision();
 
 private:
 

@@ -949,10 +967,14 @@
 
   void addss(XMMRegister dst, XMMRegister src)    { Assembler::addss(dst, src); }
   void addss(XMMRegister dst, Address src)        { Assembler::addss(dst, src); }
   void addss(XMMRegister dst, AddressLiteral src);
 
+  void addpd(XMMRegister dst, XMMRegister src)    { Assembler::addpd(dst, src); }
+  void addpd(XMMRegister dst, Address src)        { Assembler::addpd(dst, src); }
+  void addpd(XMMRegister dst, AddressLiteral src);
+
   void divsd(XMMRegister dst, XMMRegister src)    { Assembler::divsd(dst, src); }
   void divsd(XMMRegister dst, Address src)        { Assembler::divsd(dst, src); }
   void divsd(XMMRegister dst, AddressLiteral src);
 
   void divss(XMMRegister dst, XMMRegister src)    { Assembler::divss(dst, src); }