--- old/src/cpu/x86/vm/x86_32.ad	2016-03-25 14:15:33.345560000 -0700
+++ new/src/cpu/x86/vm/x86_32.ad	2016-03-25 14:15:32.799528700 -0700
@@ -9819,27 +9819,6 @@
   ins_pipe( pipe_slow );
 %}
 
-instruct tanDPR_reg(regDPR1 dst, regDPR1 src) %{
-  predicate (UseSSE<=1);
-  match(Set dst(TanD src));
-  format %{ "DTAN   $dst" %}
-  ins_encode( Opcode(0xD9), Opcode(0xF2),    // fptan
-              Opcode(0xDD), Opcode(0xD8));   // fstp st
-  ins_pipe( pipe_slow );
-%}
-
-instruct tanD_reg(regD dst, eFlagsReg cr) %{
-  predicate (UseSSE>=2);
-  match(Set dst(TanD dst));
-  effect(KILL cr); // Push_{Src|Result}D() uses "{SUB|ADD} ESP,8"
-  format %{ "DTAN   $dst" %}
-  ins_encode( Push_SrcD(dst),
-              Opcode(0xD9), Opcode(0xF2),    // fptan
-              Opcode(0xDD), Opcode(0xD8),   // fstp st
-              Push_ResultD(dst) );
-  ins_pipe( pipe_slow );
-%}
-
 instruct atanDPR_reg(regDPR dst, regDPR src) %{
   predicate (UseSSE<=1);
   match(Set dst(AtanD dst src));
@@ -9871,41 +9850,6 @@
   ins_pipe( pipe_slow );
 %}
 
-instruct log10DPR_reg(regDPR1 dst, regDPR1 src) %{
-  predicate (UseSSE<=1);
-  // The source Double operand on FPU stack
-  match(Set dst (Log10D src));
-  // fldlg2       ; push log_10(2) on the FPU stack; full 80-bit number
-  // fxch         ; swap ST(0) with ST(1)
-  // fyl2x        ; compute log_10(2) * log_2(x)
-  format %{ "FLDLG2 \t\t\t#Log10\n\t"
-            "FXCH   \n\t"
-            "FYL2X  \t\t\t# Q=Log10*Log_2(x)"
-         %}
-  ins_encode( Opcode(0xD9), Opcode(0xEC),   // fldlg2
-              Opcode(0xD9), Opcode(0xC9),   // fxch
-              Opcode(0xD9), Opcode(0xF1));  // fyl2x
-
-  ins_pipe( pipe_slow );
-%}
-
-instruct log10D_reg(regD dst, regD src, eFlagsReg cr) %{
-  predicate (UseSSE>=2);
-  effect(KILL cr);
-  match(Set dst (Log10D src));
-  // fldlg2       ; push log_10(2) on the FPU stack; full 80-bit number
-  // fyl2x        ; compute log_10(2) * log_2(x)
-  format %{ "FLDLG2 \t\t\t#Log10\n\t"
-            "FYL2X  \t\t\t# Q=Log10*Log_2(x)"
-         %}
-  ins_encode( Opcode(0xD9), Opcode(0xEC),   // fldlg2
-              Push_SrcD(src),
-              Opcode(0xD9), Opcode(0xF1),   // fyl2x
-              Push_ResultD(dst));
-
-  ins_pipe( pipe_slow );
-%}
-
 //-------------Float Instructions-------------------------------
 // Float Math