2348 if (value->is_double_xmm()) {
2349 switch(code) {
2350 case lir_abs :
2351 {
2352 if (dest->as_xmm_double_reg() != value->as_xmm_double_reg()) {
2353 __ movdbl(dest->as_xmm_double_reg(), value->as_xmm_double_reg());
2354 }
2355 __ andpd(dest->as_xmm_double_reg(),
2356 ExternalAddress((address)double_signmask_pool));
2357 }
2358 break;
2359
2360 case lir_sqrt: __ sqrtsd(dest->as_xmm_double_reg(), value->as_xmm_double_reg()); break;
2361 // all other intrinsics are not available in the SSE instruction set, so FPU is used
2362 default : ShouldNotReachHere();
2363 }
2364
2365 } else if (value->is_double_fpu()) {
2366 assert(value->fpu_regnrLo() == 0 && dest->fpu_regnrLo() == 0, "both must be on TOS");
2367 switch(code) {
2368 case lir_log10 : __ flog10() ; break;
2369 case lir_abs : __ fabs() ; break;
2370 case lir_sqrt : __ fsqrt(); break;
2371 case lir_tan :
2372 // Should consider not saving rbx, if not necessary
2373 __ trigfunc('t', op->as_Op2()->fpu_stack_size());
2374 break;
2375 default : ShouldNotReachHere();
2376 }
2377 } else {
2378 Unimplemented();
2379 }
2380 }
2381
2382 void LIR_Assembler::logic_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dst) {
2383 // assert(left->destroys_register(), "check");
2384 if (left->is_single_cpu()) {
2385 Register reg = left->as_register();
2386 if (right->is_constant()) {
2387 int val = right->as_constant_ptr()->as_jint();
2388 switch (code) {
2389 case lir_logic_and: __ andl (reg, val); break;
2390 case lir_logic_or: __ orl (reg, val); break;
2391 case lir_logic_xor: __ xorl (reg, val); break;
2392 default: ShouldNotReachHere();
2393 }
2394 } else if (right->is_stack()) {
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2348 if (value->is_double_xmm()) {
2349 switch(code) {
2350 case lir_abs :
2351 {
2352 if (dest->as_xmm_double_reg() != value->as_xmm_double_reg()) {
2353 __ movdbl(dest->as_xmm_double_reg(), value->as_xmm_double_reg());
2354 }
2355 __ andpd(dest->as_xmm_double_reg(),
2356 ExternalAddress((address)double_signmask_pool));
2357 }
2358 break;
2359
2360 case lir_sqrt: __ sqrtsd(dest->as_xmm_double_reg(), value->as_xmm_double_reg()); break;
2361 // all other intrinsics are not available in the SSE instruction set, so FPU is used
2362 default : ShouldNotReachHere();
2363 }
2364
2365 } else if (value->is_double_fpu()) {
2366 assert(value->fpu_regnrLo() == 0 && dest->fpu_regnrLo() == 0, "both must be on TOS");
2367 switch(code) {
2368 case lir_abs : __ fabs() ; break;
2369 case lir_sqrt : __ fsqrt(); break;
2370 default : ShouldNotReachHere();
2371 }
2372 } else {
2373 Unimplemented();
2374 }
2375 }
2376
2377 void LIR_Assembler::logic_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dst) {
2378 // assert(left->destroys_register(), "check");
2379 if (left->is_single_cpu()) {
2380 Register reg = left->as_register();
2381 if (right->is_constant()) {
2382 int val = right->as_constant_ptr()->as_jint();
2383 switch (code) {
2384 case lir_logic_and: __ andl (reg, val); break;
2385 case lir_logic_or: __ orl (reg, val); break;
2386 case lir_logic_xor: __ xorl (reg, val); break;
2387 default: ShouldNotReachHere();
2388 }
2389 } else if (right->is_stack()) {
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