1 /*
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   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
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   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
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  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
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  24 
  25 #ifndef CPU_X86_VM_GLOBALS_X86_HPP
  26 #define CPU_X86_VM_GLOBALS_X86_HPP
  27 
  28 #include "utilities/globalDefinitions.hpp"
  29 #include "utilities/macros.hpp"
  30 
  31 // Sets the default values for platform dependent flags used by the runtime system.
  32 // (see globals.hpp)
  33 
  34 define_pd_global(bool, ShareVtableStubs,         true);
  35 define_pd_global(bool, NeedsDeoptSuspend,        false); // only register window machines need this
  36 
  37 define_pd_global(bool, ImplicitNullChecks,       true);  // Generate code for implicit null checks
  38 define_pd_global(bool, TrapBasedNullChecks,      false); // Not needed on x86.
  39 define_pd_global(bool, UncommonNullCast,         true);  // Uncommon-trap NULLs passed to check cast
  40 
  41 // See 4827828 for this change. There is no globals_core_i486.hpp. I can't
  42 // assign a different value for C2 without touching a number of files. Use
  43 // #ifdef to minimize the change as it's late in Mantis. -- FIXME.
  44 // c1 doesn't have this problem because the fix to 4858033 assures us
  45 // the the vep is aligned at CodeEntryAlignment whereas c2 only aligns
  46 // the uep and the vep doesn't get real alignment but just slops on by
  47 // only assured that the entry instruction meets the 5 byte size requirement.
  48 #if defined(COMPILER2) || INCLUDE_JVMCI
  49 define_pd_global(intx, CodeEntryAlignment,       32);
  50 #else
  51 define_pd_global(intx, CodeEntryAlignment,       16);
  52 #endif // COMPILER2
  53 define_pd_global(intx, OptoLoopAlignment,        16);
  54 define_pd_global(intx, InlineFrequencyCount,     100);
  55 define_pd_global(intx, InlineSmallCode,          1000);
  56 
  57 #define DEFAULT_STACK_YELLOW_PAGES (NOT_WINDOWS(2) WINDOWS_ONLY(3))
  58 #define DEFAULT_STACK_RED_PAGES (1)
  59 #define DEFAULT_STACK_RESERVED_PAGES (NOT_WINDOWS(1) WINDOWS_ONLY(0))
  60 
  61 #define MIN_STACK_YELLOW_PAGES DEFAULT_STACK_YELLOW_PAGES
  62 #define MIN_STACK_RED_PAGES DEFAULT_STACK_RED_PAGES
  63 #define MIN_STACK_RESERVED_PAGES (0)
  64 
  65 #ifdef AMD64
  66 // Very large C++ stack frames using solaris-amd64 optimized builds
  67 // due to lack of optimization caused by C++ compiler bugs
  68 #define DEFAULT_STACK_SHADOW_PAGES (NOT_WIN64(20) WIN64_ONLY(6) DEBUG_ONLY(+2))
  69 // For those clients that do not use write socket, we allow
  70 // the min range value to be below that of the default
  71 #define MIN_STACK_SHADOW_PAGES (NOT_WIN64(10) WIN64_ONLY(6) DEBUG_ONLY(+2))
  72 #else
  73 #define DEFAULT_STACK_SHADOW_PAGES (4 DEBUG_ONLY(+5))
  74 #define MIN_STACK_SHADOW_PAGES DEFAULT_STACK_SHADOW_PAGES
  75 #endif // AMD64
  76 
  77 define_pd_global(intx, StackYellowPages, DEFAULT_STACK_YELLOW_PAGES);
  78 define_pd_global(intx, StackRedPages, DEFAULT_STACK_RED_PAGES);
  79 define_pd_global(intx, StackShadowPages, DEFAULT_STACK_SHADOW_PAGES);
  80 define_pd_global(intx, StackReservedPages, DEFAULT_STACK_RESERVED_PAGES);
  81 
  82 define_pd_global(bool, RewriteBytecodes,     true);
  83 define_pd_global(bool, RewriteFrequentPairs, true);
  84 
  85 #ifdef _ALLBSD_SOURCE
  86 define_pd_global(bool, UseMembar,            true);
  87 #else
  88 define_pd_global(bool, UseMembar,            false);
  89 #endif
  90 
  91 // GC Ergo Flags
  92 define_pd_global(size_t, CMSYoungGenPerWorker, 64*M);  // default max size of CMS young gen, per GC worker thread
  93 
  94 define_pd_global(uintx, TypeProfileLevel, 111);
  95 
  96 define_pd_global(bool, CompactStrings, true);
  97 
  98 define_pd_global(bool, PreserveFramePointer, false);
  99 
 100 define_pd_global(intx, InitArrayShortSize, 8*BytesPerLong);
 101 
 102 #define ARCH_FLAGS(develop, product, diagnostic, experimental, notproduct, range, constraint) \
 103                                                                             \
 104   develop(bool, IEEEPrecision, true,                                        \
 105           "Enables IEEE precision (for INTEL only)")                        \
 106                                                                             \
 107   product(bool, UseStoreImmI16, true,                                       \
 108           "Use store immediate 16-bits value instruction on x86")           \
 109                                                                             \
 110   product(intx, UseAVX, 99,                                                 \
 111           "Highest supported AVX instructions set on x86/x64")              \
 112           range(0, 99)                                                      \
 113                                                                             \
 114   product(bool, UseCLMUL, false,                                            \
 115           "Control whether CLMUL instructions can be used on x86/x64")      \
 116                                                                             \
 117   diagnostic(bool, UseIncDec, true,                                         \
 118           "Use INC, DEC instructions on x86")                               \
 119                                                                             \
 120   product(bool, UseNewLongLShift, false,                                    \
 121           "Use optimized bitwise shift left")                               \
 122                                                                             \
 123   product(bool, UseAddressNop, false,                                       \
 124           "Use '0F 1F [addr]' NOP instructions on x86 cpus")                \
 125                                                                             \
 126   product(bool, UseXmmLoadAndClearUpper, true,                              \
 127           "Load low part of XMM register and clear upper part")             \
 128                                                                             \
 129   product(bool, UseXmmRegToRegMoveAll, false,                               \
 130           "Copy all XMM register bits when moving value between registers") \
 131                                                                             \
 132   product(bool, UseXmmI2D, false,                                           \
 133           "Use SSE2 CVTDQ2PD instruction to convert Integer to Double")     \
 134                                                                             \
 135   product(bool, UseXmmI2F, false,                                           \
 136           "Use SSE2 CVTDQ2PS instruction to convert Integer to Float")      \
 137                                                                             \
 138   product(bool, UseUnalignedLoadStores, false,                              \
 139           "Use SSE2 MOVDQU instruction for Arraycopy")                      \
 140                                                                             \
 141   product(bool, UseFastStosb, false,                                        \
 142           "Use fast-string operation for zeroing: rep stosb")               \
 143                                                                             \
 144   /* Use Restricted Transactional Memory for lock eliding */                \
 145   product(bool, UseRTMLocking, false,                                       \
 146           "Enable RTM lock eliding for inflated locks in compiled code")    \
 147                                                                             \
 148   experimental(bool, UseRTMForStackLocks, false,                            \
 149           "Enable RTM lock eliding for stack locks in compiled code")       \
 150                                                                             \
 151   product(bool, UseRTMDeopt, false,                                         \
 152           "Perform deopt and recompilation based on RTM abort ratio")       \
 153                                                                             \
 154   product(uintx, RTMRetryCount, 5,                                          \
 155           "Number of RTM retries on lock abort or busy")                    \
 156           range(0, max_uintx)                                               \
 157                                                                             \
 158   experimental(intx, RTMSpinLoopCount, 100,                                 \
 159           "Spin count for lock to become free before RTM retry")            \
 160                                                                             \
 161   experimental(intx, RTMAbortThreshold, 1000,                               \
 162           "Calculate abort ratio after this number of aborts")              \
 163                                                                             \
 164   experimental(intx, RTMLockingThreshold, 10000,                            \
 165           "Lock count at which to do RTM lock eliding without "             \
 166           "abort ratio calculation")                                        \
 167                                                                             \
 168   experimental(intx, RTMAbortRatio, 50,                                     \
 169           "Lock abort ratio at which to stop use RTM lock eliding")         \
 170                                                                             \
 171   experimental(intx, RTMTotalCountIncrRate, 64,                             \
 172           "Increment total RTM attempted lock count once every n times")    \
 173                                                                             \
 174   experimental(intx, RTMLockingCalculationDelay, 0,                         \
 175           "Number of milliseconds to wait before start calculating aborts " \
 176           "for RTM locking")                                                \
 177                                                                             \
 178   experimental(bool, UseRTMXendForLockBusy, true,                           \
 179           "Use RTM Xend instead of Xabort when lock busy")                  \
 180                                                                             \
 181   /* assembler */                                                           \
 182   product(bool, UseCountLeadingZerosInstruction, false,                     \
 183           "Use count leading zeros instruction")                            \
 184                                                                             \
 185   product(bool, UseCountTrailingZerosInstruction, false,                    \
 186           "Use count trailing zeros instruction")                           \
 187                                                                             \
 188   product(bool, UseSSE42Intrinsics, false,                                  \
 189           "SSE4.2 versions of intrinsics")                                  \
 190                                                                             \
 191   product(bool, UseBMI1Instructions, false,                                 \
 192           "Use BMI1 instructions")                                          \
 193                                                                             \
 194   product(bool, UseBMI2Instructions, false,                                 \
 195           "Use BMI2 instructions")                                          \
 196                                                                             \
 197   diagnostic(bool, UseLibmSinIntrinsic, true,                               \
 198           "Use Libm Sin Intrinsic")                                         \
 199                                                                             \
 200   diagnostic(bool, UseLibmCosIntrinsic, true,                               \
 201           "Use Libm Cos Intrinsic")
 202 #endif // CPU_X86_VM_GLOBALS_X86_HPP
--- EOF ---