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src/cpu/sparc/vm/sparc.ad

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1758   // Compare against expected klass
1759   __ cmp(temp_reg, G5_ic_reg);
1760   // Branch to miss code, checks xcc or icc depending
1761   __ trap(Assembler::notEqual, Assembler::ptr_cc, G0, ST_RESERVED_FOR_USER_0+2);
1762 }
1763 
1764 uint MachUEPNode::size(PhaseRegAlloc *ra_) const {
1765   return MachNode::size(ra_);
1766 }
1767 
1768 
1769 //=============================================================================
1770 
1771 
1772 // Emit exception handler code.
1773 int HandlerImpl::emit_exception_handler(CodeBuffer& cbuf) {
1774   Register temp_reg = G3;
1775   AddressLiteral exception_blob(OptoRuntime::exception_blob()->entry_point());
1776   MacroAssembler _masm(&cbuf);
1777 
1778   address base =
1779   __ start_a_stub(size_exception_handler());
1780   if (base == NULL)  return 0;  // CodeBuffer::expand failed


1781 
1782   int offset = __ offset();
1783 
1784   __ JUMP(exception_blob, temp_reg, 0); // sethi;jmp
1785   __ delayed()->nop();
1786 
1787   assert(__ offset() - offset <= (int) size_exception_handler(), "overflow");
1788 
1789   __ end_a_stub();
1790 
1791   return offset;
1792 }
1793 
1794 int HandlerImpl::emit_deopt_handler(CodeBuffer& cbuf) {
1795   // Can't use any of the current frame's registers as we may have deopted
1796   // at a poll and everything (including G3) can be live.
1797   Register temp_reg = L0;
1798   AddressLiteral deopt_blob(SharedRuntime::deopt_blob()->unpack());
1799   MacroAssembler _masm(&cbuf);
1800 
1801   address base =
1802   __ start_a_stub(size_deopt_handler());
1803   if (base == NULL)  return 0;  // CodeBuffer::expand failed


1804 
1805   int offset = __ offset();
1806   __ save_frame(0);
1807   __ JUMP(deopt_blob, temp_reg, 0); // sethi;jmp
1808   __ delayed()->restore();
1809 
1810   assert(__ offset() - offset <= (int) size_deopt_handler(), "overflow");
1811 
1812   __ end_a_stub();
1813   return offset;
1814 
1815 }
1816 
1817 // Given a register encoding, produce a Integer Register object
1818 static Register reg_to_register_object(int register_encoding) {
1819   assert(L5->encoding() == R_L5_enc && G1->encoding() == R_G1_enc, "right coding");
1820   return as_Register(register_encoding);
1821 }
1822 
1823 // Given a register encoding, produce a single-precision Float Register object


2584     MacroAssembler _masm(&cbuf);
2585     __ mov(SP, L7_mh_SP_save);
2586   %}
2587 
2588   enc_class restore_SP %{
2589     MacroAssembler _masm(&cbuf);
2590     __ mov(L7_mh_SP_save, SP);
2591   %}
2592 
2593   enc_class Java_Static_Call (method meth) %{    // JAVA STATIC CALL
2594     // CALL to fixup routine.  Fixup routine uses ScopeDesc info to determine
2595     // who we intended to call.
2596     if (!_method) {
2597       emit_call_reloc(cbuf, $meth$$method, relocInfo::runtime_call_type);
2598     } else if (_optimized_virtual) {
2599       emit_call_reloc(cbuf, $meth$$method, relocInfo::opt_virtual_call_type);
2600     } else {
2601       emit_call_reloc(cbuf, $meth$$method, relocInfo::static_call_type);
2602     }
2603     if (_method) {  // Emit stub for static call.
2604       CompiledStaticCall::emit_to_interp_stub(cbuf);





2605     }
2606   %}
2607 
2608   enc_class Java_Dynamic_Call (method meth) %{    // JAVA DYNAMIC CALL
2609     MacroAssembler _masm(&cbuf);
2610     __ set_inst_mark();
2611     int vtable_index = this->_vtable_index;
2612     // MachCallDynamicJavaNode::ret_addr_offset uses this same test
2613     if (vtable_index < 0) {
2614       // must be invalid_vtable_index, not nonvirtual_vtable_index
2615       assert(vtable_index == Method::invalid_vtable_index, "correct sentinel value");
2616       Register G5_ic_reg = reg_to_register_object(Matcher::inline_cache_reg_encode());
2617       assert(G5_ic_reg == G5_inline_cache_reg, "G5_inline_cache_reg used in assemble_ic_buffer_code()");
2618       assert(G5_ic_reg == G5_megamorphic_method, "G5_megamorphic_method used in megamorphic call stub");
2619       __ ic_call((address)$meth$$method);
2620     } else {
2621       assert(!UseInlineCaches, "expect vtable calls only if not using ICs");
2622       // Just go thru the vtable
2623       // get receiver klass (receiver already checked for non-null)
2624       // If we end up going thru a c2i adapter interpreter expects method in G5




1758   // Compare against expected klass
1759   __ cmp(temp_reg, G5_ic_reg);
1760   // Branch to miss code, checks xcc or icc depending
1761   __ trap(Assembler::notEqual, Assembler::ptr_cc, G0, ST_RESERVED_FOR_USER_0+2);
1762 }
1763 
1764 uint MachUEPNode::size(PhaseRegAlloc *ra_) const {
1765   return MachNode::size(ra_);
1766 }
1767 
1768 
1769 //=============================================================================
1770 
1771 
1772 // Emit exception handler code.
1773 int HandlerImpl::emit_exception_handler(CodeBuffer& cbuf) {
1774   Register temp_reg = G3;
1775   AddressLiteral exception_blob(OptoRuntime::exception_blob()->entry_point());
1776   MacroAssembler _masm(&cbuf);
1777 
1778   address base = __ start_a_stub(size_exception_handler());
1779   if (base == NULL) {
1780     ciEnv::current()->record_failure("CodeCache is full");
1781     return 0;  // CodeBuffer::expand failed
1782   }
1783 
1784   int offset = __ offset();
1785 
1786   __ JUMP(exception_blob, temp_reg, 0); // sethi;jmp
1787   __ delayed()->nop();
1788 
1789   assert(__ offset() - offset <= (int) size_exception_handler(), "overflow");
1790 
1791   __ end_a_stub();
1792 
1793   return offset;
1794 }
1795 
1796 int HandlerImpl::emit_deopt_handler(CodeBuffer& cbuf) {
1797   // Can't use any of the current frame's registers as we may have deopted
1798   // at a poll and everything (including G3) can be live.
1799   Register temp_reg = L0;
1800   AddressLiteral deopt_blob(SharedRuntime::deopt_blob()->unpack());
1801   MacroAssembler _masm(&cbuf);
1802 
1803   address base = __ start_a_stub(size_deopt_handler());
1804   if (base == NULL) {
1805     ciEnv::current()->record_failure("CodeCache is full");
1806     return 0;  // CodeBuffer::expand failed
1807   }
1808 
1809   int offset = __ offset();
1810   __ save_frame(0);
1811   __ JUMP(deopt_blob, temp_reg, 0); // sethi;jmp
1812   __ delayed()->restore();
1813 
1814   assert(__ offset() - offset <= (int) size_deopt_handler(), "overflow");
1815 
1816   __ end_a_stub();
1817   return offset;
1818 
1819 }
1820 
1821 // Given a register encoding, produce a Integer Register object
1822 static Register reg_to_register_object(int register_encoding) {
1823   assert(L5->encoding() == R_L5_enc && G1->encoding() == R_G1_enc, "right coding");
1824   return as_Register(register_encoding);
1825 }
1826 
1827 // Given a register encoding, produce a single-precision Float Register object


2588     MacroAssembler _masm(&cbuf);
2589     __ mov(SP, L7_mh_SP_save);
2590   %}
2591 
2592   enc_class restore_SP %{
2593     MacroAssembler _masm(&cbuf);
2594     __ mov(L7_mh_SP_save, SP);
2595   %}
2596 
2597   enc_class Java_Static_Call (method meth) %{    // JAVA STATIC CALL
2598     // CALL to fixup routine.  Fixup routine uses ScopeDesc info to determine
2599     // who we intended to call.
2600     if (!_method) {
2601       emit_call_reloc(cbuf, $meth$$method, relocInfo::runtime_call_type);
2602     } else if (_optimized_virtual) {
2603       emit_call_reloc(cbuf, $meth$$method, relocInfo::opt_virtual_call_type);
2604     } else {
2605       emit_call_reloc(cbuf, $meth$$method, relocInfo::static_call_type);
2606     }
2607     if (_method) {  // Emit stub for static call.
2608       address stub = CompiledStaticCall::emit_to_interp_stub(cbuf);
2609       // Stub does not fit into scratch buffer if TraceJumps is enabled
2610       if (stub == NULL && !(TraceJumps && Compile::current()->in_scratch_emit_size())) {
2611         ciEnv::current()->record_failure("CodeCache is full");
2612         return;
2613       } 
2614     }
2615   %}
2616 
2617   enc_class Java_Dynamic_Call (method meth) %{    // JAVA DYNAMIC CALL
2618     MacroAssembler _masm(&cbuf);
2619     __ set_inst_mark();
2620     int vtable_index = this->_vtable_index;
2621     // MachCallDynamicJavaNode::ret_addr_offset uses this same test
2622     if (vtable_index < 0) {
2623       // must be invalid_vtable_index, not nonvirtual_vtable_index
2624       assert(vtable_index == Method::invalid_vtable_index, "correct sentinel value");
2625       Register G5_ic_reg = reg_to_register_object(Matcher::inline_cache_reg_encode());
2626       assert(G5_ic_reg == G5_inline_cache_reg, "G5_inline_cache_reg used in assemble_ic_buffer_code()");
2627       assert(G5_ic_reg == G5_megamorphic_method, "G5_megamorphic_method used in megamorphic call stub");
2628       __ ic_call((address)$meth$$method);
2629     } else {
2630       assert(!UseInlineCaches, "expect vtable calls only if not using ICs");
2631       // Just go thru the vtable
2632       // get receiver klass (receiver already checked for non-null)
2633       // If we end up going thru a c2i adapter interpreter expects method in G5


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